| Run orig_default | Run icx_default | Run gcc_default | Run aocc_9 | Run icx_2 | Run gcc_7 |
| Loop Source Regions | - /beegfs/hackathon/users/eoseret/qaas_runs_test/179-146-5983/intel/stream/build/stream/src/stream.c: 476-478
| Loop Source Regions | - /beegfs/hackathon/users/eoseret/qaas_runs_test/179-146-5983/intel/stream/build/stream/src/stream.c: 476-479
| Loop Source Regions | - /beegfs/hackathon/users/eoseret/qaas_runs_test/179-146-5983/intel/stream/build/stream/src/stream.c: 476-479
| Loop Source Regions | - /beegfs/hackathon/users/eoseret/qaas_runs_test/179-146-5983/intel/stream/build/stream/src/stream.c: 476-479
| Loop Source Regions | - /beegfs/hackathon/users/eoseret/qaas_runs_test/179-146-5983/intel/stream/build/stream/src/stream.c: 476-479
| Loop Source Regions | - /beegfs/hackathon/users/eoseret/qaas_runs_test/179-146-5983/intel/stream/build/stream/src/stream.c: 476-479
|
| ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | GFLOP/s | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | GFLOP/s | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | GFLOP/s | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | GFLOP/s | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | GFLOP/s | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | GFLOP/s |
| 22 | 0.63 | 0.00 | 0.03 | 70 | 36.25 | 1991.39 | 7 | 0.59 | 0.00 | 0.03 | 100 | 100 | 1591.93 | 11 | 0.57 | 0.00 | 0.03 | 100 | 100 | 1627.22 | 15 | 0.60 | 0.00 | 0.03 | 100 | 25 | 1551.96 | 7 | 0.55 | 0.00 | 0.03 | 100 | 100 | 1717.89 | 12 | 0.57 | 0.00 | 0.03 | 100 | 100 | 1630.19 |
| | | | | |
| Sum on 1 analyzed binary loop (exec - 22) | Sum on 1 analyzed binary loop (exec - 7) | Sum on 1 analyzed binary loop (exec - 11) | Sum on 1 analyzed binary loop (exec - 15) | Sum on 1 analyzed binary loop (exec - 7) | Sum on 1 analyzed binary loop (exec - 12) |
| Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count |
| Loop Computation Issues | | Loop Computation Issues | | Loop Computation Issues | | Loop Computation Issues | | Loop Computation Issues | | Loop Computation Issues | |
| Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 1 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 1 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 1 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 1 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 1 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 1 |
| Data Access Issues | | Data Access Issues | | Data Access Issues | | Data Access Issues | | Data Access Issues | | Data Access Issues | |
| Presence of constant non-unit stride data access | 0 | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | | Presence of constant non-unit stride data access | | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | |
| More than 10% of the vector loads instructions are unaligned | 0 | More than 10% of the vector loads instructions are unaligned | 1 | More than 10% of the vector loads instructions are unaligned | | More than 10% of the vector loads instructions are unaligned | | More than 10% of the vector loads instructions are unaligned | 1 | More than 10% of the vector loads instructions are unaligned | |
| Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 0 | Presence of special instructions executing on a single port | | Presence of special instructions executing on a single port | | Presence of special instructions executing on a single port | 0 | Presence of special instructions executing on a single port | |
| Vectorization Roadblocks | | Vectorization Roadblocks | | Vectorization Roadblocks | | Vectorization Roadblocks | | Vectorization Roadblocks | | Vectorization Roadblocks | |
| Presence of constant non-unit stride data access | | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | | Presence of constant non-unit stride data access | | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | |
| Inefficient Vectorization | | Inefficient Vectorization | | Inefficient Vectorization | | Inefficient Vectorization | | Inefficient Vectorization | | Inefficient Vectorization | |
| Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | | Presence of special instructions executing on a single port | | Presence of special instructions executing on a single port | | Presence of special instructions executing on a single port | | Presence of special instructions executing on a single port | |
| Use of masked instructions | 1 | Use of masked instructions | | Use of masked instructions | | Use of masked instructions | | Use of masked instructions | | Use of masked instructions | |