OV - exec - Loop 291

	Loop Id: 291	Module: exec	Source: BsplineFunctor.h:305-336	Coverage: 0.01%

0x426740 VMOVAPD	(%RDX,%RSI,2),%YMM11    [8]

0x426745 VMOVAPD	0x20(%RDX,%RSI,2),%YMM10    [8]

0x42674b KMOVB	%K1,%K2

0x42674f KMOVB	%K1,%K3

0x426753 VMOVAPD	-0xf0(%RBP),%YMM9    [5]

0x42675b VMOVAPD	-0x190(%RBP),%YMM24    [5]

0x426765 VMOVDQA	(%RDI,%RSI,1),%YMM4    [3]

0x42676a ADD	$0x20,%RSI

0x42676e KMOVB	%K1,%K5

0x426772 KMOVB	%K1,%K6

0x426776 KMOVB	%K1,%K4

0x42677a KMOVB	%K1,%K7

0x42677e VMULPD	%YMM18,%YMM11,%YMM15

0x426784 VMULPD	%YMM18,%YMM10,%YMM0

0x42678a VCVTTPD2DQ	%YMM15,%XMM5

0x42678f VCVTTPD2DQ	%YMM0,%XMM3

0x426793 VINSERTI32X4	$0x1,%XMM3,%YMM5,%YMM6

0x42679a VPADDD	0x1994be(%RIP),%YMM6,%YMM12    [6]

0x4267a2 VPADDD	0x1994d6(%RIP),%YMM6,%YMM14    [6]

0x4267aa VPERM2I128	$0x11,%YMM6,%YMM6,%YMM7

0x4267b0 VPADDD	0x1994e8(%RIP),%YMM6,%YMM6    [6]

0x4267b8 VGATHERDPD	(%RAX,%XMM5,8),%YMM22{%K2}    [7]

0x4267bf VRNDSCALEPD	$0xb,%YMM15,%YMM1

0x4267c6 KMOVB	%K1,%K2

0x4267ca VGATHERDPD	(%RAX,%XMM7,8),%YMM21{%K3}    [7]

0x4267d1 KMOVB	%K1,%K3

0x4267d5 VPERM2I128	$0x11,%YMM12,%YMM12,%YMM7

0x4267db VGATHERDPD	(%RAX,%XMM12,8),%YMM23{%K4}    [7]

0x4267e2 VRNDSCALEPD	$0xb,%YMM0,%YMM2

0x4267e9 VGATHERDPD	(%RAX,%XMM7,8),%YMM5{%K5}    [7]

0x4267f0 VGATHERDPD	(%RAX,%XMM6,8),%YMM20{%K2}    [7]

0x4267f7 VPERM2I128	$0x11,%YMM6,%YMM6,%YMM7

0x4267fd VSUBPD	%YMM1,%YMM15,%YMM1

0x426801 VGATHERDPD	(%RAX,%XMM14,8),%YMM8{%K6}    [7]

0x426808 KMOVB	%K1,%K4

0x42680c VPERM2I128	$0x11,%YMM14,%YMM14,%YMM15

0x426812 VGATHERDPD	(%RAX,%XMM7,8),%YMM13{%K3}    [7]

0x426819 KMOVB	%K1,%K5

0x42681d KMOVB	%K1,%K6

0x426821 VGATHERDPD	(%RAX,%XMM15,8),%YMM12{%K7}    [7]

0x426828 KMOVB	%K1,%K7

0x42682c KMOVB	%K1,%K2

0x426830 VMOVAPD	-0xb0(%RBP),%YMM6    [5]

0x426838 VMOVAPD	-0xd0(%RBP),%YMM14    [5]

0x426840 VMOVAPD	-0x110(%RBP),%YMM15    [5]

0x426848 VSUBPD	%YMM2,%YMM0,%YMM0

0x42684c VMULPD	%YMM1,%YMM1,%YMM2

0x426850 KMOVB	%K1,%K3

0x426854 VMULPD	%YMM0,%YMM0,%YMM3

0x426858 VMULPD	%YMM2,%YMM1,%YMM17

0x42685e VMOVAPD	%YMM6,%YMM7

0x426862 VFMADD132PD	%YMM0,%YMM14,%YMM6

0x426867 VFMADD132PD	%YMM1,%YMM14,%YMM7

0x42686c VMULPD	%YMM3,%YMM0,%YMM16

0x426872 VMOVAPD	%YMM9,%YMM14

0x426877 VFMADD132PD	%YMM1,%YMM15,%YMM14

0x42687c VFMADD132PD	%YMM0,%YMM15,%YMM9

0x426881 VMOVAPD	-0x130(%RBP),%YMM15    [5]

0x426889 VMULPD	%YMM9,%YMM5,%YMM9

0x42688e VMULPD	%YMM14,%YMM23,%YMM14

0x426894 VMOVAPD	%YMM15,%YMM19

0x42689a VFMADD132PD	%YMM22,%YMM14,%YMM7

0x4268a0 VFMADD132PD	%YMM21,%YMM9,%YMM6

0x4268a6 VMOVAPD	-0x150(%RBP),%YMM14    [5]

0x4268ae VMOVAPD	-0x170(%RBP),%YMM9    [5]

0x4268b6 VFMADD132PD	%YMM1,%YMM14,%YMM19

0x4268bc VFMADD132PD	%YMM0,%YMM14,%YMM15

0x4268c1 VMOVAPD	%YMM9,%YMM14

0x4268c6 VFMADD132PD	%YMM1,%YMM24,%YMM14

0x4268cc VFMADD132PD	%YMM0,%YMM24,%YMM9

0x4268d2 VMULPD	%YMM14,%YMM20,%YMM14

0x4268d8 VMULPD	%YMM9,%YMM13,%YMM9

0x4268dd VFMADD231PD	%YMM19,%YMM8,%YMM14

0x4268e3 VFMADD231PD	%YMM15,%YMM12,%YMM9

0x4268e8 VMOVAPD	-0x1b0(%RBP),%YMM15    [5]

0x4268f0 VMOVDQA32	%XMM4,%XMM19

0x4268f6 VADDPD	%YMM14,%YMM7,%YMM7

0x4268fb VADDPD	%YMM9,%YMM6,%YMM6

0x426900 VMULPD	%YMM15,%YMM7,%YMM14

0x426905 VMULPD	%YMM15,%YMM6,%YMM9

0x42690a VBROADCASTSD	0x19943d(%RIP),%YMM7    [6]

0x426913 VSCATTERDPD	%YMM14,(%R13,%XMM4,8){%K4}    [4]

0x42691b VPERM2I128	$0x11,%YMM4,%YMM4,%YMM4

0x426921 VSCATTERDPD	%YMM9,(%R13,%XMM4,8){%K5}    [4]

0x426929 VMOVAPD	-0x1f0(%RBP),%YMM14    [5]

0x426931 VMOVAPD	-0x210(%RBP),%YMM15    [5]

0x426939 VMOVAPD	-0x1d0(%RBP),%YMM6    [5]

0x426941 VDIVPD	%YMM11,%YMM7,%YMM11

0x426946 VDIVPD	%YMM10,%YMM7,%YMM10

0x42694b VMOVAPD	%YMM14,%YMM7

0x42694f VFMADD132PD	%YMM0,%YMM15,%YMM14

0x426954 VFMADD132PD	%YMM1,%YMM15,%YMM7

0x426959 VMOVAPD	-0x270(%RBP),%YMM15    [5]

0x426961 VFMADD231PD	%YMM6,%YMM3,%YMM14

0x426966 VFMADD231PD	%YMM6,%YMM2,%YMM7

0x42696b VMOVAPD	-0x250(%RBP),%YMM6    [5]

0x426973 VMULPD	%YMM18,%YMM11,%YMM11

0x426979 VMOVAPD	%YMM6,%YMM9

0x42697d VFMADD132PD	%YMM0,%YMM15,%YMM6

0x426982 VFMADD132PD	%YMM1,%YMM15,%YMM9

0x426987 VMOVAPD	-0x230(%RBP),%YMM15    [5]

0x42698f VMULPD	%YMM18,%YMM10,%YMM10

0x426995 VFMADD231PD	%YMM15,%YMM3,%YMM6

0x42699a VFMADD231PD	%YMM15,%YMM2,%YMM9

0x42699f VMULPD	%YMM6,%YMM5,%YMM6

0x4269a3 VMULPD	%YMM9,%YMM23,%YMM9

0x4269a9 VFMADD132PD	%YMM21,%YMM6,%YMM14

0x4269af VMOVAPD	-0x2b0(%RBP),%YMM6    [5]

0x4269b7 VMOVAPD	-0x2d0(%RBP),%YMM15    [5]

0x4269bf VFMADD132PD	%YMM22,%YMM9,%YMM7

0x4269c5 VMOVAPD	-0x290(%RBP),%YMM9    [5]

0x4269cd VMOVAPD	%YMM6,%YMM24

0x4269d3 VFMADD132PD	%YMM0,%YMM15,%YMM6

0x4269d8 VFMADD132PD	%YMM1,%YMM15,%YMM24

0x4269de VMOVAPD	-0x2f0(%RBP),%YMM15    [5]

0x4269e6 VFMADD231PD	%YMM9,%YMM3,%YMM6

0x4269eb VFMADD231PD	%YMM9,%YMM2,%YMM24

0x4269f1 VMOVAPD	%YMM15,%YMM9

0x4269f6 VFMADD213PD	-0x90(%RBP),%YMM0,%YMM15    [5]

0x4269ff VFMADD213PD	-0x90(%RBP),%YMM1,%YMM9    [5]

0x426a08 VFMADD231PD	-0x70(%RBP),%YMM3,%YMM15    [5]

0x426a0e VFMADD231PD	-0x70(%RBP),%YMM2,%YMM9    [5]

0x426a14 VMULPD	%YMM15,%YMM13,%YMM15

0x426a19 VMULPD	%YMM9,%YMM20,%YMM9

0x426a1f VFMADD132PD	%YMM12,%YMM15,%YMM6

0x426a24 VFMADD231PD	%YMM24,%YMM8,%YMM9

0x426a2a VADDPD	%YMM14,%YMM6,%YMM14

0x426a2f VADDPD	%YMM9,%YMM7,%YMM7

0x426a34 VMULPD	%YMM10,%YMM14,%YMM10

0x426a39 VMULPD	%YMM11,%YMM7,%YMM11

0x426a3e VSCATTERDPD	%YMM11,(%R12,%XMM19,8){%K6}    [2]

0x426a45 VSCATTERDPD	%YMM10,(%R12,%XMM4,8){%K7}    [2]

0x426a4c VMOVAPD	-0x330(%RBP),%YMM6    [5]

0x426a54 VMOVAPD	-0x350(%RBP),%YMM7    [5]

0x426a5c VMOVAPD	-0x310(%RBP),%YMM15    [5]

0x426a64 VMOVAPD	-0x370(%RBP),%YMM11    [5]

0x426a6c VMULPD	%YMM6,%YMM2,%YMM9

0x426a70 VMULPD	%YMM6,%YMM3,%YMM14

0x426a74 VMOVAPD	%YMM7,%YMM10

0x426a78 VMOVAPD	-0x3b0(%RBP),%YMM6    [5]

0x426a80 VFMADD132PD	%YMM1,%YMM11,%YMM10

0x426a85 VFMADD132PD	%YMM0,%YMM11,%YMM7

0x426a8a VFMADD231PD	%YMM15,%YMM17,%YMM9

0x426a90 VFMADD231PD	%YMM15,%YMM16,%YMM14

0x426a96 VMOVAPD	-0x3f0(%RBP),%YMM15    [5]

0x426a9e VMULPD	%YMM6,%YMM2,%YMM11

0x426aa2 VADDPD	%YMM9,%YMM10,%YMM10

0x426aa7 VMOVAPD	-0x390(%RBP),%YMM9    [5]

0x426aaf VADDPD	%YMM14,%YMM7,%YMM7

0x426ab4 VMULPD	%YMM6,%YMM3,%YMM14

0x426ab8 VFMADD231PD	%YMM9,%YMM17,%YMM11

0x426abe VFMADD231PD	%YMM9,%YMM16,%YMM14

0x426ac4 VMOVAPD	-0x3d0(%RBP),%YMM9    [5]

0x426acc VMOVAPD	%YMM9,%YMM6

0x426ad0 VFMADD132PD	%YMM0,%YMM15,%YMM9

0x426ad5 VFMADD132PD	%YMM1,%YMM15,%YMM6

0x426ada VMULPD	%YMM30,%YMM2,%YMM15

0x426ae0 VMULPD	%YMM27,%YMM2,%YMM2

0x426ae6 VADDPD	%YMM14,%YMM9,%YMM14

0x426aeb VFMADD231PD	%YMM31,%YMM17,%YMM15

0x426af1 VADDPD	%YMM11,%YMM6,%YMM11

0x426af6 VFMADD231PD	%YMM28,%YMM17,%YMM2

0x426afc VMULPD	%YMM14,%YMM5,%YMM5

0x426b01 VMULPD	%YMM23,%YMM11,%YMM6

0x426b07 VFMADD231PD	%YMM7,%YMM21,%YMM5

0x426b0d VMOVAPD	-0x410(%RBP),%YMM7    [5]

0x426b15 VFMADD231PD	%YMM10,%YMM22,%YMM6

0x426b1b VMULPD	%YMM30,%YMM3,%YMM10

0x426b21 VMULPD	%YMM27,%YMM3,%YMM3

0x426b27 VFMADD231PD	%YMM28,%YMM16,%YMM3

0x426b2d VFMADD231PD	%YMM31,%YMM16,%YMM10

0x426b33 VMOVAPD	%YMM7,%YMM9

0x426b37 VFMADD231PD	%YMM29,%YMM0,%YMM7

0x426b3d VFMADD231PD	%YMM29,%YMM1,%YMM9

0x426b43 VFMADD132PD	%YMM26,%YMM25,%YMM0

0x426b49 VFMADD132PD	%YMM26,%YMM25,%YMM1

0x426b4f VADDPD	%YMM7,%YMM10,%YMM11

0x426b53 VADDPD	%YMM3,%YMM0,%YMM0

0x426b57 VADDPD	%YMM15,%YMM9,%YMM14

0x426b5c VADDPD	%YMM1,%YMM2,%YMM1

0x426b60 VMULPD	%YMM0,%YMM13,%YMM13

0x426b64 VMULPD	%YMM20,%YMM1,%YMM15

0x426b6a VFMADD132PD	%YMM11,%YMM13,%YMM12

0x426b6f VFMADD132PD	%YMM14,%YMM15,%YMM8

0x426b74 VADDPD	%YMM12,%YMM5,%YMM12

0x426b79 VADDPD	%YMM6,%YMM8,%YMM8

0x426b7d VSCATTERDPD	%YMM8,(%R10,%XMM19,8){%K2}    [1]

0x426b84 VSCATTERDPD	%YMM12,(%R10,%XMM4,8){%K3}    [1]

0x426b8b CMP	%R14,%RSI

0x426b8e JNE	426740

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 305 - 336

--------------------------------------------------------------------------------

305:     real_type r    = distArrayCompressed[j];

306:     int iScatter   = distIndices[j];

307:     real_type rinv = cOne / r;

308:     r *= DeltaRInv;

309:     int iGather   = (int)r;

310:     real_type t   = r - real_type(iGather);

311:     real_type tp0 = t * t * t;

312:     real_type tp1 = t * t;

313:     real_type tp2 = t;

314:

315:     real_type sCoef0 = SplineCoefs[iGather + 0];

316:     real_type sCoef1 = SplineCoefs[iGather + 1];

317:     real_type sCoef2 = SplineCoefs[iGather + 2];

318:     real_type sCoef3 = SplineCoefs[iGather + 3];

319:

320:     // clang-format off

321:     laplArray[iScatter] = dSquareDeltaRinv *

322:       (sCoef0*( d2A[ 2]*tp2 + d2A[ 3])+

323:        sCoef1*( d2A[ 6]*tp2 + d2A[ 7])+

324:        sCoef2*( d2A[10]*tp2 + d2A[11])+

325:        sCoef3*( d2A[14]*tp2 + d2A[15]));

326:

327:     gradArray[iScatter] = DeltaRInv * rinv *

328:       (sCoef0*( dA[ 1]*tp1 + dA[ 2]*tp2 + dA[ 3])+

329:        sCoef1*( dA[ 5]*tp1 + dA[ 6]*tp2 + dA[ 7])+

330:        sCoef2*( dA[ 9]*tp1 + dA[10]*tp2 + dA[11])+

331:        sCoef3*( dA[13]*tp1 + dA[14]*tp2 + dA[15]));

332:

333:     valArray[iScatter] = (sCoef0*(A[ 0]*tp0 + A[ 1]*tp1 + A[ 2]*tp2 + A[ 3])+

334:         sCoef1*(A[ 4]*tp0 + A[ 5]*tp1 + A[ 6]*tp2 + A[ 7])+

335:         sCoef2*(A[ 8]*tp0 + A[ 9]*tp1 + A[10]*tp2 + A[11])+

336:         sCoef3*(A[12]*tp0 + A[13]*tp1 + A[14]*tp2 + A[15]));

Coverage (%)	Name	Source Location	Module
►96.74+	qmcplusplus::WaveFunction::rat[...]	NewTimer.h:249	exec
○	main._omp_fn.1	stl_vector.h:1131	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.03
CQA speedup if FP arith vectorized	1.24
CQA speedup if fully vectorized	2.31
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.24
Bottlenecks	micro-operation queue,
Function	miniqmcreference::TwoBodyJastrowRef >::ratioGrad(qmcplusplus::ParticleSet&, int, qmcplusplus::TinyVector&)
Source	BsplineFunctor.h:305-336
Source loop unroll info	unrolled by 8
Source loop unroll confidence level	high
Unroll/vectorization loop type	main
Unroll factor	8
CQA cycles	67.13
CQA cycles if no scalar integer	65.38
CQA cycles if FP arith vectorized	54.00
CQA cycles if fully vectorized	29.06
Front-end cycles	67.13
P0 cycles	0.33
P1 cycles	0.33
P2 cycles	0.33
P3 cycles	0.33
P4 cycles	0.33
P5 cycles	0.33
P6 cycles	23.75
P7 cycles	23.75
P8 cycles	23.75
P9 cycles	23.75
P10 cycles	53.00
P11 cycles	52.50
P12 cycles	41.75
P13 cycles	41.75
P14 cycles	54.00
P15 cycles	54.00
DIV/SQRT cycles	8.00
Inter-iter dependencies cycles	6 - 22
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	190.00
Nb uops	537.00
Nb loads	47.00
Nb stores	6.00
Nb stack references	30.00
FLOP/cycle	9.18
Nb FLOP add-sub	64.00
Nb FLOP mul	128.00
Nb FLOP fma	208.00
Nb FLOP div	8.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	24.91
Bytes prefetched	0.00
Bytes loaded	1480.00
Bytes stored	192.00
Stride 0	2.00
Stride 1	2.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	4.00
Vectorization ratio all	99.42
Vectorization ratio load	97.87
Vectorization ratio store	100.00
Vectorization ratio mul	100.00
Vectorization ratio add_sub	100.00
Vectorization ratio fma	100.00
Vectorization ratio div_sqrt	100.00
Vectorization ratio other	96.77
Vector-efficiency ratio all	48.77
Vector-efficiency ratio load	49.20
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	50.00
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	50.00
Vector-efficiency ratio div_sqrt	50.00
Vector-efficiency ratio other	43.15

Metric	Value
CQA speedup if no scalar integer	1.03
CQA speedup if FP arith vectorized	1.24
CQA speedup if fully vectorized	2.31
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.24
Bottlenecks	micro-operation queue,
Function	miniqmcreference::TwoBodyJastrowRef >::ratioGrad(qmcplusplus::ParticleSet&, int, qmcplusplus::TinyVector&)
Source	BsplineFunctor.h:305-336
Source loop unroll info	unrolled by 8
Source loop unroll confidence level	high
Unroll/vectorization loop type	main
Unroll factor	8
CQA cycles	67.13
CQA cycles if no scalar integer	65.38
CQA cycles if FP arith vectorized	54.00
CQA cycles if fully vectorized	29.06
Front-end cycles	67.13
P0 cycles	0.33
P1 cycles	0.33
P2 cycles	0.33
P3 cycles	0.33
P4 cycles	0.33
P5 cycles	0.33
P6 cycles	23.75
P7 cycles	23.75
P8 cycles	23.75
P9 cycles	23.75
P10 cycles	53.00
P11 cycles	52.50
P12 cycles	41.75
P13 cycles	41.75
P14 cycles	54.00
P15 cycles	54.00
DIV/SQRT cycles	8.00
Inter-iter dependencies cycles	6 - 22
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	190.00
Nb uops	537.00
Nb loads	47.00
Nb stores	6.00
Nb stack references	30.00
FLOP/cycle	9.18
Nb FLOP add-sub	64.00
Nb FLOP mul	128.00
Nb FLOP fma	208.00
Nb FLOP div	8.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	24.91
Bytes prefetched	0.00
Bytes loaded	1480.00
Bytes stored	192.00
Stride 0	2.00
Stride 1	2.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	4.00
Vectorization ratio all	99.42
Vectorization ratio load	97.87
Vectorization ratio store	100.00
Vectorization ratio mul	100.00
Vectorization ratio add_sub	100.00
Vectorization ratio fma	100.00
Vectorization ratio div_sqrt	100.00
Vectorization ratio other	96.77
Vector-efficiency ratio all	48.77
Vector-efficiency ratio load	49.20
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	50.00
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	50.00
Vector-efficiency ratio div_sqrt	50.00
Vector-efficiency ratio other	43.15

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	miniqmcreference::TwoBodyJastrowRef >::ratioGrad(qmcplusplus::ParticleSet&, int, qmcplusplus::TinyVector&)
Source file and lines	BsplineFunctor.h:305-336
Module	exec

The loop is defined in /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:305-336.

It is main loop of related source loop which is unrolled by 8 (including vectorization).

gain
potential
hint
expert

Vectorization

Your loop is highly vectorized. Only 48% of vector register length is used (average across all SSE/AVX instructions).

Details

99% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

97% of SSE/AVX loads are used in vector version.
96% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

FMA

Detected 208 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VCVTTPD2DQ: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:309
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:309
VGATHERDPD: 8 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:315
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:315
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:316
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:316
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:318
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:317
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:318
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:317
VSCATTERDPD: 6 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:321
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:321
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:327
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:327
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:333
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:333

Slow data structures access

Detected data structures (typically arrays) that cannot be efficiently read/written

Details

Irregular (variable stride) or indirect: 4 occurrence(s)

Non-unit stride (uncontiguous) accesses are not efficiently using data caches

Workaround

Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.

Gather/scatter instructions

Detected gather/scatter instructions (typically caused by indirect accesses).

Details

VGATHERDPD: 8 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:315
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:315
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:316
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:316
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:318
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:317
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:318
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:317
VSCATTERDPD: 6 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:321
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:321
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:327
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:327
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:333
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:333

Workaround

Try to simplify your code and/or replace indirect accesses with unit-stride ones.

Conversion instructions

Detected expensive conversion instructions.

Details

VCVTTPD2DQ (FP64 to INT32, SIMD): 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:309
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:309

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

104 AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (four at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 616 FP arithmetical operations:

272: addition or subtraction (208 inside FMA instructions)
336: multiply (208 inside FMA instructions)
8: divide

The binary loop is loading 1480 bytes (185 double precision FP elements). The binary loop is storing 192 bytes (24 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.37 FP operations per loaded or stored byte.

General properties

nb instructions	190
nb uops	537
loop length	1108
used x86 registers	9
used mmx registers	0
used xmm registers	9
used ymm registers	32
used zmm registers	0
nb stack references	30
ADD-SUB / MUL ratio	0.50

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	67.13 cycles
front end	67.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	0.33	0.33	0.33	0.33	0.33	0.33	23.75	23.75	23.75	23.75	53.00	52.50	41.75	41.75	54.00	54.00
cycles	0.33	0.33	0.33	0.33	0.33	0.33	23.75	23.75	23.75	23.75	53.00	52.50	41.75	41.75	54.00	54.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions	8.00
Longest recurrence chain latency (RecMII)	6.00-22.00

Cycles summary

Front-end	67.13
Dispatch	54.00
DIV/SQRT	8.00
Data deps.	6.00-22.00
Overall L1	67.13

Vectorization ratios

INT

all	100%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
other	100%

all	99%
load	97%
store	100%
mul	100%
add-sub	100%
fma	100%
div/sqrt	100%
other	95%

INT+FP

all	99%
load	97%
store	100%
mul	100%
add-sub	100%
fma	100%
div/sqrt	100%
other	96%

Vector efficiency ratios

INT

all	34%
load	50%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
other	25%

all	49%
load	49%
store	50%
mul	50%
add-sub	50%
fma	50%
div/sqrt	50%
other	48%

INT+FP

all	48%
load	49%
store	50%
mul	50%
add-sub	50%
fma	50%
div/sqrt	50%
other	43%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 67.13 cycles. At this rate:

8% of peak load performance is reached (22.05 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (2.86 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 67.13 to 54.00 cycles (1.24x speedup).

ASM code

In the binary file, the address of the loop is: 426740

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
VMOVAPD (%RDX,%RSI,2),%YMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD 0x20(%RDX,%RSI,2),%YMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMOVAPD -0xf0(%RBP),%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x190(%RBP),%YMM24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVDQA (%RDI,%RSI,1),%YMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
ADD $0x20,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMULPD %YMM18,%YMM11,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM18,%YMM10,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VCVTTPD2DQ %YMM15,%XMM5	2	0	0	0	0	0	0	0	0	0	0	0	0.50	1	0.50	0	0	6	0.67	vect (50.0%)
VCVTTPD2DQ %YMM0,%XMM3	2	0	0	0	0	0	0	0	0	0	0	0	0.50	1	0.50	0	0	6	0.67	vect (50.0%)
VINSERTI32X4 $0x1,%XMM3,%YMM5,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	vect (25.0%)
VPADDD 0x1994be(%RIP),%YMM6,%YMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (50.0%)
VPADDD 0x1994d6(%RIP),%YMM6,%YMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (50.0%)
VPERM2I128 $0x11,%YMM6,%YMM6,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VPADDD 0x1994e8(%RIP),%YMM6,%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (50.0%)
VGATHERDPD (%RAX,%XMM5,8),%YMM22{%K2}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
VRNDSCALEPD $0xb,%YMM15,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (50.0%)
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERDPD (%RAX,%XMM7,8),%YMM21{%K3}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPERM2I128 $0x11,%YMM12,%YMM12,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VGATHERDPD (%RAX,%XMM12,8),%YMM23{%K4}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
VRNDSCALEPD $0xb,%YMM0,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (50.0%)
VGATHERDPD (%RAX,%XMM7,8),%YMM5{%K5}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
VGATHERDPD (%RAX,%XMM6,8),%YMM20{%K2}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
VPERM2I128 $0x11,%YMM6,%YMM6,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VSUBPD %YMM1,%YMM15,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VGATHERDPD (%RAX,%XMM14,8),%YMM8{%K6}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPERM2I128 $0x11,%YMM14,%YMM14,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VGATHERDPD (%RAX,%XMM7,8),%YMM13{%K3}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERDPD (%RAX,%XMM15,8),%YMM12{%K7}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMOVAPD -0xb0(%RBP),%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0xd0(%RBP),%YMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x110(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VSUBPD %YMM2,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VMULPD %YMM1,%YMM1,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMULPD %YMM0,%YMM0,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM2,%YMM1,%YMM17	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM6,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM0,%YMM14,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM14,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM3,%YMM0,%YMM16	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM9,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM1,%YMM15,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM0,%YMM15,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x130(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM9,%YMM5,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM14,%YMM23,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM15,%YMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM22,%YMM14,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM21,%YMM9,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x150(%RBP),%YMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x170(%RBP),%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM14,%YMM19	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM0,%YMM14,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD %YMM9,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM1,%YMM24,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM0,%YMM24,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM14,%YMM20,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM9,%YMM13,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM19,%YMM8,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM15,%YMM12,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x1b0(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVDQA32 %XMM4,%XMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VADDPD %YMM14,%YMM7,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM9,%YMM6,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VMULPD %YMM15,%YMM7,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM15,%YMM6,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VBROADCASTSD 0x19943d(%RIP),%YMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VSCATTERDPD %YMM14,(%R13,%XMM4,8){%K4}	28	0	0	0	0	0	0	1	1	1	1	0	2	0.50	0.50	5	5	4-35	5	vect (50.0%)
VPERM2I128 $0x11,%YMM4,%YMM4,%YMM4	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VSCATTERDPD %YMM9,(%R13,%XMM4,8){%K5}	28	0	0	0	0	0	0	1	1	1	1	0	2	0.50	0.50	5	5	4-35	5	vect (50.0%)
VMOVAPD -0x1f0(%RBP),%YMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x210(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x1d0(%RBP),%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VDIVPD %YMM11,%YMM7,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (50.0%)
VDIVPD %YMM10,%YMM7,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (50.0%)
VMOVAPD %YMM14,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM0,%YMM15,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM15,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x270(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM6,%YMM3,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM6,%YMM2,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x250(%RBP),%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM18,%YMM11,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM6,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM0,%YMM15,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM15,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x230(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM18,%YMM10,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM15,%YMM3,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM15,%YMM2,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM6,%YMM5,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM9,%YMM23,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD132PD %YMM21,%YMM6,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x2b0(%RBP),%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x2d0(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VFMADD132PD %YMM22,%YMM9,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x290(%RBP),%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM6,%YMM24	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM0,%YMM15,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM15,%YMM24	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x2f0(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM9,%YMM3,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM9,%YMM2,%YMM24	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD %YMM15,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD213PD -0x90(%RBP),%YMM0,%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD213PD -0x90(%RBP),%YMM1,%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD -0x70(%RBP),%YMM3,%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD -0x70(%RBP),%YMM2,%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM15,%YMM13,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM9,%YMM20,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD132PD %YMM12,%YMM15,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM24,%YMM8,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VADDPD %YMM14,%YMM6,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM9,%YMM7,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VMULPD %YMM10,%YMM14,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM11,%YMM7,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VSCATTERDPD %YMM11,(%R12,%XMM19,8){%K6}	28	0	0	0	0	0	0	1	1	1	1	0	2	0.50	0.50	5	5	4-35	5	vect (50.0%)
VSCATTERDPD %YMM10,(%R12,%XMM4,8){%K7}	28	0	0	0	0	0	0	1	1	1	1	0	2	0.50	0.50	5	5	4-35	5	vect (50.0%)
VMOVAPD -0x330(%RBP),%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x350(%RBP),%YMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x310(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x370(%RBP),%YMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM6,%YMM2,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM6,%YMM3,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM7,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VMOVAPD -0x3b0(%RBP),%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM11,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM0,%YMM11,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM15,%YMM17,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM15,%YMM16,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x3f0(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM6,%YMM2,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VADDPD %YMM9,%YMM10,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VMOVAPD -0x390(%RBP),%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VADDPD %YMM14,%YMM7,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VMULPD %YMM6,%YMM3,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM9,%YMM17,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM9,%YMM16,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x3d0(%RBP),%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM9,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM0,%YMM15,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM15,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM30,%YMM2,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM27,%YMM2,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VADDPD %YMM14,%YMM9,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VFMADD231PD %YMM31,%YMM17,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VADDPD %YMM11,%YMM6,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VFMADD231PD %YMM28,%YMM17,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM14,%YMM5,%YMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM23,%YMM11,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM7,%YMM21,%YMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x410(%RBP),%YMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM10,%YMM22,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM30,%YMM3,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM27,%YMM3,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM28,%YMM16,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM31,%YMM16,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD %YMM7,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD231PD %YMM29,%YMM0,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM29,%YMM1,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM26,%YMM25,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM26,%YMM25,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VADDPD %YMM7,%YMM10,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM3,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM15,%YMM9,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM1,%YMM2,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VMULPD %YMM0,%YMM13,%YMM13	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM20,%YMM1,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD132PD %YMM11,%YMM13,%YMM12	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM14,%YMM15,%YMM8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VADDPD %YMM12,%YMM5,%YMM12	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM6,%YMM8,%YMM8	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VSCATTERDPD %YMM8,(%R10,%XMM19,8){%K2}	28	0	0	0	0	0	0	1	1	1	1	0	2	0.50	0.50	5	5	4-35	5	vect (50.0%)
VSCATTERDPD %YMM12,(%R10,%XMM4,8){%K3}	28	0	0	0	0	0	0	1	1	1	1	0	2	0.50	0.50	5	5	4-35	5	vect (50.0%)
CMP %R14,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 426740 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9ratioGradERNS1_11ParticleSetEiRNS1_10TinyVectorIdLj3EEE+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A

Function	miniqmcreference::TwoBodyJastrowRef >::ratioGrad(qmcplusplus::ParticleSet&, int, qmcplusplus::TinyVector&)
Source file and lines	BsplineFunctor.h:305-336
Module	exec

gain
potential
hint
expert

Vectorization

Your loop is highly vectorized. Only 48% of vector register length is used (average across all SSE/AVX instructions).

Details

99% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

97% of SSE/AVX loads are used in vector version.
96% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

FMA

Detected 208 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VCVTTPD2DQ: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:309
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:309
VGATHERDPD: 8 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:315
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:315
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:316
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:316
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:318
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:317
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:318
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:317
VSCATTERDPD: 6 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:321
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:321
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:327
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:327
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:333
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:333

Slow data structures access

Detected data structures (typically arrays) that cannot be efficiently read/written

Details

Irregular (variable stride) or indirect: 4 occurrence(s)

Non-unit stride (uncontiguous) accesses are not efficiently using data caches

Workaround

Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.

Gather/scatter instructions

Detected gather/scatter instructions (typically caused by indirect accesses).

Details

VGATHERDPD: 8 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:315
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:315
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:316
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:316
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:318
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:317
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:318
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:317
VSCATTERDPD: 6 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:321
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:321
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:327
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:327
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:333
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:333

Workaround

Try to simplify your code and/or replace indirect accesses with unit-stride ones.

Conversion instructions

Detected expensive conversion instructions.

Details

VCVTTPD2DQ (FP64 to INT32, SIMD): 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:309
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:309

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

104 AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (four at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 616 FP arithmetical operations:

272: addition or subtraction (208 inside FMA instructions)
336: multiply (208 inside FMA instructions)
8: divide

The binary loop is loading 1480 bytes (185 double precision FP elements). The binary loop is storing 192 bytes (24 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.37 FP operations per loaded or stored byte.

General properties

nb instructions	190
nb uops	537
loop length	1108
used x86 registers	9
used mmx registers	0
used xmm registers	9
used ymm registers	32
used zmm registers	0
nb stack references	30
ADD-SUB / MUL ratio	0.50

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	67.13 cycles
front end	67.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	0.33	0.33	0.33	0.33	0.33	0.33	23.75	23.75	23.75	23.75	53.00	52.50	41.75	41.75	54.00	54.00
cycles	0.33	0.33	0.33	0.33	0.33	0.33	23.75	23.75	23.75	23.75	53.00	52.50	41.75	41.75	54.00	54.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions	8.00
Longest recurrence chain latency (RecMII)	6.00-22.00

Cycles summary

Front-end	67.13
Dispatch	54.00
DIV/SQRT	8.00
Data deps.	6.00-22.00
Overall L1	67.13

Vectorization ratios

INT

all	100%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
other	100%

all	99%
load	97%
store	100%
mul	100%
add-sub	100%
fma	100%
div/sqrt	100%
other	95%

INT+FP

all	99%
load	97%
store	100%
mul	100%
add-sub	100%
fma	100%
div/sqrt	100%
other	96%

Vector efficiency ratios

INT

all	34%
load	50%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
other	25%

all	49%
load	49%
store	50%
mul	50%
add-sub	50%
fma	50%
div/sqrt	50%
other	48%

INT+FP

all	48%
load	49%
store	50%
mul	50%
add-sub	50%
fma	50%
div/sqrt	50%
other	43%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 67.13 cycles. At this rate:

8% of peak load performance is reached (22.05 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (2.86 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 426740

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
VMOVAPD (%RDX,%RSI,2),%YMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD 0x20(%RDX,%RSI,2),%YMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMOVAPD -0xf0(%RBP),%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x190(%RBP),%YMM24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVDQA (%RDI,%RSI,1),%YMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
ADD $0x20,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMULPD %YMM18,%YMM11,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM18,%YMM10,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VCVTTPD2DQ %YMM15,%XMM5	2	0	0	0	0	0	0	0	0	0	0	0	0.50	1	0.50	0	0	6	0.67	vect (50.0%)
VCVTTPD2DQ %YMM0,%XMM3	2	0	0	0	0	0	0	0	0	0	0	0	0.50	1	0.50	0	0	6	0.67	vect (50.0%)
VINSERTI32X4 $0x1,%XMM3,%YMM5,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	vect (25.0%)
VPADDD 0x1994be(%RIP),%YMM6,%YMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (50.0%)
VPADDD 0x1994d6(%RIP),%YMM6,%YMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (50.0%)
VPERM2I128 $0x11,%YMM6,%YMM6,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VPADDD 0x1994e8(%RIP),%YMM6,%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (50.0%)
VGATHERDPD (%RAX,%XMM5,8),%YMM22{%K2}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
VRNDSCALEPD $0xb,%YMM15,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (50.0%)
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERDPD (%RAX,%XMM7,8),%YMM21{%K3}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPERM2I128 $0x11,%YMM12,%YMM12,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VGATHERDPD (%RAX,%XMM12,8),%YMM23{%K4}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
VRNDSCALEPD $0xb,%YMM0,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (50.0%)
VGATHERDPD (%RAX,%XMM7,8),%YMM5{%K5}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
VGATHERDPD (%RAX,%XMM6,8),%YMM20{%K2}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
VPERM2I128 $0x11,%YMM6,%YMM6,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VSUBPD %YMM1,%YMM15,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VGATHERDPD (%RAX,%XMM14,8),%YMM8{%K6}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPERM2I128 $0x11,%YMM14,%YMM14,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VGATHERDPD (%RAX,%XMM7,8),%YMM13{%K3}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERDPD (%RAX,%XMM15,8),%YMM12{%K7}	24	0	0	0	0	0	0	1	1	1	1	1.25	1.25	1.25	1.25	3	3	0-16	4	vect (50.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMOVAPD -0xb0(%RBP),%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0xd0(%RBP),%YMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x110(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VSUBPD %YMM2,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VMULPD %YMM1,%YMM1,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMULPD %YMM0,%YMM0,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM2,%YMM1,%YMM17	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM6,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM0,%YMM14,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM14,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM3,%YMM0,%YMM16	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM9,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM1,%YMM15,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM0,%YMM15,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x130(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM9,%YMM5,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM14,%YMM23,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM15,%YMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM22,%YMM14,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM21,%YMM9,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x150(%RBP),%YMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x170(%RBP),%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM14,%YMM19	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM0,%YMM14,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD %YMM9,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM1,%YMM24,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM0,%YMM24,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM14,%YMM20,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM9,%YMM13,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM19,%YMM8,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM15,%YMM12,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x1b0(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVDQA32 %XMM4,%XMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VADDPD %YMM14,%YMM7,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM9,%YMM6,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VMULPD %YMM15,%YMM7,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM15,%YMM6,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VBROADCASTSD 0x19943d(%RIP),%YMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VSCATTERDPD %YMM14,(%R13,%XMM4,8){%K4}	28	0	0	0	0	0	0	1	1	1	1	0	2	0.50	0.50	5	5	4-35	5	vect (50.0%)
VPERM2I128 $0x11,%YMM4,%YMM4,%YMM4	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VSCATTERDPD %YMM9,(%R13,%XMM4,8){%K5}	28	0	0	0	0	0	0	1	1	1	1	0	2	0.50	0.50	5	5	4-35	5	vect (50.0%)
VMOVAPD -0x1f0(%RBP),%YMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x210(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x1d0(%RBP),%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VDIVPD %YMM11,%YMM7,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (50.0%)
VDIVPD %YMM10,%YMM7,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (50.0%)
VMOVAPD %YMM14,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM0,%YMM15,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM15,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x270(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM6,%YMM3,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM6,%YMM2,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x250(%RBP),%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM18,%YMM11,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM6,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM0,%YMM15,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM15,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x230(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM18,%YMM10,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM15,%YMM3,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM15,%YMM2,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM6,%YMM5,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM9,%YMM23,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD132PD %YMM21,%YMM6,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x2b0(%RBP),%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x2d0(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VFMADD132PD %YMM22,%YMM9,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x290(%RBP),%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM6,%YMM24	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM0,%YMM15,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM15,%YMM24	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x2f0(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM9,%YMM3,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM9,%YMM2,%YMM24	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD %YMM15,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD213PD -0x90(%RBP),%YMM0,%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD213PD -0x90(%RBP),%YMM1,%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD -0x70(%RBP),%YMM3,%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD -0x70(%RBP),%YMM2,%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM15,%YMM13,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM9,%YMM20,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD132PD %YMM12,%YMM15,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM24,%YMM8,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VADDPD %YMM14,%YMM6,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM9,%YMM7,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VMULPD %YMM10,%YMM14,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM11,%YMM7,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VSCATTERDPD %YMM11,(%R12,%XMM19,8){%K6}	28	0	0	0	0	0	0	1	1	1	1	0	2	0.50	0.50	5	5	4-35	5	vect (50.0%)
VSCATTERDPD %YMM10,(%R12,%XMM4,8){%K7}	28	0	0	0	0	0	0	1	1	1	1	0	2	0.50	0.50	5	5	4-35	5	vect (50.0%)
VMOVAPD -0x330(%RBP),%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x350(%RBP),%YMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x310(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0x370(%RBP),%YMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM6,%YMM2,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM6,%YMM3,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM7,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VMOVAPD -0x3b0(%RBP),%YMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM11,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM0,%YMM11,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM15,%YMM17,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM15,%YMM16,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x3f0(%RBP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM6,%YMM2,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VADDPD %YMM9,%YMM10,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VMOVAPD -0x390(%RBP),%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VADDPD %YMM14,%YMM7,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VMULPD %YMM6,%YMM3,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM9,%YMM17,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM9,%YMM16,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x3d0(%RBP),%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD %YMM9,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD132PD %YMM0,%YMM15,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM1,%YMM15,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM30,%YMM2,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM27,%YMM2,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VADDPD %YMM14,%YMM9,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VFMADD231PD %YMM31,%YMM17,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VADDPD %YMM11,%YMM6,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VFMADD231PD %YMM28,%YMM17,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM14,%YMM5,%YMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM23,%YMM11,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM7,%YMM21,%YMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD -0x410(%RBP),%YMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM10,%YMM22,%YMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMULPD %YMM30,%YMM3,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM27,%YMM3,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD231PD %YMM28,%YMM16,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM31,%YMM16,%YMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VMOVAPD %YMM7,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (50.0%)
VFMADD231PD %YMM29,%YMM0,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD231PD %YMM29,%YMM1,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM26,%YMM25,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM26,%YMM25,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VADDPD %YMM7,%YMM10,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM3,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM15,%YMM9,%YMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM1,%YMM2,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VMULPD %YMM0,%YMM13,%YMM13	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VMULPD %YMM20,%YMM1,%YMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (50.0%)
VFMADD132PD %YMM11,%YMM13,%YMM12	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VFMADD132PD %YMM14,%YMM15,%YMM8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (50.0%)
VADDPD %YMM12,%YMM5,%YMM12	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM6,%YMM8,%YMM8	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VSCATTERDPD %YMM8,(%R10,%XMM19,8){%K2}	28	0	0	0	0	0	0	1	1	1	1	0	2	0.50	0.50	5	5	4-35	5	vect (50.0%)
VSCATTERDPD %YMM12,(%R10,%XMM4,8){%K3}	28	0	0	0	0	0	0	1	1	1	1	0	2	0.50	0.50	5	5	4-35	5	vect (50.0%)
CMP %R14,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 426740 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9ratioGradERNS1_11ParticleSetEiRNS1_10TinyVectorIdLj3EEE+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

512-bits vectorization

Workaround

FMA

Workaround

Complex instructions

Details

Slow data structures access

Details

Workaround

Gather/scatter instructions

Details

Workaround

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

512-bits vectorization

Workaround

FMA

Workaround

Complex instructions

Details

Slow data structures access

Details

Workaround

Gather/scatter instructions

Details

Workaround

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code