OV - exec - Function miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::resize(int, int)

	Function: miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::resize ...	Module: exec	Source: DiracDeterminantRef.cpp:61-79 [...]	Coverage (incl. loops): 0.03% \| (excl. loops): 0.00%

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/alloc_traits.h: 513 - 513

--------------------------------------------------------------------------------

513:       { __a.deallocate(__p, __n); }

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_construct.h: 119 - 119

--------------------------------------------------------------------------------

119:       ::new((void*)__p) _Tp(std::forward<_Args>(__args)...);

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h: 101 - 103

--------------------------------------------------------------------------------

101:     D1      = n;

102:     D2      = m;

103:     TotSize = n * m;

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_uninitialized.h: 667 - 1129

--------------------------------------------------------------------------------

667: 	      ++__first;

[...]

1117:       if (__count > 0)

[...]

1129: 	  __builtin_memcpy(__result, __first, __count * sizeof(_Tp));

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h: 993 - 1949

--------------------------------------------------------------------------------

993:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1015: 	if (__new_size > size())

1016: 	  _M_default_append(__new_size - size());

1017: 	else if (__new_size < size())

1018: 	  _M_erase_at_end(this->_M_impl._M_start + __new_size);

[...]

1908: 	if (max_size() - size() < __n)

1909: 	  __throw_length_error(__N(__s));

1910:

1911: 	const size_type __len = size() + (std::max)(size(), __n);

[...]

1945: 	if (size_type __n = this->_M_impl._M_finish - __pos)

1946: 	  {

1947: 	    std::_Destroy(__pos, this->_M_impl._M_finish,

1948: 			  _M_get_Tp_allocator());

1949: 	    this->_M_impl._M_finish = __pos;

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 181 - 301

--------------------------------------------------------------------------------

181:   inline void resize(size_t n, Type_t val = Type_t())

182:   {

183:     static_assert(std::is_same<value_type, typename Alloc::value_type>::value,

184:                   "Vector and Alloc data types must agree!");

185:     if (nLocal > nAllocated)

186:       throw std::runtime_error("Resize not allowed on Vector constructed by initialized memory.");

187:

188:     if (n > nAllocated)

[...]

195:       if (n > nLocal)

196:         qmc_allocator_traits<Alloc>::fill_n(X + nLocal, n - nLocal, val);

197:       nLocal = n;

[...]

296:     if (nAllocated)

297:     {

298:       mAllocator.deallocate(X, nAllocated);

299:     }

300:     X          = mAllocator.allocate(n);

301:     nLocal     = n;

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/new_allocator.h: 134 - 172

--------------------------------------------------------------------------------

134: 	if (__builtin_expect(__n > this->_M_max_size(), false))

135: 	  {

136: 	    // _GLIBCXX_RESOLVE_LIB_DEFECTS

137: 	    // 3190. allocator::allocate sometimes returns too little storage

138: 	    if (__n > (std::size_t(-1) / sizeof(_Tp)))

139: 	      std::__throw_bad_array_new_length();

140: 	    std::__throw_bad_alloc();

[...]

151: 	return static_cast<_Tp*>(_GLIBCXX_OPERATOR_NEW(__n * sizeof(_Tp)));

[...]

172: 	_GLIBCXX_OPERATOR_DELETE(_GLIBCXX_SIZED_DEALLOC(__p, __n));

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h: 262 - 1151

--------------------------------------------------------------------------------

262:       if (__a < __b)

[...]

939:       for (; __first != __last; ++__first)

940: 	*__first = __value;

[...]

951:       for (; __first != __last; ++__first)

952: 	*__first = __tmp;

[...]

1146:       if (__n <= 0)

1147: 	return __first;

1148:

1149:       __glibcxx_requires_can_increment(__first, __n);

1150:

1151:       std::__fill_a(__first, __first + __n, __value);

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp: 61 - 79

--------------------------------------------------------------------------------

61: void DiracDeterminantRef<DU_TYPE>::resize(int nel, int morb)

62: {

63:   int norb = morb;

64:   if (norb <= 0)

65:     norb = nel; // for morb == -1 (default)

66:   updateEng.resize(norb, ndelay);

67:   psiM.resize(nel, norb);

[...]

73:   LastIndex   = FirstIndex + nel;

74:   NumPtcls    = nel;

75:   NumOrbitals = norb;

76:

77:   dpsiV.resize(NumOrbitals);

78:   d2psiV.resize(NumOrbitals);

79: }

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/vector.tcc: 812 - 910

--------------------------------------------------------------------------------

812: 					 - this->_M_impl._M_finish);

813:

814: 	  if (__size > max_size() || __navail > max_size() - __size)

815: 	    __builtin_unreachable();

816:

817: 	  if (__navail >= __n)

818: 	    {

819: 	      _GLIBCXX_ASAN_ANNOTATE_GROW(__n);

820: 	      this->_M_impl._M_finish =

[...]

851: 		  if (_M_storage)

[...]

863: 		std::__uninitialized_default_n_a(__new_start + __size, __n,

[...]

903: 		__guard._M_len = this->_M_impl._M_end_of_storage - __old_start;

904: 	      }

905: 	      // deallocate should be called before assignments to _M_impl,

906: 	      // to avoid call-clobbering

907:

908: 	      this->_M_impl._M_start = __new_start;

909: 	      this->_M_impl._M_finish = __new_start + __size + __n;

910: 	      this->_M_impl._M_end_of_storage = __new_start + __len;

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DelayedUpdate.h: 60 - 62

--------------------------------------------------------------------------------

60:   inline void resize(int norb, int delay)

61:   {

62:     V.resize(delay, norb);

0x4a4560 PUSH	%RBP

0x4a4561 VMOVD	%ESI,%XMM2

0x4a4565 MOV	%RSP,%RBP

0x4a4568 PUSH	%R15

0x4a456a PUSH	%R14

0x4a456c PUSH	%R13

0x4a456e PUSH	%R12

0x4a4570 PUSH	%RBX

0x4a4571 SUB	$0x88,%RSP

0x4a4578 VMOVD	0x488(%RDI),%XMM3

0x4a4580 TEST	%EDX,%EDX

0x4a4582 MOV	0x268(%RDI),%RAX

0x4a4589 CMOVLE	%ESI,%EDX

0x4a458c MOV	%ESI,0x6c(%RSP)

0x4a4590 MOV	0x270(%RDI),%RSI

0x4a4597 MOVSXD	%EDX,%R12

0x4a459a MOV	%R12,%RBX

0x4a459d VMOVD	%R12D,%XMM5

0x4a45a2 VPINSRD	$0x1,%R12D,%XMM2,%XMM0

0x4a45a8 VPBROADCASTQ	%R12,%XMM8

0x4a45ae VPMOVSXDQ	%XMM0,%XMM4

0x4a45b3 VMOVDQA	%XMM8,0x30(%RSP)

0x4a45b9 VMOVDQA	%XMM4,0x70(%RSP)

0x4a45bf VMOVQ	%XMM4,0x60(%RSP)

0x4a45c5 VPINSRD	$0x1,%R12D,%XMM3,%XMM7

0x4a45cb VPUNPCKLDQ	%XMM3,%XMM5,%XMM1

0x4a45cf VPMOVSXDQ	%XMM7,%XMM11

0x4a45d4 VPMOVSXDQ	%XMM1,%XMM6

0x4a45d9 VMOVQ	%XMM11,%R14

0x4a45de VPUNPCKLQDQ	%XMM11,%XMM11,%XMM9

0x4a45e3 VMOVDQA	%XMM6,0x40(%RSP)

0x4a45e9 IMUL	%R14,%RBX

0x4a45ed VMOVDQA	%XMM9,0x50(%RSP)

0x4a45f3 VMOVDQU	%XMM11,0x248(%RDI)

0x4a45fb VPBROADCASTQ	%RBX,%XMM10

0x4a4601 MOV	%RBX,0x258(%RDI)

0x4a4608 VMOVDQA	%XMM10,0x20(%RSP)

0x4a460e CMP	%RAX,%RSI

0x4a4611 JB	4a5fca

0x4a4617 MOV	%RDI,%R15

0x4a461a MOV	%R12,%R13

0x4a461d CMP	%RBX,%RSI

0x4a4620 JB	4a5120

0x4a4626 CMP	%RBX,%RAX

0x4a4629 JB	4a4ca0

0x4a462f MOV	%RBX,0x268(%R15)

(1161) 0x4a4636 MOV	0x228(%R15),%R8

(1161) 0x4a463d MOV	0x230(%R15),%RSI

(1161) 0x4a4644 VMOVDQU	%XMM11,0x208(%R15)

(1161) 0x4a464d MOV	%RBX,0x218(%R15)

(1161) 0x4a4654 CMP	%R8,%RSI

(1161) 0x4a4657 JB	4a6082

(1161) 0x4a465d CMP	%RBX,%RSI

(1161) 0x4a4660 JB	4a5180

(1161) 0x4a4666 CMP	%RBX,%R8

(1161) 0x4a4669 JB	4a4ce0

(1161) 0x4a466f MOV	%RBX,0x228(%R15)

(1161) 0x4a4676 MOV	0x338(%R15),%R11

(1161) 0x4a467d MOV	0x340(%R15),%RSI

(1161) 0x4a4684 CMP	%R11,%RSI

(1161) 0x4a4687 JB	4a5f82

(1161) 0x4a468d CMP	%R14,%RSI

(1161) 0x4a4690 JB	4a51e0

(1161) 0x4a4696 CMP	%R14,%R11

(1161) 0x4a4699 JB	4a4d10

(1161) 0x4a469f MOV	%R14,0x338(%R15)

(1161) 0x4a46a6 MOV	0x310(%R15),%R8

(1161) 0x4a46ad MOV	0x318(%R15),%RSI

(1161) 0x4a46b4 CMP	%R8,%RSI

(1161) 0x4a46b7 JB	4a5fe9

(1161) 0x4a46bd CMP	%R12,%RSI

(1161) 0x4a46c0 JB	4a5240

(1161) 0x4a46c6 CMP	%R12,%R8

(1161) 0x4a46c9 JB	4a4d40

(1161) 0x4a46cf MOV	%R12,0x310(%R15)

(1161) 0x4a46d6 VMOVDQA	0x40(%RSP),%XMM2

(1161) 0x4a46dc MOV	0x2e8(%R15),%R10

(1161) 0x4a46e3 MOV	0x2f0(%R15),%RSI

(1161) 0x4a46ea MOV	%RBX,0x2d8(%R15)

(1161) 0x4a46f1 VMOVDQU	%XMM2,0x2c8(%R15)

(1161) 0x4a46fa CMP	%R10,%RSI

(1161) 0x4a46fd JB	4a5efe

(1161) 0x4a4703 CMP	%RBX,%RSI

(1161) 0x4a4706 JB	4a52a0

(1161) 0x4a470c CMP	%RBX,%R10

(1161) 0x4a470f JB	4a4d70

(1161) 0x4a4715 MOV	%RBX,0x2e8(%R15)

(1161) 0x4a471c VMOVDQA	0x50(%RSP),%XMM4

(1161) 0x4a4722 MOV	0x2a8(%R15),%RBX

(1161) 0x4a4729 MOV	0x2b0(%R15),%RSI

(1161) 0x4a4730 MOV	%R14,%RCX

(1161) 0x4a4733 IMUL	%R14,%RCX

(1161) 0x4a4737 MOV	%RCX,0x298(%R15)

(1161) 0x4a473e VMOVDQU	%XMM4,0x288(%R15)

(1161) 0x4a4747 CMP	%RBX,%RSI

(1161) 0x4a474a JB	4a5fa1

(1161) 0x4a4750 CMP	%RCX,%RSI

(1161) 0x4a4753 JB	4a52f0

(1161) 0x4a4759 CMP	%RCX,%RBX

(1161) 0x4a475c JB	4a4da0

(1161) 0x4a4762 MOV	%RCX,0x2a8(%R15)

(1161) 0x4a4769 MOV	0x360(%R15),%R10

(1161) 0x4a4770 MOV	0x358(%R15),%R11

(1161) 0x4a4777 MOV	%R10,%RBX

(1161) 0x4a477a SUB	%R11,%RBX

(1161) 0x4a477d MOV	%RBX,%RAX

(1161) 0x4a4780 SAR	$0x2,%RAX

(1161) 0x4a4784 CMP	%R14,%RAX

(1161) 0x4a4787 JB	4a5350

(1161) 0x4a478d CMP	%RAX,%R14

(1161) 0x4a4790 JB	4a4de0

(1161) 0x4a4796 MOV	0x60(%RSP),%RBX

(1161) 0x4a479b VMOVDQA	0x70(%RSP),%XMM6

(1161) 0x4a47a1 MOV	0xf0(%R15),%RCX

(1161) 0x4a47a8 MOV	0xf8(%R15),%RSI

(1161) 0x4a47af IMUL	%R12,%RBX

(1161) 0x4a47b3 VMOVDQU	%XMM6,0xd0(%R15)

(1161) 0x4a47bc VPBROADCASTQ	%RBX,%XMM7

(1161) 0x4a47c2 MOV	%RBX,0xe0(%R15)

(1161) 0x4a47c9 VMOVDQA	%XMM7,0x50(%RSP)

(1161) 0x4a47cf CMP	%RCX,%RSI

(1161) 0x4a47d2 JB	4a5ebf

(1161) 0x4a47d8 CMP	%RBX,%RSI

(1161) 0x4a47db JB	4a5440

(1161) 0x4a47e1 CMP	%RBX,%RCX

(1161) 0x4a47e4 JB	4a4e00

(1161) 0x4a47ea MOV	%RBX,0xf0(%R15)

(1161) 0x4a47f1 VMOVDQA	0x70(%RSP),%XMM9

(1161) 0x4a47f7 MOV	0x130(%R15),%RSI

(1161) 0x4a47fe MOV	0x138(%R15),%R8

(1161) 0x4a4805 MOV	%RBX,0x120(%R15)

(1161) 0x4a480c VMOVDQU	%XMM9,0x110(%R15)

(1161) 0x4a4815 CMP	%RSI,%R8

(1161) 0x4a4818 JB	4a5ee2

(1161) 0x4a481e CMP	%RBX,%R8

(1161) 0x4a4821 JB	4a5490

(1161) 0x4a4827 CMP	%RBX,%RSI

(1161) 0x4a482a JB	4a4e30

(1161) 0x4a4830 MOV	%RBX,0x130(%R15)

(1161) 0x4a4837 VMOVDQA	0x70(%RSP),%XMM15

(1161) 0x4a483d MOV	0x170(%R15),%RCX

(1161) 0x4a4844 MOV	0x178(%R15),%RSI

(1161) 0x4a484b MOV	%RBX,0x160(%R15)

(1161) 0x4a4852 VMOVDQU	%XMM15,0x150(%R15)

(1161) 0x4a485b CMP	%RCX,%RSI

(1161) 0x4a485e JB	4a5f1a

(1161) 0x4a4864 CMP	%RBX,%RSI

(1161) 0x4a4867 JB	4a5740

(1161) 0x4a486d CMP	%RBX,%RCX

(1161) 0x4a4870 JB	4a5090

(1161) 0x4a4876 MOV	%RBX,0x170(%R15)

(1161) 0x4a487d MOV	0x198(%R15),%R10

(1161) 0x4a4884 MOV	0x1a0(%R15),%RSI

(1161) 0x4a488b CMP	%R10,%RSI

(1161) 0x4a488e JB	4a5e90

(1161) 0x4a4894 CMP	%R12,%RSI

(1161) 0x4a4897 JB	4a50c0

(1161) 0x4a489d CMP	%R12,%R10

(1161) 0x4a48a0 JAE	4a48c3

(1161) 0x4a48a2 MOV	0x1a8(%R15),%RAX

(1161) 0x4a48a9 MOV	%R12,%RDX

(1161) 0x4a48ac SUB	%R10,%RDX

(1161) 0x4a48af SAL	$0x3,%RDX

(1161) 0x4a48b3 LEA	(%RAX,%R10,8),%RDI

(1161) 0x4a48b7 JE	4a48c3

(1161) 0x4a48b9 XOR	%ESI,%ESI

(1161) 0x4a48bb VZEROUPPER

(1161) 0x4a48be CALL	404140 <memset@plt>

(1161) 0x4a48c3 MOV	%R12,0x198(%R15)

(1161) 0x4a48ca MOV	0x410(%R15),%R11

(1161) 0x4a48d1 MOV	0x418(%R15),%RSI

(1161) 0x4a48d8 CMP	%R11,%RSI

(1161) 0x4a48db JB	4a6012

(1161) 0x4a48e1 CMP	%R12,%RSI

(1161) 0x4a48e4 JB	4a57a0

(1161) 0x4a48ea CMP	%R12,%R11

(1161) 0x4a48ed JAE	4a4910

(1161) 0x4a48ef MOV	0x420(%R15),%R8

(1161) 0x4a48f6 MOV	%R12,%RDX

(1161) 0x4a48f9 SUB	%R11,%RDX

(1161) 0x4a48fc SAL	$0x3,%RDX

(1161) 0x4a4900 LEA	(%R8,%R11,8),%RDI

(1161) 0x4a4904 JE	4a4910

(1161) 0x4a4906 XOR	%ESI,%ESI

(1161) 0x4a4908 VZEROUPPER

(1161) 0x4a490b CALL	404140 <memset@plt>

(1161) 0x4a4910 MOV	%R12,0x410(%R15)

(1161) 0x4a4917 VMOVDQA	0x70(%RSP),%XMM3

(1161) 0x4a491d MOV	0xb0(%R15),%RCX

(1161) 0x4a4924 MOV	0xb8(%R15),%RSI

(1161) 0x4a492b MOV	%RBX,0xa0(%R15)

(1161) 0x4a4932 VMOVDQU	%XMM3,0x90(%R15)

(1161) 0x4a493b CMP	%RCX,%RSI

(1161) 0x4a493e JB	4a6034

(1161) 0x4a4944 CMP	%RBX,%RSI

(1161) 0x4a4947 JB	4a5800

(1161) 0x4a494d CMP	%RBX,%RCX

(1161) 0x4a4950 JAE	4a4973

(1161) 0x4a4952 MOV	0xc0(%R15),%RDI

(1161) 0x4a4959 MOV	%RBX,%RDX

(1161) 0x4a495c SUB	%RCX,%RDX

(1161) 0x4a495f SAL	$0x3,%RDX

(1161) 0x4a4963 LEA	(%RDI,%RCX,8),%RDI

(1161) 0x4a4967 JE	4a4973

(1161) 0x4a4969 XOR	%ESI,%ESI

(1161) 0x4a496b VZEROUPPER

(1161) 0x4a496e CALL	404140 <memset@plt>

(1161) 0x4a4973 MOV	%RBX,0xb0(%R15)

(1161) 0x4a497a MOV	0x6c(%RSP),%EBX

(1161) 0x4a497e MOV	0x478(%R15),%R10D

(1161) 0x4a4985 MOV	0x1c8(%R15),%RAX

(1161) 0x4a498c ADD	%EBX,%R10D

(1161) 0x4a498f MOV	%EBX,0x484(%R15)

(1161) 0x4a4996 VMOVD	%R10D,%XMM1

(1161) 0x4a499b VPINSRD	$0x1,%R13D,%XMM1,%XMM6

(1161) 0x4a49a1 MOV	0x1c0(%R15),%R13

(1161) 0x4a49a8 VMOVQ	%XMM6,0x47c(%R15)

(1161) 0x4a49b1 CMP	%R13,%RAX

(1161) 0x4a49b4 JB	4a6060

(1161) 0x4a49ba CMP	%R12,%RAX

(1161) 0x4a49bd JB	4a5850

(1161) 0x4a49c3 CMP	%R12,%R13

(1161) 0x4a49c6 JAE	4a4c30

(1161) 0x4a49cc MOV	0x1d0(%R15),%R11

(1161) 0x4a49d3 MOV	%R12,%RSI

(1161) 0x4a49d6 LEA	(%R13,%R13,2),%RDX

(1161) 0x4a49db SUB	%R13,%RSI

(1161) 0x4a49de LEA	(%RSI,%RSI,2),%R14

(1161) 0x4a49e2 SAL	$0x3,%R14

(1161) 0x4a49e6 LEA	(%R11,%RDX,8),%R8

(1161) 0x4a49ea JE	4a4c30

(1161) 0x4a49f0 LEA	-0x18(%R14),%RCX

(1161) 0x4a49f4 MOV	$0xaaaaaaaaaaaaaab,%RDI

(1161) 0x4a49fe MOV	$0x1fffffffffffffff,%R9

(1161) 0x4a4a08 SHR	$0x3,%RCX

(1161) 0x4a4a0c IMUL	%RDI,%RCX

(1161) 0x4a4a10 AND	%R9,%RCX

(1161) 0x4a4a13 LEA	0x1(%RCX),%RDX

(1161) 0x4a4a17 CMP	$0x2,%RCX

(1161) 0x4a4a1b JBE	4a5e70

(1161) 0x4a4a21 MOV	%RDX,%R10

(1161) 0x4a4a24 MOV	$0x2aaaaaaaaaaaaab,%RDI

(1161) 0x4a4a2e MOV	%R8,%RAX

(1161) 0x4a4a31 VXORPD	%XMM7,%XMM7,%XMM7

(1161) 0x4a4a35 SHR	$0x2,%R10

(1161) 0x4a4a39 LEA	(%R10,%R10,2),%RSI

(1161) 0x4a4a3d SAL	$0x5,%RSI

(1161) 0x4a4a41 LEA	(%RSI,%R8,1),%R14

(1161) 0x4a4a45 SUB	$0x60,%RSI

(1161) 0x4a4a49 SHR	$0x5,%RSI

(1161) 0x4a4a4d IMUL	%RDI,%RSI

(1161) 0x4a4a51 INC	%RSI

(1161) 0x4a4a54 AND	$0x7,%ESI

(1161) 0x4a4a57 JE	4a4b0f

(1161) 0x4a4a5d CMP	$0x1,%RSI

(1161) 0x4a4a61 JE	4a4af4

(1161) 0x4a4a67 CMP	$0x2,%RSI

(1161) 0x4a4a6b JE	4a4ae2

(1161) 0x4a4a6d CMP	$0x3,%RSI

(1161) 0x4a4a71 JE	4a4ad0

(1161) 0x4a4a73 CMP	$0x4,%RSI

(1161) 0x4a4a77 JE	4a4abe

(1161) 0x4a4a79 CMP	$0x5,%RSI

(1161) 0x4a4a7d JE	4a4aac

(1161) 0x4a4a7f CMP	$0x6,%RSI

(1161) 0x4a4a83 JE	4a4a9a

(1161) 0x4a4a85 VMOVUPD	%YMM7,(%R8)

(1161) 0x4a4a8a VMOVUPD	%YMM7,0x20(%R8)

(1161) 0x4a4a90 LEA	0x60(%R8),%RAX

(1161) 0x4a4a94 VMOVUPD	%YMM7,0x40(%R8)

(1161) 0x4a4a9a VMOVUPD	%YMM7,(%RAX)

(1161) 0x4a4a9e VMOVUPD	%YMM7,0x20(%RAX)

(1161) 0x4a4aa3 ADD	$0x60,%RAX

(1161) 0x4a4aa7 VMOVUPD	%YMM7,-0x20(%RAX)

(1161) 0x4a4aac VMOVUPD	%YMM7,(%RAX)

(1161) 0x4a4ab0 VMOVUPD	%YMM7,0x20(%RAX)

(1161) 0x4a4ab5 ADD	$0x60,%RAX

(1161) 0x4a4ab9 VMOVUPD	%YMM7,-0x20(%RAX)

(1161) 0x4a4abe VMOVUPD	%YMM7,(%RAX)

(1161) 0x4a4ac2 VMOVUPD	%YMM7,0x20(%RAX)

(1161) 0x4a4ac7 ADD	$0x60,%RAX

(1161) 0x4a4acb VMOVUPD	%YMM7,-0x20(%RAX)

(1161) 0x4a4ad0 VMOVUPD	%YMM7,(%RAX)

(1161) 0x4a4ad4 VMOVUPD	%YMM7,0x20(%RAX)

(1161) 0x4a4ad9 ADD	$0x60,%RAX

(1161) 0x4a4add VMOVUPD	%YMM7,-0x20(%RAX)

(1161) 0x4a4ae2 VMOVUPD	%YMM7,(%RAX)

(1161) 0x4a4ae6 VMOVUPD	%YMM7,0x20(%RAX)

(1161) 0x4a4aeb ADD	$0x60,%RAX

(1161) 0x4a4aef VMOVUPD	%YMM7,-0x20(%RAX)

(1161) 0x4a4af4 VMOVUPD	%YMM7,(%RAX)

(1161) 0x4a4af8 VMOVUPD	%YMM7,0x20(%RAX)

(1161) 0x4a4afd ADD	$0x60,%RAX

(1161) 0x4a4b01 VMOVUPD	%YMM7,-0x20(%RAX)

(1161) 0x4a4b06 CMP	%RAX,%R14

(1161) 0x4a4b09 JE	4a4bcb

  (1163) 0x4a4b0f VMOVUPD	%YMM7,(%RAX)

  (1163) 0x4a4b13 VMOVUPD	%YMM7,0x20(%RAX)

  (1163) 0x4a4b18 ADD	$0x300,%RAX

  (1163) 0x4a4b1e VMOVUPD	%YMM7,-0x2c0(%RAX)

  (1163) 0x4a4b26 VMOVUPD	%YMM7,-0x2a0(%RAX)

  (1163) 0x4a4b2e VMOVUPD	%YMM7,-0x280(%RAX)

  (1163) 0x4a4b36 VMOVUPD	%YMM7,-0x260(%RAX)

  (1163) 0x4a4b3e VMOVUPD	%YMM7,-0x240(%RAX)

  (1163) 0x4a4b46 VMOVUPD	%YMM7,-0x220(%RAX)

  (1163) 0x4a4b4e VMOVUPD	%YMM7,-0x200(%RAX)

  (1163) 0x4a4b56 VMOVUPD	%YMM7,-0x1e0(%RAX)

  (1163) 0x4a4b5e VMOVUPD	%YMM7,-0x1c0(%RAX)

  (1163) 0x4a4b66 VMOVUPD	%YMM7,-0x1a0(%RAX)

  (1163) 0x4a4b6e VMOVUPD	%YMM7,-0x180(%RAX)

  (1163) 0x4a4b76 VMOVUPD	%YMM7,-0x160(%RAX)

  (1163) 0x4a4b7e VMOVUPD	%YMM7,-0x140(%RAX)

  (1163) 0x4a4b86 VMOVUPD	%YMM7,-0x120(%RAX)

  (1163) 0x4a4b8e VMOVUPD	%YMM7,-0x100(%RAX)

  (1163) 0x4a4b96 VMOVUPD	%YMM7,-0xe0(%RAX)

  (1163) 0x4a4b9e VMOVUPD	%YMM7,-0xc0(%RAX)

  (1163) 0x4a4ba6 VMOVUPD	%YMM7,-0xa0(%RAX)

  (1163) 0x4a4bae VMOVUPD	%YMM7,-0x80(%RAX)

  (1163) 0x4a4bb3 VMOVUPD	%YMM7,-0x60(%RAX)

  (1163) 0x4a4bb8 VMOVUPD	%YMM7,-0x40(%RAX)

  (1163) 0x4a4bbd VMOVUPD	%YMM7,-0x20(%RAX)

  (1163) 0x4a4bc2 CMP	%RAX,%R14

  (1163) 0x4a4bc5 JNE	4a4b0f

(1161) 0x4a4bcb TEST	$0x3,%DL

(1161) 0x4a4bce JE	4a4c30

(1161) 0x4a4bd0 MOV	%RDX,%RBX

(1161) 0x4a4bd3 AND	$-0x4,%RBX

(1161) 0x4a4bd7 LEA	(%RBX,%RBX,2),%R9

(1161) 0x4a4bdb LEA	(%R8,%R9,8),%R8

(1161) 0x4a4bdf SUB	%RBX,%RDX

(1161) 0x4a4be2 CMP	%RBX,%RCX

(1161) 0x4a4be5 JE	4a4c19

(1161) 0x4a4be7 ADD	%R13,%RBX

(1161) 0x4a4bea VXORPD	%XMM8,%XMM8,%XMM8

(1161) 0x4a4bef LEA	(%RBX,%RBX,2),%R13

(1161) 0x4a4bf3 LEA	(%R11,%R13,8),%R11

(1161) 0x4a4bf7 VMOVUPD	%XMM8,(%R11)

(1161) 0x4a4bfc VMOVUPD	%XMM8,0x10(%R11)

(1161) 0x4a4c02 VMOVUPD	%XMM8,0x20(%R11)

(1161) 0x4a4c08 TEST	$0x1,%DL

(1161) 0x4a4c0b JE	4a4c30

(1161) 0x4a4c0d AND	$-0x2,%RDX

(1161) 0x4a4c11 LEA	(%RDX,%RDX,2),%RCX

(1161) 0x4a4c15 LEA	(%R8,%RCX,8),%R8

(1161) 0x4a4c19 MOVQ	$0,(%R8)

(1161) 0x4a4c20 MOVQ	$0,0x8(%R8)

(1161) 0x4a4c28 MOVQ	$0,0x10(%R8)

(1161) 0x4a4c30 MOV	%R12,0x1c0(%R15)

(1161) 0x4a4c37 VZEROUPPER

(1161) 0x4a4c3a MOV	0x1e8(%R15),%R9

(1161) 0x4a4c41 MOV	0x1f0(%R15),%RSI

(1161) 0x4a4c48 CMP	%R9,%RSI

(1161) 0x4a4c4b JB	4a5f3c

(1161) 0x4a4c51 CMP	%R12,%RSI

(1161) 0x4a4c54 JB	4a5af0

0x4a4c5a CMP	%R12,%R9

0x4a4c5d JAE	4a4c7d

0x4a4c5f MOV	0x1f8(%R15),%RSI

0x4a4c66 MOV	%R12,%RDX

0x4a4c69 SUB	%R9,%RDX

0x4a4c6c SAL	$0x3,%RDX

0x4a4c70 LEA	(%RSI,%R9,8),%RDI

0x4a4c74 JE	4a4c7d

0x4a4c76 XOR	%ESI,%ESI

0x4a4c78 CALL	404140 <memset@plt>

0x4a4c7d MOV	%R12,0x1e8(%R15)

0x4a4c84 ADD	$0x88,%RSP

0x4a4c8b POP	%RBX

0x4a4c8c POP	%R12

0x4a4c8e POP	%R13

0x4a4c90 POP	%R14

0x4a4c92 POP	%R15

0x4a4c94 POP	%RBP

0x4a4c95 RET

0x4a4c96 NOPW	%CS:(%RAX,%RAX,1)

0x4a4ca0 MOV	0x278(%RDI),%RDX

0x4a4ca7 LEA	(%RDX,%RAX,8),%RDI

0x4a4cab MOV	%RBX,%RDX

0x4a4cae SUB	%RAX,%RDX

0x4a4cb1 SAL	$0x3,%RDX

0x4a4cb5 JE	4a462f

0x4a4cbb XOR	%ESI,%ESI

0x4a4cbd VMOVDQA	%XMM11,0x10(%RSP)

0x4a4cc3 CALL	404140 <memset@plt>

0x4a4cc8 VMOVDQA	0x10(%RSP),%XMM11

0x4a4cce JMP	4a462f

0x4a4cd3 NOPW	%CS:(%RAX,%RAX,1)

0x4a4cde XCHG	%AX,%AX

(1161) 0x4a4ce0 MOV	0x238(%R15),%RDI

(1161) 0x4a4ce7 MOV	%RBX,%RDX

(1161) 0x4a4cea SUB	%R8,%RDX

(1161) 0x4a4ced SAL	$0x3,%RDX

(1161) 0x4a4cf1 LEA	(%RDI,%R8,8),%RDI

(1161) 0x4a4cf5 JE	4a466f

(1161) 0x4a4cfb XOR	%ESI,%ESI

(1161) 0x4a4cfd CALL	404140 <memset@plt>

(1161) 0x4a4d02 JMP	4a466f

0x4a4d07 NOPW	(%RAX,%RAX,1)

(1161) 0x4a4d10 MOV	0x348(%R15),%RAX

(1161) 0x4a4d17 MOV	%R14,%RDX

(1161) 0x4a4d1a SUB	%R11,%RDX

(1161) 0x4a4d1d SAL	$0x3,%RDX

(1161) 0x4a4d21 LEA	(%RAX,%R11,8),%RDI

(1161) 0x4a4d25 JE	4a469f

(1161) 0x4a4d2b XOR	%ESI,%ESI

(1161) 0x4a4d2d CALL	404140 <memset@plt>

(1161) 0x4a4d32 JMP	4a469f

0x4a4d37 NOPW	(%RAX,%RAX,1)

(1161) 0x4a4d40 MOV	0x320(%R15),%RSI

(1161) 0x4a4d47 MOV	%R12,%RDX

(1161) 0x4a4d4a SUB	%R8,%RDX

(1161) 0x4a4d4d SAL	$0x3,%RDX

(1161) 0x4a4d51 LEA	(%RSI,%R8,8),%RDI

(1161) 0x4a4d55 JE	4a46cf

(1161) 0x4a4d5b XOR	%ESI,%ESI

(1161) 0x4a4d5d CALL	404140 <memset@plt>

(1161) 0x4a4d62 JMP	4a46cf

0x4a4d67 NOPW	(%RAX,%RAX,1)

(1161) 0x4a4d70 MOV	0x2f8(%R15),%R11

(1161) 0x4a4d77 MOV	%RBX,%RDX

(1161) 0x4a4d7a SUB	%R10,%RDX

(1161) 0x4a4d7d SAL	$0x3,%RDX

(1161) 0x4a4d81 LEA	(%R11,%R10,8),%RDI

(1161) 0x4a4d85 JE	4a4715

(1161) 0x4a4d8b XOR	%ESI,%ESI

(1161) 0x4a4d8d CALL	404140 <memset@plt>

(1161) 0x4a4d92 JMP	4a4715

0x4a4d97 NOPW	(%RAX,%RAX,1)

(1161) 0x4a4da0 MOV	0x2b8(%R15),%RDX

(1161) 0x4a4da7 LEA	(%RDX,%RBX,8),%RDI

(1161) 0x4a4dab MOV	%RCX,%RDX

(1161) 0x4a4dae SUB	%RBX,%RDX

(1161) 0x4a4db1 SAL	$0x3,%RDX

(1161) 0x4a4db5 JE	4a4762

(1161) 0x4a4dbb XOR	%ESI,%ESI

(1161) 0x4a4dbd MOV	%RCX,0x50(%RSP)

(1161) 0x4a4dc2 CALL	404140 <memset@plt>

(1161) 0x4a4dc7 MOV	0x50(%RSP),%RCX

(1161) 0x4a4dcc JMP	4a4762

0x4a4dd1 NOPW	%CS:(%RAX,%RAX,1)

0x4a4ddc NOPL	(%RAX)

(1161) 0x4a4de0 LEA	(%R11,%R14,4),%R14

(1161) 0x4a4de4 CMP	%R14,%R10

(1161) 0x4a4de7 JE	4a4796

(1161) 0x4a4ded MOV	%R14,0x360(%R15)

(1161) 0x4a4df4 JMP	4a4796

0x4a4df9 NOPL	(%RAX)

(1161) 0x4a4e00 MOV	0x100(%R15),%RDX

(1161) 0x4a4e07 LEA	(%RDX,%RCX,8),%RDI

(1161) 0x4a4e0b MOV	%RBX,%RDX

(1161) 0x4a4e0e SUB	%RCX,%RDX

(1161) 0x4a4e11 SAL	$0x3,%RDX

(1161) 0x4a4e15 JE	4a47ea

(1161) 0x4a4e1b XOR	%ESI,%ESI

(1161) 0x4a4e1d CALL	404140 <memset@plt>

(1161) 0x4a4e22 JMP	4a47ea

0x4a4e27 NOPW	(%RAX,%RAX,1)

(1161) 0x4a4e30 MOV	0x140(%R15),%R11

(1161) 0x4a4e37 MOV	%RBX,%R9

(1161) 0x4a4e3a LEA	(%RSI,%RSI,2),%RAX

(1161) 0x4a4e3e SUB	%RSI,%R9

(1161) 0x4a4e41 LEA	(%R9,%R9,2),%R10

(1161) 0x4a4e45 SAL	$0x3,%R10

(1161) 0x4a4e49 LEA	(%R11,%RAX,8),%RDI

(1161) 0x4a4e4d JE	4a4830

(1161) 0x4a4e53 LEA	-0x18(%R10),%RCX

(1161) 0x4a4e57 MOV	$0xaaaaaaaaaaaaaab,%RDX

(1161) 0x4a4e61 MOV	$0x1fffffffffffffff,%R14

(1161) 0x4a4e6b SHR	$0x3,%RCX

(1161) 0x4a4e6f IMUL	%RDX,%RCX

(1161) 0x4a4e73 AND	%R14,%RCX

(1161) 0x4a4e76 LEA	0x1(%RCX),%R9

(1161) 0x4a4e7a CMP	$0x2,%RCX

(1161) 0x4a4e7e JBE	4a5e50

(1161) 0x4a4e84 MOV	%R9,%R8

(1161) 0x4a4e87 MOV	$0x2aaaaaaaaaaaaab,%R14

(1161) 0x4a4e91 MOV	%RDI,%RAX

(1161) 0x4a4e94 VXORPD	%XMM10,%XMM10,%XMM10

(1161) 0x4a4e99 SHR	$0x2,%R8

(1161) 0x4a4e9d LEA	(%R8,%R8,2),%RDX

(1161) 0x4a4ea1 SAL	$0x5,%RDX

(1161) 0x4a4ea5 LEA	(%RDX,%RDI,1),%R10

(1161) 0x4a4ea9 SUB	$0x60,%RDX

(1161) 0x4a4ead SHR	$0x5,%RDX

(1161) 0x4a4eb1 IMUL	%R14,%RDX

(1161) 0x4a4eb5 INC	%RDX

(1161) 0x4a4eb8 AND	$0x7,%EDX

(1161) 0x4a4ebb JE	4a4f5e

(1161) 0x4a4ec1 CMP	$0x1,%RDX

(1161) 0x4a4ec5 JE	4a4f43

(1161) 0x4a4ec7 CMP	$0x2,%RDX

(1161) 0x4a4ecb JE	4a4f31

(1161) 0x4a4ecd CMP	$0x3,%RDX

(1161) 0x4a4ed1 JE	4a4f1f

(1161) 0x4a4ed3 CMP	$0x4,%RDX

(1161) 0x4a4ed7 JE	4a4f0d

(1161) 0x4a4ed9 CMP	$0x5,%RDX

(1161) 0x4a4edd JE	4a4efb

(1161) 0x4a4edf CMP	$0x6,%RDX

(1161) 0x4a4ee3 JNE	4a5dd0

(1161) 0x4a4ee9 VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a4eed VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a4ef2 ADD	$0x60,%RAX

(1161) 0x4a4ef6 VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a4efb VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a4eff VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a4f04 ADD	$0x60,%RAX

(1161) 0x4a4f08 VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a4f0d VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a4f11 VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a4f16 ADD	$0x60,%RAX

(1161) 0x4a4f1a VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a4f1f VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a4f23 VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a4f28 ADD	$0x60,%RAX

(1161) 0x4a4f2c VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a4f31 VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a4f35 VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a4f3a ADD	$0x60,%RAX

(1161) 0x4a4f3e VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a4f43 VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a4f47 VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a4f4c ADD	$0x60,%RAX

(1161) 0x4a4f50 VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a4f55 CMP	%RAX,%R10

(1161) 0x4a4f58 JE	4a501a

  (1165) 0x4a4f5e VMOVUPD	%YMM10,(%RAX)

  (1165) 0x4a4f62 VMOVUPD	%YMM10,0x20(%RAX)

  (1165) 0x4a4f67 ADD	$0x300,%RAX

  (1165) 0x4a4f6d VMOVUPD	%YMM10,-0x2c0(%RAX)

  (1165) 0x4a4f75 VMOVUPD	%YMM10,-0x2a0(%RAX)

  (1165) 0x4a4f7d VMOVUPD	%YMM10,-0x280(%RAX)

  (1165) 0x4a4f85 VMOVUPD	%YMM10,-0x260(%RAX)

  (1165) 0x4a4f8d VMOVUPD	%YMM10,-0x240(%RAX)

  (1165) 0x4a4f95 VMOVUPD	%YMM10,-0x220(%RAX)

  (1165) 0x4a4f9d VMOVUPD	%YMM10,-0x200(%RAX)

  (1165) 0x4a4fa5 VMOVUPD	%YMM10,-0x1e0(%RAX)

  (1165) 0x4a4fad VMOVUPD	%YMM10,-0x1c0(%RAX)

  (1165) 0x4a4fb5 VMOVUPD	%YMM10,-0x1a0(%RAX)

  (1165) 0x4a4fbd VMOVUPD	%YMM10,-0x180(%RAX)

  (1165) 0x4a4fc5 VMOVUPD	%YMM10,-0x160(%RAX)

  (1165) 0x4a4fcd VMOVUPD	%YMM10,-0x140(%RAX)

  (1165) 0x4a4fd5 VMOVUPD	%YMM10,-0x120(%RAX)

  (1165) 0x4a4fdd VMOVUPD	%YMM10,-0x100(%RAX)

  (1165) 0x4a4fe5 VMOVUPD	%YMM10,-0xe0(%RAX)

  (1165) 0x4a4fed VMOVUPD	%YMM10,-0xc0(%RAX)

  (1165) 0x4a4ff5 VMOVUPD	%YMM10,-0xa0(%RAX)

  (1165) 0x4a4ffd VMOVUPD	%YMM10,-0x80(%RAX)

  (1165) 0x4a5002 VMOVUPD	%YMM10,-0x60(%RAX)

  (1165) 0x4a5007 VMOVUPD	%YMM10,-0x40(%RAX)

  (1165) 0x4a500c VMOVUPD	%YMM10,-0x20(%RAX)

  (1165) 0x4a5011 CMP	%RAX,%R10

  (1165) 0x4a5014 JNE	4a4f5e

(1161) 0x4a501a MOV	%R9,%RAX

(1161) 0x4a501d AND	$-0x4,%RAX

(1161) 0x4a5021 LEA	(%RAX,%RAX,2),%R8

(1161) 0x4a5025 LEA	(%RDI,%R8,8),%RDI

(1161) 0x4a5029 TEST	$0x3,%R9B

(1161) 0x4a502d JE	4a4830

(1161) 0x4a5033 SUB	%RAX,%R9

(1161) 0x4a5036 CMP	%RAX,%RCX

(1161) 0x4a5039 JE	4a5072

(1161) 0x4a503b ADD	%RSI,%RAX

(1161) 0x4a503e VXORPD	%XMM11,%XMM11,%XMM11

(1161) 0x4a5043 LEA	(%RAX,%RAX,2),%RSI

(1161) 0x4a5047 LEA	(%R11,%RSI,8),%R11

(1161) 0x4a504b VMOVUPD	%XMM11,(%R11)

(1161) 0x4a5050 VMOVUPD	%XMM11,0x10(%R11)

(1161) 0x4a5056 VMOVUPD	%XMM11,0x20(%R11)

(1161) 0x4a505c TEST	$0x1,%R9B

(1161) 0x4a5060 JE	4a4830

(1161) 0x4a5066 AND	$-0x2,%R9

(1161) 0x4a506a LEA	(%R9,%R9,2),%RCX

(1161) 0x4a506e LEA	(%RDI,%RCX,8),%RDI

(1161) 0x4a5072 MOVQ	$0,(%RDI)

(1161) 0x4a5079 MOVQ	$0,0x8(%RDI)

(1161) 0x4a5081 MOVQ	$0,0x10(%RDI)

(1161) 0x4a5089 JMP	4a4830

0x4a508e XCHG	%AX,%AX

(1161) 0x4a5090 MOV	0x180(%R15),%RDI

(1161) 0x4a5097 MOV	%RBX,%RDX

(1161) 0x4a509a SUB	%RCX,%RDX

(1161) 0x4a509d SAL	$0x3,%RDX

(1161) 0x4a50a1 LEA	(%RDI,%RCX,8),%RDI

(1161) 0x4a50a5 JE	4a4876

(1161) 0x4a50ab XOR	%ESI,%ESI

(1161) 0x4a50ad VZEROUPPER

(1161) 0x4a50b0 CALL	404140 <memset@plt>

(1161) 0x4a50b5 JMP	4a4876

0x4a50ba NOPW	(%RAX,%RAX,1)

(1161) 0x4a50c0 TEST	%RSI,%RSI

(1161) 0x4a50c3 JNE	4a5c50

(1161) 0x4a50c9 VZEROUPPER

(1161) 0x4a50cc MOV	%R12,%RDX

(1161) 0x4a50cf SHR	$0x3c,%RDX

(1161) 0x4a50d3 JNE	4a5d00

(1161) 0x4a50d9 LEA	(,%R12,8),%R14

(1161) 0x4a50e1 MOV	%R14,%RDI

(1161) 0x4a50e4 CALL	404410 <_Znwm@plt>

(1161) 0x4a50e9 VMOVDQA	0x30(%RSP),%XMM0

(1161) 0x4a50ef MOV	%R14,%RDX

(1161) 0x4a50f2 XOR	%ESI,%ESI

(1161) 0x4a50f4 MOV	%RAX,%RDI

(1161) 0x4a50f7 MOV	%RAX,0x1a8(%R15)

(1161) 0x4a50fe VMOVDQU	%XMM0,0x198(%R15)

(1161) 0x4a5107 CALL	404140 <memset@plt>

(1161) 0x4a510c JMP	4a48ca

0x4a5111 NOPW	%CS:(%RAX,%RAX,1)

0x4a511c NOPL	(%RAX)

0x4a5120 TEST	%RSI,%RSI

0x4a5123 JNE	4a5d20

(1161) 0x4a5129 MOV	%RBX,%RCX

(1161) 0x4a512c SHR	$0x3c,%RCX

(1161) 0x4a5130 JNE	4a5d10

(1161) 0x4a5136 LEA	(,%RBX,8),%RSI

(1161) 0x4a513e VMOVDQA	%XMM11,(%RSP)

(1161) 0x4a5143 MOV	%RSI,%RDI

(1161) 0x4a5146 MOV	%RSI,0x10(%RSP)

(1161) 0x4a514b CALL	404410 <_Znwm@plt>

(1161) 0x4a5150 MOV	0x10(%RSP),%RDX

(1161) 0x4a5155 VPBROADCASTQ	%RBX,%XMM12

(1161) 0x4a515b XOR	%ESI,%ESI

(1161) 0x4a515d MOV	%RAX,%RDI

(1161) 0x4a5160 VMOVDQU	%XMM12,0x268(%R15)

(1161) 0x4a5169 MOV	%RAX,0x278(%R15)

(1161) 0x4a5170 CALL	404140 <memset@plt>

(1161) 0x4a5175 VMOVDQA	(%RSP),%XMM11

(1161) 0x4a517a JMP	4a4636

0x4a517f NOP

(1161) 0x4a5180 TEST	%RSI,%RSI

(1161) 0x4a5183 JNE	4a5d50

(1161) 0x4a5189 MOV	%RBX,%R9

(1161) 0x4a518c SHR	$0x3c,%R9

(1161) 0x4a5190 JNE	4a5d10

(1161) 0x4a5196 LEA	(,%RBX,8),%R10

(1161) 0x4a519e MOV	%R10,%RDI

(1161) 0x4a51a1 MOV	%R10,0x10(%RSP)

(1161) 0x4a51a6 CALL	404410 <_Znwm@plt>

(1161) 0x4a51ab MOV	0x10(%RSP),%RDX

(1161) 0x4a51b0 VPBROADCASTQ	%RBX,%XMM13

(1161) 0x4a51b6 XOR	%ESI,%ESI

(1161) 0x4a51b8 MOV	%RAX,%RDI

(1161) 0x4a51bb VMOVDQU	%XMM13,0x228(%R15)

(1161) 0x4a51c4 MOV	%RAX,0x238(%R15)

(1161) 0x4a51cb CALL	404140 <memset@plt>

(1161) 0x4a51d0 JMP	4a4676

0x4a51d5 NOPW	%CS:(%RAX,%RAX,1)

(1161) 0x4a51e0 TEST	%RSI,%RSI

(1161) 0x4a51e3 JNE	4a5d70

(1161) 0x4a51e9 MOV	%R14,%RDX

(1161) 0x4a51ec SHR	$0x3c,%RDX

(1161) 0x4a51f0 JNE	4a5d00

(1161) 0x4a51f6 LEA	(,%R14,8),%RCX

(1161) 0x4a51fe MOV	%RCX,%RDI

(1161) 0x4a5201 MOV	%RCX,0x10(%RSP)

(1161) 0x4a5206 CALL	404410 <_Znwm@plt>

(1161) 0x4a520b VMOVDQA	0x50(%RSP),%XMM14

(1161) 0x4a5211 MOV	0x10(%RSP),%RDX

(1161) 0x4a5216 XOR	%ESI,%ESI

(1161) 0x4a5218 MOV	%RAX,%RDI

(1161) 0x4a521b MOV	%RAX,0x348(%R15)

(1161) 0x4a5222 VMOVDQU	%XMM14,0x338(%R15)

(1161) 0x4a522b CALL	404140 <memset@plt>

(1161) 0x4a5230 JMP	4a46a6

0x4a5235 NOPW	%CS:(%RAX,%RAX,1)

(1161) 0x4a5240 TEST	%RSI,%RSI

(1161) 0x4a5243 JNE	4a5b90

(1161) 0x4a5249 MOV	%R12,%RDI

(1161) 0x4a524c SHR	$0x3c,%RDI

(1161) 0x4a5250 JNE	4a5d00

(1161) 0x4a5256 LEA	(,%R12,8),%R9

(1161) 0x4a525e MOV	%R9,%RDI

(1161) 0x4a5261 MOV	%R9,0x10(%RSP)

(1161) 0x4a5266 CALL	404410 <_Znwm@plt>

(1161) 0x4a526b MOV	0x10(%RSP),%RDX

(1161) 0x4a5270 VPBROADCASTQ	%R12,%XMM15

(1161) 0x4a5276 XOR	%ESI,%ESI

(1161) 0x4a5278 MOV	%RAX,%RDI

(1161) 0x4a527b VMOVDQU	%XMM15,0x310(%R15)

(1161) 0x4a5284 MOV	%RAX,0x320(%R15)

(1161) 0x4a528b CALL	404140 <memset@plt>

(1161) 0x4a5290 JMP	4a46d6

0x4a5295 NOPW	%CS:(%RAX,%RAX,1)

(1161) 0x4a52a0 TEST	%RSI,%RSI

(1161) 0x4a52a3 JNE	4a5bb0

(1161) 0x4a52a9 MOV	%RBX,%RAX

(1161) 0x4a52ac SHR	$0x3c,%RAX

(1161) 0x4a52b0 JNE	4a5d10

(1161) 0x4a52b6 SAL	$0x3,%RBX

(1161) 0x4a52ba MOV	%RBX,%RDI

(1161) 0x4a52bd CALL	404410 <_Znwm@plt>

(1161) 0x4a52c2 VMOVDQA	0x20(%RSP),%XMM0

(1161) 0x4a52c8 MOV	%RBX,%RDX

(1161) 0x4a52cb XOR	%ESI,%ESI

(1161) 0x4a52cd MOV	%RAX,%RDI

(1161) 0x4a52d0 MOV	%RAX,0x2f8(%R15)

(1161) 0x4a52d7 VMOVDQU	%XMM0,0x2e8(%R15)

(1161) 0x4a52e0 CALL	404140 <memset@plt>

(1161) 0x4a52e5 JMP	4a471c

0x4a52ea NOPW	(%RAX,%RAX,1)

(1161) 0x4a52f0 TEST	%RSI,%RSI

(1161) 0x4a52f3 JNE	4a5bd0

(1161) 0x4a52f9 MOV	%RCX,%R8

(1161) 0x4a52fc SHR	$0x3c,%R8

(1161) 0x4a5300 JNE	4a5cf0

(1161) 0x4a5306 LEA	(,%RCX,8),%RSI

(1161) 0x4a530e MOV	%RCX,0x40(%RSP)

(1161) 0x4a5313 MOV	%RSI,%RDI

(1161) 0x4a5316 MOV	%RSI,0x50(%RSP)

(1161) 0x4a531b CALL	404410 <_Znwm@plt>

(1161) 0x4a5320 MOV	0x40(%RSP),%R9

(1161) 0x4a5325 MOV	0x50(%RSP),%RDX

(1161) 0x4a532a XOR	%ESI,%ESI

(1161) 0x4a532c MOV	%RAX,%RDI

(1161) 0x4a532f MOV	%RAX,0x2b8(%R15)

(1161) 0x4a5336 VPBROADCASTQ	%R9,%XMM3

(1161) 0x4a533c VMOVDQU	%XMM3,0x2a8(%R15)

(1161) 0x4a5345 CALL	404140 <memset@plt>

(1161) 0x4a534a JMP	4a4769

0x4a534f NOP

(1161) 0x4a5350 MOV	0x368(%R15),%RDI

(1161) 0x4a5357 MOV	%R14,%RDX

(1161) 0x4a535a SUB	%RAX,%RDX

(1161) 0x4a535d SUB	%R10,%RDI

(1161) 0x4a5360 SAR	$0x2,%RDI

(1161) 0x4a5364 CMP	%RDX,%RDI

(1161) 0x4a5367 JAE	4a5b50

(1161) 0x4a536d MOV	$0x1fffffffffffffff,%RCX

(1161) 0x4a5377 SUB	%RAX,%RCX

(1161) 0x4a537a CMP	%RDX,%RCX

(1161) 0x4a537d JB	4a5e86

(1161) 0x4a5383 CMP	%RDX,%RAX

(1161) 0x4a5386 MOV	%RDX,%R8

(1161) 0x4a5389 MOV	%RBX,0x20(%RSP)

(1161) 0x4a538e MOV	%R11,0x40(%RSP)

(1161) 0x4a5393 CMOVAE	%RAX,%R8

(1161) 0x4a5397 MOV	%RDX,0x50(%RSP)

(1161) 0x4a539c ADD	%R8,%RAX

(1161) 0x4a539f SAL	$0x2,%RAX

(1161) 0x4a53a3 MOV	%RAX,%RDI

(1161) 0x4a53a6 MOV	%RAX,%RBX

(1161) 0x4a53a9 CALL	404410 <_Znwm@plt>

(1161) 0x4a53ae MOV	0x20(%RSP),%R9

(1161) 0x4a53b3 MOV	0x50(%RSP),%R11

(1161) 0x4a53b8 MOV	%RAX,%R10

(1161) 0x4a53bb LEA	(%RAX,%R9,1),%RSI

(1161) 0x4a53bf DEC	%R11

(1161) 0x4a53c2 MOV	0x40(%RSP),%RAX

(1161) 0x4a53c7 MOVL	$0,(%RSI)

(1161) 0x4a53cd JE	4a5400

(1161) 0x4a53cf LEA	0x4(%RSI),%RDI

(1161) 0x4a53d3 LEA	(,%R11,4),%RDX

(1161) 0x4a53db XOR	%ESI,%ESI

(1161) 0x4a53dd MOV	%R10,0x20(%RSP)

(1161) 0x4a53e2 MOV	%R9,0x40(%RSP)

(1161) 0x4a53e7 MOV	%RAX,0x50(%RSP)

(1161) 0x4a53ec CALL	404140 <memset@plt>

(1161) 0x4a53f1 MOV	0x50(%RSP),%RAX

(1161) 0x4a53f6 MOV	0x40(%RSP),%R9

(1161) 0x4a53fb MOV	0x20(%RSP),%R10

(1161) 0x4a5400 TEST	%R9,%R9

(1161) 0x4a5403 JNE	4a5d90

(1161) 0x4a5409 TEST	%RAX,%RAX

(1161) 0x4a540c JNE	4a5e77

(1161) 0x4a5412 LEA	(%R10,%R14,4),%R14

(1161) 0x4a5416 VMOVQ	%R10,%XMM5

(1161) 0x4a541b ADD	%RBX,%R10

(1161) 0x4a541e VPINSRQ	$0x1,%R14,%XMM5,%XMM1

(1161) 0x4a5424 MOV	%R10,0x368(%R15)

(1161) 0x4a542b VMOVDQU	%XMM1,0x358(%R15)

(1161) 0x4a5434 JMP	4a4796

0x4a5439 NOPL	(%RAX)

(1161) 0x4a5440 TEST	%RSI,%RSI

(1161) 0x4a5443 JNE	4a5bf0

(1161) 0x4a5449 MOV	%RBX,%RDI

(1161) 0x4a544c SHR	$0x3c,%RDI

(1161) 0x4a5450 JNE	4a5d10

(1161) 0x4a5456 LEA	(,%RBX,8),%R14

(1161) 0x4a545e MOV	%R14,%RDI

(1161) 0x4a5461 CALL	404410 <_Znwm@plt>

(1161) 0x4a5466 VPBROADCASTQ	%RBX,%XMM8

(1161) 0x4a546c MOV	%R14,%RDX

(1161) 0x4a546f XOR	%ESI,%ESI

(1161) 0x4a5471 MOV	%RAX,%RDI

(1161) 0x4a5474 VMOVDQU	%XMM8,0xf0(%R15)

(1161) 0x4a547d MOV	%RAX,0x100(%R15)

(1161) 0x4a5484 CALL	404140 <memset@plt>

(1161) 0x4a5489 JMP	4a47f1

0x4a548e XCHG	%AX,%AX

(1161) 0x4a5490 TEST	%R8,%R8

(1161) 0x4a5493 JNE	4a5c10

(1161) 0x4a5499 MOV	$0x555555555555555,%R9

(1161) 0x4a54a3 CMP	%RBX,%R9

(1161) 0x4a54a6 JB	4a5e20

(1161) 0x4a54ac LEA	(%RBX,%RBX,2),%R14

(1161) 0x4a54b0 SAL	$0x3,%R14

(1161) 0x4a54b4 MOV	%R14,%RDI

(1161) 0x4a54b7 SHR	$0x3,%R14

(1161) 0x4a54bb CALL	404410 <_Znwm@plt>

(1161) 0x4a54c0 LEA	-0x3(%R14),%RDX

(1161) 0x4a54c4 MOV	$0xaaaaaaaaaaaaaab,%R10

(1161) 0x4a54ce VPBROADCASTQ	%RBX,%XMM12

(1161) 0x4a54d4 IMUL	%R10,%RDX

(1161) 0x4a54d8 MOV	%RAX,%R11

(1161) 0x4a54db MOV	%RAX,0x140(%R15)

(1161) 0x4a54e2 MOV	$0x1fffffffffffffff,%RAX

(1161) 0x4a54ec VMOVDQU	%XMM12,0x130(%R15)

(1161) 0x4a54f5 AND	%RAX,%RDX

(1161) 0x4a54f8 LEA	0x1(%RDX),%R8

(1161) 0x4a54fc CMP	$0x2,%RDX

(1161) 0x4a5500 JBE	4a5e40

(1161) 0x4a5506 MOV	%R8,%RSI

(1161) 0x4a5509 MOV	$0x2aaaaaaaaaaaaab,%R14

(1161) 0x4a5513 MOV	%R11,%R10

(1161) 0x4a5516 VXORPD	%XMM13,%XMM13,%XMM13

(1161) 0x4a551b SHR	$0x2,%RSI

(1161) 0x4a551f LEA	(%RSI,%RSI,2),%RDI

(1161) 0x4a5523 SAL	$0x5,%RDI

(1161) 0x4a5527 LEA	(%RDI,%R11,1),%R9

(1161) 0x4a552b SUB	$0x60,%RDI

(1161) 0x4a552f SHR	$0x5,%RDI

(1161) 0x4a5533 IMUL	%R14,%RDI

(1161) 0x4a5537 INC	%RDI

(1161) 0x4a553a AND	$0x7,%EDI

(1161) 0x4a553d JE	4a55f6

(1161) 0x4a5543 CMP	$0x1,%RDI

(1161) 0x4a5547 JE	4a55d8

(1161) 0x4a554d CMP	$0x2,%RDI

(1161) 0x4a5551 JE	4a55c3

(1161) 0x4a5553 CMP	$0x3,%RDI

(1161) 0x4a5557 JE	4a55ae

(1161) 0x4a5559 CMP	$0x4,%RDI

(1161) 0x4a555d JE	4a5599

(1161) 0x4a555f CMP	$0x5,%RDI

(1161) 0x4a5563 JE	4a5584

(1161) 0x4a5565 CMP	$0x6,%RDI

(1161) 0x4a5569 JNE	4a5df0

(1161) 0x4a556f VMOVUPD	%YMM13,(%R10)

(1161) 0x4a5574 VMOVUPD	%YMM13,0x20(%R10)

(1161) 0x4a557a ADD	$0x60,%R10

(1161) 0x4a557e VMOVUPD	%YMM13,-0x20(%R10)

(1161) 0x4a5584 VMOVUPD	%YMM13,(%R10)

(1161) 0x4a5589 VMOVUPD	%YMM13,0x20(%R10)

(1161) 0x4a558f ADD	$0x60,%R10

(1161) 0x4a5593 VMOVUPD	%YMM13,-0x20(%R10)

(1161) 0x4a5599 VMOVUPD	%YMM13,(%R10)

(1161) 0x4a559e VMOVUPD	%YMM13,0x20(%R10)

(1161) 0x4a55a4 ADD	$0x60,%R10

(1161) 0x4a55a8 VMOVUPD	%YMM13,-0x20(%R10)

(1161) 0x4a55ae VMOVUPD	%YMM13,(%R10)

(1161) 0x4a55b3 VMOVUPD	%YMM13,0x20(%R10)

(1161) 0x4a55b9 ADD	$0x60,%R10

(1161) 0x4a55bd VMOVUPD	%YMM13,-0x20(%R10)

(1161) 0x4a55c3 VMOVUPD	%YMM13,(%R10)

(1161) 0x4a55c8 VMOVUPD	%YMM13,0x20(%R10)

(1161) 0x4a55ce ADD	$0x60,%R10

(1161) 0x4a55d2 VMOVUPD	%YMM13,-0x20(%R10)

(1161) 0x4a55d8 VMOVUPD	%YMM13,(%R10)

(1161) 0x4a55dd VMOVUPD	%YMM13,0x20(%R10)

(1161) 0x4a55e3 ADD	$0x60,%R10

(1161) 0x4a55e7 VMOVUPD	%YMM13,-0x20(%R10)

(1161) 0x4a55ed CMP	%R9,%R10

(1161) 0x4a55f0 JE	4a56cb

  (1164) 0x4a55f6 VMOVUPD	%YMM13,(%R10)

  (1164) 0x4a55fb VMOVUPD	%YMM13,0x20(%R10)

  (1164) 0x4a5601 ADD	$0x300,%R10

  (1164) 0x4a5608 VMOVUPD	%YMM13,-0x2c0(%R10)

  (1164) 0x4a5611 VMOVUPD	%YMM13,-0x2a0(%R10)

  (1164) 0x4a561a VMOVUPD	%YMM13,-0x280(%R10)

  (1164) 0x4a5623 VMOVUPD	%YMM13,-0x260(%R10)

  (1164) 0x4a562c VMOVUPD	%YMM13,-0x240(%R10)

  (1164) 0x4a5635 VMOVUPD	%YMM13,-0x220(%R10)

  (1164) 0x4a563e VMOVUPD	%YMM13,-0x200(%R10)

  (1164) 0x4a5647 VMOVUPD	%YMM13,-0x1e0(%R10)

  (1164) 0x4a5650 VMOVUPD	%YMM13,-0x1c0(%R10)

  (1164) 0x4a5659 VMOVUPD	%YMM13,-0x1a0(%R10)

  (1164) 0x4a5662 VMOVUPD	%YMM13,-0x180(%R10)

  (1164) 0x4a566b VMOVUPD	%YMM13,-0x160(%R10)

  (1164) 0x4a5674 VMOVUPD	%YMM13,-0x140(%R10)

  (1164) 0x4a567d VMOVUPD	%YMM13,-0x120(%R10)

  (1164) 0x4a5686 VMOVUPD	%YMM13,-0x100(%R10)

  (1164) 0x4a568f VMOVUPD	%YMM13,-0xe0(%R10)

  (1164) 0x4a5698 VMOVUPD	%YMM13,-0xc0(%R10)

  (1164) 0x4a56a1 VMOVUPD	%YMM13,-0xa0(%R10)

  (1164) 0x4a56aa VMOVUPD	%YMM13,-0x80(%R10)

  (1164) 0x4a56b0 VMOVUPD	%YMM13,-0x60(%R10)

  (1164) 0x4a56b6 VMOVUPD	%YMM13,-0x40(%R10)

  (1164) 0x4a56bc VMOVUPD	%YMM13,-0x20(%R10)

  (1164) 0x4a56c2 CMP	%R9,%R10

  (1164) 0x4a56c5 JNE	4a55f6

(1161) 0x4a56cb MOV	%R8,%RCX

(1161) 0x4a56ce AND	$-0x4,%RCX

(1161) 0x4a56d2 LEA	(%RCX,%RCX,2),%RAX

(1161) 0x4a56d6 LEA	(%R11,%RAX,8),%RSI

(1161) 0x4a56da TEST	$0x3,%R8B

(1161) 0x4a56de JE	4a4837

(1161) 0x4a56e4 SUB	%RCX,%R8

(1161) 0x4a56e7 CMP	%RCX,%RDX

(1161) 0x4a56ea JE	4a5720

(1161) 0x4a56ec LEA	(%RCX,%RCX,2),%RDX

(1161) 0x4a56f0 VXORPD	%XMM14,%XMM14,%XMM14

(1161) 0x4a56f5 LEA	(%R11,%RDX,8),%R11

(1161) 0x4a56f9 VMOVUPD	%XMM14,(%R11)

(1161) 0x4a56fe VMOVUPD	%XMM14,0x10(%R11)

(1161) 0x4a5704 VMOVUPD	%XMM14,0x20(%R11)

(1161) 0x4a570a TEST	$0x1,%R8B

(1161) 0x4a570e JE	4a4837

(1161) 0x4a5714 AND	$-0x2,%R8

(1161) 0x4a5718 LEA	(%R8,%R8,2),%R8

(1161) 0x4a571c LEA	(%RSI,%R8,8),%RSI

(1161) 0x4a5720 MOVQ	$0,(%RSI)

(1161) 0x4a5727 MOVQ	$0,0x8(%RSI)

(1161) 0x4a572f MOVQ	$0,0x10(%RSI)

(1161) 0x4a5737 JMP	4a4837

0x4a573c NOPL	(%RAX)

(1161) 0x4a5740 TEST	%RSI,%RSI

(1161) 0x4a5743 JNE	4a5c30

(1161) 0x4a5749 VZEROUPPER

(1161) 0x4a574c MOV	%RBX,%R9

(1161) 0x4a574f SHR	$0x3c,%R9

(1161) 0x4a5753 JNE	4a5d10

(1161) 0x4a5759 LEA	(,%RBX,8),%R14

(1161) 0x4a5761 MOV	%R14,%RDI

(1161) 0x4a5764 CALL	404410 <_Znwm@plt>

(1161) 0x4a5769 VMOVDQA	0x50(%RSP),%XMM2

(1161) 0x4a576f MOV	%R14,%RDX

(1161) 0x4a5772 XOR	%ESI,%ESI

(1161) 0x4a5774 MOV	%RAX,%RDI

(1161) 0x4a5777 MOV	%RAX,0x180(%R15)

(1161) 0x4a577e VMOVDQU	%XMM2,0x170(%R15)

(1161) 0x4a5787 CALL	404140 <memset@plt>

(1161) 0x4a578c JMP	4a487d

0x4a5791 NOPW	%CS:(%RAX,%RAX,1)

0x4a579c NOPL	(%RAX)

(1161) 0x4a57a0 TEST	%RSI,%RSI

(1161) 0x4a57a3 JNE	4a5c70

(1161) 0x4a57a9 VZEROUPPER

(1161) 0x4a57ac MOV	%R12,%RSI

(1161) 0x4a57af SHR	$0x3c,%RSI

(1161) 0x4a57b3 JNE	4a5d00

(1161) 0x4a57b9 LEA	(,%R12,8),%R14

(1161) 0x4a57c1 MOV	%R14,%RDI

(1161) 0x4a57c4 CALL	404410 <_Znwm@plt>

(1161) 0x4a57c9 VMOVDQA	0x30(%RSP),%XMM4

(1161) 0x4a57cf MOV	%R14,%RDX

(1161) 0x4a57d2 XOR	%ESI,%ESI

(1161) 0x4a57d4 MOV	%RAX,%RDI

(1161) 0x4a57d7 MOV	%RAX,0x420(%R15)

(1161) 0x4a57de VMOVDQU	%XMM4,0x410(%R15)

(1161) 0x4a57e7 CALL	404140 <memset@plt>

(1161) 0x4a57ec JMP	4a4917

0x4a57f1 NOPW	%CS:(%RAX,%RAX,1)

0x4a57fc NOPL	(%RAX)

(1161) 0x4a5800 TEST	%RSI,%RSI

(1161) 0x4a5803 JNE	4a5c90

(1161) 0x4a5809 VZEROUPPER

(1161) 0x4a580c MOV	%RBX,%R9

(1161) 0x4a580f SHR	$0x3c,%R9

(1161) 0x4a5813 JNE	4a5d10

(1161) 0x4a5819 SAL	$0x3,%RBX

(1161) 0x4a581d MOV	%RBX,%RDI

(1161) 0x4a5820 CALL	404410 <_Znwm@plt>

(1161) 0x4a5825 VMOVDQA	0x50(%RSP),%XMM5

(1161) 0x4a582b MOV	%RBX,%RDX

(1161) 0x4a582e XOR	%ESI,%ESI

(1161) 0x4a5830 MOV	%RAX,%RDI

(1161) 0x4a5833 MOV	%RAX,0xc0(%R15)

(1161) 0x4a583a VMOVDQU	%XMM5,0xb0(%R15)

(1161) 0x4a5843 CALL	404140 <memset@plt>

(1161) 0x4a5848 JMP	4a497a

0x4a584d NOPL	(%RAX)

(1161) 0x4a5850 TEST	%RAX,%RAX

(1161) 0x4a5853 JNE	4a5cb0

(1161) 0x4a5859 VZEROUPPER

(1161) 0x4a585c MOV	$0x555555555555555,%RDX

(1161) 0x4a5866 CMP	%R12,%RDX

(1161) 0x4a5869 JB	4a5d00

(1161) 0x4a586f LEA	(%R12,%R12,2),%R12

(1161) 0x4a5873 SAL	$0x3,%R12

(1161) 0x4a5877 MOV	%R12,%RDI

(1161) 0x4a587a SHR	$0x3,%R12

(1161) 0x4a587e CALL	404410 <_Znwm@plt>

(1161) 0x4a5883 VMOVDQA	0x30(%RSP),%XMM9

(1161) 0x4a5889 LEA	-0x3(%R12),%R14

(1161) 0x4a588e MOV	$0xaaaaaaaaaaaaaab,%R10

(1161) 0x4a5898 IMUL	%R10,%R14

(1161) 0x4a589c MOV	$0x1fffffffffffffff,%RSI

(1161) 0x4a58a6 MOV	%RAX,%RBX

(1161) 0x4a58a9 MOV	%RAX,0x1d0(%R15)

(1161) 0x4a58b0 AND	%RSI,%R14

(1161) 0x4a58b3 LEA	0x1(%R14),%RDI

(1161) 0x4a58b7 VMOVDQU	%XMM9,0x1c0(%R15)

(1161) 0x4a58c0 CMP	$0x2,%R14

(1161) 0x4a58c4 JBE	4a5e60

(1161) 0x4a58ca MOV	%RDI,%R9

(1161) 0x4a58cd MOV	$0x2aaaaaaaaaaaaab,%RCX

(1161) 0x4a58d7 VXORPD	%XMM10,%XMM10,%XMM10

(1161) 0x4a58dc SHR	$0x2,%R9

(1161) 0x4a58e0 LEA	(%R9,%R9,2),%R13

(1161) 0x4a58e4 SAL	$0x5,%R13

(1161) 0x4a58e8 LEA	(%R13,%RAX,1),%R11

(1161) 0x4a58ed SUB	$0x60,%R13

(1161) 0x4a58f1 SHR	$0x5,%R13

(1161) 0x4a58f5 IMUL	%RCX,%R13

(1161) 0x4a58f9 INC	%R13

(1161) 0x4a58fc AND	$0x7,%R13D

(1161) 0x4a5900 JE	4a59b5

(1161) 0x4a5906 CMP	$0x1,%R13

(1161) 0x4a590a JE	4a599a

(1161) 0x4a5910 CMP	$0x2,%R13

(1161) 0x4a5914 JE	4a5988

(1161) 0x4a5916 CMP	$0x3,%R13

(1161) 0x4a591a JE	4a5976

(1161) 0x4a591c CMP	$0x4,%R13

(1161) 0x4a5920 JE	4a5964

(1161) 0x4a5922 CMP	$0x5,%R13

(1161) 0x4a5926 JE	4a5952

(1161) 0x4a5928 CMP	$0x6,%R13

(1161) 0x4a592c JE	4a5940

(1161) 0x4a592e VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a5932 VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a5937 LEA	0x60(%RAX),%RAX

(1161) 0x4a593b VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a5940 VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a5944 VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a5949 ADD	$0x60,%RAX

(1161) 0x4a594d VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a5952 VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a5956 VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a595b ADD	$0x60,%RAX

(1161) 0x4a595f VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a5964 VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a5968 VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a596d ADD	$0x60,%RAX

(1161) 0x4a5971 VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a5976 VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a597a VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a597f ADD	$0x60,%RAX

(1161) 0x4a5983 VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a5988 VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a598c VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a5991 ADD	$0x60,%RAX

(1161) 0x4a5995 VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a599a VMOVUPD	%YMM10,(%RAX)

(1161) 0x4a599e VMOVUPD	%YMM10,0x20(%RAX)

(1161) 0x4a59a3 ADD	$0x60,%RAX

(1161) 0x4a59a7 VMOVUPD	%YMM10,-0x20(%RAX)

(1161) 0x4a59ac CMP	%RAX,%R11

(1161) 0x4a59af JE	4a5a71

  (1162) 0x4a59b5 VMOVUPD	%YMM10,(%RAX)

  (1162) 0x4a59b9 VMOVUPD	%YMM10,0x20(%RAX)

  (1162) 0x4a59be ADD	$0x300,%RAX

  (1162) 0x4a59c4 VMOVUPD	%YMM10,-0x2c0(%RAX)

  (1162) 0x4a59cc VMOVUPD	%YMM10,-0x2a0(%RAX)

  (1162) 0x4a59d4 VMOVUPD	%YMM10,-0x280(%RAX)

  (1162) 0x4a59dc VMOVUPD	%YMM10,-0x260(%RAX)

  (1162) 0x4a59e4 VMOVUPD	%YMM10,-0x240(%RAX)

  (1162) 0x4a59ec VMOVUPD	%YMM10,-0x220(%RAX)

  (1162) 0x4a59f4 VMOVUPD	%YMM10,-0x200(%RAX)

  (1162) 0x4a59fc VMOVUPD	%YMM10,-0x1e0(%RAX)

  (1162) 0x4a5a04 VMOVUPD	%YMM10,-0x1c0(%RAX)

  (1162) 0x4a5a0c VMOVUPD	%YMM10,-0x1a0(%RAX)

  (1162) 0x4a5a14 VMOVUPD	%YMM10,-0x180(%RAX)

  (1162) 0x4a5a1c VMOVUPD	%YMM10,-0x160(%RAX)

  (1162) 0x4a5a24 VMOVUPD	%YMM10,-0x140(%RAX)

  (1162) 0x4a5a2c VMOVUPD	%YMM10,-0x120(%RAX)

  (1162) 0x4a5a34 VMOVUPD	%YMM10,-0x100(%RAX)

  (1162) 0x4a5a3c VMOVUPD	%YMM10,-0xe0(%RAX)

  (1162) 0x4a5a44 VMOVUPD	%YMM10,-0xc0(%RAX)

  (1162) 0x4a5a4c VMOVUPD	%YMM10,-0xa0(%RAX)

  (1162) 0x4a5a54 VMOVUPD	%YMM10,-0x80(%RAX)

  (1162) 0x4a5a59 VMOVUPD	%YMM10,-0x60(%RAX)

  (1162) 0x4a5a5e VMOVUPD	%YMM10,-0x40(%RAX)

  (1162) 0x4a5a63 VMOVUPD	%YMM10,-0x20(%RAX)

  (1162) 0x4a5a68 CMP	%RAX,%R11

  (1162) 0x4a5a6b JNE	4a59b5

(1161) 0x4a5a71 MOV	%RDI,%R8

(1161) 0x4a5a74 AND	$-0x4,%R8

(1161) 0x4a5a78 LEA	(%R8,%R8,2),%RDX

(1161) 0x4a5a7c LEA	(%RBX,%RDX,8),%R10

(1161) 0x4a5a80 TEST	$0x3,%DIL

(1161) 0x4a5a84 JE	4a5e10

(1161) 0x4a5a8a VZEROUPPER

(1161) 0x4a5a8d SUB	%R8,%RDI

(1161) 0x4a5a90 CMP	%R14,%R8

(1161) 0x4a5a93 JE	4a5ac2

(1161) 0x4a5a95 LEA	(%R8,%R8,2),%R12

(1161) 0x4a5a99 VXORPD	%XMM11,%XMM11,%XMM11

(1161) 0x4a5a9e LEA	(%RBX,%R12,8),%RBX

(1161) 0x4a5aa2 VMOVUPD	%XMM11,(%RBX)

(1161) 0x4a5aa6 VMOVUPD	%XMM11,0x10(%RBX)

(1161) 0x4a5aab VMOVUPD	%XMM11,0x20(%RBX)

(1161) 0x4a5ab0 TEST	$0x1,%DIL

(1161) 0x4a5ab4 JE	4a5ad9

(1161) 0x4a5ab6 AND	$-0x2,%RDI

(1161) 0x4a5aba LEA	(%RDI,%RDI,2),%R14

(1161) 0x4a5abe LEA	(%R10,%R14,8),%R10

(1161) 0x4a5ac2 MOVQ	$0,(%R10)

(1161) 0x4a5ac9 MOVQ	$0,0x8(%R10)

(1161) 0x4a5ad1 MOVQ	$0,0x10(%R10)

(1161) 0x4a5ad9 MOVSXD	0x480(%R15),%R12

(1161) 0x4a5ae0 JMP	4a4c3a

0x4a5ae5 NOPW	%CS:(%RAX,%RAX,1)

(1161) 0x4a5af0 TEST	%RSI,%RSI

(1161) 0x4a5af3 JNE	4a5cd0

(1161) 0x4a5af9 MOV	%R12,%RDI

(1161) 0x4a5afc SHR	$0x3c,%RDI

(1161) 0x4a5b00 JNE	4a5d00

0x4a5b06 LEA	(,%R12,8),%R13

0x4a5b0e MOV	%R13,%RDI

0x4a5b11 CALL	404410 <_Znwm@plt>

0x4a5b16 VPBROADCASTQ	%R12,%XMM12

0x4a5b1c MOV	%R13,%RDX

0x4a5b1f XOR	%ESI,%ESI

0x4a5b21 VMOVDQU	%XMM12,0x1e8(%R15)

0x4a5b2a MOV	%RAX,0x1f8(%R15)

0x4a5b31 ADD	$0x88,%RSP

0x4a5b38 MOV	%RAX,%RDI

0x4a5b3b POP	%RBX

0x4a5b3c POP	%R12

0x4a5b3e POP	%R13

0x4a5b40 POP	%R14

0x4a5b42 POP	%R15

0x4a5b44 POP	%RBP

0x4a5b45 JMP	404140

0x4a5b4a NOPW	(%RAX,%RAX,1)

(1161) 0x4a5b50 DEC	%RDX

(1161) 0x4a5b53 LEA	0x4(%R10),%RDI

(1161) 0x4a5b57 MOVL	$0,(%R10)

(1161) 0x4a5b5e JE	4a5b78

(1161) 0x4a5b60 LEA	(%RDI,%RDX,4),%R14

(1161) 0x4a5b64 XOR	%ESI,%ESI

(1161) 0x4a5b66 MOV	%R14,%RDX

(1161) 0x4a5b69 SUB	%R10,%RDX

(1161) 0x4a5b6c SUB	$0x4,%RDX

(1161) 0x4a5b70 CALL	404140 <memset@plt>

(1161) 0x4a5b75 MOV	%R14,%RDI

(1161) 0x4a5b78 MOV	%RDI,0x360(%R15)

(1161) 0x4a5b7f JMP	4a4796

0x4a5b84 NOPW	%CS:(%RAX,%RAX,1)

0x4a5b8f NOP

(1161) 0x4a5b90 MOV	0x320(%R15),%RDI

(1161) 0x4a5b97 SAL	$0x3,%RSI

(1161) 0x4a5b9b CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5ba0 JMP	4a5249

0x4a5ba5 NOPW	%CS:(%RAX,%RAX,1)

(1161) 0x4a5bb0 MOV	0x2f8(%R15),%RDI

(1161) 0x4a5bb7 SAL	$0x3,%RSI

(1161) 0x4a5bbb CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5bc0 JMP	4a52a9

0x4a5bc5 NOPW	%CS:(%RAX,%RAX,1)

(1161) 0x4a5bd0 MOV	0x2b8(%R15),%RDI

(1161) 0x4a5bd7 MOV	%RCX,0x50(%RSP)

(1161) 0x4a5bdc SAL	$0x3,%RSI

(1161) 0x4a5be0 CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5be5 MOV	0x50(%RSP),%RCX

(1161) 0x4a5bea JMP	4a52f9

0x4a5bef NOP

(1161) 0x4a5bf0 MOV	0x100(%R15),%RDI

(1161) 0x4a5bf7 SAL	$0x3,%RSI

(1161) 0x4a5bfb CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5c00 JMP	4a5449

0x4a5c05 NOPW	%CS:(%RAX,%RAX,1)

(1161) 0x4a5c10 MOV	0x140(%R15),%RDI

(1161) 0x4a5c17 LEA	(%R8,%R8,2),%RSI

(1161) 0x4a5c1b SAL	$0x3,%RSI

(1161) 0x4a5c1f CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5c24 JMP	4a5499

0x4a5c29 NOPL	(%RAX)

(1161) 0x4a5c30 MOV	0x180(%R15),%RDI

(1161) 0x4a5c37 SAL	$0x3,%RSI

(1161) 0x4a5c3b VZEROUPPER

(1161) 0x4a5c3e CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5c43 JMP	4a574c

0x4a5c48 NOPL	(%RAX,%RAX,1)

(1161) 0x4a5c50 MOV	0x1a8(%R15),%RDI

(1161) 0x4a5c57 SAL	$0x3,%RSI

(1161) 0x4a5c5b VZEROUPPER

(1161) 0x4a5c5e CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5c63 JMP	4a50cc

0x4a5c68 NOPL	(%RAX,%RAX,1)

(1161) 0x4a5c70 MOV	0x420(%R15),%RDI

(1161) 0x4a5c77 SAL	$0x3,%RSI

(1161) 0x4a5c7b VZEROUPPER

(1161) 0x4a5c7e CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5c83 JMP	4a57ac

0x4a5c88 NOPL	(%RAX,%RAX,1)

(1161) 0x4a5c90 MOV	0xc0(%R15),%RDI

(1161) 0x4a5c97 SAL	$0x3,%RSI

(1161) 0x4a5c9b VZEROUPPER

(1161) 0x4a5c9e CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5ca3 JMP	4a580c

0x4a5ca8 NOPL	(%RAX,%RAX,1)

(1161) 0x4a5cb0 MOV	0x1d0(%R15),%RDI

(1161) 0x4a5cb7 LEA	(%RAX,%RAX,2),%RSI

(1161) 0x4a5cbb SAL	$0x3,%RSI

(1161) 0x4a5cbf VZEROUPPER

(1161) 0x4a5cc2 CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5cc7 JMP	4a585c

0x4a5ccc NOPL	(%RAX)

(1161) 0x4a5cd0 MOV	0x1f8(%R15),%RDI

(1161) 0x4a5cd7 SAL	$0x3,%RSI

(1161) 0x4a5cdb CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5ce0 JMP	4a5af9

0x4a5ce5 NOPW	%CS:(%RAX,%RAX,1)

(1161) 0x4a5cf0 SHR	$0x3d,%RCX

(1161) 0x4a5cf4 JE	4a5d16

(1161) 0x4a5cf6 NOPW	%CS:(%RAX,%RAX,1)

  (1160) 0x4a5d00 CALL	4044e0 <_ZSt28__throw_bad_array_new_lengthv@plt>

  (1160) 0x4a5d05 NOPW	%CS:(%RAX,%RAX,1)

  (1160) 0x4a5d10 SHR	$0x3d,%RBX

  (1160) 0x4a5d14 JNE	4a5d00

(1161) 0x4a5d16 CALL	404400 <_ZSt17__throw_bad_allocv@plt>

(1161) 0x4a5d1b NOPL	(%RAX,%RAX,1)

(1161) 0x4a5d20 MOV	0x278(%RDI),%RDI

(1161) 0x4a5d27 VMOVDQA	%XMM11,0x10(%RSP)

(1161) 0x4a5d2d SAL	$0x3,%RSI

(1161) 0x4a5d31 CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5d36 VMOVDQA	0x10(%RSP),%XMM11

(1161) 0x4a5d3c JMP	4a5129

0x4a5d41 NOPW	%CS:(%RAX,%RAX,1)

0x4a5d4c NOPL	(%RAX)

(1161) 0x4a5d50 MOV	0x238(%R15),%RDI

(1161) 0x4a5d57 SAL	$0x3,%RSI

(1161) 0x4a5d5b CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5d60 JMP	4a5189

0x4a5d65 NOPW	%CS:(%RAX,%RAX,1)

(1161) 0x4a5d70 MOV	0x348(%R15),%RDI

(1161) 0x4a5d77 SAL	$0x3,%RSI

(1161) 0x4a5d7b CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5d80 JMP	4a51e9

0x4a5d85 NOPW	%CS:(%RAX,%RAX,1)

(1161) 0x4a5d90 MOV	%RAX,%RSI

(1161) 0x4a5d93 MOV	%R10,%RDI

(1161) 0x4a5d96 MOV	%R9,%RDX

(1161) 0x4a5d99 MOV	%RAX,0x50(%RSP)

(1161) 0x4a5d9e CALL	4043f0 <memcpy@plt>

(1161) 0x4a5da3 MOV	0x368(%R15),%RSI

(1161) 0x4a5daa MOV	%RAX,%R10

(1161) 0x4a5dad MOV	0x50(%RSP),%RAX

(1161) 0x4a5db2 SUB	%RAX,%RSI

(1161) 0x4a5db5 MOV	%RAX,%RDI

(1161) 0x4a5db8 MOV	%R10,0x50(%RSP)

(1161) 0x4a5dbd CALL	404070 <_ZdlPvm@plt>

(1161) 0x4a5dc2 MOV	0x50(%RSP),%R10

(1161) 0x4a5dc7 JMP	4a5412

0x4a5dcc NOPL	(%RAX)

(1161) 0x4a5dd0 VMOVUPD	%YMM10,(%RDI)

(1161) 0x4a5dd4 VMOVUPD	%YMM10,0x20(%RDI)

(1161) 0x4a5dd9 LEA	0x60(%RDI),%RAX

(1161) 0x4a5ddd VMOVUPD	%YMM10,0x40(%RDI)

(1161) 0x4a5de2 JMP	4a4ee9

0x4a5de7 NOPW	(%RAX,%RAX,1)

(1161) 0x4a5df0 VMOVUPD	%YMM13,(%R11)

(1161) 0x4a5df5 VMOVUPD	%YMM13,0x20(%R11)

(1161) 0x4a5dfb LEA	0x60(%R11),%R10

(1161) 0x4a5dff VMOVUPD	%YMM13,0x40(%R11)

(1161) 0x4a5e05 JMP	4a556f

0x4a5e0a NOPW	(%RAX,%RAX,1)

(1161) 0x4a5e10 VZEROUPPER

(1161) 0x4a5e13 JMP	4a5ad9

0x4a5e18 NOPL	(%RAX,%RAX,1)

(1161) 0x4a5e20 MOV	$0xaaaaaaaaaaaaaaa,%R15

(1161) 0x4a5e2a CMP	%RBX,%R15

(1161) 0x4a5e2d JB	4a5d00

(1161) 0x4a5e33 JMP	4a5d16

0x4a5e38 NOPL	(%RAX,%RAX,1)

(1161) 0x4a5e40 MOV	%R11,%RSI

(1161) 0x4a5e43 XOR	%ECX,%ECX

(1161) 0x4a5e45 JMP	4a56e4

0x4a5e4a NOPW	(%RAX,%RAX,1)

(1161) 0x4a5e50 XOR	%EAX,%EAX

(1161) 0x4a5e52 JMP	4a5033

0x4a5e57 NOPW	(%RAX,%RAX,1)

(1161) 0x4a5e60 MOV	%RAX,%R10

(1161) 0x4a5e63 XOR	%R8D,%R8D

(1161) 0x4a5e66 JMP	4a5a8d

0x4a5e6b NOPL	(%RAX,%RAX,1)

(1161) 0x4a5e70 XOR	%EBX,%EBX

(1161) 0x4a5e72 JMP	4a4bdf

(1161) 0x4a5e77 MOV	0x368(%R15),%RSI

(1161) 0x4a5e7e SUB	%RAX,%RSI

(1161) 0x4a5e81 JMP	4a5db5

0x4a5e86 MOV	$0x5bef73,%EDI

0x4a5e8b CALL	404220 <_ZSt20__throw_length_errorPKc@plt>

0x4a5e90 MOV	$0x10,%EDI

0x4a5e95 VZEROUPPER

0x4a5e98 CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a5e9d MOV	$0x5bf0c8,%ESI

0x4a5ea2 MOV	%RAX,%RDI

0x4a5ea5 MOV	%RAX,%RBX

0x4a5ea8 CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

(1159) 0x4a5ead MOV	$0x4046f0,%EDX

(1159) 0x4a5eb2 MOV	$0x5dfb58,%ESI

(1159) 0x4a5eb7 MOV	%RBX,%RDI

(1159) 0x4a5eba CALL	404200 <__cxa_throw@plt>

(1159) 0x4a5ebf MOV	$0x10,%EDI

(1159) 0x4a5ec4 CALL	4044c0 <__cxa_allocate_exception@plt>

(1159) 0x4a5ec9 MOV	$0x5bf0c8,%ESI

(1159) 0x4a5ece MOV	%RAX,%RDI

(1159) 0x4a5ed1 MOV	%RAX,%RBX

(1159) 0x4a5ed4 CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

(1159) 0x4a5ed9 JMP	4a5ead

(1158) 0x4a5edb MOV	%RAX,%R12

(1158) 0x4a5ede JMP	4a5f5b

0x4a5ee0 JMP	4a5edb

0x4a5ee2 MOV	$0x10,%EDI

0x4a5ee7 CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a5eec MOV	$0x5bf0c8,%ESI

0x4a5ef1 MOV	%RAX,%RDI

0x4a5ef4 MOV	%RAX,%RBX

0x4a5ef7 CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x4a5efc JMP	4a5ead

0x4a5efe MOV	$0x10,%EDI

0x4a5f03 CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a5f08 MOV	$0x5bf0c8,%ESI

0x4a5f0d MOV	%RAX,%RDI

0x4a5f10 MOV	%RAX,%RBX

0x4a5f13 CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x4a5f18 JMP	4a5ead

0x4a5f1a MOV	$0x10,%EDI

0x4a5f1f VZEROUPPER

0x4a5f22 CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a5f27 MOV	$0x5bf0c8,%ESI

0x4a5f2c MOV	%RAX,%RDI

0x4a5f2f MOV	%RAX,%RBX

0x4a5f32 CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x4a5f37 JMP	4a5ead

0x4a5f3c MOV	$0x10,%EDI

0x4a5f41 CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a5f46 MOV	$0x5bf0c8,%ESI

0x4a5f4b MOV	%RAX,%RDI

0x4a5f4e MOV	%RAX,%RBX

0x4a5f51 CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x4a5f56 JMP	4a5ead

(1158) 0x4a5f5b MOV	%RBX,%RDI

(1158) 0x4a5f5e VZEROUPPER

(1158) 0x4a5f61 CALL	404730 <__cxa_free_exception@plt>

(1158) 0x4a5f66 MOV	%R12,%RDI

(1158) 0x4a5f69 CALL	404240 <_Unwind_Resume@plt>

(1158) 0x4a5f6e JMP	4a5edb

0x4a5f73 JMP	4a5edb

0x4a5f78 JMP	4a5edb

0x4a5f7d JMP	4a5edb

0x4a5f82 MOV	$0x10,%EDI

0x4a5f87 CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a5f8c MOV	$0x5bf0c8,%ESI

0x4a5f91 MOV	%RAX,%RDI

0x4a5f94 MOV	%RAX,%RBX

0x4a5f97 CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x4a5f9c JMP	4a5ead

0x4a5fa1 MOV	$0x10,%EDI

0x4a5fa6 CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a5fab MOV	$0x5bf0c8,%ESI

0x4a5fb0 MOV	%RAX,%RDI

0x4a5fb3 MOV	%RAX,%RBX

0x4a5fb6 CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x4a5fbb JMP	4a5ead

0x4a5fc0 JMP	4a5edb

0x4a5fc5 JMP	4a5edb

0x4a5fca MOV	$0x10,%EDI

0x4a5fcf CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a5fd4 MOV	$0x5bf0c8,%ESI

0x4a5fd9 MOV	%RAX,%RDI

0x4a5fdc MOV	%RAX,%RBX

0x4a5fdf CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x4a5fe4 JMP	4a5ead

0x4a5fe9 MOV	$0x10,%EDI

0x4a5fee CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a5ff3 MOV	$0x5bf0c8,%ESI

0x4a5ff8 MOV	%RAX,%RDI

0x4a5ffb MOV	%RAX,%RBX

0x4a5ffe CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x4a6003 JMP	4a5ead

0x4a6008 JMP	4a5edb

0x4a600d JMP	4a5edb

0x4a6012 MOV	$0x10,%EDI

0x4a6017 VZEROUPPER

0x4a601a CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a601f MOV	$0x5bf0c8,%ESI

0x4a6024 MOV	%RAX,%RDI

0x4a6027 MOV	%RAX,%RBX

0x4a602a CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x4a602f JMP	4a5ead

0x4a6034 MOV	$0x10,%EDI

0x4a6039 VZEROUPPER

0x4a603c CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a6041 MOV	$0x5bf0c8,%ESI

0x4a6046 MOV	%RAX,%RDI

0x4a6049 MOV	%RAX,%RBX

0x4a604c CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x4a6051 JMP	4a5ead

0x4a6056 JMP	4a5edb

0x4a605b JMP	4a5edb

0x4a6060 MOV	$0x10,%EDI

0x4a6065 VZEROUPPER

0x4a6068 CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a606d MOV	$0x5bf0c8,%ESI

0x4a6072 MOV	%RAX,%RDI

0x4a6075 MOV	%RAX,%RBX

0x4a6078 CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x4a607d JMP	4a5ead

0x4a6082 MOV	$0x10,%EDI

0x4a6087 CALL	4044c0 <__cxa_allocate_exception@plt>

0x4a608c MOV	$0x5bf0c8,%ESI

0x4a6091 MOV	%RAX,%RDI

0x4a6094 MOV	%RAX,%RBX

0x4a6097 CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x4a609c JMP	4a5ead

0x4a60a1 JMP	4a5edb

0x4a60a6 JMP	4a5edb

0x4a60ab NOPL	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►49.38+	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:48	exec
○	qmcplusplus::build_WaveFunctio[...]	unique_ptr.h:397	exec
○	main._omp_fn.0	NonLocalPP.hpp:88	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►47.48+	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:48	exec
○	qmcplusplus::build_WaveFunctio[...]	unique_ptr.h:397	exec
○	main._omp_fn.0	NonLocalPP.hpp:88	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►1.64+	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:48	exec
○	qmcplusplus::build_WaveFunctio[...]	unique_ptr.h:397	exec
○	main._omp_fn.0	NonLocalPP.hpp:88	exec
○	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	main	refwrap.h:350	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	miniqmc.cpp:321	exec
►1.49+	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:48	exec
○	qmcplusplus::build_WaveFunctio[...]	unique_ptr.h:397	exec
○	main._omp_fn.0	NonLocalPP.hpp:88	exec
○	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	main	refwrap.h:350	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	miniqmc.cpp:321	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_3

Source file and lines	DiracDeterminantRef.cpp:61-79
Module	exec

The function is defined in:

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/alloc_traits.h:513
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_construct.h:119
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:101-103
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_uninitialized.h:667,1117,1129
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h:993,1015-1018,1908-1911,1945-1949
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:181-188,195-197,296-301
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/new_allocator.h:134-140,151,172
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:262,939-940,951-952,1146-1151
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:61-67,73-79
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/vector.tcc:812-820,851,863,903-910
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DelayedUpdate.h:60-62

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 30.00 to 5.63 cycles (5.33x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 14% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 30.00 to 2.29 cycles (13.09x speedup).

Details

31% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

50% of SSE/AVX loads are used in vector version.
57% of SSE/AVX stores are used in vector version.
0% of SSE/AVX multiply instructions are used in vector version.
22% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__cxa_allocate_exception@plt: 13 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
memset@plt: 2 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
operator new(unsigned long): 1 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/new_allocator.h:151
std::__throw_length_error(char const*): 1 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h:1909
std::runtime_error::runtime_error(char const*): 13 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVLE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:65
VPBROADCASTQ: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:67
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:101
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:301
VPINSRD: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:67
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DelayedUpdate.h:62

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 52 bytes. The binary function is storing 172 bytes.

General properties

nb instructions	261
nb uops	240
loop length	1290
used x86 registers	12
used mmx registers	0
used xmm registers	13
used ymm registers	0
used zmm registers	0
nb stack references	8

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	30.00 cycles
front end	30.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	15.67	15.67	15.67	22.00	22.00	22.00	12.50	12.50	12.50	12.50	2.00	3.00	3.00	2.00	5.00	5.00
cycles	15.67	15.67	15.67	22.00	22.00	22.00	12.50	12.50	12.50	12.50	2.00	3.00	3.00	2.00	5.00	5.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	30.00
Dispatch	22.00
Overall L1	30.00

Vectorization ratios

all	31%
load	50%
store	57%
mul	0%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	22%

Vector efficiency ratios

all	14%
load	15%
store	19%
mul	12%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 30.00 cycles. At this rate:

0% of peak load performance is reached (1.73 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.73 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 30.00 to 22.00 cycles (1.36x speedup).

ASM code

In the binary file, the address of the function is: 4a4560

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
VMOVD %ESI,%XMM2	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5	1	scal (6.3%)
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x88,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVD 0x488(%RDI),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
TEST %EDX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV 0x268(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMOVLE %ESI,%EDX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %ESI,0x6c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x270(%RDI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD %EDX,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
VMOVD %R12D,%XMM5	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5	1	scal (6.3%)
VPINSRD $0x1,%R12D,%XMM2,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VPBROADCASTQ %R12,%XMM8	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VPMOVSXDQ %XMM0,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	2	0.50	vect (12.5%)
VMOVDQA %XMM8,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVDQA %XMM4,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVQ %XMM4,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VPINSRD $0x1,%R12D,%XMM3,%XMM7	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VPUNPCKLDQ %XMM3,%XMM5,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (12.5%)
VPMOVSXDQ %XMM7,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	2	0.50	vect (12.5%)
VPMOVSXDQ %XMM1,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	2	0.50	vect (12.5%)
VMOVQ %XMM11,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VPUNPCKLQDQ %XMM11,%XMM11,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVDQA %XMM6,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
IMUL %R14,%RBX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
VMOVDQA %XMM9,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVDQU %XMM11,0x248(%RDI)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VPBROADCASTQ %RBX,%XMM10	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
MOV %RBX,0x258(%RDI)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVDQA %XMM10,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
CMP %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JB 4a5fca <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x1a6a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDI,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CMP %RBX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JB 4a5120 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0xbc0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP %RBX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JB 4a4ca0 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x740>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RBX,0x268(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %R12,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 4a4c7d <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x71d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x1f8(%R15),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R9,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA (%RSI,%R9,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
JE 4a4c7d <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x71d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 404140 <memset@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %R12,0x1e8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $0x88,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x278(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RDX,%RAX,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JE 4a462f <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0xcf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
VMOVDQA %XMM11,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
CALL 404140 <memset@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
VMOVDQA 0x10(%RSP),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
JMP 4a462f <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0xcf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
TEST %RSI,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 4a5d20 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x17c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
LEA (,%R12,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R13,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 404410 <_Znwm@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
VPBROADCASTQ %R12,%XMM12	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
MOV %R13,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
VMOVDQU %XMM12,0x1e8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RAX,0x1f8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $0x88,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 404140 <memset@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV $0x5bef73,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404220 <_ZSt20__throw_length_errorPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_3

Source file and lines	DiracDeterminantRef.cpp:61-79
Module	exec

The function is defined in:

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/alloc_traits.h:513
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_construct.h:119
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:101-103
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_uninitialized.h:667,1117,1129
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h:993,1015-1018,1908-1911,1945-1949
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:181-188,195-197,296-301
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/new_allocator.h:134-140,151,172
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:262,939-940,951-952,1146-1151
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:61-67,73-79
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/vector.tcc:812-820,851,863,903-910
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DelayedUpdate.h:60-62

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 30.00 to 5.63 cycles (5.33x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

31% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

50% of SSE/AVX loads are used in vector version.
57% of SSE/AVX stores are used in vector version.
0% of SSE/AVX multiply instructions are used in vector version.
22% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__cxa_allocate_exception@plt: 13 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
memset@plt: 2 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
operator new(unsigned long): 1 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/new_allocator.h:151
std::__throw_length_error(char const*): 1 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h:1909
std::runtime_error::runtime_error(char const*): 13 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:186

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVLE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:65
VPBROADCASTQ: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:67
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:101
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:301
VPINSRD: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:67
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DelayedUpdate.h:62

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 52 bytes. The binary function is storing 172 bytes.

General properties

nb instructions	261
nb uops	240
loop length	1290
used x86 registers	12
used mmx registers	0
used xmm registers	13
used ymm registers	0
used zmm registers	0
nb stack references	8

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	30.00 cycles
front end	30.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	15.67	15.67	15.67	22.00	22.00	22.00	12.50	12.50	12.50	12.50	2.00	3.00	3.00	2.00	5.00	5.00
cycles	15.67	15.67	15.67	22.00	22.00	22.00	12.50	12.50	12.50	12.50	2.00	3.00	3.00	2.00	5.00	5.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	30.00
Dispatch	22.00
Overall L1	30.00

Vectorization ratios

all	31%
load	50%
store	57%
mul	0%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	22%

Vector efficiency ratios

all	14%
load	15%
store	19%
mul	12%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 30.00 cycles. At this rate:

0% of peak load performance is reached (1.73 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.73 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4a4560

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
VMOVD %ESI,%XMM2	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5	1	scal (6.3%)
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x88,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVD 0x488(%RDI),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
TEST %EDX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV 0x268(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMOVLE %ESI,%EDX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %ESI,0x6c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x270(%RDI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD %EDX,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
VMOVD %R12D,%XMM5	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5	1	scal (6.3%)
VPINSRD $0x1,%R12D,%XMM2,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VPBROADCASTQ %R12,%XMM8	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VPMOVSXDQ %XMM0,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	2	0.50	vect (12.5%)
VMOVDQA %XMM8,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVDQA %XMM4,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVQ %XMM4,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VPINSRD $0x1,%R12D,%XMM3,%XMM7	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VPUNPCKLDQ %XMM3,%XMM5,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (12.5%)
VPMOVSXDQ %XMM7,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	2	0.50	vect (12.5%)
VPMOVSXDQ %XMM1,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	2	0.50	vect (12.5%)
VMOVQ %XMM11,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VPUNPCKLQDQ %XMM11,%XMM11,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVDQA %XMM6,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
IMUL %R14,%RBX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
VMOVDQA %XMM9,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVDQU %XMM11,0x248(%RDI)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VPBROADCASTQ %RBX,%XMM10	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
MOV %RBX,0x258(%RDI)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVDQA %XMM10,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
CMP %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JB 4a5fca <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x1a6a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDI,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CMP %RBX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JB 4a5120 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0xbc0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP %RBX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JB 4a4ca0 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x740>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RBX,0x268(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %R12,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 4a4c7d <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x71d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x1f8(%R15),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R9,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA (%RSI,%R9,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
JE 4a4c7d <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x71d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 404140 <memset@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %R12,0x1e8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $0x88,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x278(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RDX,%RAX,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JE 4a462f <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0xcf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
VMOVDQA %XMM11,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
CALL 404140 <memset@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
VMOVDQA 0x10(%RSP),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
JMP 4a462f <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0xcf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
TEST %RSI,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 4a5d20 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x17c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
LEA (,%R12,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R13,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 404410 <_Znwm@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
VPBROADCASTQ %R12,%XMM12	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
MOV %R13,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
VMOVDQU %XMM12,0x1e8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RAX,0x1f8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $0x88,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 404140 <memset@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV $0x5bef73,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404220 <_ZSt20__throw_length_errorPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4044c0 <__cxa_allocate_exception@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV $0x5bf0c8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 4a5ead <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x194d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a5edb <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE6resizeEii+0x197b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::DiracDeterminantRef >::resize(int, int)–	0.03	0.05
○Loop 1158 - OhmmsVector.h:186-186 - exec	0.00	0.00
○Loop 1159 - OhmmsVector.h:186-186 - exec	0.00	0.00
▼Loop 1161 - stl_algobase.h:262-1151 - exec–	0.00	0.00
○Loop 1164 - stl_algobase.h:939-940 - exec	0.03	0.05
○Loop 1162 - stl_algobase.h:939-940 - exec	0.00	0.00
○Loop 1160 - new_allocator.h:138-139 - exec	0.00	0.00
○Loop 1163 - stl_algobase.h:939-940 - exec	0.00	0.00
○Loop 1165 - stl_algobase.h:939-940 - exec	0.00	0.00

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Execution units bottlenecks

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code