OV - exec - Function miniqmcreference::einspline_spo_ref<double>::evaluate(qmcplusplus::ParticleSet const&, int, qmcplusplus::Vector<double, std::allocator<double> >&)

	Function: miniqmcreference::einspline_spo_ref<double>::evaluate(qmcplusplus::ParticleSet const&, int ...	Module: exec	Source: einspline_spo_ref.hpp:172-189 [...]	Coverage (incl. loops): 25.79% \| (excl. loops): 0.01%

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 143 - 143

--------------------------------------------------------------------------------

143:     return (active_ptcl_ == iat) ? active_pos_ : R[iat];

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp: 172 - 189

--------------------------------------------------------------------------------

172:     ScopedTimer local_timer(timer);

173:

174:     auto u = Lattice.toUnit_floor(P.activeR(iat));

175:     for (int i = 0; i < nBlocks; ++i)

176:       MultiBsplineEvalRef::evaluate_v(einsplines[i], u[0], u[1], u[2], psi[i].data(), nSplinesPerBlock);

177:   }

178:

179:   inline void evaluate(const ParticleSet& P, int iat, ValueVector_t& psi_v)

180:   {

181:     evaluate_v(P, iat);

182:

183:     for (int i = 0; i < nBlocks; ++i)

184:     {

185:       // in real simulation, phase needs to be applied. Here just fake computation

186:       const int first = i * nBlocks;

187:       std::copy_n(psi[i].data(), std::min((i + 1) * nSplinesPerBlock, OrbitalSetSize) - first, psi_v.data() + first);

188:     }

189:   }

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h: 170 - 173

--------------------------------------------------------------------------------

170:       if (-std::numeric_limits<T1>::epsilon() < val_dot[i] && val_dot[i] < 0)

171:         val_dot[i] = T1(0.0);

172:       else

173:         val_dot[i] -= std::floor(val_dot[i]);

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp: 42 - 71

--------------------------------------------------------------------------------

42:   x -= spline_m->x_grid.start;

43:   y -= spline_m->y_grid.start;

44:   z -= spline_m->z_grid.start;

45:   T tx, ty, tz;

46:   int ix, iy, iz;

47:   spline2::getSplineBound(x * spline_m->x_grid.delta_inv, tx, ix, spline_m->x_grid.num - 1);

48:   spline2::getSplineBound(y * spline_m->y_grid.delta_inv, ty, iy, spline_m->y_grid.num - 1);

49:   spline2::getSplineBound(z * spline_m->z_grid.delta_inv, tz, iz, spline_m->z_grid.num - 1);

[...]

56:   const intptr_t xs = spline_m->x_stride;

57:   const intptr_t ys = spline_m->y_stride;

58:   const intptr_t zs = spline_m->z_stride;

59:

60:   constexpr T zero(0);

61:   std::fill(vals, vals + num_splines, zero);

62:

63:   for (size_t i = 0; i < 4; i++)

64:     for (size_t j = 0; j < 4; j++)

65:     {

66:       const T pre00           = a[i] * b[j];

67:       const T* restrict coefs = spline_m->coefs + (ix + i) * xs + (iy + j) * ys + iz * zs;

68:       for (size_t n = 0; n < num_splines; n++)

69:         vals[n] += pre00 *

70:             (c[0] * coefs[n] + c[1] * coefs[n + zs] + c[2] * coefs[n + 2 * zs] +

71:              c[3] * coefs[n + 3 * zs]);

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249

--------------------------------------------------------------------------------

242:   ScopeGuard(TIMER& t) : timer(t) { timer.start(); }

[...]

249:   ~ScopeGuard() { timer.stop(); }

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h: 1263 - 1263

--------------------------------------------------------------------------------

1263:       { return _M_data_ptr(this->_M_impl._M_start); }

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp: 53 - 63

--------------------------------------------------------------------------------

53:   if (x < 0)

[...]

60:     ind = static_cast<int>(x);

61:     dx = x - ind;

62:     // upper bound

63:     if (ind > nmax)

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 229 - 229

--------------------------------------------------------------------------------

229:     return X[i];

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp: 54 - 57

--------------------------------------------------------------------------------

54:     a[0] = ((A00 * tx + A01) * tx + A02) * tx + A03;

55:     a[1] = ((A10 * tx + A11) * tx + A12) * tx + A13;

56:     a[2] = ((A20 * tx + A21) * tx + A22) * tx + A23;

57:     a[3] = ((A30 * tx + A31) * tx + A32) * tx + A33;

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h: 238 - 952

--------------------------------------------------------------------------------

238:       if (__b < __a)

[...]

413: 	{ *__to = *__from; }

[...]

451: 	  if (__builtin_expect(_Num > 1, true))

452: 	    __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);

[...]

951:       for (; __first != __last; ++__first)

952: 	*__first = __tmp;

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algo.h: 683 - 709

--------------------------------------------------------------------------------

683:     { return std::copy(__first, __first + __n, __result); }

[...]

709:       if (__n2 <= 0)

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h: 150 - 152

--------------------------------------------------------------------------------

150:     return TinyVector<Type_t, 3>(lhs[0] * rhs[0] + lhs[1] * rhs[3] + lhs[2] * rhs[6],

151:                                  lhs[0] * rhs[1] + lhs[1] * rhs[4] + lhs[2] * rhs[7],

152:                                  lhs[0] * rhs[2] + lhs[1] * rhs[5] + lhs[2] * rhs[8]);

0x47d240 PUSH	%RBP

0x47d241 MOV	%RSP,%RBP

0x47d244 PUSH	%R15

0x47d246 PUSH	%R14

0x47d248 PUSH	%R13

0x47d24a PUSH	%R12

0x47d24c PUSH	%RBX

0x47d24d MOV	%RSI,%R14

0x47d250 MOV	%RDI,%RBX

0x47d253 AND	$-0x20,%RSP

0x47d257 MOV	%RCX,%R13

0x47d25a MOVSXD	%EDX,%R15

0x47d25d SUB	$0x120,%RSP

0x47d264 MOV	0x358(%RDI),%R12

0x47d26b MOV	%R12,%RDI

0x47d26e CALL	531880 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>

0x47d273 LEA	0x128(%R14),%RCX

0x47d27a CMP	0x124(%R14),%R15D

0x47d281 JE	47d28f

0x47d283 MOV	0x40(%R14),%RAX

0x47d287 LEA	(%R15,%R15,2),%RDX

0x47d28b LEA	(%RAX,%RDX,8),%RCX

0x47d28f VMOVUPD	(%RCX),%XMM0

0x47d293 VMOVSD	0x10(%RCX),%XMM2

0x47d298 VMOVDDUP	0x143420(%RIP),%XMM9

0x47d2a0 VMOVDDUP	%XMM2,%XMM1

0x47d2a4 VXORPD	%XMM10,%XMM10,%XMM10

0x47d2a9 VMULSD	0x118(%RBX),%XMM2,%XMM5

0x47d2b1 VMOVSD	(%RCX),%XMM6

0x47d2b5 VXORPD	%XMM13,%XMM13,%XMM13

0x47d2ba VFMADD231SD	0xe8(%RBX),%XMM6,%XMM5

0x47d2c3 VPERMILPD	$0x3,%XMM0,%XMM4

0x47d2c9 VMULPD	0xf0(%RBX),%XMM4,%XMM8

0x47d2d1 VPERMILPD	$0,%XMM0,%XMM3

0x47d2d7 VUNPCKHPD	%XMM0,%XMM0,%XMM7

0x47d2db VFMADD231PD	0xd8(%RBX),%XMM3,%XMM8

0x47d2e4 VFMADD132PD	0x108(%RBX),%XMM8,%XMM1

0x47d2ed VCMPPD	$0xe,%XMM9,%XMM1,%K1

0x47d2f4 VFMADD132SD	0x100(%RBX),%XMM5,%XMM7

0x47d2fd VRNDSCALEPD	$0x9,%XMM1,%XMM11

0x47d304 VCMPPD	$0x1,%XMM10,%XMM1,%K0{%K1}

0x47d30b KNOTB	%K0,%K2

0x47d30f KMOVB	%K2,%ESI

0x47d313 AND	$0x3,%ESI

0x47d316 VCOMISD	%XMM7,%XMM13

0x47d31a KMOVB	%ESI,%K3

0x47d31e VSUBPD	%XMM11,%XMM1,%XMM12{%K3}{z}

0x47d324 JBE	47d334

0x47d326 VCOMISD	0x143392(%RIP),%XMM7

0x47d32e JA	47dc87

0x47d334 VRNDSCALESD	$0x9,%XMM7,%XMM7,%XMM14

0x47d33b VSUBSD	%XMM14,%XMM7,%XMM15

0x47d340 MOVSXD	0x30(%RBX),%R8

0x47d344 TEST	%R8D,%R8D

0x47d347 JLE	47db51

0x47d34d MOVSXD	0x40(%RBX),%RDI

0x47d351 MOV	0x2f8(%RBX),%R11

0x47d358 MOV	0x310(%RBX),%R10

0x47d35f VMOVHPD	%XMM12,0x38(%RSP)

0x47d365 VMOVLPD	%XMM12,0x40(%RSP)

0x47d36b MOV	%R12,0x28(%RSP)

0x47d370 VMOVSD	%XMM15,0x30(%RSP)

0x47d376 MOV	%RBX,0x20(%RSP)

0x47d37b MOV	%R13,0x18(%RSP)

0x47d380 LEA	(,%RDI,8),%R9

0x47d388 LEA	(%R11,%R8,8),%R14

0x47d38c LEA	-0x1(%RDI),%R15

0x47d390 MOV	%EDI,0x6c(%RSP)

0x47d394 MOV	%RDI,0xb8(%RSP)

0x47d39c MOV	%R9,0x58(%RSP)

0x47d3a1 MOV	%R10,0x50(%RSP)

0x47d3a6 MOV	%R14,0x48(%RSP)

0x47d3ab MOV	%R15,0x88(%RSP)

0x47d3b3 MOV	%R11,0x60(%RSP)

(932) 0x47d3b8 MOV	0x60(%RSP),%R12

(932) 0x47d3bd MOV	0x50(%RSP),%RBX

(932) 0x47d3c2 VMOVSD	0x38(%RSP),%XMM0

(932) 0x47d3c8 VMOVSD	0x30(%RSP),%XMM3

(932) 0x47d3ce VMOVSD	0x40(%RSP),%XMM4

(932) 0x47d3d4 VXORPD	%XMM6,%XMM6,%XMM6

(932) 0x47d3d8 MOV	(%R12),%RCX

(932) 0x47d3dc MOV	(%RBX),%R15

(932) 0x47d3df VSUBSD	0x28(%RCX),%XMM4,%XMM2

(932) 0x47d3e4 VSUBSD	0x50(%RCX),%XMM0,%XMM1

(932) 0x47d3e9 VMULSD	0x48(%RCX),%XMM2,%XMM5

(932) 0x47d3ee VSUBSD	0x78(%RCX),%XMM3,%XMM7

(932) 0x47d3f3 VCOMISD	%XMM5,%XMM6

(932) 0x47d3f7 JA	47dc10

(932) 0x47d3fd MOV	0x38(%RCX),%EAX

(932) 0x47d400 VCVTTSD2SI	%XMM5,%R13D

(932) 0x47d404 DEC	%EAX

(932) 0x47d406 CMP	%R13D,%EAX

(932) 0x47d409 JL	47dc39

(932) 0x47d40f VRNDSCALESD	$0xb,%XMM5,%XMM5,%XMM8

(932) 0x47d416 VSUBSD	%XMM8,%XMM5,%XMM11

(932) 0x47d41b VMOVAPD	%XMM11,%XMM0

(932) 0x47d41f VMOVSD	0x1431c9(%RIP),%XMM13

(932) 0x47d427 VFNMADD132SD	%XMM13,%XMM13,%XMM0

(932) 0x47d42c VMULSD	0x143294(%RIP),%XMM11,%XMM12

(932) 0x47d434 VMOVAPD	%XMM11,%XMM15

(932) 0x47d439 VADDSD	%XMM13,%XMM12,%XMM14

(932) 0x47d43e VFMADD213SD	0x143289(%RIP),%XMM13,%XMM15

(932) 0x47d447 VXORPD	0x141a41(%RIP),%XMM12,%XMM3

(932) 0x47d44f VMULSD	%XMM11,%XMM11,%XMM9

(932) 0x47d454 VFMADD213SD	0x143183(%RIP),%XMM11,%XMM14

(932) 0x47d45d VMOVSD	0x14311b(%RIP),%XMM10

(932) 0x47d465 VFMADD132SD	%XMM11,%XMM10,%XMM14

(932) 0x47d46a VFMADD213SD	0x14313d(%RIP),%XMM9,%XMM15

(932) 0x47d473 MOVSXD	%R13D,%RDX

(932) 0x47d476 MOV	%RDX,0xd8(%RSP)

(932) 0x47d47e VFMADD231SD	%XMM0,%XMM11,%XMM13

(932) 0x47d483 VUNPCKLPD	%XMM15,%XMM14,%XMM5

(932) 0x47d488 VMULSD	%XMM9,%XMM3,%XMM4

(932) 0x47d48d VFMADD132SD	%XMM13,%XMM10,%XMM11

(932) 0x47d492 VUNPCKLPD	%XMM4,%XMM11,%XMM2

(932) 0x47d496 VINSERTF64X2	$0x1,%XMM2,%YMM5,%YMM11

(932) 0x47d49d VMULSD	0x70(%RCX),%XMM1,%XMM1

(932) 0x47d4a2 VXORPD	%XMM6,%XMM6,%XMM6

(932) 0x47d4a6 VCOMISD	%XMM1,%XMM6

(932) 0x47d4aa JA	47dc00

(932) 0x47d4b0 MOV	0x60(%RCX),%ESI

(932) 0x47d4b3 VCVTTSD2SI	%XMM1,%EDI

(932) 0x47d4b7 LEA	-0x1(%RSI),%R8D

(932) 0x47d4bb CMP	%EDI,%R8D

(932) 0x47d4be JL	47dc29

(932) 0x47d4c4 VRNDSCALESD	$0xb,%XMM1,%XMM1,%XMM8

(932) 0x47d4cb VSUBSD	%XMM8,%XMM1,%XMM12

(932) 0x47d4d0 VMOVAPD	%XMM12,%XMM9

(932) 0x47d4d5 VMOVSD	0x143113(%RIP),%XMM15

(932) 0x47d4dd VFNMADD132SD	%XMM15,%XMM15,%XMM9

(932) 0x47d4e2 VMOVSD	0x143096(%RIP),%XMM14

(932) 0x47d4ea VMOVAPD	%XMM12,%XMM3

(932) 0x47d4ee VMULSD	%XMM14,%XMM12,%XMM10

(932) 0x47d4f3 VFMADD213SD	0x1431d4(%RIP),%XMM15,%XMM3

(932) 0x47d4fc VSUBSD	%XMM10,%XMM15,%XMM0

(932) 0x47d501 VMULSD	%XMM12,%XMM12,%XMM13

(932) 0x47d506 VFMADD213SD	0x1430d1(%RIP),%XMM12,%XMM0

(932) 0x47d50f VFMADD132SD	%XMM12,%XMM14,%XMM0

(932) 0x47d514 VFMADD213SD	0x143093(%RIP),%XMM13,%XMM3

(932) 0x47d51d VMULSD	%XMM13,%XMM10,%XMM4

(932) 0x47d522 MOVSXD	%EDI,%R14

(932) 0x47d525 VFMADD231SD	%XMM9,%XMM12,%XMM15

(932) 0x47d52a VUNPCKLPD	%XMM3,%XMM0,%XMM5

(932) 0x47d52e VFMADD132SD	%XMM15,%XMM14,%XMM12

(932) 0x47d533 VUNPCKLPD	%XMM4,%XMM12,%XMM2

(932) 0x47d537 VINSERTF64X2	$0x1,%XMM2,%YMM5,%YMM1

(932) 0x47d53e VMULSD	0x98(%RCX),%XMM7,%XMM7

(932) 0x47d546 VXORPD	%XMM6,%XMM6,%XMM6

(932) 0x47d54a VCOMISD	%XMM7,%XMM6

(932) 0x47d54e JA	47dbda

(932) 0x47d554 MOV	0x88(%RCX),%R9D

(932) 0x47d55b VCVTTSD2SI	%XMM7,%R11D

(932) 0x47d55f LEA	-0x1(%R9),%R10D

(932) 0x47d563 CMP	%R11D,%R10D

(932) 0x47d566 JL	47dc50

(932) 0x47d56c VRNDSCALESD	$0xb,%XMM7,%XMM7,%XMM8

(932) 0x47d573 VSUBSD	%XMM8,%XMM7,%XMM15

(932) 0x47d578 VMOVAPD	%XMM15,%XMM0

(932) 0x47d57c VMOVSD	0x14306c(%RIP),%XMM13

(932) 0x47d584 VFNMADD132SD	%XMM13,%XMM13,%XMM0

(932) 0x47d589 VMULSD	0x143137(%RIP),%XMM15,%XMM12

(932) 0x47d591 VMOVAPD	%XMM15,%XMM18

(932) 0x47d597 VADDSD	%XMM13,%XMM12,%XMM17

(932) 0x47d59d VFMADD213SD	0x143129(%RIP),%XMM13,%XMM18

(932) 0x47d5a7 VXORPD	0x1418e1(%RIP),%XMM12,%XMM3

(932) 0x47d5af VMULSD	%XMM15,%XMM15,%XMM10

(932) 0x47d5b4 VFMADD213SD	0x143022(%RIP),%XMM15,%XMM17

(932) 0x47d5be VMOVSD	0x142fba(%RIP),%XMM14

(932) 0x47d5c6 VFMADD132SD	%XMM15,%XMM14,%XMM17

(932) 0x47d5cc MOVSXD	%R11D,%R12

(932) 0x47d5cf VFMADD213SD	0x142fd7(%RIP),%XMM10,%XMM18

(932) 0x47d5d9 VFMADD231SD	%XMM0,%XMM15,%XMM13

(932) 0x47d5de VMULSD	%XMM10,%XMM3,%XMM16

(932) 0x47d5e4 VFMADD132SD	%XMM13,%XMM14,%XMM15

(932) 0x47d5e9 CMPQ	$0,0x58(%RSP)

(932) 0x47d5ef MOV	0x10(%RCX),%R13

(932) 0x47d5f3 MOV	0x18(%RCX),%R8

(932) 0x47d5f7 MOV	0x20(%RCX),%RBX

(932) 0x47d5fb VMOVAPD	%YMM11,0xe0(%RSP)

(932) 0x47d604 VMOVAPD	%YMM1,0x100(%RSP)

(932) 0x47d60d JE	47d683

(932) 0x47d60f MOV	0x58(%RSP),%RDX

(932) 0x47d614 XOR	%ESI,%ESI

(932) 0x47d616 MOV	%R15,%RDI

(932) 0x47d619 VMOVSD	%XMM16,0xa0(%RSP)

(932) 0x47d621 VMOVSD	%XMM15,0xa8(%RSP)

(932) 0x47d62a VMOVSD	%XMM18,0xb0(%RSP)

(932) 0x47d632 VMOVSD	%XMM17,0xc0(%RSP)

(932) 0x47d63a MOV	%R8,0xc8(%RSP)

(932) 0x47d642 MOV	%RCX,0xd0(%RSP)

(932) 0x47d64a VZEROUPPER

(932) 0x47d64d CALL	404140 <memset@plt>

(932) 0x47d652 MOV	0xd0(%RSP),%RCX

(932) 0x47d65a MOV	0xc8(%RSP),%R8

(932) 0x47d662 VMOVSD	0xc0(%RSP),%XMM17

(932) 0x47d66a VMOVSD	0xb0(%RSP),%XMM18

(932) 0x47d672 VMOVSD	0xa8(%RSP),%XMM15

(932) 0x47d67b VMOVSD	0xa0(%RSP),%XMM16

(932) 0x47d683 MOV	0xb8(%RSP),%RDI

(932) 0x47d68b MOV	0x8(%RCX),%R10

(932) 0x47d68f IMUL	%RBX,%R12

(932) 0x47d693 TEST	%RDI,%RDI

(932) 0x47d696 JE	47db23

(932) 0x47d69c MOV	0xd8(%RSP),%RAX

(932) 0x47d6a4 MOV	%R14,%RDX

(932) 0x47d6a7 INC	%R14

(932) 0x47d6aa LEA	(,%RBX,8),%RCX

(932) 0x47d6b2 IMUL	%R8,%RDX

(932) 0x47d6b6 LEA	(%R8,%R8,1),%R11

(932) 0x47d6ba VMOVQ	%RBX,%XMM11

(932) 0x47d6bf LEA	0xe0(%RSP),%RSI

(932) 0x47d6c7 IMUL	%R8,%R14

(932) 0x47d6cb VBROADCASTSD	%XMM17,%YMM6

(932) 0x47d6d1 VBROADCASTSD	%XMM18,%YMM5

(932) 0x47d6d7 VBROADCASTSD	%XMM15,%YMM4

(932) 0x47d6dc SHR	$0x2,%RDI

(932) 0x47d6e0 MOV	%R11,0x90(%RSP)

(932) 0x47d6e8 VMOVQ	%R13,%XMM2

(932) 0x47d6ed VMOVQ	%R10,%XMM10

(932) 0x47d6f2 IMUL	%R13,%RAX

(932) 0x47d6f6 MOV	%R15,%RBX

(932) 0x47d6f9 VMOVQ	%RCX,%XMM24

(932) 0x47d6ff SAL	$0x5,%RDI

(932) 0x47d703 ADD	%RAX,%R14

(932) 0x47d706 ADD	%RAX,%RDX

(932) 0x47d709 MOV	%RDI,0xc0(%RSP)

(932) 0x47d711 LEA	(%RDX,%R12,1),%R9

(932) 0x47d715 ADD	%R14,%R12

(932) 0x47d718 MOV	%R8,%R14

(932) 0x47d71b SAL	$0x4,%R14

(932) 0x47d71f MOV	%R12,%R8

(932) 0x47d722 MOV	%R9,%RDI

(932) 0x47d725 MOV	%R14,0x98(%RSP)

  (934) 0x47d72d MOV	0x6c(%RSP),%R12D

  (934) 0x47d732 VMOVQ	%XMM10,%R11

  (934) 0x47d737 LEA	0x100(%RSP),%R15

  (934) 0x47d73f MOV	%RDI,0xd0(%RSP)

  (934) 0x47d747 LEA	(%R11,%RDI,8),%RDX

  (934) 0x47d74b MOV	%RDI,0x78(%RSP)

  (934) 0x47d750 LEA	(%R11,%R8,8),%RAX

  (934) 0x47d754 VBROADCASTSD	%XMM16,%YMM13

  (934) 0x47d75a VMOVQ	%XMM11,%R9

  (934) 0x47d75f VMOVQ	%XMM24,%RDI

  (934) 0x47d765 VMOVSD	(%RSI),%XMM12

  (934) 0x47d769 MOV	%R8,0xc8(%RSP)

  (934) 0x47d771 VMOVDDUP	%XMM17,%XMM21

  (934) 0x47d777 VMOVDDUP	%XMM18,%XMM20

  (934) 0x47d77d VMOVDDUP	%XMM15,%XMM19

  (934) 0x47d783 MOV	%RSI,0x80(%RSP)

  (934) 0x47d78b MOV	%R8,0x70(%RSP)

  (934) 0x47d790 MOV	%R15,0xd8(%RSP)

  (934) 0x47d798 AND	$0x3,%R12D

  (934) 0x47d79c MOV	%R12D,0xa0(%RSP)

    (933) 0x47d7a4 MOV	0xd8(%RSP),%R8

    (933) 0x47d7ac CMPQ	$0x2,0x88(%RSP)

    (933) 0x47d7b5 VMULSD	(%R8),%XMM12,%XMM14

    (933) 0x47d7ba JBE	47dbd3

    (933) 0x47d7c0 VMULSD	0x8(%R8),%XMM12,%XMM1

    (933) 0x47d7c6 MOV	0xc0(%RSP),%R8

    (933) 0x47d7ce LEA	(%RDI,%RDX,1),%R14

    (933) 0x47d7d2 LEA	(%RDI,%RAX,1),%R10

    (933) 0x47d7d6 LEA	(%R14,%RDI,1),%R13

    (933) 0x47d7da LEA	(%RDI,%R10,1),%RSI

    (933) 0x47d7de VBROADCASTSD	%XMM14,%YMM9

    (933) 0x47d7e3 VBROADCASTSD	%XMM1,%YMM7

    (933) 0x47d7e8 LEA	(%RDI,%R13,1),%R15

    (933) 0x47d7ec LEA	(%RSI,%RDI,1),%R12

    (933) 0x47d7f0 XOR	%ECX,%ECX

    (933) 0x47d7f2 TEST	$0x20,%R8B

    (933) 0x47d7f6 JE	47d850

    (933) 0x47d7f8 VMULPD	(%R10),%YMM5,%YMM0

    (933) 0x47d7fd VMULPD	(%R12),%YMM13,%YMM23

    (933) 0x47d804 MOV	$0x20,%ECX

    (933) 0x47d809 VFMADD231PD	(%RAX),%YMM6,%YMM0

    (933) 0x47d80e VFMADD231PD	(%RSI),%YMM4,%YMM23

    (933) 0x47d814 VADDPD	%YMM23,%YMM0,%YMM3

    (933) 0x47d81a VMULPD	(%R14),%YMM5,%YMM22

    (933) 0x47d820 VMULPD	(%R15),%YMM13,%YMM8

    (933) 0x47d825 VFMADD231PD	(%RDX),%YMM6,%YMM22

    (933) 0x47d82b VFMADD231PD	(%R13),%YMM4,%YMM8

    (933) 0x47d831 VADDPD	%YMM8,%YMM22,%YMM25

    (933) 0x47d837 VFMADD213PD	(%RBX),%YMM9,%YMM25

    (933) 0x47d83d VFMADD132PD	%YMM7,%YMM25,%YMM3

    (933) 0x47d843 VMOVUPD	%YMM3,(%RBX)

    (933) 0x47d847 CMP	%R8,%RCX

    (933) 0x47d84a JE	47d90a

      (935) 0x47d850 VMULPD	(%R10,%RCX,1),%YMM5,%YMM8

      (935) 0x47d856 VMULPD	(%R12,%RCX,1),%YMM13,%YMM28

      (935) 0x47d85d VFMADD231PD	(%RAX,%RCX,1),%YMM6,%YMM8

      (935) 0x47d863 VFMADD231PD	(%RSI,%RCX,1),%YMM4,%YMM28

      (935) 0x47d86a VADDPD	%YMM28,%YMM8,%YMM0

      (935) 0x47d870 VMULPD	(%R14,%RCX,1),%YMM5,%YMM26

      (935) 0x47d877 VMULPD	(%R15,%RCX,1),%YMM13,%YMM1

      (935) 0x47d87d VFMADD231PD	(%RDX,%RCX,1),%YMM6,%YMM26

      (935) 0x47d884 VMULPD	0x20(%RCX,%R10,1),%YMM5,%YMM8

      (935) 0x47d88b VFMADD231PD	(%R13,%RCX,1),%YMM4,%YMM1

      (935) 0x47d892 VADDPD	%YMM1,%YMM26,%YMM27

      (935) 0x47d898 VFMADD213PD	(%RBX,%RCX,1),%YMM9,%YMM27

      (935) 0x47d89f VMULPD	0x20(%R12,%RCX,1),%YMM13,%YMM30

      (935) 0x47d8a7 VFMADD132PD	%YMM7,%YMM27,%YMM0

      (935) 0x47d8ad VFMADD231PD	0x20(%RCX,%RAX,1),%YMM6,%YMM8

      (935) 0x47d8b4 VFMADD231PD	0x20(%RSI,%RCX,1),%YMM4,%YMM30

      (935) 0x47d8bc VMULPD	0x20(%R14,%RCX,1),%YMM5,%YMM3

      (935) 0x47d8c3 VMULPD	0x20(%R15,%RCX,1),%YMM13,%YMM29

      (935) 0x47d8cb VFMADD231PD	0x20(%RCX,%RDX,1),%YMM6,%YMM3

      (935) 0x47d8d2 VFMADD231PD	0x20(%RCX,%R13,1),%YMM4,%YMM29

      (935) 0x47d8da VADDPD	%YMM29,%YMM3,%YMM1

      (935) 0x47d8e0 VFMADD213PD	0x20(%RBX,%RCX,1),%YMM9,%YMM1

      (935) 0x47d8e7 VMOVUPD	%YMM0,(%RBX,%RCX,1)

      (935) 0x47d8ec VADDPD	%YMM30,%YMM8,%YMM0

      (935) 0x47d8f2 VFMADD132PD	%YMM7,%YMM1,%YMM0

      (935) 0x47d8f7 VMOVUPD	%YMM0,0x20(%RBX,%RCX,1)

      (935) 0x47d8fd ADD	$0x40,%RCX

      (935) 0x47d901 CMP	%R8,%RCX

      (935) 0x47d904 JNE	47d850

    (933) 0x47d90a MOV	0xb8(%RSP),%RCX

    (933) 0x47d912 MOV	0xa0(%RSP),%R14D

    (933) 0x47d91a AND	$-0x4,%RCX

    (933) 0x47d91e TEST	%R14D,%R14D

    (933) 0x47d921 JE	47daa9

    (933) 0x47d927 MOV	0xb8(%RSP),%R13

    (933) 0x47d92f SUB	%RCX,%R13

    (933) 0x47d932 CMP	$0x1,%R13

    (933) 0x47d936 JE	47da34

    (933) 0x47d93c MOV	0xd0(%RSP),%R8

    (933) 0x47d944 MOV	0xc8(%RSP),%R15

    (933) 0x47d94c VMOVDDUP	%XMM16,%XMM3

    (933) 0x47d952 LEA	(%RBX,%RCX,8),%R12

    (933) 0x47d956 VMOVDDUP	%XMM14,%XMM1

    (933) 0x47d95b LEA	(%R8,%R9,1),%R14

    (933) 0x47d95f ADD	%RCX,%R8

    (933) 0x47d962 LEA	(%R9,%R14,1),%R10

    (933) 0x47d966 ADD	%RCX,%R14

    (933) 0x47d969 LEA	(%R10,%RCX,1),%RSI

    (933) 0x47d96d ADD	%R9,%R10

    (933) 0x47d970 VMULPD	(%R11,%R14,8),%XMM20,%XMM9

    (933) 0x47d977 ADD	%RCX,%R10

    (933) 0x47d97a VMOVQ	%RSI,%XMM31

    (933) 0x47d980 LEA	(%R9,%R15,1),%RSI

    (933) 0x47d984 VFMADD231PD	(%R11,%R8,8),%XMM21,%XMM9

    (933) 0x47d98b MOV	%R10,0xb0(%RSP)

    (933) 0x47d993 MOV	0xb0(%RSP),%R14

    (933) 0x47d99b LEA	(%R15,%RCX,1),%R10

    (933) 0x47d99f LEA	(%RCX,%RSI,1),%R15

    (933) 0x47d9a3 ADD	%R9,%RSI

    (933) 0x47d9a6 VMOVQ	%R15,%XMM22

    (933) 0x47d9ac MOV	0xd8(%RSP),%R8

    (933) 0x47d9b4 LEA	(%RCX,%RSI,1),%R15

    (933) 0x47d9b8 ADD	%R9,%RSI

    (933) 0x47d9bb ADD	%RCX,%RSI

    (933) 0x47d9be MOV	%RSI,0xa8(%RSP)

    (933) 0x47d9c6 VMOVQ	%XMM31,%RSI

    (933) 0x47d9cc VMULPD	(%R11,%R14,8),%XMM3,%XMM7

    (933) 0x47d9d2 VMOVQ	%XMM22,%R14

    (933) 0x47d9d8 VFMADD231PD	(%R11,%RSI,8),%XMM19,%XMM7

    (933) 0x47d9df VADDPD	%XMM9,%XMM7,%XMM0

    (933) 0x47d9e4 VMULPD	(%R11,%R14,8),%XMM20,%XMM9

    (933) 0x47d9eb VFMADD213PD	(%R12),%XMM1,%XMM0

    (933) 0x47d9f1 VFMADD231PD	(%R11,%R10,8),%XMM21,%XMM9

    (933) 0x47d9f8 MOV	0xa8(%RSP),%R10

    (933) 0x47da00 VMULSD	0x8(%R8),%XMM12,%XMM8

    (933) 0x47da06 VMOVDDUP	%XMM8,%XMM7

    (933) 0x47da0b VMULPD	(%R11,%R10,8),%XMM3,%XMM3

    (933) 0x47da11 VFMADD231PD	(%R11,%R15,8),%XMM19,%XMM3

    (933) 0x47da18 VADDPD	%XMM3,%XMM9,%XMM1

    (933) 0x47da1c VFMADD132PD	%XMM7,%XMM0,%XMM1

    (933) 0x47da21 VMOVUPD	%XMM1,(%R12)

    (933) 0x47da27 TEST	$0x1,%R13B

    (933) 0x47da2b JE	47daa9

    (933) 0x47da2d AND	$-0x2,%R13

    (933) 0x47da31 ADD	%R13,%RCX

    (933) 0x47da34 MOV	0xd8(%RSP),%R15

    (933) 0x47da3c LEA	(,%RCX,8),%RSI

    (933) 0x47da44 ADD	%R9,%RCX

    (933) 0x47da47 LEA	(%R9,%RCX,1),%R8

    (933) 0x47da4b LEA	(%RBX,%RSI,1),%R12

    (933) 0x47da4f LEA	(%R8,%R9,1),%R13

    (933) 0x47da53 VMULSD	(%RDX,%R8,8),%XMM15,%XMM0

    (933) 0x47da59 VMULSD	(%RAX,%R8,8),%XMM15,%XMM9

    (933) 0x47da5f VFMADD231SD	(%RDX,%RCX,8),%XMM18,%XMM0

    (933) 0x47da66 VMULSD	(%RDX,%R13,8),%XMM16,%XMM8

    (933) 0x47da6d VFMADD231SD	(%RAX,%RCX,8),%XMM18,%XMM9

    (933) 0x47da74 VFMADD231SD	(%RDX,%RSI,1),%XMM17,%XMM8

    (933) 0x47da7b VMULSD	(%RAX,%R13,8),%XMM16,%XMM3

    (933) 0x47da82 VADDSD	%XMM0,%XMM8,%XMM7

    (933) 0x47da86 VFMADD231SD	(%RAX,%RSI,1),%XMM17,%XMM3

    (933) 0x47da8d VFMADD213SD	(%R12),%XMM14,%XMM7

    (933) 0x47da93 VADDSD	%XMM9,%XMM3,%XMM1

    (933) 0x47da98 VMULSD	0x8(%R15),%XMM12,%XMM14

    (933) 0x47da9e VFMADD132SD	%XMM14,%XMM7,%XMM1

    (933) 0x47daa3 VMOVSD	%XMM1,(%R12)

    (933) 0x47daa9 MOV	0x98(%RSP),%RCX

    (933) 0x47dab1 ADDQ	$0x10,0xd8(%RSP)

    (933) 0x47daba MOV	0xd8(%RSP),%R14

    (933) 0x47dac2 MOV	0x90(%RSP),%R10

    (933) 0x47daca LEA	0x120(%RSP),%RSI

    (933) 0x47dad2 ADD	%R10,0xd0(%RSP)

    (933) 0x47dada ADD	%R10,0xc8(%RSP)

    (933) 0x47dae2 ADD	%RCX,%RDX

    (933) 0x47dae5 ADD	%RCX,%RAX

    (933) 0x47dae8 CMP	%RSI,%R14

    (933) 0x47daeb JNE	47d7a4

  (934) 0x47daf1 MOV	0x80(%RSP),%RSI

  (934) 0x47daf9 MOV	0x78(%RSP),%RDI

  (934) 0x47dafe MOV	0x70(%RSP),%R8

  (934) 0x47db03 VMOVQ	%XMM2,%R11

  (934) 0x47db08 LEA	0x100(%RSP),%RDX

  (934) 0x47db10 ADD	$0x8,%RSI

  (934) 0x47db14 ADD	%R11,%RDI

  (934) 0x47db17 ADD	%R11,%R8

  (934) 0x47db1a CMP	%RDX,%RSI

  (934) 0x47db1d JNE	47d72d

(932) 0x47db23 ADDQ	$0x8,0x60(%RSP)

(932) 0x47db29 MOV	0x60(%RSP),%RAX

(932) 0x47db2e ADDQ	$0x18,0x50(%RSP)

(932) 0x47db34 CMP	%RAX,0x48(%RSP)

(932) 0x47db39 JNE	47d3b8

0x47db3f MOV	0x28(%RSP),%R12

0x47db44 MOV	0x20(%RSP),%RBX

0x47db49 MOV	0x18(%RSP),%R13

0x47db4e VZEROUPPER

0x47db51 MOV	%R12,%RDI

0x47db54 XOR	%R15D,%R15D

0x47db57 XOR	%R14D,%R14D

0x47db5a CALL	531ac0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>

0x47db5f MOV	0x30(%RBX),%ECX

0x47db62 TEST	%ECX,%ECX

0x47db64 JLE	47dbc4

(931) 0x47db66 MOV	0x40(%RBX),%EAX

(931) 0x47db69 MOV	0x8(%RBX),%R10D

(931) 0x47db6d MOV	%ECX,%R9D

(931) 0x47db70 IMUL	%R14D,%R9D

(931) 0x47db74 INC	%R14D

(931) 0x47db77 IMUL	%R14D,%EAX

(931) 0x47db7b CMP	%R10D,%EAX

(931) 0x47db7e CMOVG	%R10D,%EAX

(931) 0x47db82 SUB	%R9D,%EAX

(931) 0x47db85 TEST	%EAX,%EAX

(931) 0x47db87 JLE	47dbbb

(931) 0x47db89 MOV	0x310(%RBX),%RSI

(931) 0x47db90 MOV	0x18(%R13),%RDI

(931) 0x47db94 CLTQ

(931) 0x47db96 MOVSXD	%R9D,%R8

(931) 0x47db99 LEA	(,%RAX,8),%RDX

(931) 0x47dba1 MOV	(%RSI,%R15,1),%RSI

(931) 0x47dba5 LEA	(%RDI,%R8,8),%RDI

(931) 0x47dba9 CMP	$0x8,%RDX

(931) 0x47dbad JE	47dc7a

(931) 0x47dbb3 CALL	4040d0 <memmove@plt>

(931) 0x47dbb8 MOV	0x30(%RBX),%ECX

(931) 0x47dbbb ADD	$0x18,%R15

(931) 0x47dbbf CMP	%ECX,%R14D

(931) 0x47dbc2 JL	47db66

0x47dbc4 LEA	-0x28(%RBP),%RSP

0x47dbc8 POP	%RBX

0x47dbc9 POP	%R12

0x47dbcb POP	%R13

0x47dbcd POP	%R14

0x47dbcf POP	%R15

0x47dbd1 POP	%RBP

0x47dbd2 RET

    (933) 0x47dbd3 XOR	%ECX,%ECX

    (933) 0x47dbd5 JMP	47d927

(932) 0x47dbda VMOVSD	0x14299e(%RIP),%XMM15

(932) 0x47dbe2 XOR	%R12D,%R12D

(932) 0x47dbe5 VMOVAPD	%XMM15,%XMM17

(932) 0x47dbeb VXORPD	%XMM16,%XMM16,%XMM16

(932) 0x47dbf1 VMOVSD	0x1429b5(%RIP),%XMM18

(932) 0x47dbfb JMP	47d5e9

(932) 0x47dc00 VMOVAPD	0x142978(%RIP),%YMM1

(932) 0x47dc08 XOR	%R14D,%R14D

(932) 0x47dc0b JMP	47d53e

(932) 0x47dc10 VMOVAPD	0x142968(%RIP),%YMM11

(932) 0x47dc18 MOVQ	$0,0xd8(%RSP)

(932) 0x47dc24 JMP	47d49d

(932) 0x47dc29 VMOVAPD	0x14296f(%RIP),%YMM1

(932) 0x47dc31 MOVSXD	%R8D,%R14

(932) 0x47dc34 JMP	47d53e

(932) 0x47dc39 CLTQ

(932) 0x47dc3b VMOVAPD	0x14295d(%RIP),%YMM11

(932) 0x47dc43 MOV	%RAX,0xd8(%RSP)

(932) 0x47dc4b JMP	47d49d

(932) 0x47dc50 MOVSXD	%R10D,%R12

(932) 0x47dc53 VMOVSD	0x14295b(%RIP),%XMM16

(932) 0x47dc5d VMOVSD	0x14294b(%RIP),%XMM15

(932) 0x47dc65 VMOVSD	0x142939(%RIP),%XMM18

(932) 0x47dc6f VXORPD	%XMM17,%XMM17,%XMM17

(932) 0x47dc75 JMP	47d5e9

(931) 0x47dc7a VMOVSD	(%RSI),%XMM12

(931) 0x47dc7e VMOVSD	%XMM12,(%RDI)

(931) 0x47dc82 JMP	47dbbb

0x47dc87 VMOVAPD	%XMM13,%XMM15

0x47dc8c JMP	47d340

0x47dc91 NOPW	%CS:(%RAX,%RAX,1)

0x47dc9b NOPL	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►49.32+	miniqmcreference::DiracDetermi[...]	OhmmsVector.h:178	exec
○	qmcplusplus::WaveFunction::eva[...]	allocator.h:161	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►47.25+	miniqmcreference::DiracDetermi[...]	OhmmsVector.h:178	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:266	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run gcc_3

Source file and lines	einspline_spo_ref.hpp:172-189
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:143
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp:172-189
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:170-173
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:42-49,56-71
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h:1263
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:53,60-63
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:229
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp:54-57
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:238,413,451-452,951-952
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algo.h:683,709
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h:150-152

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 12.63 to 5.25 cycles (2.40x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 15% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 12.63 to 1.28 cycles (9.89x speedup).

Details

29% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

25% of SSE/AVX loads are used in vector version.
0% of SSE/AVX stores are used in vector version.
50% of SSE/AVX addition or subtraction instructions are used in vector version.
50% of SSE/AVX multiply instructions are used in vector version.
50% of SSE/AVX fused multiply-add instructions are used in vector version.
50% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

Masked instructions

Detected masked instructions.

Details

Vector registers are partially exploited, which is expected if your function is irregular or mixes elements of different sizes.

Workaround

If your function is irregular, try to remove or hoist conditional structures out of your function. If it mixes elements of different sizes, try to uniformize them.

FMA

Detected 6 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

qmcplusplus::TimerType
::start(): 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242
qmcplusplus::TimerType
::stop(): 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:249

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

KMOVB: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:170
VCOMISD: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:170
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:170
VMOVHPD: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp:176

Type of elements and instruction set

7 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time). 7 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 18 FP arithmetical operations:

9: addition or subtraction (6 inside FMA instructions)
9: multiply (6 inside FMA instructions)

The binary function is loading 192 bytes (24 double precision FP elements). The binary function is storing 100 bytes (12 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.06 FP operations per loaded or stored byte.

General properties

nb instructions	97
nb uops	101
loop length	455
used x86 registers	16
used mmx registers	0
used xmm registers	16
used ymm registers	0
used zmm registers	0
nb stack references	14
ADD-SUB / MUL ratio	1.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	12.63 cycles
front end	12.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	4.17	4.17	4.17	4.17	4.17	4.17	9.25	9.25	9.25	9.25	5.50	5.50	5.50	5.50	3.00	3.00
cycles	4.17	4.17	4.17	4.17	4.17	4.17	9.25	9.25	9.25	9.25	5.50	5.50	5.50	5.50	3.00	3.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	12.63
Dispatch	9.25
Overall L1	12.63

Vectorization ratios

INT

all	5%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	20%

all	46%
load	36%
store	0%
mul	50%
add-sub	50%
fma	50%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	61%

INT+FP

all	29%
load	25%
store	0%
mul	50%
add-sub	50%
fma	50%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	50%

Vector efficiency ratios

INT

all	11%
load	11%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	18%
load	17%
store	12%
mul	18%
add-sub	18%
fma	18%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	20%

INT+FP

all	15%
load	15%
store	12%
mul	18%
add-sub	18%
fma	18%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Detected masked instructions: assuming all mask elements are active. Assuming all data fit into the L1 cache, each call to the function takes 12.63 cycles. At this rate:

5% of peak load performance is reached (15.21 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (7.92 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 12.63 to 9.25 cycles (1.36x speedup).

ASM code

In the binary file, the address of the function is: 47d240

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOVSXD %EDX,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB $0x120,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x358(%RDI),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 531880 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
LEA 0x128(%R14),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP 0x124(%R14),%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (6.3%)
JE 47d28f <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x4f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x40(%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R15,%R15,2),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%RAX,%RDX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVUPD (%RCX),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD 0x10(%RCX),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVDDUP 0x143420(%RIP),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VMOVDDUP %XMM2,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VXORPD %XMM10,%XMM10,%XMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMULSD 0x118(%RBX),%XMM2,%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
VMOVSD (%RCX),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VXORPD %XMM13,%XMM13,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VFMADD231SD 0xe8(%RBX),%XMM6,%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	scal (12.5%)
VPERMILPD $0x3,%XMM0,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VMULPD 0xf0(%RBX),%XMM4,%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	vect (25.0%)
VPERMILPD $0,%XMM0,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VUNPCKHPD %XMM0,%XMM0,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VFMADD231PD 0xd8(%RBX),%XMM3,%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	vect (25.0%)
VFMADD132PD 0x108(%RBX),%XMM8,%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	vect (25.0%)
VCMPPD $0xe,%XMM9,%XMM1,%K1	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VFMADD132SD 0x100(%RBX),%XMM5,%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	scal (12.5%)
VRNDSCALEPD $0x9,%XMM1,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (25.0%)
VCMPPD $0x1,%XMM10,%XMM1,%K0{%K1}	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
KNOTB %K0,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K2,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	4	1	N/A
AND $0x3,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
VCOMISD %XMM7,%XMM13	2	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0.50	0.50	6	0.50	scal (12.5%)
KMOVB %ESI,%K3	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	N/A
VSUBPD %XMM11,%XMM1,%XMM12{%K3}{z}	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
JBE 47d334 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0xf4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VCOMISD 0x143392(%RIP),%XMM7	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0.50	0.50	6	0.50	scal (12.5%)
JA 47dc87 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0xa47>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VRNDSCALESD $0x9,%XMM7,%XMM7,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	scal (12.5%)
VSUBSD %XMM14,%XMM7,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
MOVSXD 0x30(%RBX),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
TEST %R8D,%R8D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 47db51 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x911>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOVSXD 0x40(%RBX),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV 0x2f8(%RBX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x310(%RBX),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVHPD %XMM12,0x38(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.50	0.50	9-11	0.50	scal (12.5%)
VMOVLPD %XMM12,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R12,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD %XMM15,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %RBX,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R13,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (,%RDI,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R11,%R8,8),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0x1(%RDI),%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %EDI,0x6c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RDI,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R15,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x28(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x20(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 531ac0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x30(%RBX),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %ECX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JLE 47dbc4 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x984>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
VMOVAPD %XMM13,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
JMP 47d340 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x100>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run gcc_3

Source file and lines	einspline_spo_ref.hpp:172-189
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:143
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp:172-189
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:170-173
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:42-49,56-71
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h:1263
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:53,60-63
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:229
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp:54-57
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:238,413,451-452,951-952
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algo.h:683,709
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h:150-152

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 12.63 to 5.25 cycles (2.40x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

29% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

25% of SSE/AVX loads are used in vector version.
0% of SSE/AVX stores are used in vector version.
50% of SSE/AVX addition or subtraction instructions are used in vector version.
50% of SSE/AVX multiply instructions are used in vector version.
50% of SSE/AVX fused multiply-add instructions are used in vector version.
50% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

Masked instructions

Detected masked instructions.

Details

Vector registers are partially exploited, which is expected if your function is irregular or mixes elements of different sizes.

Workaround

If your function is irregular, try to remove or hoist conditional structures out of your function. If it mixes elements of different sizes, try to uniformize them.

FMA

Detected 6 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

CALL instructions

Detected function call instructions.

Details

qmcplusplus::TimerType
::start(): 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242
qmcplusplus::TimerType
::stop(): 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:249

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

KMOVB: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:170
VCOMISD: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:170
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:170
VMOVHPD: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp:176

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function is composed of 18 FP arithmetical operations:

9: addition or subtraction (6 inside FMA instructions)
9: multiply (6 inside FMA instructions)

The binary function is loading 192 bytes (24 double precision FP elements). The binary function is storing 100 bytes (12 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.06 FP operations per loaded or stored byte.

General properties

nb instructions	97
nb uops	101
loop length	455
used x86 registers	16
used mmx registers	0
used xmm registers	16
used ymm registers	0
used zmm registers	0
nb stack references	14
ADD-SUB / MUL ratio	1.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	12.63 cycles
front end	12.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	4.17	4.17	4.17	4.17	4.17	4.17	9.25	9.25	9.25	9.25	5.50	5.50	5.50	5.50	3.00	3.00
cycles	4.17	4.17	4.17	4.17	4.17	4.17	9.25	9.25	9.25	9.25	5.50	5.50	5.50	5.50	3.00	3.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	12.63
Dispatch	9.25
Overall L1	12.63

Vectorization ratios

INT

all	5%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	20%

all	46%
load	36%
store	0%
mul	50%
add-sub	50%
fma	50%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	61%

INT+FP

all	29%
load	25%
store	0%
mul	50%
add-sub	50%
fma	50%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	50%

Vector efficiency ratios

INT

all	11%
load	11%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	18%
load	17%
store	12%
mul	18%
add-sub	18%
fma	18%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	20%

INT+FP

all	15%
load	15%
store	12%
mul	18%
add-sub	18%
fma	18%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Detected masked instructions: assuming all mask elements are active. Assuming all data fit into the L1 cache, each call to the function takes 12.63 cycles. At this rate:

5% of peak load performance is reached (15.21 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (7.92 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 47d240

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOVSXD %EDX,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB $0x120,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x358(%RDI),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 531880 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
LEA 0x128(%R14),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP 0x124(%R14),%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (6.3%)
JE 47d28f <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x4f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x40(%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R15,%R15,2),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%RAX,%RDX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVUPD (%RCX),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD 0x10(%RCX),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVDDUP 0x143420(%RIP),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VMOVDDUP %XMM2,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VXORPD %XMM10,%XMM10,%XMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMULSD 0x118(%RBX),%XMM2,%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
VMOVSD (%RCX),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VXORPD %XMM13,%XMM13,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VFMADD231SD 0xe8(%RBX),%XMM6,%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	scal (12.5%)
VPERMILPD $0x3,%XMM0,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VMULPD 0xf0(%RBX),%XMM4,%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	vect (25.0%)
VPERMILPD $0,%XMM0,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VUNPCKHPD %XMM0,%XMM0,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VFMADD231PD 0xd8(%RBX),%XMM3,%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	vect (25.0%)
VFMADD132PD 0x108(%RBX),%XMM8,%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	vect (25.0%)
VCMPPD $0xe,%XMM9,%XMM1,%K1	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VFMADD132SD 0x100(%RBX),%XMM5,%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	scal (12.5%)
VRNDSCALEPD $0x9,%XMM1,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (25.0%)
VCMPPD $0x1,%XMM10,%XMM1,%K0{%K1}	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
KNOTB %K0,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K2,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	4	1	N/A
AND $0x3,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
VCOMISD %XMM7,%XMM13	2	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0.50	0.50	6	0.50	scal (12.5%)
KMOVB %ESI,%K3	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	N/A
VSUBPD %XMM11,%XMM1,%XMM12{%K3}{z}	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
JBE 47d334 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0xf4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VCOMISD 0x143392(%RIP),%XMM7	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0.50	0.50	6	0.50	scal (12.5%)
JA 47dc87 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0xa47>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VRNDSCALESD $0x9,%XMM7,%XMM7,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	scal (12.5%)
VSUBSD %XMM14,%XMM7,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
MOVSXD 0x30(%RBX),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
TEST %R8D,%R8D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 47db51 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x911>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOVSXD 0x40(%RBX),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV 0x2f8(%RBX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x310(%RBX),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVHPD %XMM12,0x38(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.50	0.50	9-11	0.50	scal (12.5%)
VMOVLPD %XMM12,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R12,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD %XMM15,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %RBX,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R13,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (,%RDI,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R11,%R8,8),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0x1(%RDI),%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %EDI,0x6c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RDI,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R15,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x28(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x20(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 531ac0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x30(%RBX),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %ECX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JLE 47dbc4 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x984>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
VMOVAPD %XMM13,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
JMP 47d340 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x100>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::einspline_spo_ref::evaluate(qmcplusplus::ParticleSet const&, int, qmcplusplus::Vector >&)–	25.79	42.58
▼Loop 932 - einspline_spo_ref.hpp:175-176 - exec–	0.00	0.01
▼Loop 934 - MultiBsplineRef.hpp:63-71 - exec–	0.00	0.01
▼Loop 933 - MultiBsplineRef.hpp:64-71 - exec–	0.00	0.01
○Loop 935 - MultiBsplineRef.hpp:68-71 - exec	25.78	42.17
○Loop 931 - einspline_spo_ref.hpp:183-187 - exec	0.00	0.01

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