OV - exec - Function miniqmcreference::TwoBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector<double, std::allocator<double> >&)

	Function: miniqmcreference::TwoBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateRatios( ...	Module: exec	Source: TwoBodyJastrowRef.h:105-132 [...]	Coverage (incl. loops): 1.16% \| (excl. loops): 0.00%

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/refwrap.h: 351 - 351

--------------------------------------------------------------------------------

351:       { return *_M_data; }

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 313 - 316

--------------------------------------------------------------------------------

313:   inline int first(int igroup) const { return (*group_offsets_)[igroup]; }

314:

315:   ///return the last index of a group i

316:   inline int last(int igroup) const { return (*group_offsets_)[igroup + 1]; }

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h: 105 - 132

--------------------------------------------------------------------------------

105:   void evaluateRatios(VirtualParticleSet& VP, std::vector<ValueType>& ratios)

106:   {

107:     for (int k = 0; k < ratios.size(); ++k)

108:       ratios[k] = std::exp(Uat[VP.refPtcl] - computeU(VP.getRefPS(), VP.refPtcl, VP.getDistTableAB(myTableID).getDistRow(k).data()));

109:   }

[...]

125:     valT curUat(0);

126:     const int igt = P.GroupID[iat] * NumGroups;

127:     for (int jg = 0; jg < NumGroups; ++jg)

128:     {

129:       const FuncType& f2(*F[igt + jg]);

130:       int iStart = P.first(jg);

131:       int iEnd   = P.last(jg);

132:       curUat += f2.evaluateV(iat, iStart, iEnd, dist, DistCompressed.data());

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h: 993 - 1150

--------------------------------------------------------------------------------

993:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1131: 	return *(this->_M_impl._M_start + __n);

[...]

1147:       operator[](size_type __n) const _GLIBCXX_NOEXCEPT

1148:       {

1149: 	__glibcxx_requires_subscript(__n);

1150: 	return *(this->_M_impl._M_start + __n);

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 231 - 260

--------------------------------------------------------------------------------

231:   ASSUME_ALIGNED(distArrayCompressed);

232:   int iCount       = 0;

233:   const int iLimit = iEnd - iStart;

234:

235: #pragma vector always

236:   for (int jat = 0; jat < iLimit; jat++)

237:   {

238:     real_type r = distArray[jat];

239:     // pick the distances smaller than the cutoff and avoid the reference atom

240:     if (r < cutoff_radius && iStart + jat != iat)

241:       distArrayCompressed[iCount++] = distArray[jat];

242:   }

243:

244:   real_type d = 0.0;

245:   //#pragma omp simd reduction(+:d)

246:   for (int jat = 0; jat < iCount; jat++)

247:   {

248:     real_type r = distArrayCompressed[jat];

249:     r *= DeltaRInv;

250:     int i         = (int)r;

251:     real_type t   = r - real_type(i);

252:     real_type tp0 = t * t * t;

253:     real_type tp1 = t * t;

254:     real_type tp2 = t;

255:

256:     real_type d1 = SplineCoefs[i + 0] * (A[0] * tp0 + A[1] * tp1 + A[2] * tp2 + A[3]);

257:     real_type d2 = SplineCoefs[i + 1] * (A[4] * tp0 + A[5] * tp1 + A[6] * tp2 + A[7]);

258:     real_type d3 = SplineCoefs[i + 2] * (A[8] * tp0 + A[9] * tp1 + A[10] * tp2 + A[11]);

259:     real_type d4 = SplineCoefs[i + 3] * (A[12] * tp0 + A[13] * tp1 + A[14] * tp2 + A[15]);

260:     d += (d1 + d2 + d3 + d4);

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 221 - 249

--------------------------------------------------------------------------------

221:   inline Type_t& operator[](size_t i)

222:   {

223:     return X[i];

[...]

249:   inline const_pointer data() const { return X; }

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/optional: 991 - 993

--------------------------------------------------------------------------------

991: 	if (this->_M_is_engaged())

992: 	  return this->_M_get();

993: 	__throw_bad_optional_access();

0x434140 LEA	0x8(%RSP),%R10

0x434145 AND	$-0x20,%RSP

0x434149 PUSHQ	-0x8(%R10)

0x43414d PUSH	%RBP

0x43414e MOV	%RSP,%RBP

0x434151 PUSH	%R15

0x434153 PUSH	%R14

0x434155 PUSH	%R13

0x434157 PUSH	%R12

0x434159 PUSH	%R10

0x43415b PUSH	%RBX

0x43415c SUB	$0x180,%RSP

0x434163 MOV	0x8(%RDX),%RAX

0x434167 MOV	%RSI,-0x1a8(%RBP)

0x43416e CMP	%RAX,(%RDX)

0x434171 JE	434e38

0x434177 MOV	%RDI,%R15

0x43417a MOVSXD	0x2a0(%RSI),%RDI

0x434181 MOV	%RDX,%R13

0x434184 XOR	%EDX,%EDX

0x434186 MOV	%RDX,-0x188(%RBP)

0x43418d MOV	%R13,-0x1b0(%RBP)

0x434194 MOV	%RDI,-0x190(%RBP)

0x43419b NOPL	(%RAX,%RAX,1)

(368) 0x4341a0 MOV	-0x1a8(%RBP),%R12

(368) 0x4341a7 MOV	0xd8(%R15),%RCX

(368) 0x4341ae MOV	-0x190(%RBP),%RBX

(368) 0x4341b5 MOV	0x248(%R15),%ESI

(368) 0x4341bc MOV	%R12,%RDI

(368) 0x4341bf VMOVSD	(%RCX,%RBX,8),%XMM0

(368) 0x4341c4 VMOVSD	%XMM0,-0x50(%RBP)

(368) 0x4341c9 CALL	4c7c00 <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>

(368) 0x4341ce MOV	-0x188(%RBP),%R8

(368) 0x4341d5 CMPB	$0,0x298(%R12)

(368) 0x4341de MOV	0x48(%RAX),%R11

(368) 0x4341e2 LEA	(%R8,%R8,4),%R9

(368) 0x4341e6 LEA	(%R11,%R9,8),%R14

(368) 0x4341ea MOV	0x2a0(%R12),%R9D

(368) 0x4341f2 MOV	0x18(%R14),%R14

(368) 0x4341f6 JE	434e5e

(368) 0x4341fc MOV	0x290(%R12),%R10

(368) 0x434204 MOVSXD	%R9D,%RSI

(368) 0x434207 MOV	0xa0(%R15),%RBX

(368) 0x43420e VMOVSD	-0x50(%RBP),%XMM0

(368) 0x434213 MOV	%RSI,-0x190(%RBP)

(368) 0x43421a MOV	0x18(%R10),%RAX

(368) 0x43421e MOV	(%RAX,%RSI,4),%R13D

(368) 0x434222 IMUL	%EBX,%R13D

(368) 0x434226 TEST	%RBX,%RBX

(368) 0x434229 MOVSXD	%R13D,%RDX

(368) 0x43422c JE	434dfa

(368) 0x434232 MOV	0x268(%R10),%RDI

(368) 0x434239 MOV	0x200(%R15),%RCX

(368) 0x434240 MOV	0x1d0(%R15),%RSI

(368) 0x434247 MOV	$0x2,%R10D

(368) 0x43424d MOV	$0x1,%EAX

(368) 0x434252 VPBROADCASTD	%R10D,%YMM1

(368) 0x434258 XOR	%R8D,%R8D

(368) 0x43425b KXNORB	%K1,%K1,%K1

(368) 0x43425f VPBROADCASTD	%EAX,%YMM3

(368) 0x434265 VMOVDQA	%YMM1,-0xf0(%RBP)

(368) 0x43426d MOVQ	$0,-0x160(%RBP)

(368) 0x434278 VMOVSD	%XMM0,-0x198(%RBP)

(368) 0x434280 VMOVDQA	%YMM3,-0xd0(%RBP)

(368) 0x434288 MOV	%R15,-0x1a0(%RBP)

(368) 0x43428f MOV	0x18(%RDI),%R11

(368) 0x434293 LEA	(%RCX,%RDX,8),%R12

(368) 0x434297 NOPW	(%RAX,%RAX,1)

  (369) 0x4342a0 MOVSXD	(%R11,%R8,4),%RDX

  (369) 0x4342a4 MOV	(%R12,%R8,8),%RDI

  (369) 0x4342a8 INC	%R8

  (369) 0x4342ab MOV	(%R11,%R8,4),%R15D

  (369) 0x4342af MOV	%RDX,%R13

  (369) 0x4342b2 CMP	%EDX,%R15D

  (369) 0x4342b5 JLE	434dd7

  (369) 0x4342bb MOV	%R15D,%R10D

  (369) 0x4342be LEA	(%R14,%RDX,8),%RCX

  (369) 0x4342c2 MOV	%EDX,%EAX

  (369) 0x4342c4 XOR	%EDX,%EDX

  (369) 0x4342c6 SUB	%R13D,%R10D

  (369) 0x4342c9 VMOVSD	0x8(%RDI),%XMM4

  (369) 0x4342ce AND	$0x7,%R10D

  (369) 0x4342d2 JE	4343f4

  (369) 0x4342d8 CMP	$0x1,%R10D

  (369) 0x4342dc JE	4343ca

  (369) 0x4342e2 CMP	$0x2,%R10D

  (369) 0x4342e6 JE	4343a9

  (369) 0x4342ec CMP	$0x3,%R10D

  (369) 0x4342f0 JE	434388

  (369) 0x4342f6 CMP	$0x4,%R10D

  (369) 0x4342fa JE	434368

  (369) 0x4342fc CMP	$0x5,%R10D

  (369) 0x434300 JE	434348

  (369) 0x434302 CMP	$0x6,%R10D

  (369) 0x434306 JE	434328

  (369) 0x434308 VMOVSD	(%RCX),%XMM2

  (369) 0x43430c VCOMISD	%XMM2,%XMM4

  (369) 0x434310 JBE	434320

  (369) 0x434312 CMP	%R13D,%R9D

  (369) 0x434315 JE	434320

  (369) 0x434317 MOV	$0x1,%EDX

  (369) 0x43431c VMOVSD	%XMM2,(%RSI)

  (369) 0x434320 ADD	$0x8,%RCX

  (369) 0x434324 LEA	0x1(%R13),%EAX

  (369) 0x434328 VMOVSD	(%RCX),%XMM5

  (369) 0x43432c VCOMISD	%XMM5,%XMM4

  (369) 0x434330 JBE	434342

  (369) 0x434332 CMP	%EAX,%R9D

  (369) 0x434335 JE	434342

  (369) 0x434337 MOVSXD	%EDX,%R13

  (369) 0x43433a INC	%EDX

  (369) 0x43433c VMOVSD	%XMM5,(%RSI,%R13,8)

  (369) 0x434342 ADD	$0x8,%RCX

  (369) 0x434346 INC	%EAX

  (369) 0x434348 VMOVSD	(%RCX),%XMM6

  (369) 0x43434c VCOMISD	%XMM6,%XMM4

  (369) 0x434350 JBE	434362

  (369) 0x434352 CMP	%EAX,%R9D

  (369) 0x434355 JE	434362

  (369) 0x434357 MOVSXD	%EDX,%R10

  (369) 0x43435a INC	%EDX

  (369) 0x43435c VMOVSD	%XMM6,(%RSI,%R10,8)

  (369) 0x434362 ADD	$0x8,%RCX

  (369) 0x434366 INC	%EAX

  (369) 0x434368 VMOVSD	(%RCX),%XMM7

  (369) 0x43436c VCOMISD	%XMM7,%XMM4

  (369) 0x434370 JBE	434382

  (369) 0x434372 CMP	%EAX,%R9D

  (369) 0x434375 JE	434382

  (369) 0x434377 MOVSXD	%EDX,%R13

  (369) 0x43437a INC	%EDX

  (369) 0x43437c VMOVSD	%XMM7,(%RSI,%R13,8)

  (369) 0x434382 ADD	$0x8,%RCX

  (369) 0x434386 INC	%EAX

  (369) 0x434388 VMOVSD	(%RCX),%XMM8

  (369) 0x43438c VCOMISD	%XMM8,%XMM4

  (369) 0x434391 JBE	4343a3

  (369) 0x434393 CMP	%EAX,%R9D

  (369) 0x434396 JE	4343a3

  (369) 0x434398 MOVSXD	%EDX,%R10

  (369) 0x43439b INC	%EDX

  (369) 0x43439d VMOVSD	%XMM8,(%RSI,%R10,8)

  (369) 0x4343a3 ADD	$0x8,%RCX

  (369) 0x4343a7 INC	%EAX

  (369) 0x4343a9 VMOVSD	(%RCX),%XMM9

  (369) 0x4343ad VCOMISD	%XMM9,%XMM4

  (369) 0x4343b2 JBE	4343c4

  (369) 0x4343b4 CMP	%EAX,%R9D

  (369) 0x4343b7 JE	4343c4

  (369) 0x4343b9 MOVSXD	%EDX,%R13

  (369) 0x4343bc INC	%EDX

  (369) 0x4343be VMOVSD	%XMM9,(%RSI,%R13,8)

  (369) 0x4343c4 ADD	$0x8,%RCX

  (369) 0x4343c8 INC	%EAX

  (369) 0x4343ca VMOVSD	(%RCX),%XMM10

  (369) 0x4343ce VCOMISD	%XMM10,%XMM4

  (369) 0x4343d3 JBE	4343e5

  (369) 0x4343d5 CMP	%EAX,%R9D

  (369) 0x4343d8 JE	4343e5

  (369) 0x4343da MOVSXD	%EDX,%R10

  (369) 0x4343dd INC	%EDX

  (369) 0x4343df VMOVSD	%XMM10,(%RSI,%R10,8)

  (369) 0x4343e5 INC	%EAX

  (369) 0x4343e7 ADD	$0x8,%RCX

  (369) 0x4343eb CMP	%R15D,%EAX

  (369) 0x4343ee JE	4344fd

    (370) 0x4343f4 VMOVSD	(%RCX),%XMM11

    (370) 0x4343f8 VCOMISD	%XMM11,%XMM4

    (370) 0x4343fd JBE	43440f

    (370) 0x4343ff CMP	%EAX,%R9D

    (370) 0x434402 JE	43440f

    (370) 0x434404 MOVSXD	%EDX,%R13

    (370) 0x434407 INC	%EDX

    (370) 0x434409 VMOVSD	%XMM11,(%RSI,%R13,8)

    (370) 0x43440f INC	%EAX

    (370) 0x434411 VMOVSD	0x8(%RCX),%XMM12

    (370) 0x434416 LEA	0x8(%RCX),%R10

    (370) 0x43441a VCOMISD	%XMM12,%XMM4

    (370) 0x43441f JBE	434430

    (370) 0x434421 CMP	%EAX,%R9D

    (370) 0x434424 JE	434430

    (370) 0x434426 MOVSXD	%EDX,%RCX

    (370) 0x434429 INC	%EDX

    (370) 0x43442b VMOVSD	%XMM12,(%RSI,%RCX,8)

    (370) 0x434430 VMOVSD	0x8(%R10),%XMM13

    (370) 0x434436 LEA	0x1(%RAX),%R13D

    (370) 0x43443a VCOMISD	%XMM13,%XMM4

    (370) 0x43443f JBE	434450

    (370) 0x434441 CMP	%R13D,%R9D

    (370) 0x434444 JE	434450

    (370) 0x434446 MOVSXD	%EDX,%RCX

    (370) 0x434449 INC	%EDX

    (370) 0x43444b VMOVSD	%XMM13,(%RSI,%RCX,8)

    (370) 0x434450 VMOVSD	0x10(%R10),%XMM14

    (370) 0x434456 LEA	0x2(%RAX),%R13D

    (370) 0x43445a VCOMISD	%XMM14,%XMM4

    (370) 0x43445f JBE	434470

    (370) 0x434461 CMP	%R13D,%R9D

    (370) 0x434464 JE	434470

    (370) 0x434466 MOVSXD	%EDX,%RCX

    (370) 0x434469 INC	%EDX

    (370) 0x43446b VMOVSD	%XMM14,(%RSI,%RCX,8)

    (370) 0x434470 VMOVSD	0x18(%R10),%XMM15

    (370) 0x434476 LEA	0x3(%RAX),%R13D

    (370) 0x43447a VCOMISD	%XMM15,%XMM4

    (370) 0x43447f JBE	434490

    (370) 0x434481 CMP	%R13D,%R9D

    (370) 0x434484 JE	434490

    (370) 0x434486 MOVSXD	%EDX,%RCX

    (370) 0x434489 INC	%EDX

    (370) 0x43448b VMOVSD	%XMM15,(%RSI,%RCX,8)

    (370) 0x434490 VMOVSD	0x20(%R10),%XMM0

    (370) 0x434496 LEA	0x4(%RAX),%R13D

    (370) 0x43449a VCOMISD	%XMM0,%XMM4

    (370) 0x43449e JBE	4344af

    (370) 0x4344a0 CMP	%R13D,%R9D

    (370) 0x4344a3 JE	4344af

    (370) 0x4344a5 MOVSXD	%EDX,%RCX

    (370) 0x4344a8 INC	%EDX

    (370) 0x4344aa VMOVSD	%XMM0,(%RSI,%RCX,8)

    (370) 0x4344af VMOVSD	0x28(%R10),%XMM3

    (370) 0x4344b5 LEA	0x5(%RAX),%R13D

    (370) 0x4344b9 VCOMISD	%XMM3,%XMM4

    (370) 0x4344bd JBE	4344ce

    (370) 0x4344bf CMP	%R13D,%R9D

    (370) 0x4344c2 JE	4344ce

    (370) 0x4344c4 MOVSXD	%EDX,%RCX

    (370) 0x4344c7 INC	%EDX

    (370) 0x4344c9 VMOVSD	%XMM3,(%RSI,%RCX,8)

    (370) 0x4344ce VMOVSD	0x30(%R10),%XMM1

    (370) 0x4344d4 LEA	0x6(%RAX),%R13D

    (370) 0x4344d8 VCOMISD	%XMM1,%XMM4

    (370) 0x4344dc JBE	4344ed

    (370) 0x4344de CMP	%R13D,%R9D

    (370) 0x4344e1 JE	4344ed

    (370) 0x4344e3 MOVSXD	%EDX,%RCX

    (370) 0x4344e6 INC	%EDX

    (370) 0x4344e8 VMOVSD	%XMM1,(%RSI,%RCX,8)

    (370) 0x4344ed ADD	$0x7,%EAX

    (370) 0x4344f0 LEA	0x38(%R10),%RCX

    (370) 0x4344f4 CMP	%R15D,%EAX

    (370) 0x4344f7 JNE	4343f4

  (369) 0x4344fd TEST	%EDX,%EDX

  (369) 0x4344ff JE	434dd7

  (369) 0x434505 VMOVSD	0x30(%RDI),%XMM4

  (369) 0x43450a VMOVSD	0x38(%RDI),%XMM3

  (369) 0x43450f VMOVSD	0x40(%RDI),%XMM6

  (369) 0x434514 VMOVSD	0x48(%RDI),%XMM2

  (369) 0x434519 VMOVSD	0x50(%RDI),%XMM0

  (369) 0x43451e VMOVSD	0x58(%RDI),%XMM14

  (369) 0x434523 VMOVSD	0x60(%RDI),%XMM13

  (369) 0x434528 VMOVSD	0x68(%RDI),%XMM9

  (369) 0x43452d VMOVSD	0x70(%RDI),%XMM15

  (369) 0x434532 VMOVSD	0x78(%RDI),%XMM12

  (369) 0x434537 VMOVSD	0x80(%RDI),%XMM11

  (369) 0x43453f VMOVSD	0x88(%RDI),%XMM10

  (369) 0x434547 VMOVSD	0x90(%RDI),%XMM30

  (369) 0x43454e MOV	0x218(%RDI),%RAX

  (369) 0x434555 VMOVSD	0x238(%RDI),%XMM5

  (369) 0x43455d VMOVSD	0x18(%RDI),%XMM1

  (369) 0x434562 VMOVSD	0x20(%RDI),%XMM7

  (369) 0x434567 VMOVSD	0x28(%RDI),%XMM8

  (369) 0x43456c LEA	-0x1(%RDX),%EDI

  (369) 0x43456f VMOVSD	%XMM4,-0xf8(%RBP)

  (369) 0x434577 VMOVSD	%XMM3,-0x100(%RBP)

  (369) 0x43457f VMOVSD	%XMM6,-0x108(%RBP)

  (369) 0x434587 VMOVSD	%XMM2,-0x110(%RBP)

  (369) 0x43458f VMOVSD	%XMM0,-0x118(%RBP)

  (369) 0x434597 VMOVSD	%XMM14,-0x120(%RBP)

  (369) 0x43459f VMOVSD	%XMM13,-0x128(%RBP)

  (369) 0x4345a7 VMOVSD	%XMM9,-0x130(%RBP)

  (369) 0x4345af VMOVSD	%XMM15,-0x138(%RBP)

  (369) 0x4345b7 VMOVSD	%XMM12,-0x140(%RBP)

  (369) 0x4345bf VMOVSD	%XMM11,-0x148(%RBP)

  (369) 0x4345c7 VMOVSD	%XMM10,-0x150(%RBP)

  (369) 0x4345cf VMOVSD	%XMM30,-0x158(%RBP)

  (369) 0x4345d6 CMP	$0x6,%EDI

  (369) 0x4345d9 JBE	434e50

  (369) 0x4345df MOV	%EDX,%R10D

  (369) 0x4345e2 VBROADCASTSD	%XMM4,%YMM23

  (369) 0x4345e8 VBROADCASTSD	%XMM3,%YMM22

  (369) 0x4345ee VBROADCASTSD	%XMM6,%YMM4

  (369) 0x4345f3 SHR	$0x3,%R10D

  (369) 0x4345f7 VMOVSD	%XMM5,-0x168(%RBP)

  (369) 0x4345ff VMOVSD	%XMM1,-0x170(%RBP)

  (369) 0x434607 VMOVSD	%XMM7,-0x178(%RBP)

  (369) 0x43460f VBROADCASTSD	%XMM2,%YMM3

  (369) 0x434614 VBROADCASTSD	%XMM10,%YMM6

  (369) 0x434619 VBROADCASTSD	%XMM30,%YMM2

  (369) 0x43461f VBROADCASTSD	%XMM14,%YMM29

  (369) 0x434625 SAL	$0x6,%R10

  (369) 0x434629 VXORPD	%XMM14,%XMM14,%XMM14

  (369) 0x43462e VMOVSD	%XMM8,-0x180(%RBP)

  (369) 0x434636 VBROADCASTSD	%XMM13,%YMM21

  (369) 0x43463c VBROADCASTSD	%XMM5,%YMM27

  (369) 0x434642 VBROADCASTSD	%XMM1,%YMM26

  (369) 0x434648 VBROADCASTSD	%XMM7,%YMM25

  (369) 0x43464e VBROADCASTSD	%XMM8,%YMM24

  (369) 0x434654 VMOVAPD	%YMM4,-0x50(%RBP)

  (369) 0x434659 VMOVAPD	%YMM3,-0x70(%RBP)

  (369) 0x43465e VBROADCASTSD	%XMM0,%YMM28

  (369) 0x434664 VBROADCASTSD	%XMM9,%YMM20

  (369) 0x43466a VBROADCASTSD	%XMM15,%YMM19

  (369) 0x434670 VBROADCASTSD	%XMM12,%YMM18

  (369) 0x434676 VBROADCASTSD	%XMM11,%YMM17

  (369) 0x43467c VMOVAPD	%YMM6,-0x90(%RBP)

  (369) 0x434684 VMOVAPD	%YMM2,-0xb0(%RBP)

  (369) 0x43468c MOV	%RSI,%R15

  (369) 0x43468f ADD	%RSI,%R10

  (369) 0x434692 VMOVAPD	%YMM14,%YMM13

  (369) 0x434697 NOPW	(%RAX,%RAX,1)

    (371) 0x4346a0 VMULPD	(%R15),%YMM27,%YMM7

    (371) 0x4346a6 VMULPD	0x20(%R15),%YMM27,%YMM8

    (371) 0x4346ad KMOVB	%K1,%K2

    (371) 0x4346b1 KMOVB	%K1,%K3

    (371) 0x4346b5 ADD	$0x40,%R15

    (371) 0x4346b9 KMOVB	%K1,%K5

    (371) 0x4346bd KMOVB	%K1,%K4

    (371) 0x4346c1 KMOVB	%K1,%K6

    (371) 0x4346c5 KMOVB	%K1,%K7

    (371) 0x4346c9 VRNDSCALEPD	$0xb,%YMM7,%YMM9

    (371) 0x4346d0 VCVTTPD2DQ	%YMM7,%XMM5

    (371) 0x4346d4 VCVTTPD2DQ	%YMM8,%XMM1

    (371) 0x4346d9 VGATHERDPD	(%RAX,%XMM5,8),%YMM16{%K2}

    (371) 0x4346e0 KMOVB	%K1,%K2

    (371) 0x4346e4 VINSERTI32X4	$0x1,%XMM1,%YMM5,%YMM1

    (371) 0x4346eb VPERM2I128	$0x11,%YMM1,%YMM1,%YMM12

    (371) 0x4346f1 VGATHERDPD	(%RAX,%XMM12,8),%YMM15{%K3}

    (371) 0x4346f8 KMOVB	%K1,%K3

    (371) 0x4346fc VRNDSCALEPD	$0xb,%YMM8,%YMM0

    (371) 0x434703 VSUBPD	%YMM9,%YMM7,%YMM3

    (371) 0x434708 VMOVAPD	%YMM3,%YMM11

    (371) 0x43470c VSUBPD	%YMM0,%YMM8,%YMM4

    (371) 0x434710 VMULPD	%YMM3,%YMM3,%YMM0

    (371) 0x434714 VPADDD	-0xd0(%RBP),%YMM1,%YMM5

    (371) 0x43471c VFMADD132PD	%YMM24,%YMM23,%YMM11

    (371) 0x434722 VMOVAPD	-0x50(%RBP),%YMM12

    (371) 0x434727 VMULPD	%YMM4,%YMM4,%YMM2

    (371) 0x43472b VMULPD	%YMM3,%YMM0,%YMM9

    (371) 0x43472f VMOVAPD	%YMM4,%YMM6

    (371) 0x434733 VMULPD	%YMM25,%YMM0,%YMM10

    (371) 0x434739 VFMADD132PD	%YMM24,%YMM23,%YMM6

    (371) 0x43473f VMULPD	%YMM2,%YMM4,%YMM8

    (371) 0x434743 VMULPD	%YMM25,%YMM2,%YMM7

    (371) 0x434749 VGATHERDPD	(%RAX,%XMM5,8),%YMM30{%K4}

    (371) 0x434750 VFMADD231PD	%YMM26,%YMM9,%YMM10

    (371) 0x434756 VFMADD231PD	%YMM26,%YMM8,%YMM7

    (371) 0x43475c VADDPD	%YMM10,%YMM11,%YMM11

    (371) 0x434761 VPERM2I128	$0x11,%YMM5,%YMM5,%YMM10

    (371) 0x434767 VMULPD	%YMM12,%YMM0,%YMM5

    (371) 0x43476c VMULPD	%YMM12,%YMM2,%YMM12

    (371) 0x434771 VADDPD	%YMM6,%YMM7,%YMM7

    (371) 0x434775 VGATHERDPD	(%RAX,%XMM10,8),%YMM6{%K5}

    (371) 0x43477c VMOVAPD	-0x70(%RBP),%YMM10

    (371) 0x434781 VFMADD231PD	%YMM22,%YMM9,%YMM5

    (371) 0x434787 VFMADD231PD	%YMM22,%YMM8,%YMM12

    (371) 0x43478d VMOVAPD	%YMM10,%YMM31

    (371) 0x434793 VFMADD132PD	%YMM4,%YMM28,%YMM10

    (371) 0x434799 VFMADD132PD	%YMM3,%YMM28,%YMM31

    (371) 0x43479f VADDPD	%YMM12,%YMM10,%YMM12

    (371) 0x4347a4 VADDPD	%YMM31,%YMM5,%YMM5

    (371) 0x4347aa VMULPD	%YMM12,%YMM6,%YMM6

    (371) 0x4347af VMULPD	%YMM30,%YMM5,%YMM5

    (371) 0x4347b5 VFMADD231PD	%YMM7,%YMM15,%YMM6

    (371) 0x4347ba VPADDD	-0xf0(%RBP),%YMM1,%YMM15

    (371) 0x4347c2 VPADDD	0x18b4d6(%RIP),%YMM1,%YMM1

    (371) 0x4347ca VFMADD231PD	%YMM11,%YMM16,%YMM5

    (371) 0x4347d0 VMOVAPD	%YMM3,%YMM11

    (371) 0x4347d4 VMOVAPD	%YMM4,%YMM16

    (371) 0x4347da VFMADD132PD	%YMM20,%YMM19,%YMM11

    (371) 0x4347e0 VFMADD132PD	%YMM20,%YMM19,%YMM16

    (371) 0x4347e6 VPERM2I128	$0x11,%YMM15,%YMM15,%YMM7

    (371) 0x4347ec VGATHERDPD	(%RAX,%XMM15,8),%YMM12{%K6}

    (371) 0x4347f3 VGATHERDPD	(%RAX,%XMM7,8),%YMM10{%K7}

    (371) 0x4347fa VMULPD	%YMM21,%YMM0,%YMM15

    (371) 0x434800 VMULPD	%YMM21,%YMM2,%YMM7

    (371) 0x434806 VMULPD	%YMM17,%YMM0,%YMM0

    (371) 0x43480c VMULPD	%YMM17,%YMM2,%YMM2

    (371) 0x434812 VFMADD231PD	%YMM29,%YMM9,%YMM15

    (371) 0x434818 VFMADD231PD	%YMM29,%YMM8,%YMM7

    (371) 0x43481e VFMADD231PD	%YMM18,%YMM9,%YMM0

    (371) 0x434824 VMOVAPD	-0x90(%RBP),%YMM9

    (371) 0x43482c VFMADD231PD	%YMM18,%YMM8,%YMM2

    (371) 0x434832 VMOVAPD	-0xb0(%RBP),%YMM8

    (371) 0x43483a VADDPD	%YMM15,%YMM11,%YMM11

    (371) 0x43483f VGATHERDPD	(%RAX,%XMM1,8),%YMM15{%K2}

    (371) 0x434846 VPERM2I128	$0x11,%YMM1,%YMM1,%YMM1

    (371) 0x43484c VGATHERDPD	(%RAX,%XMM1,8),%YMM31{%K3}

    (371) 0x434853 VADDPD	%YMM16,%YMM7,%YMM7

    (371) 0x434859 VFMADD132PD	%YMM9,%YMM8,%YMM3

    (371) 0x43485e VFMADD132PD	%YMM9,%YMM8,%YMM4

    (371) 0x434863 VADDPD	%YMM3,%YMM0,%YMM3

    (371) 0x434867 VADDPD	%YMM4,%YMM2,%YMM4

    (371) 0x43486b VMULPD	%YMM15,%YMM3,%YMM15

    (371) 0x434870 VFMADD231PD	%YMM11,%YMM12,%YMM15

    (371) 0x434875 VMULPD	%YMM4,%YMM31,%YMM12

    (371) 0x43487b VFMADD132PD	%YMM7,%YMM12,%YMM10

    (371) 0x434880 VADDPD	%YMM15,%YMM5,%YMM5

    (371) 0x434885 VADDPD	%YMM10,%YMM6,%YMM6

    (371) 0x43488a VADDPD	%YMM5,%YMM13,%YMM13

    (371) 0x43488e VADDPD	%YMM6,%YMM14,%YMM14

    (371) 0x434892 CMP	%R10,%R15

    (371) 0x434895 JNE	4346a0

  (369) 0x43489b VADDPD	%YMM14,%YMM13,%YMM10

  (369) 0x4348a0 MOV	%EDX,%ECX

  (369) 0x4348a2 VMOVSD	-0x168(%RBP),%XMM5

  (369) 0x4348aa VMOVSD	-0x170(%RBP),%XMM1

  (369) 0x4348b2 AND	$-0x8,%ECX

  (369) 0x4348b5 VMOVSD	-0x178(%RBP),%XMM7

  (369) 0x4348bd VMOVSD	-0x180(%RBP),%XMM8

  (369) 0x4348c5 MOV	%ECX,%R13D

  (369) 0x4348c8 VEXTRACTF64X2	$0x1,%YMM10,%XMM11

  (369) 0x4348cf VADDPD	%XMM10,%XMM11,%XMM2

  (369) 0x4348d4 VUNPCKHPD	%XMM2,%XMM2,%XMM0

  (369) 0x4348d8 VADDPD	%XMM2,%XMM0,%XMM0

  (369) 0x4348dc CMP	%EDX,%ECX

  (369) 0x4348de JE	434dc7

  (369) 0x4348e4 MOV	%EDX,%EDI

  (369) 0x4348e6 SUB	%R13D,%EDI

  (369) 0x4348e9 LEA	-0x1(%RDI),%R15D

  (369) 0x4348ed CMP	$0x2,%R15D

  (369) 0x4348f1 JBE	434b6b

  (369) 0x4348f7 LEA	(%RSI,%R13,8),%R13

  (369) 0x4348fb VMOVDDUP	%XMM5,%XMM12

  (369) 0x4348ff VMOVDDUP	%XMM7,%XMM3

  (369) 0x434903 VMOVDDUP	%XMM1,%XMM30

  (369) 0x434909 VMULPD	(%R13),%XMM12,%XMM4

  (369) 0x43490f VMULPD	0x10(%R13),%XMM12,%XMM2

  (369) 0x434915 VMOVDDUP	-0xf8(%RBP),%XMM26

  (369) 0x43491c VMOVDDUP	%XMM8,%XMM17

  (369) 0x434922 VMOVDDUP	-0x108(%RBP),%XMM11

  (369) 0x43492a VMOVDDUP	-0x100(%RBP),%XMM25

  (369) 0x434931 VMOVDDUP	-0x118(%RBP),%XMM24

  (369) 0x434938 VMOVDDUP	-0x110(%RBP),%XMM16

  (369) 0x43493f KMOVB	%K1,%K5

  (369) 0x434943 KMOVB	%K1,%K4

  (369) 0x434947 VMOVDDUP	-0x128(%RBP),%XMM13

  (369) 0x43494f VMOVDDUP	-0x148(%RBP),%XMM9

  (369) 0x434957 KMOVB	%K1,%K6

  (369) 0x43495b VMOVDDUP	-0x120(%RBP),%XMM23

  (369) 0x434962 KMOVB	%K1,%K7

  (369) 0x434966 VMOVDDUP	-0x138(%RBP),%XMM22

  (369) 0x43496d VMOVDDUP	-0x130(%RBP),%XMM6

  (369) 0x434975 VMOVDDUP	-0x140(%RBP),%XMM20

  (369) 0x43497c VMOVDDUP	-0x150(%RBP),%XMM19

  (369) 0x434983 VMOVDDUP	-0x158(%RBP),%XMM15

  (369) 0x43498b KMOVB	%K1,%K3

  (369) 0x43498f KMOVB	%K1,%K2

  (369) 0x434993 VINSERTF64X2	$0x1,%XMM2,%YMM4,%YMM14

  (369) 0x43499a VCVTTPD2DQ	%YMM14,%XMM10

  (369) 0x43499f VRNDSCALEPD	$0xb,%XMM2,%XMM12

  (369) 0x4349a6 VPSHUFD	$-0x12,%XMM10,%XMM27

  (369) 0x4349ad VGATHERDPD	(%RAX,%XMM27,8),%XMM29{%K5}

  (369) 0x4349b4 KMOVB	%K1,%K5

  (369) 0x4349b8 VGATHERDPD	(%RAX,%XMM10,8),%XMM28{%K4}

  (369) 0x4349bf KMOVB	%K1,%K4

  (369) 0x4349c3 VRNDSCALEPD	$0xb,%XMM4,%XMM14

  (369) 0x4349ca VSUBPD	%XMM12,%XMM2,%XMM2

  (369) 0x4349cf VMULPD	%XMM2,%XMM2,%XMM18

  (369) 0x4349d5 VSUBPD	%XMM14,%XMM4,%XMM4

  (369) 0x4349da VMULPD	%XMM18,%XMM2,%XMM21

  (369) 0x4349e0 VMULPD	%XMM4,%XMM4,%XMM14

  (369) 0x4349e4 VMULPD	%XMM14,%XMM4,%XMM12

  (369) 0x4349e9 VMULPD	%XMM3,%XMM14,%XMM31

  (369) 0x4349ef VMULPD	%XMM3,%XMM18,%XMM3

  (369) 0x4349f5 VFMADD231PD	%XMM30,%XMM12,%XMM31

  (369) 0x4349fb VFMADD231PD	%XMM30,%XMM21,%XMM3

  (369) 0x434a01 VMOVAPD	%XMM4,%XMM30

  (369) 0x434a07 VFMADD132PD	%XMM17,%XMM26,%XMM30

  (369) 0x434a0d VFMADD132PD	%XMM2,%XMM26,%XMM17

  (369) 0x434a13 VADDPD	%XMM17,%XMM3,%XMM3

  (369) 0x434a19 VADDPD	%XMM31,%XMM30,%XMM26

  (369) 0x434a1f VMULPD	%XMM11,%XMM14,%XMM31

  (369) 0x434a25 VMULPD	%XMM11,%XMM18,%XMM11

  (369) 0x434a2b VMULPD	%XMM29,%XMM3,%XMM3

  (369) 0x434a31 VFMADD231PD	%XMM25,%XMM12,%XMM31

  (369) 0x434a37 VFMADD231PD	%XMM25,%XMM21,%XMM11

  (369) 0x434a3d VMOVAPD	%XMM4,%XMM25

  (369) 0x434a43 VFMADD132PD	%XMM16,%XMM24,%XMM25

  (369) 0x434a49 VFMADD132PD	%XMM2,%XMM24,%XMM16

  (369) 0x434a4f VFMADD231PD	%XMM26,%XMM28,%XMM3

  (369) 0x434a55 VPADDD	0x18b201(%RIP),%XMM10,%XMM28

  (369) 0x434a5f VADDPD	%XMM16,%XMM11,%XMM11

  (369) 0x434a65 VPADDD	0x18b211(%RIP),%XMM10,%XMM16

  (369) 0x434a6f VPADDD	0x18b229(%RIP),%XMM10,%XMM10

  (369) 0x434a77 VADDPD	%XMM31,%XMM25,%XMM24

  (369) 0x434a7d VGATHERDPD	(%RAX,%XMM28,8),%XMM17{%K6}

  (369) 0x434a84 VPSHUFD	$-0x12,%XMM28,%XMM27

  (369) 0x434a8b VMULPD	%XMM13,%XMM14,%XMM28

  (369) 0x434a91 VGATHERDPD	(%RAX,%XMM27,8),%XMM29{%K7}

  (369) 0x434a98 VMULPD	%XMM13,%XMM18,%XMM13

  (369) 0x434a9e VMULPD	%XMM9,%XMM14,%XMM14

  (369) 0x434aa3 VMULPD	%XMM9,%XMM18,%XMM9

  (369) 0x434aa9 VMULPD	%XMM29,%XMM11,%XMM11

  (369) 0x434aaf VFMADD231PD	%XMM23,%XMM12,%XMM28

  (369) 0x434ab5 VPSHUFD	$-0x12,%XMM16,%XMM26

  (369) 0x434abc VFMADD231PD	%XMM23,%XMM21,%XMM13

  (369) 0x434ac2 VFMADD132PD	%XMM20,%XMM14,%XMM12

  (369) 0x434ac8 VMOVAPD	%XMM4,%XMM23

  (369) 0x434ace VFMADD132PD	%XMM6,%XMM22,%XMM23

  (369) 0x434ad4 VFMADD132PD	%XMM2,%XMM22,%XMM6

  (369) 0x434ada VFMADD132PD	%XMM19,%XMM15,%XMM4

  (369) 0x434ae0 VFMADD231PD	%XMM20,%XMM21,%XMM9

  (369) 0x434ae6 VFMADD231PD	%XMM19,%XMM2,%XMM15

  (369) 0x434aec VFMADD132PD	%XMM24,%XMM11,%XMM17

  (369) 0x434af2 VGATHERDPD	(%RAX,%XMM26,8),%XMM11{%K3}

  (369) 0x434af9 VADDPD	%XMM13,%XMM6,%XMM6

  (369) 0x434afe VADDPD	%XMM28,%XMM23,%XMM22

  (369) 0x434b04 VADDPD	%XMM4,%XMM12,%XMM4

  (369) 0x434b08 VADDPD	%XMM15,%XMM9,%XMM15

  (369) 0x434b0d VADDPD	%XMM3,%XMM17,%XMM30

  (369) 0x434b13 VGATHERDPD	(%RAX,%XMM16,8),%XMM3{%K2}

  (369) 0x434b1a VMULPD	%XMM11,%XMM6,%XMM13

  (369) 0x434b1f VPSHUFD	$-0x12,%XMM10,%XMM6

  (369) 0x434b25 VGATHERDPD	(%RAX,%XMM6,8),%XMM11{%K5}

  (369) 0x434b2c VMULPD	%XMM11,%XMM15,%XMM2

  (369) 0x434b31 VFMADD231PD	%XMM22,%XMM3,%XMM13

  (369) 0x434b37 VGATHERDPD	(%RAX,%XMM10,8),%XMM3{%K4}

  (369) 0x434b3e VFMADD132PD	%XMM4,%XMM2,%XMM3

  (369) 0x434b43 VADDPD	%XMM13,%XMM3,%XMM12

  (369) 0x434b48 VADDPD	%XMM30,%XMM12,%XMM13

  (369) 0x434b4e VUNPCKHPD	%XMM13,%XMM13,%XMM10

  (369) 0x434b53 VADDPD	%XMM13,%XMM10,%XMM3

  (369) 0x434b58 VADDSD	%XMM3,%XMM0,%XMM0

  (369) 0x434b5c TEST	$0x3,%DIL

  (369) 0x434b60 JE	434dc7

  (369) 0x434b66 AND	$-0x4,%EDI

  (369) 0x434b69 ADD	%EDI,%ECX

  (369) 0x434b6b MOVSXD	%ECX,%R10

  (369) 0x434b6e VMOVSD	-0xf8(%RBP),%XMM15

  (369) 0x434b76 VMOVAPD	%XMM15,%XMM9

  (369) 0x434b7b VMOVSD	-0x100(%RBP),%XMM17

  (369) 0x434b82 VMULSD	(%RSI,%R10,8),%XMM5,%XMM6

  (369) 0x434b88 VRNDSCALESD	$0xb,%XMM6,%XMM6,%XMM11

  (369) 0x434b8f VSUBSD	%XMM11,%XMM6,%XMM2

  (369) 0x434b94 VMULSD	%XMM2,%XMM2,%XMM3

  (369) 0x434b98 VFMADD231SD	%XMM8,%XMM2,%XMM9

  (369) 0x434b9d VMULSD	%XMM3,%XMM2,%XMM4

  (369) 0x434ba1 VMULSD	%XMM7,%XMM3,%XMM14

  (369) 0x434ba5 VFMADD231SD	%XMM1,%XMM4,%XMM14

  (369) 0x434baa VCVTTSD2SI	%XMM6,%R15D

  (369) 0x434bae MOVSXD	%R15D,%R13

  (369) 0x434bb1 VMOVSD	-0x108(%RBP),%XMM11

  (369) 0x434bb9 VMOVSD	-0x118(%RBP),%XMM27

  (369) 0x434bc0 VMULSD	%XMM11,%XMM3,%XMM12

  (369) 0x434bc5 VFMADD231SD	%XMM17,%XMM4,%XMM12

  (369) 0x434bcb VMOVSD	-0x130(%RBP),%XMM13

  (369) 0x434bd3 VMOVSD	-0x128(%RBP),%XMM19

  (369) 0x434bda VMOVSD	-0x138(%RBP),%XMM20

  (369) 0x434be1 VMULSD	%XMM19,%XMM3,%XMM10

  (369) 0x434be7 VMOVSD	-0x148(%RBP),%XMM21

  (369) 0x434bee VMOVSD	-0x140(%RBP),%XMM29

  (369) 0x434bf5 VADDSD	%XMM14,%XMM9,%XMM6

  (369) 0x434bfa VMOVSD	-0x110(%RBP),%XMM14

  (369) 0x434c02 VFMADD132SD	(%RAX,%R13,8),%XMM0,%XMM6

  (369) 0x434c08 VMOVAPD	%XMM14,%XMM0

  (369) 0x434c0c VFMADD132SD	%XMM2,%XMM27,%XMM0

  (369) 0x434c12 VMOVAPD	%XMM13,%XMM9

  (369) 0x434c17 VMULSD	%XMM21,%XMM3,%XMM3

  (369) 0x434c1d VMOVSD	-0x150(%RBP),%XMM31

  (369) 0x434c24 VFMADD132SD	%XMM2,%XMM20,%XMM9

  (369) 0x434c2a VMOVSD	-0x158(%RBP),%XMM18

  (369) 0x434c31 VFMADD132SD	%XMM31,%XMM18,%XMM2

  (369) 0x434c37 LEA	(,%R10,8),%RDI

  (369) 0x434c3f LEA	0x1(%RCX),%R10D

  (369) 0x434c43 VADDSD	%XMM12,%XMM0,%XMM0

  (369) 0x434c48 VMOVSD	-0x120(%RBP),%XMM12

  (369) 0x434c50 VFMADD231SD	%XMM12,%XMM4,%XMM10

  (369) 0x434c55 VFMADD132SD	%XMM29,%XMM3,%XMM4

  (369) 0x434c5b VADDSD	%XMM10,%XMM9,%XMM10

  (369) 0x434c60 VADDSD	%XMM4,%XMM2,%XMM2

  (369) 0x434c64 VMULSD	0x10(%RAX,%R13,8),%XMM10,%XMM9

  (369) 0x434c6b VFMADD132SD	0x18(%RAX,%R13,8),%XMM6,%XMM2

  (369) 0x434c72 VFMADD132SD	0x8(%RAX,%R13,8),%XMM9,%XMM0

  (369) 0x434c79 VADDSD	%XMM2,%XMM0,%XMM0

  (369) 0x434c7d CMP	%EDX,%R10D

  (369) 0x434c80 JGE	434dc7

  (369) 0x434c86 VMOVAPD	%XMM15,%XMM9

  (369) 0x434c8b VMULSD	0x8(%RSI,%RDI,1),%XMM5,%XMM6

  (369) 0x434c91 VRNDSCALESD	$0xb,%XMM6,%XMM6,%XMM4

  (369) 0x434c98 VSUBSD	%XMM4,%XMM6,%XMM2

  (369) 0x434c9c VMULSD	%XMM2,%XMM2,%XMM3

  (369) 0x434ca0 VFMADD231SD	%XMM2,%XMM8,%XMM9

  (369) 0x434ca5 VMULSD	%XMM2,%XMM3,%XMM4

  (369) 0x434ca9 VMULSD	%XMM3,%XMM7,%XMM10

  (369) 0x434cad VFMADD231SD	%XMM4,%XMM1,%XMM10

  (369) 0x434cb2 VCVTTSD2SI	%XMM6,%R15D

  (369) 0x434cb6 MOVSXD	%R15D,%R13

  (369) 0x434cb9 ADD	$0x2,%ECX

  (369) 0x434cbc VADDSD	%XMM10,%XMM9,%XMM6

  (369) 0x434cc1 VFMADD132SD	(%RAX,%R13,8),%XMM0,%XMM6

  (369) 0x434cc7 VMOVAPD	%XMM14,%XMM0

  (369) 0x434ccb VMULSD	%XMM11,%XMM3,%XMM10

  (369) 0x434cd0 VFMADD132SD	%XMM2,%XMM27,%XMM0

  (369) 0x434cd6 VFMADD231SD	%XMM17,%XMM4,%XMM10

  (369) 0x434cdc VMOVAPD	%XMM13,%XMM9

  (369) 0x434ce1 VFMADD132SD	%XMM2,%XMM20,%XMM9

  (369) 0x434ce7 VFMADD132SD	%XMM31,%XMM18,%XMM2

  (369) 0x434ced VADDSD	%XMM10,%XMM0,%XMM0

  (369) 0x434cf2 VMULSD	%XMM19,%XMM3,%XMM10

  (369) 0x434cf8 VMULSD	%XMM21,%XMM3,%XMM3

  (369) 0x434cfe VFMADD231SD	%XMM12,%XMM4,%XMM10

  (369) 0x434d03 VFMADD132SD	%XMM29,%XMM3,%XMM4

  (369) 0x434d09 VADDSD	%XMM10,%XMM9,%XMM10

  (369) 0x434d0e VMULSD	0x10(%RAX,%R13,8),%XMM10,%XMM9

  (369) 0x434d15 VFMADD132SD	0x8(%RAX,%R13,8),%XMM9,%XMM0

  (369) 0x434d1c VADDSD	%XMM4,%XMM2,%XMM2

  (369) 0x434d20 VFMADD132SD	0x18(%RAX,%R13,8),%XMM6,%XMM2

  (369) 0x434d27 VADDSD	%XMM2,%XMM0,%XMM0

  (369) 0x434d2b CMP	%EDX,%ECX

  (369) 0x434d2d JGE	434dc7

  (369) 0x434d33 VMULSD	0x10(%RSI,%RDI,1),%XMM5,%XMM5

  (369) 0x434d39 VRNDSCALESD	$0xb,%XMM5,%XMM5,%XMM4

  (369) 0x434d40 VSUBSD	%XMM4,%XMM5,%XMM3

  (369) 0x434d44 VMULSD	%XMM3,%XMM3,%XMM4

  (369) 0x434d48 VFMADD132SD	%XMM3,%XMM15,%XMM8

  (369) 0x434d4d VMULSD	%XMM4,%XMM3,%XMM6

  (369) 0x434d51 VMULSD	%XMM4,%XMM7,%XMM7

  (369) 0x434d55 VFMADD132SD	%XMM6,%XMM7,%XMM1

  (369) 0x434d5a VFMADD132SD	%XMM3,%XMM27,%XMM14

  (369) 0x434d60 VFMADD132SD	%XMM3,%XMM20,%XMM13

  (369) 0x434d66 VMULSD	%XMM21,%XMM4,%XMM9

  (369) 0x434d6c VCVTTSD2SI	%XMM5,%EDX

  (369) 0x434d70 VFMADD231SD	%XMM29,%XMM6,%XMM9

  (369) 0x434d76 VFMADD132SD	%XMM31,%XMM18,%XMM3

  (369) 0x434d7c MOVSXD	%EDX,%RCX

  (369) 0x434d7f VADDSD	%XMM8,%XMM1,%XMM1

  (369) 0x434d84 VMULSD	%XMM11,%XMM4,%XMM8

  (369) 0x434d89 VMULSD	%XMM19,%XMM4,%XMM11

  (369) 0x434d8f VFMADD231SD	%XMM17,%XMM6,%XMM8

  (369) 0x434d95 VFMADD132SD	%XMM6,%XMM11,%XMM12

  (369) 0x434d9a VFMADD132SD	(%RAX,%RCX,8),%XMM0,%XMM1

  (369) 0x434da0 VADDSD	%XMM3,%XMM9,%XMM10

  (369) 0x434da4 VFMADD132SD	0x18(%RAX,%RCX,8),%XMM1,%XMM10

  (369) 0x434dab VADDSD	%XMM8,%XMM14,%XMM15

  (369) 0x434db0 VADDSD	%XMM12,%XMM13,%XMM0

  (369) 0x434db5 VMULSD	0x10(%RAX,%RCX,8),%XMM0,%XMM2

  (369) 0x434dbb VFMADD132SD	0x8(%RAX,%RCX,8),%XMM2,%XMM15

  (369) 0x434dc2 VADDSD	%XMM10,%XMM15,%XMM0

  (369) 0x434dc7 VADDSD	-0x160(%RBP),%XMM0,%XMM5

  (369) 0x434dcf VMOVSD	%XMM5,-0x160(%RBP)

  (369) 0x434dd7 CMP	%R8,%RBX

  (369) 0x434dda JNE	4342a0

(368) 0x434de0 VMOVSD	-0x198(%RBP),%XMM3

(368) 0x434de8 MOV	-0x1a0(%RBP),%R15

(368) 0x434def VSUBSD	-0x160(%RBP),%XMM3,%XMM0

(368) 0x434df7 VZEROUPPER

(368) 0x434dfa CALL	4040b0 <exp@plt>

(368) 0x434dff MOV	-0x1b0(%RBP),%RSI

(368) 0x434e06 MOV	-0x188(%RBP),%RBX

(368) 0x434e0d MOV	(%RSI),%R8

(368) 0x434e10 MOV	0x8(%RSI),%R9

(368) 0x434e14 MOV	%R9,-0x50(%RBP)

(368) 0x434e18 SUB	%R8,%R9

(368) 0x434e1b VMOVSD	%XMM0,(%R8,%RBX,8)

(368) 0x434e21 INC	%RBX

(368) 0x434e24 SAR	$0x3,%R9

(368) 0x434e28 MOV	%RBX,-0x188(%RBP)

(368) 0x434e2f CMP	%R9,%RBX

(368) 0x434e32 JB	4341a0

0x434e38 ADD	$0x180,%RSP

0x434e3f POP	%RBX

0x434e40 POP	%R11

0x434e42 POP	%R12

0x434e44 POP	%R13

0x434e46 POP	%R14

0x434e48 POP	%R15

0x434e4a POP	%RBP

0x434e4b LEA	-0x8(%R11),%RSP

0x434e4f RET

  (369) 0x434e50 XOR	%R13D,%R13D

  (369) 0x434e53 XOR	%ECX,%ECX

  (369) 0x434e55 VXORPD	%XMM0,%XMM0,%XMM0

  (369) 0x434e59 JMP	4348e4

0x434e5e CALL	405c60 <_ZSt27__throw_bad_optional_accessv>

0x434e63 NOPW	%CS:(%RAX,%RAX,1)

0x434e6d NOPL	(%RAX)

Coverage (%)	Name	Source Location	Module
►96.58+	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:992	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_3

Source file and lines	TwoBodyJastrowRef.h:105-132
Module	exec

The function is defined in:

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/refwrap.h:351
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:105-109,125-132
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h:993,1131,1147-1150
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:231-260
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:221-223,249
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/optional:991-993

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 4.50 to 0.32 cycles (14.10x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

std::__throw_bad_optional_access(): 1 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/optional:993

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

PUSH: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:105

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 28 bytes. The binary function is storing 32 bytes.

General properties

nb instructions	37
nb uops	36
loop length	138
used x86 registers	13
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	5

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	4.50 cycles
front end	4.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	1.67	1.67	1.67	1.67	1.67	1.67	2.25	2.25	2.25	2.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	1.67	1.67	1.67	1.67	1.67	1.67	2.25	2.25	2.25	2.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	4.50
Dispatch	2.25
Overall L1	4.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	11%
load	9%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 4.50 cycles. At this rate:

2% of peak load performance is reached (6.22 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (7.11 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 4.50 to 2.25 cycles (2.00x speedup).

ASM code

In the binary file, the address of the function is: 434140

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
LEA 0x8(%RSP),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
AND $-0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSHQ -0x8(%R10)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	1	0.71	N/A
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R10	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x180,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV 0x8(%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,-0x1a8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
CMP %RAX,(%RDX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 434e38 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0xcf8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RDI,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOVSXD 0x2a0(%RSI),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (6.3%)
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RDX,-0x188(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R13,-0x1b0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RDI,-0x190(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x180,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R11	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA -0x8(%R11),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
CALL 405c60 <_ZSt27__throw_bad_optional_accessv>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_3

Source file and lines	TwoBodyJastrowRef.h:105-132
Module	exec

The function is defined in:

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/refwrap.h:351
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:105-109,125-132
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h:993,1131,1147-1150
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:231-260
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:221-223,249
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/optional:991-993

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

std::__throw_bad_optional_access(): 1 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/optional:993

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

PUSH: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:105

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 28 bytes. The binary function is storing 32 bytes.

General properties

nb instructions	37
nb uops	36
loop length	138
used x86 registers	13
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	5

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	4.50 cycles
front end	4.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	1.67	1.67	1.67	1.67	1.67	1.67	2.25	2.25	2.25	2.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	1.67	1.67	1.67	1.67	1.67	1.67	2.25	2.25	2.25	2.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	4.50
Dispatch	2.25
Overall L1	4.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	11%
load	9%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 4.50 cycles. At this rate:

2% of peak load performance is reached (6.22 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (7.11 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 434140

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
LEA 0x8(%RSP),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
AND $-0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSHQ -0x8(%R10)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	1	0.71	N/A
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R10	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x180,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV 0x8(%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,-0x1a8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
CMP %RAX,(%RDX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 434e38 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0xcf8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RDI,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOVSXD 0x2a0(%RSI),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (6.3%)
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RDX,-0x188(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R13,-0x1b0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RDI,-0x190(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x180,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R11	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA -0x8(%R11),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
CALL 405c60 <_ZSt27__throw_bad_optional_accessv>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)–	1.16	1.92
▼Loop 368 - TwoBodyJastrowRef.h:107-132 - exec–	0.01	0.01
▼Loop 369 - TwoBodyJastrowRef.h:127-132 - exec–	0.02	0.03
○Loop 370 - BsplineFunctor.h:236-241 - exec	1.09	1.79
○Loop 371 - BsplineFunctor.h:246-260 - exec	0.04	0.07

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