OV - exec - Function miniqmcreference::OneBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector<double, std::allocator<double> >&)

	Function: miniqmcreference::OneBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateRatios( ...	Module: exec	Source: stl_vector.h:919-1064 [...]	Coverage (incl. loops): 0.03% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 313 - 316

--------------------------------------------------------------------------------

313:   inline int first(int igroup) const { return (*group_offsets_)[igroup]; }

314:

315:   ///return the last index of a group i

316:   inline int last(int igroup) const { return (*group_offsets_)[igroup + 1]; }

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h: 134 - 155

--------------------------------------------------------------------------------

134:     for (int k = 0; k < ratios.size(); ++k)

135:       ratios[k] = std::exp(Vat[VP.refPtcl] - computeU(VP.getDistTableAB(myTableID).getDistRow(k).data()));

136:   }

137:

138:   inline valT computeU(const valT* dist)

139:   {

140:     valT curVat(0);

141:     if (NumGroups > 0)

142:     {

143:       for (int jg = 0; jg < NumGroups; ++jg)

144:       {

145:         if (F[jg] != nullptr)

146:           curVat += F[jg]->evaluateV(-1, Ions.first(jg), Ions.last(jg), dist, DistCompressed.data());

147:       }

148:     }

149:     else

150:     {

151:       for (int c = 0; c < Nions; ++c)

152:       {

153:         int gid = Ions.GroupID[c];

154:         if (F[gid] != nullptr)

155:           curVat += F[gid]->evaluate(dist[c]);

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 166 - 260

--------------------------------------------------------------------------------

166:     if (r >= cutoff_radius)

167:       return 0.0;

168:     r *= DeltaRInv;

169:     real_type ipart, t;

170:     t     = std::modf(r, &ipart);

171:     int i = (int)ipart;

172:     real_type tp[4];

173:     tp[0] = t * t * t;

[...]

179:       (SplineCoefs[i+0]*(A[ 0]*tp[0] + A[ 1]*tp[1] + A[ 2]*tp[2] + A[ 3]*tp[3])+

180:        SplineCoefs[i+1]*(A[ 4]*tp[0] + A[ 5]*tp[1] + A[ 6]*tp[2] + A[ 7]*tp[3])+

181:        SplineCoefs[i+2]*(A[ 8]*tp[0] + A[ 9]*tp[1] + A[10]*tp[2] + A[11]*tp[3])+

182:        SplineCoefs[i+3]*(A[12]*tp[0] + A[13]*tp[1] + A[14]*tp[2] + A[15]*tp[3]));

[...]

236:   for (int jat = 0; jat < iLimit; jat++)

237:   {

238:     real_type r = distArray[jat];

239:     // pick the distances smaller than the cutoff and avoid the reference atom

240:     if (r < cutoff_radius && iStart + jat != iat)

241:       distArrayCompressed[iCount++] = distArray[jat];

242:   }

243:

244:   real_type d = 0.0;

245:   //#pragma omp simd reduction(+:d)

246:   for (int jat = 0; jat < iCount; jat++)

247:   {

248:     real_type r = distArrayCompressed[jat];

249:     r *= DeltaRInv;

250:     int i         = (int)r;

251:     real_type t   = r - real_type(i);

252:     real_type tp0 = t * t * t;

253:     real_type tp1 = t * t;

254:     real_type tp2 = t;

255:

256:     real_type d1 = SplineCoefs[i + 0] * (A[0] * tp0 + A[1] * tp1 + A[2] * tp2 + A[3]);

257:     real_type d2 = SplineCoefs[i + 1] * (A[4] * tp0 + A[5] * tp1 + A[6] * tp2 + A[7]);

258:     real_type d3 = SplineCoefs[i + 2] * (A[8] * tp0 + A[9] * tp1 + A[10] * tp2 + A[11]);

259:     real_type d4 = SplineCoefs[i + 3] * (A[12] * tp0 + A[13] * tp1 + A[14] * tp2 + A[15]);

260:     d += (d1 + d2 + d3 + d4);

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/shared_ptr_base.h: 1296 - 1296

--------------------------------------------------------------------------------

1296:       { return _M_ptr; }

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h: 919 - 1064

--------------------------------------------------------------------------------

919:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1046: 	return *(this->_M_impl._M_start + __n);

[...]

1064: 	return *(this->_M_impl._M_start + __n);

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 249

--------------------------------------------------------------------------------

223:     return X[i];

[...]

249:   inline const_pointer data() const { return X; }

0x234900 MOV	0x8(%RDX),%RAX

0x234904 CMP	%RAX,(%RDX)

0x234907 JE	2351dc

0x23490d PUSH	%RBP

0x23490e MOV	%RSP,%RBP

0x234911 PUSH	%R15

0x234913 PUSH	%R14

0x234915 PUSH	%R13

0x234917 PUSH	%R12

0x234919 PUSH	%RBX

0x23491a SUB	$0x128,%RSP

0x234921 MOV	%RDI,-0x30(%RBP)

0x234925 MOV	%RSI,-0x58(%RBP)

0x234929 MOV	%RDX,-0x50(%RBP)

0x23492d XOR	%R15D,%R15D

0x234930 XOR	%R14D,%R14D

0x234933 JMP	23497b

(199) 0x234935 VXORPD	%XMM14,%XMM14,%XMM14

(199) 0x23493a NOPW	(%RAX,%RAX,1)

(199) 0x234940 VMOVSD	-0x60(%RBP),%XMM0

(199) 0x234945 VSUBSD	%XMM14,%XMM0,%XMM0

(199) 0x23494a CALL	2dc5a0 <@plt_start@+0x360>

(199) 0x23494f MOV	-0x50(%RBP),%RAX

(199) 0x234953 MOV	-0x68(%RBP),%R14

(199) 0x234957 MOV	(%RAX),%RCX

(199) 0x23495a MOV	-0x50(%RBP),%RAX

(199) 0x23495e VMOVSD	%XMM0,(%RCX,%R14,8)

(199) 0x234964 INC	%R14

(199) 0x234967 MOV	0x8(%RAX),%RAX

(199) 0x23496b SUB	%RCX,%RAX

(199) 0x23496e SAR	$0x3,%RAX

(199) 0x234972 CMP	%R14,%RAX

(199) 0x234975 JBE	2351cb

(199) 0x23497b MOV	-0x58(%RBP),%RAX

(199) 0x23497f MOV	-0x30(%RBP),%RDX

(199) 0x234983 MOV	-0x58(%RBP),%RDI

(199) 0x234987 MOVSXD	0x2a0(%RAX),%RCX

(199) 0x23498e MOV	0xf0(%RDX),%RAX

(199) 0x234995 VMOVSD	(%RAX,%RCX,8),%XMM0

(199) 0x23499a MOV	-0x30(%RBP),%RCX

(199) 0x23499e MOV	0xa8(%RCX),%ESI

(199) 0x2349a4 VMOVSD	%XMM0,-0x60(%RBP)

(199) 0x2349a9 CALL	26f850 <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>

(199) 0x2349ae MOV	0x48(%RAX),%RAX

(199) 0x2349b2 LEA	(%R14,%R14,4),%RCX

(199) 0x2349b6 MOV	%R14,-0x68(%RBP)

(199) 0x2349ba MOV	0x18(%RAX,%RCX,8),%RAX

(199) 0x2349bf MOV	-0x30(%RBP),%RCX

(199) 0x2349c3 MOV	%RAX,-0x48(%RBP)

(199) 0x2349c7 MOV	0x98(%RCX),%EAX

(199) 0x2349cd TEST	%EAX,%EAX

(199) 0x2349cf JLE	235060

(199) 0x2349d5 MOV	-0x30(%RBP),%RCX

(199) 0x2349d9 MOV	-0x30(%RBP),%RSI

(199) 0x2349dd MOV	-0x30(%RBP),%RDX

(199) 0x2349e1 VXORPD	%XMM14,%XMM14,%XMM14

(199) 0x2349e6 VPCMPEQD	%XMM13,%XMM13,%XMM13

(199) 0x2349eb XOR	%EDI,%EDI

(199) 0x2349ed MOV	0xa0(%RDX),%R12

(199) 0x2349f4 MOV	0x1c8(%RCX),%RCX

(199) 0x2349fb MOV	0x148(%RSI),%RSI

(199) 0x234a02 MOV	%R12,-0x38(%RBP)

(199) 0x234a06 JMP	234a21

0x234a08 NOPL	(%RAX,%RAX,1)

  (201) 0x234a10 VADDSD	%XMM14,%XMM15,%XMM14

  (201) 0x234a15 INC	%RDI

  (201) 0x234a18 CMP	%RAX,%RDI

  (201) 0x234a1b JE	234940

  (201) 0x234a21 MOV	(%RCX,%RDI,8),%R9

  (201) 0x234a25 TEST	%R9,%R9

  (201) 0x234a28 JE	234a70

  (201) 0x234a2a MOV	0x268(%R12),%R8

  (201) 0x234a32 VXORPD	%XMM15,%XMM15,%XMM15

  (201) 0x234a37 MOV	0x18(%R8),%R8

  (201) 0x234a3b MOVSXD	(%R8,%RDI,4),%R11

  (201) 0x234a3f MOV	0x4(%R8,%RDI,4),%R10D

  (201) 0x234a44 SUB	%R11D,%R10D

  (201) 0x234a47 JLE	234a10

  (201) 0x234a49 VMOVSD	0x8(%R9),%XMM0

  (201) 0x234a4f MOV	%R10D,%R8D

  (201) 0x234a52 CMP	$0x1,%R10D

  (201) 0x234a56 JNE	234a7d

  (201) 0x234a58 XOR	%EBX,%EBX

  (201) 0x234a5a XOR	%R10D,%R10D

  (201) 0x234a5d JMP	234b90

0x234a62 NOPW	%CS:(%RAX,%RAX,1)

  (201) 0x234a70 INC	%RDI

  (201) 0x234a73 CMP	%RAX,%RDI

  (201) 0x234a76 JNE	234a21

(199) 0x234a78 JMP	234940

  (201) 0x234a7d VMOVDQA	-0x305a5(%RIP),%XMM3

  (201) 0x234a85 MOV	-0x48(%RBP),%RDX

  (201) 0x234a89 VMOVDDUP	%XMM0,%XMM1

  (201) 0x234a8d MOV	%R8D,%EBX

  (201) 0x234a90 AND	$-0x2,%EBX

  (201) 0x234a93 VPBROADCASTQ	%R11,%XMM2

  (201) 0x234a99 XOR	%R12D,%R12D

  (201) 0x234a9c XOR	%R10D,%R10D

  (201) 0x234a9f LEA	(%RDX,%R11,8),%R14

  (201) 0x234aa3 NOPW	%CS:(%RAX,%RAX,1)

    (202) 0x234ab0 VMOVUPD	(%R14,%R12,8),%XMM4

    (202) 0x234ab6 VPADDQ	%XMM2,%XMM3,%XMM5

    (202) 0x234aba VPADDQ	-0x308e4(%RIP){1to2},%XMM3,%XMM3

    (202) 0x234ac4 MOVSXD	%R10D,%R10

    (202) 0x234ac7 VPCMPNEQQ	%XMM13,%XMM5,%K1

    (202) 0x234ace VCMPPD	$0x1,%XMM1,%XMM4,%K1{%K1}

    (202) 0x234ad5 KMOVB	%K1,%R13D

    (202) 0x234ad9 VCOMPRESSPD	%XMM4,(%RSI,%R10,8){%K1}

    (202) 0x234ae0 POPCNT	%R13D,%R13D

    (202) 0x234ae5 KORTESTB	%K1,%K1

    (202) 0x234ae9 CMOVE	%R15D,%R13D

    (202) 0x234aed ADD	$0x2,%R12

    (202) 0x234af1 ADD	%R13D,%R10D

    (202) 0x234af4 CMP	%R12,%RBX

    (202) 0x234af7 JNE	234ab0

  (201) 0x234af9 MOV	-0x38(%RBP),%R12

  (201) 0x234afd CMP	%R8,%RBX

  (201) 0x234b00 JNE	234b90

  (201) 0x234b06 TEST	%R10D,%R10D

  (201) 0x234b09 JLE	234a10

  (201) 0x234b0f VMOVSD	0x238(%R9),%XMM16

  (201) 0x234b16 VMOVUPD	0x18(%R9),%XMM17

  (201) 0x234b20 VMOVSD	0x28(%R9),%XMM18

  (201) 0x234b27 VMOVSD	0x30(%R9),%XMM19

  (201) 0x234b2e VMOVSD	0x38(%R9),%XMM2

  (201) 0x234b34 VMOVSD	0x40(%R9),%XMM3

  (201) 0x234b3a VMOVSD	0x48(%R9),%XMM0

  (201) 0x234b40 VMOVSD	0x50(%R9),%XMM6

  (201) 0x234b46 VMOVSD	0x58(%R9),%XMM5

  (201) 0x234b4c VMOVSD	0x60(%R9),%XMM8

  (201) 0x234b52 VMOVSD	0x68(%R9),%XMM7

  (201) 0x234b58 VMOVSD	0x70(%R9),%XMM9

  (201) 0x234b5e VMOVUPD	0x78(%R9),%XMM4

  (201) 0x234b64 VMOVSD	0x88(%R9),%XMM30

  (201) 0x234b6b VMOVSD	0x90(%R9),%XMM31

  (201) 0x234b72 MOV	0x218(%R9),%R8

  (201) 0x234b79 MOV	%R10D,%R9D

  (201) 0x234b7c CMP	$0x4,%R10D

  (201) 0x234b80 JAE	234bda

  (201) 0x234b82 VXORPD	%XMM15,%XMM15,%XMM15

  (201) 0x234b87 XOR	%R10D,%R10D

  (201) 0x234b8a JMP	234f98

0x234b8f NOP

  (201) 0x234b90 LEA	(%RBX,%R11,1),%R14

  (201) 0x234b94 SAL	$0x3,%R11

  (201) 0x234b98 SUB	%RBX,%R8

  (201) 0x234b9b LEA	(%R11,%RBX,8),%R11

  (201) 0x234b9f ADD	-0x48(%RBP),%R11

  (201) 0x234ba3 NOT	%R14

  (201) 0x234ba6 XOR	%EBX,%EBX

  (201) 0x234ba8 JMP	234bbc

0x234baa NOPW	(%RAX,%RAX,1)

    (205) 0x234bb0 INC	%RBX

    (205) 0x234bb3 CMP	%RBX,%R8

    (205) 0x234bb6 JE	234b06

    (205) 0x234bbc CMP	%RBX,%R14

    (205) 0x234bbf JE	234bb0

    (205) 0x234bc1 VMOVSD	(%R11,%RBX,8),%XMM1

    (205) 0x234bc7 VUCOMISD	%XMM0,%XMM1

    (205) 0x234bcb JAE	234bb0

    (205) 0x234bcd MOVSXD	%R10D,%RDX

    (205) 0x234bd0 INC	%R10D

    (205) 0x234bd3 VMOVSD	%XMM1,(%RSI,%RDX,8)

    (205) 0x234bd8 JMP	234bb0

  (201) 0x234bda MOV	%R9D,%R11D

  (201) 0x234bdd SHR	$0x2,%R11D

  (201) 0x234be1 VMOVAPD	%XMM19,-0x120(%RBP)

  (201) 0x234be8 VMOVAPD	%XMM30,-0x110(%RBP)

  (201) 0x234bef VMOVAPD	%XMM31,-0x100(%RBP)

  (201) 0x234bf6 VMOVAPD	%XMM16,-0x150(%RBP)

  (201) 0x234bfd VMOVDDUP	%XMM16,%XMM15

  (201) 0x234c03 VMOVDDUP	%XMM17,%XMM16

  (201) 0x234c09 VMOVDDUP	%XMM18,%XMM1

  (201) 0x234c0f VMOVDDUP	%XMM19,%XMM19

  (201) 0x234c15 VMOVDDUP	%XMM2,%XMM20

  (201) 0x234c1b VMOVDDUP	%XMM3,%XMM21

  (201) 0x234c21 VMOVDDUP	%XMM0,%XMM22

  (201) 0x234c27 VMOVDDUP	%XMM6,%XMM23

  (201) 0x234c2d VMOVDDUP	%XMM5,%XMM24

  (201) 0x234c33 VMOVDDUP	%XMM8,%XMM25

  (201) 0x234c39 VMOVDDUP	%XMM7,%XMM26

  (201) 0x234c3f VMOVDDUP	%XMM9,%XMM27

  (201) 0x234c45 VMOVDDUP	%XMM4,%XMM28

  (201) 0x234c4b VMOVDDUP	%XMM30,%XMM30

  (201) 0x234c51 VMOVDDUP	%XMM31,%XMM31

  (201) 0x234c57 MOV	%R9D,%R10D

  (201) 0x234c5a VMOVAPD	%XMM17,-0x140(%RBP)

  (201) 0x234c61 VMOVAPD	%XMM3,-0xe0(%RBP)

  (201) 0x234c69 VMOVAPD	%XMM0,-0xc0(%RBP)

  (201) 0x234c71 AND	$-0x4,%R10D

  (201) 0x234c75 VSHUFPD	$0x3,%XMM17,%XMM17,%XMM17

  (201) 0x234c7c VSHUFPD	$0x3,%XMM4,%XMM4,%XMM29

  (201) 0x234c83 VXORPD	%XMM0,%XMM0,%XMM0

  (201) 0x234c87 VXORPD	%XMM3,%XMM3,%XMM3

  (201) 0x234c8b VMOVSD	%XMM14,-0x40(%RBP)

  (201) 0x234c90 VMOVAPD	%XMM18,-0x130(%RBP)

  (201) 0x234c97 VMOVAPD	%XMM2,-0xf0(%RBP)

  (201) 0x234c9f VMOVAPD	%XMM6,-0xb0(%RBP)

  (201) 0x234ca7 VMOVAPD	%XMM5,-0xd0(%RBP)

  (201) 0x234caf VMOVAPD	%XMM8,-0xa0(%RBP)

  (201) 0x234cb7 VMOVAPD	%XMM7,-0x90(%RBP)

  (201) 0x234cbf VMOVAPD	%XMM9,-0x80(%RBP)

  (201) 0x234cc4 XOR	%EBX,%EBX

  (201) 0x234cc6 SAL	$0x5,%R11

  (201) 0x234cca NOPW	(%RAX,%RAX,1)

    (203) 0x234cd0 VMULPD	(%RSI,%RBX,1),%XMM15,%XMM7

    (203) 0x234cd5 VMULPD	0x10(%RSI,%RBX,1),%XMM15,%XMM9

    (203) 0x234cdb VMOVAPD	%XMM1,%XMM18

    (203) 0x234ce1 VMOVAPD	%XMM1,%XMM6

    (203) 0x234ce5 ADD	$0x20,%RBX

    (203) 0x234ce9 VROUNDPD	$0xb,%XMM7,%XMM8

    (203) 0x234cef VROUNDPD	$0xb,%XMM9,%XMM10

    (203) 0x234cf5 VCVTTPD2DQ	%XMM7,%XMM13

    (203) 0x234cf9 VCVTTPD2DQ	%XMM9,%XMM14

    (203) 0x234cfe VSUBPD	%XMM8,%XMM7,%XMM8

    (203) 0x234d03 VSUBPD	%XMM10,%XMM9,%XMM7

    (203) 0x234d08 VPMOVSXDQ	%XMM13,%XMM2

    (203) 0x234d0d VPMOVSXDQ	%XMM14,%XMM5

    (203) 0x234d12 VMOVQ	%XMM2,%R14

    (203) 0x234d17 VPEXTRQ	$0x1,%XMM2,%R12

    (203) 0x234d1d VMOVQ	%XMM5,%R13

    (203) 0x234d22 VPEXTRQ	$0x1,%XMM5,%RDX

    (203) 0x234d28 VFMADD213PD	%XMM19,%XMM8,%XMM18

    (203) 0x234d2e VMULPD	%XMM8,%XMM8,%XMM12

    (203) 0x234d33 VFMADD213PD	%XMM19,%XMM7,%XMM6

    (203) 0x234d39 VMULPD	%XMM7,%XMM7,%XMM11

    (203) 0x234d3d VMOVSD	(%R8,%R14,8),%XMM2

    (203) 0x234d43 VMOVSD	(%R8,%R13,8),%XMM5

    (203) 0x234d49 VMOVHPD	(%R8,%R12,8),%XMM2,%XMM2

    (203) 0x234d4f VMOVHPD	(%R8,%RDX,8),%XMM5,%XMM5

    (203) 0x234d55 VMULPD	%XMM8,%XMM12,%XMM10

    (203) 0x234d5a VMULPD	%XMM7,%XMM11,%XMM9

    (203) 0x234d5e VFMADD231PD	%XMM17,%XMM12,%XMM18

    (203) 0x234d64 VFMADD231PD	%XMM17,%XMM11,%XMM6

    (203) 0x234d6a VFMADD231PD	%XMM16,%XMM10,%XMM18

    (203) 0x234d70 VFMADD231PD	%XMM16,%XMM9,%XMM6

    (203) 0x234d76 VFMADD213PD	%XMM0,%XMM2,%XMM18

    (203) 0x234d7c VPCMPEQD	%XMM2,%XMM2,%XMM2

    (203) 0x234d80 VFMADD213PD	%XMM3,%XMM5,%XMM6

    (203) 0x234d85 VMOVAPD	%XMM22,%XMM3

    (203) 0x234d8b VFMADD213PD	%XMM23,%XMM8,%XMM3

    (203) 0x234d91 VMOVAPD	%XMM22,%XMM5

    (203) 0x234d97 VFMADD213PD	%XMM23,%XMM7,%XMM5

    (203) 0x234d9d VPSUBD	%XMM2,%XMM13,%XMM0

    (203) 0x234da1 VPSUBD	%XMM2,%XMM14,%XMM2

    (203) 0x234da5 VPMOVSXDQ	%XMM0,%XMM0

    (203) 0x234daa VPMOVSXDQ	%XMM2,%XMM2

    (203) 0x234daf VMOVQ	%XMM0,%RDX

    (203) 0x234db4 VPEXTRQ	$0x1,%XMM0,%R14

    (203) 0x234dba VFMADD231PD	%XMM21,%XMM12,%XMM3

    (203) 0x234dc0 VMOVQ	%XMM2,%R12

    (203) 0x234dc5 VPEXTRQ	$0x1,%XMM2,%R13

    (203) 0x234dcb VFMADD231PD	%XMM21,%XMM11,%XMM5

    (203) 0x234dd1 VMOVSD	(%R8,%RDX,8),%XMM0

    (203) 0x234dd7 VMOVSD	(%R8,%R12,8),%XMM2

    (203) 0x234ddd VMOVHPD	(%R8,%R14,8),%XMM0,%XMM0

    (203) 0x234de3 VMOVHPD	(%R8,%R13,8),%XMM2,%XMM2

    (203) 0x234de9 VFMADD231PD	%XMM20,%XMM10,%XMM3

    (203) 0x234def VFMADD231PD	%XMM20,%XMM9,%XMM5

    (203) 0x234df5 VFMADD213PD	%XMM18,%XMM0,%XMM3

    (203) 0x234dfb VPBROADCASTD	-0x30d58(%RIP),%XMM0

    (203) 0x234e04 VFMADD213PD	%XMM6,%XMM2,%XMM5

    (203) 0x234e09 VMOVAPD	%XMM26,%XMM6

    (203) 0x234e0f VFMADD213PD	%XMM27,%XMM8,%XMM6

    (203) 0x234e15 VMOVAPD	%XMM26,%XMM18

    (203) 0x234e1b VFMADD213PD	%XMM27,%XMM7,%XMM18

    (203) 0x234e21 VFMADD213PD	%XMM31,%XMM30,%XMM8

    (203) 0x234e27 VFMADD213PD	%XMM31,%XMM30,%XMM7

    (203) 0x234e2d VFMADD231PD	%XMM25,%XMM12,%XMM6

    (203) 0x234e33 VFMADD231PD	%XMM25,%XMM11,%XMM18

    (203) 0x234e39 VFMADD231PD	%XMM12,%XMM29,%XMM8

    (203) 0x234e3f VFMADD231PD	%XMM11,%XMM29,%XMM7

    (203) 0x234e45 VPADDD	%XMM0,%XMM13,%XMM2

    (203) 0x234e49 VPADDD	%XMM0,%XMM14,%XMM0

    (203) 0x234e4d VFMADD231PD	%XMM24,%XMM10,%XMM6

    (203) 0x234e53 VFMADD231PD	%XMM24,%XMM9,%XMM18

    (203) 0x234e59 VFMADD231PD	%XMM10,%XMM28,%XMM8

    (203) 0x234e5f VFMADD231PD	%XMM9,%XMM28,%XMM7

    (203) 0x234e65 VPMOVSXDQ	%XMM2,%XMM2

    (203) 0x234e6a VPMOVSXDQ	%XMM0,%XMM0

    (203) 0x234e6f VMOVQ	%XMM2,%RDX

    (203) 0x234e74 VPEXTRQ	$0x1,%XMM2,%R14

    (203) 0x234e7a VMOVQ	%XMM0,%R13

    (203) 0x234e7f VPEXTRQ	$0x1,%XMM0,%R12

    (203) 0x234e85 VMOVSD	(%R8,%RDX,8),%XMM0

    (203) 0x234e8b VMOVSD	(%R8,%R13,8),%XMM2

    (203) 0x234e91 VMOVHPD	(%R8,%R14,8),%XMM0,%XMM0

    (203) 0x234e97 VMOVHPD	(%R8,%R12,8),%XMM2,%XMM2

    (203) 0x234e9d VFMADD213PD	%XMM3,%XMM0,%XMM6

    (203) 0x234ea2 VPBROADCASTD	-0x30dfb(%RIP),%XMM0

    (203) 0x234eab VFMADD213PD	%XMM5,%XMM2,%XMM18

    (203) 0x234eb1 VMOVAPD	%XMM7,%XMM3

    (203) 0x234eb5 VPADDD	%XMM0,%XMM13,%XMM2

    (203) 0x234eb9 VPADDD	%XMM0,%XMM14,%XMM0

    (203) 0x234ebd VPMOVSXDQ	%XMM2,%XMM2

    (203) 0x234ec2 VPMOVSXDQ	%XMM0,%XMM0

    (203) 0x234ec7 VMOVQ	%XMM2,%RDX

    (203) 0x234ecc VPEXTRQ	$0x1,%XMM2,%R14

    (203) 0x234ed2 VMOVQ	%XMM0,%R12

    (203) 0x234ed7 VPEXTRQ	$0x1,%XMM0,%R13

    (203) 0x234edd VMOVSD	(%R8,%RDX,8),%XMM0

    (203) 0x234ee3 VMOVHPD	(%R8,%R14,8),%XMM0,%XMM2

    (203) 0x234ee9 VMOVSD	(%R8,%R12,8),%XMM0

    (203) 0x234eef VMOVHPD	(%R8,%R13,8),%XMM0,%XMM5

    (203) 0x234ef5 VMOVAPD	%XMM8,%XMM0

    (203) 0x234ef9 VFMADD213PD	%XMM6,%XMM2,%XMM0

    (203) 0x234efe VFMADD213PD	%XMM18,%XMM5,%XMM3

    (203) 0x234f04 CMP	%RBX,%R11

    (203) 0x234f07 JNE	234cd0

  (201) 0x234f0d VADDPD	%XMM0,%XMM3,%XMM0

  (201) 0x234f11 VMOVSD	-0x40(%RBP),%XMM14

  (201) 0x234f16 VMOVAPD	-0x150(%RBP),%XMM16

  (201) 0x234f1d VMOVAPD	-0x140(%RBP),%XMM17

  (201) 0x234f24 VMOVAPD	-0x130(%RBP),%XMM18

  (201) 0x234f2b VMOVAPD	-0x120(%RBP),%XMM19

  (201) 0x234f32 VMOVAPD	-0x110(%RBP),%XMM30

  (201) 0x234f39 VMOVAPD	-0x100(%RBP),%XMM31

  (201) 0x234f40 VMOVAPD	-0xf0(%RBP),%XMM2

  (201) 0x234f48 VMOVAPD	-0xe0(%RBP),%XMM3

  (201) 0x234f50 VMOVAPD	-0xd0(%RBP),%XMM5

  (201) 0x234f58 VMOVAPD	-0xb0(%RBP),%XMM6

  (201) 0x234f60 VMOVAPD	-0xa0(%RBP),%XMM8

  (201) 0x234f68 VMOVAPD	-0x90(%RBP),%XMM7

  (201) 0x234f70 VMOVAPD	-0x80(%RBP),%XMM9

  (201) 0x234f75 MOV	-0x38(%RBP),%R12

  (201) 0x234f79 VPCMPEQD	%XMM13,%XMM13,%XMM13

  (201) 0x234f7e VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

  (201) 0x234f83 VADDSD	%XMM1,%XMM0,%XMM15

  (201) 0x234f87 VMOVAPD	-0xc0(%RBP),%XMM0

  (201) 0x234f8f CMP	%R9,%R10

  (201) 0x234f92 JE	234a10

  (201) 0x234f98 VUNPCKLPD	%XMM7,%XMM0,%XMM0

  (201) 0x234f9c VUNPCKLPD	%XMM8,%XMM3,%XMM3

  (201) 0x234fa1 VUNPCKLPD	%XMM9,%XMM6,%XMM7

  (201) 0x234fa6 VUNPCKLPD	%XMM5,%XMM2,%XMM8

  (201) 0x234faa NOPW	(%RAX,%RAX,1)

    (204) 0x234fb0 VMULSD	(%RSI,%R10,8),%XMM16,%XMM1

    (204) 0x234fb7 INC	%R10

    (204) 0x234fba VROUNDSD	$0xb,%XMM1,%XMM1,%XMM2

    (204) 0x234fc0 VCVTTSD2SI	%XMM1,%EDX

    (204) 0x234fc4 MOVSXD	%EDX,%R11

    (204) 0x234fc7 VSUBSD	%XMM2,%XMM1,%XMM1

    (204) 0x234fcb VMOVAPD	%XMM18,%XMM2

    (204) 0x234fd1 VMULSD	%XMM1,%XMM1,%XMM6

    (204) 0x234fd5 VMOVDDUP	%XMM1,%XMM5

    (204) 0x234fd9 VFMADD213SD	%XMM19,%XMM1,%XMM2

    (204) 0x234fdf VFMADD213PD	%XMM7,%XMM0,%XMM5

    (204) 0x234fe4 VMULSD	%XMM1,%XMM6,%XMM9

    (204) 0x234fe8 VMOVDDUP	%XMM6,%XMM6

    (204) 0x234fec VFMADD213SD	%XMM31,%XMM30,%XMM1

    (204) 0x234ff2 VMOVDDUP	%XMM9,%XMM9

    (204) 0x234ff7 VFMADD231PD	%XMM6,%XMM3,%XMM5

    (204) 0x234ffc VUNPCKLPD	%XMM6,%XMM9,%XMM10

    (204) 0x235000 VMULPD	%XMM17,%XMM10,%XMM11

    (204) 0x235006 VMULPD	%XMM4,%XMM10,%XMM6

    (204) 0x23500a VFMADD231PD	%XMM9,%XMM8,%XMM5

    (204) 0x23500f VMULPD	0x8(%R8,%R11,8),%XMM5,%XMM5

    (204) 0x235016 VADDSD	%XMM2,%XMM11,%XMM2

    (204) 0x23501a VSHUFPD	$0x1,%XMM11,%XMM11,%XMM12

    (204) 0x235020 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM9

    (204) 0x235025 VADDSD	%XMM6,%XMM1,%XMM1

    (204) 0x235029 VADDSD	%XMM2,%XMM12,%XMM2

    (204) 0x23502d VFMADD132SD	(%R8,%R11,8),%XMM15,%XMM2

    (204) 0x235033 VADDSD	%XMM1,%XMM9,%XMM1

    (204) 0x235037 VSHUFPD	$0x1,%XMM5,%XMM5,%XMM6

    (204) 0x23503c VADDSD	%XMM6,%XMM5,%XMM5

    (204) 0x235040 VADDSD	%XMM5,%XMM2,%XMM15

    (204) 0x235044 VFMADD231SD	0x18(%R8,%R11,8),%XMM1,%XMM15

    (204) 0x23504b CMP	%R10,%R9

    (204) 0x23504e JNE	234fb0

  (201) 0x235054 JMP	234a10

0x235059 NOPL	(%RAX)

(199) 0x235060 MOV	-0x30(%RBP),%RAX

(199) 0x235064 MOV	0x90(%RAX),%EBX

(199) 0x23506a TEST	%EBX,%EBX

(199) 0x23506c JLE	234935

(199) 0x235072 MOV	-0x30(%RBP),%RAX

(199) 0x235076 VXORPD	%XMM14,%XMM14,%XMM14

(199) 0x23507b XOR	%R14D,%R14D

(199) 0x23507e MOV	0xa0(%RAX),%RCX

(199) 0x235085 MOV	-0x30(%RBP),%RAX

(199) 0x235089 MOV	0x18(%RCX),%RCX

(199) 0x23508d MOV	0x1c8(%RAX),%R13

(199) 0x235094 MOV	%RCX,-0x38(%RBP)

(199) 0x235098 JMP	2350b0

0x23509a NOPW	(%RAX,%RAX,1)

  (200) 0x2350a0 VADDSD	%XMM0,%XMM14,%XMM14

  (200) 0x2350a4 INC	%R14

  (200) 0x2350a7 CMP	%R14,%RBX

  (200) 0x2350aa JE	234940

  (200) 0x2350b0 MOVSXD	(%RCX,%R14,4),%RAX

  (200) 0x2350b4 MOV	(%R13,%RAX,8),%R12

  (200) 0x2350b9 TEST	%R12,%R12

  (200) 0x2350bc JE	2350a4

  (200) 0x2350be MOV	-0x48(%RBP),%RAX

  (200) 0x2350c2 VMOVSD	0x8(%R12),%XMM2

  (200) 0x2350c9 VXORPD	%XMM0,%XMM0,%XMM0

  (200) 0x2350cd VMOVSD	(%RAX,%R14,8),%XMM1

  (200) 0x2350d3 VUCOMISD	%XMM1,%XMM2

  (200) 0x2350d7 JBE	2350a0

  (200) 0x2350d9 VMULSD	0x238(%R12),%XMM1,%XMM0

  (200) 0x2350e3 LEA	-0x70(%RBP),%RDI

  (200) 0x2350e7 VMOVSD	%XMM14,-0x40(%RBP)

  (200) 0x2350ec CALL	2dc5b0 <@plt_start@+0x370>

  (200) 0x2350f1 VMOVSD	0x18(%R12),%XMM3

  (200) 0x2350f8 VMOVSD	0x30(%R12),%XMM6

  (200) 0x2350ff VMULSD	%XMM0,%XMM0,%XMM1

  (200) 0x235103 VMOVSD	0x20(%R12),%XMM4

  (200) 0x23510a VCVTTSD2SI	-0x70(%RBP),%EAX

  (200) 0x23510f VMOVSD	0x28(%R12),%XMM5

  (200) 0x235116 MOV	0x218(%R12),%RCX

  (200) 0x23511e VMOVSD	-0x40(%RBP),%XMM14

  (200) 0x235123 VMOVHPD	0x40(%R12),%XMM3,%XMM3

  (200) 0x23512a VMOVHPD	0x50(%R12),%XMM6,%XMM6

  (200) 0x235131 VMOVHPD	0x38(%R12),%XMM4,%XMM4

  (200) 0x235138 VMULSD	%XMM0,%XMM1,%XMM2

  (200) 0x23513c VMOVDDUP	%XMM0,%XMM0

  (200) 0x235140 VUNPCKLPD	%XMM1,%XMM2,%XMM8

  (200) 0x235144 VUNPCKLPD	%XMM2,%XMM1,%XMM7

  (200) 0x235148 CLTQ

  (200) 0x23514a VFMADD231PD	%XMM8,%XMM3,%XMM6

  (200) 0x23514f VMOVHPD	0x48(%R12),%XMM5,%XMM3

  (200) 0x235156 VFMADD231PD	%XMM7,%XMM4,%XMM6

  (200) 0x23515b VFMADD213PD	%XMM6,%XMM0,%XMM3

  (200) 0x235160 VMULPD	(%RCX,%RAX,8),%XMM3,%XMM3

  (200) 0x235165 VUNPCKLPD	%XMM0,%XMM1,%XMM0

  (200) 0x235169 VMULPD	0x60(%R12),%XMM0,%XMM1

  (200) 0x235170 VMULPD	0x80(%R12),%XMM0,%XMM0

  (200) 0x23517a VSHUFPD	$0x1,%XMM3,%XMM3,%XMM4

  (200) 0x23517f VADDSD	%XMM3,%XMM4,%XMM3

  (200) 0x235183 VSHUFPD	$0x1,%XMM1,%XMM1,%XMM4

  (200) 0x235188 VFMADD231SD	0x58(%R12),%XMM2,%XMM1

  (200) 0x23518f VADDSD	%XMM4,%XMM1,%XMM1

  (200) 0x235193 VADDSD	0x70(%R12),%XMM1,%XMM1

  (200) 0x23519a VFMADD132SD	0x10(%RCX,%RAX,8),%XMM3,%XMM1

  (200) 0x2351a1 VSHUFPD	$0x1,%XMM0,%XMM0,%XMM3

  (200) 0x2351a6 VFMADD231SD	0x78(%R12),%XMM2,%XMM0

  (200) 0x2351ad VADDSD	%XMM3,%XMM0,%XMM0

  (200) 0x2351b1 VADDSD	0x90(%R12),%XMM0,%XMM0

  (200) 0x2351bb VFMADD132SD	0x18(%RCX,%RAX,8),%XMM1,%XMM0

  (200) 0x2351c2 MOV	-0x38(%RBP),%RCX

  (200) 0x2351c6 JMP	2350a0

0x2351cb ADD	$0x128,%RSP

0x2351d2 POP	%RBX

0x2351d3 POP	%R12

0x2351d5 POP	%R13

0x2351d7 POP	%R14

0x2351d9 POP	%R15

0x2351db POP	%RBP

0x2351dc RET

0x2351dd INT	$0x3

0x2351de INT	$0x3

0x2351df INT	$0x3

Coverage (%)	Name	Source Location	Module
►96.19+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:272	exec
○	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:135	exec
○	main.omp_outlined.64	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_launch_thread		libomp.so
○	__kmp_launch_worker(void*)		libomp.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.79+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:272	exec
○	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:135	exec
○	main.omp_outlined.64	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_fork_call		libomp.so
○	__kmpc_fork_call		libomp.so
○	main	miniqmc.cpp:411	exec
○	__libc_start_call_main		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_4

Source file and lines	stl_vector.h:919-1064
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:134-155
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:166-173,179-182,236-260
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/shared_ptr_base.h:1296
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:919,1046,1064
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,249

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 10% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 3.13 to 0.22 cycles (14.32x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 16 bytes. The binary function is storing 24 bytes.

General properties

nb instructions	34
nb uops	25
loop length	116
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	3

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	3.13 cycles
front end	3.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	1.00	1.00	1.00	1.00	1.00	1.00	1.25	1.25	1.25	1.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	1.00	1.00	1.00	1.00	1.00	1.00	1.25	1.25	1.25	1.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	3.13
Dispatch	1.25
Overall L1	3.13

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	8%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 3.13 cycles. At this rate:

2% of peak load performance is reached (5.12 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (7.68 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 3.13 to 1.25 cycles (2.50x speedup).

ASM code

In the binary file, the address of the function is: 234900

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
MOV 0x8(%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RAX,(%RDX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JE 2351dc <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x8dc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
JMP 23497b <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x7b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_4

Source file and lines	stl_vector.h:919-1064
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:134-155
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:166-173,179-182,236-260
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/shared_ptr_base.h:1296
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:919,1046,1064
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,249

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 16 bytes. The binary function is storing 24 bytes.

General properties

nb instructions	34
nb uops	25
loop length	116
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	3

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	3.13 cycles
front end	3.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	1.00	1.00	1.00	1.00	1.00	1.00	1.25	1.25	1.25	1.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	1.00	1.00	1.00	1.00	1.00	1.00	1.25	1.25	1.25	1.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	3.13
Dispatch	1.25
Overall L1	3.13

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	8%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 3.13 cycles. At this rate:

2% of peak load performance is reached (5.12 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (7.68 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 234900

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
MOV 0x8(%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RAX,(%RDX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JE 2351dc <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x8dc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
JMP 23497b <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x7b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::OneBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)–	0.03	0.06
▼Loop 199 - OneBodyJastrowRef.h:134-155 - exec–	0.01	0.01
▼Loop 201 - OneBodyJastrowRef.h:143-146 - exec–	0.00	0.01
○Loop 202 - BsplineFunctor.h:236-241 - exec	0.02	0.04
○Loop 204 - BsplineFunctor.h:246-260 - exec	0.00	0.01
○Loop 203 - BsplineFunctor.h:246-260 - exec	0.00	0.01
○Loop 205 - BsplineFunctor.h:236-241 - exec	0.00	0.00
○Loop 200 - BsplineFunctor.h:166-182 - exec	0.00	0.00

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code