OV - exec - Function miniqmcreference::TwoBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector<double, std::allocator<double> >&)

	Function: miniqmcreference::TwoBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateRatios( ...	Module: exec	Source: TwoBodyJastrowRef.h:106-132 [...]	Coverage (incl. loops): 1.18% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 313 - 316

--------------------------------------------------------------------------------

313:   inline int first(int igroup) const { return (*group_offsets_)[igroup]; }

314:

315:   ///return the last index of a group i

316:   inline int last(int igroup) const { return (*group_offsets_)[igroup + 1]; }

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/optional: 433 - 952

--------------------------------------------------------------------------------

433:       { return static_cast<const _Dp*>(this)->_M_payload._M_engaged; }

[...]

950: 	if (this->_M_is_engaged())

951: 	  return this->_M_get();

952: 	__throw_bad_optional_access();

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h: 106 - 132

--------------------------------------------------------------------------------

106:   {

107:     for (int k = 0; k < ratios.size(); ++k)

108:       ratios[k] = std::exp(Uat[VP.refPtcl] - computeU(VP.getRefPS(), VP.refPtcl, VP.getDistTableAB(myTableID).getDistRow(k).data()));

109:   }

[...]

126:     const int igt = P.GroupID[iat] * NumGroups;

127:     for (int jg = 0; jg < NumGroups; ++jg)

128:     {

129:       const FuncType& f2(*F[igt + jg]);

130:       int iStart = P.first(jg);

131:       int iEnd   = P.last(jg);

132:       curUat += f2.evaluateV(iat, iStart, iEnd, dist, DistCompressed.data());

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 236 - 260

--------------------------------------------------------------------------------

236:   for (int jat = 0; jat < iLimit; jat++)

237:   {

238:     real_type r = distArray[jat];

239:     // pick the distances smaller than the cutoff and avoid the reference atom

240:     if (r < cutoff_radius && iStart + jat != iat)

241:       distArrayCompressed[iCount++] = distArray[jat];

242:   }

243:

244:   real_type d = 0.0;

245:   //#pragma omp simd reduction(+:d)

246:   for (int jat = 0; jat < iCount; jat++)

247:   {

248:     real_type r = distArrayCompressed[jat];

249:     r *= DeltaRInv;

250:     int i         = (int)r;

251:     real_type t   = r - real_type(i);

252:     real_type tp0 = t * t * t;

253:     real_type tp1 = t * t;

254:     real_type tp2 = t;

255:

256:     real_type d1 = SplineCoefs[i + 0] * (A[0] * tp0 + A[1] * tp1 + A[2] * tp2 + A[3]);

257:     real_type d2 = SplineCoefs[i + 1] * (A[4] * tp0 + A[5] * tp1 + A[6] * tp2 + A[7]);

258:     real_type d3 = SplineCoefs[i + 2] * (A[8] * tp0 + A[9] * tp1 + A[10] * tp2 + A[11]);

259:     real_type d4 = SplineCoefs[i + 3] * (A[12] * tp0 + A[13] * tp1 + A[14] * tp2 + A[15]);

260:     d += (d1 + d2 + d3 + d4);

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h: 919 - 1064

--------------------------------------------------------------------------------

919:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1046: 	return *(this->_M_impl._M_start + __n);

[...]

1064: 	return *(this->_M_impl._M_start + __n);

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/refwrap.h: 338 - 338

--------------------------------------------------------------------------------

338:       { return *_M_data; }

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 229 - 229

--------------------------------------------------------------------------------

229:     return X[i];

0x23a000 PUSH	%RBP

0x23a001 MOV	%RSP,%RBP

0x23a004 PUSH	%R15

0x23a006 PUSH	%R14

0x23a008 PUSH	%R13

0x23a00a PUSH	%R12

0x23a00c PUSH	%RBX

0x23a00d SUB	$0x148,%RSP

0x23a014 MOV	0x8(%RDX),%RAX

0x23a018 CMP	%RAX,(%RDX)

0x23a01b JE	23a78c

0x23a021 XOR	%R14D,%R14D

0x23a024 XOR	%EAX,%EAX

0x23a026 MOV	%RDI,-0x30(%RBP)

0x23a02a MOV	%RSI,-0x38(%RBP)

0x23a02e MOV	%RDX,-0x48(%RBP)

0x23a032 MOV	%RAX,-0x40(%RBP)

0x23a036 JMP	23a083

0x23a038 NOPL	(%RAX,%RAX,1)

(274) 0x23a040 VXORPD	%XMM14,%XMM14,%XMM14

(274) 0x23a045 VMOVSD	-0x50(%RBP),%XMM0

(274) 0x23a04a VSUBSD	%XMM14,%XMM0,%XMM0

(274) 0x23a04f CALL	2dc5a0 <@plt_start@+0x360>

(274) 0x23a054 MOV	-0x48(%RBP),%RAX

(274) 0x23a058 MOV	-0x40(%RBP),%RDX

(274) 0x23a05c MOV	(%RAX),%RCX

(274) 0x23a05f MOV	-0x48(%RBP),%RAX

(274) 0x23a063 VMOVSD	%XMM0,(%RCX,%RDX,8)

(274) 0x23a068 INC	%RDX

(274) 0x23a06b MOV	0x8(%RAX),%RAX

(274) 0x23a06f MOV	%RDX,-0x40(%RBP)

(274) 0x23a073 SUB	%RCX,%RAX

(274) 0x23a076 SAR	$0x3,%RAX

(274) 0x23a07a CMP	%RDX,%RAX

(274) 0x23a07d JBE	23a78c

(274) 0x23a083 MOV	-0x38(%RBP),%RAX

(274) 0x23a087 CMPB	$0,0x298(%RAX)

(274) 0x23a08e JE	23a79e

(274) 0x23a094 MOV	-0x38(%RBP),%RAX

(274) 0x23a098 MOV	-0x30(%RBP),%RCX

(274) 0x23a09c MOV	-0x38(%RBP),%RDX

(274) 0x23a0a0 MOV	-0x38(%RBP),%RDI

(274) 0x23a0a4 MOVSXD	0x2a0(%RAX),%R15

(274) 0x23a0ab MOV	0xd8(%RCX),%RAX

(274) 0x23a0b2 MOV	-0x30(%RBP),%RCX

(274) 0x23a0b6 MOV	0x290(%RDX),%RBX

(274) 0x23a0bd VMOVSD	(%RAX,%R15,8),%XMM0

(274) 0x23a0c3 MOV	0x248(%RCX),%ESI

(274) 0x23a0c9 VMOVSD	%XMM0,-0x50(%RBP)

(274) 0x23a0ce CALL	26f850 <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>

(274) 0x23a0d3 MOV	-0x30(%RBP),%RCX

(274) 0x23a0d7 MOV	0xa0(%RCX),%RCX

(274) 0x23a0de TEST	%RCX,%RCX

(274) 0x23a0e1 JE	23a040

(274) 0x23a0e7 MOV	-0x40(%RBP),%RDX

(274) 0x23a0eb MOV	0x48(%RAX),%RAX

(274) 0x23a0ef MOV	-0x30(%RBP),%RDI

(274) 0x23a0f3 VPBROADCASTQ	%R15,%XMM15

(274) 0x23a0f9 VXORPD	%XMM14,%XMM14,%XMM14

(274) 0x23a0fe XOR	%R10D,%R10D

(274) 0x23a101 MOV	%R15,%R8

(274) 0x23a104 MOV	%R15,-0x58(%RBP)

(274) 0x23a108 VMOVDQA	%XMM15,-0x90(%RBP)

(274) 0x23a110 LEA	(%RDX,%RDX,4),%RDX

(274) 0x23a114 MOV	0x18(%RAX,%RDX,8),%RAX

(274) 0x23a119 MOV	-0x30(%RBP),%RDX

(274) 0x23a11d MOV	%RAX,-0x78(%RBP)

(274) 0x23a121 MOV	0x18(%RBX),%RAX

(274) 0x23a125 MOV	0x1d0(%RDX),%RSI

(274) 0x23a12c MOV	0x268(%RBX),%RDX

(274) 0x23a133 MOV	(%RAX,%R15,4),%EAX

(274) 0x23a137 IMUL	%ECX,%EAX

(274) 0x23a13a CLTQ

(274) 0x23a13c MOV	%RAX,-0x70(%RBP)

(274) 0x23a140 MOV	0x200(%RDI),%RAX

(274) 0x23a147 MOV	%RAX,-0x68(%RBP)

(274) 0x23a14b MOV	0x18(%RDX),%RAX

(274) 0x23a14f MOV	(%RAX),%R9D

(274) 0x23a152 MOV	%RAX,-0x80(%RBP)

(274) 0x23a156 JMP	23a170

0x23a158 NOPL	(%RAX,%RAX,1)

  (275) 0x23a160 VADDSD	%XMM0,%XMM14,%XMM14

  (275) 0x23a164 INC	%R10

  (275) 0x23a167 CMP	%RCX,%R10

  (275) 0x23a16a JE	23a045

  (275) 0x23a170 MOV	-0x80(%RBP),%RAX

  (275) 0x23a174 MOV	%R9D,%EDI

  (275) 0x23a177 VXORPD	%XMM0,%XMM0,%XMM0

  (275) 0x23a17b MOV	0x4(%RAX,%R10,4),%R9D

  (275) 0x23a180 MOV	%R9D,%EDX

  (275) 0x23a183 SUB	%EDI,%EDX

  (275) 0x23a185 JLE	23a160

  (275) 0x23a187 MOV	-0x70(%RBP),%RAX

  (275) 0x23a18b MOV	-0x68(%RBP),%R11

  (275) 0x23a18f MOVSXD	%EDI,%RDI

  (275) 0x23a192 MOV	%EDX,%EBX

  (275) 0x23a194 ADD	%R10,%RAX

  (275) 0x23a197 MOV	(%R11,%RAX,8),%RAX

  (275) 0x23a19b MOV	-0x78(%RBP),%R11

  (275) 0x23a19f VMOVSD	0x8(%RAX),%XMM2

  (275) 0x23a1a4 LEA	(%R11,%RDI,8),%R11

  (275) 0x23a1a8 CMP	$0x1,%EDX

  (275) 0x23a1ab JNE	23a1c0

  (275) 0x23a1ad XOR	%R12D,%R12D

  (275) 0x23a1b0 XOR	%EDX,%EDX

  (275) 0x23a1b2 JMP	23a2b0

0x23a1b7 NOPW	(%RAX,%RAX,1)

  (275) 0x23a1c0 VMOVDQA	-0x35ce8(%RIP),%XMM3

  (275) 0x23a1c8 VMOVDDUP	%XMM2,%XMM0

  (275) 0x23a1cc MOV	%EBX,%R12D

  (275) 0x23a1cf AND	$-0x2,%R12D

  (275) 0x23a1d3 VPBROADCASTQ	%RDI,%XMM1

  (275) 0x23a1d9 XOR	%R13D,%R13D

  (275) 0x23a1dc XOR	%EDX,%EDX

  (275) 0x23a1de XCHG	%AX,%AX

    (276) 0x23a1e0 VMOVUPD	(%R11,%R13,8),%XMM4

    (276) 0x23a1e6 VPADDQ	%XMM1,%XMM3,%XMM5

    (276) 0x23a1ea VPADDQ	-0x36014(%RIP){1to2},%XMM3,%XMM3

    (276) 0x23a1f4 MOVSXD	%EDX,%RDX

    (276) 0x23a1f7 VPCMPNEQQ	%XMM15,%XMM5,%K1

    (276) 0x23a1fe VCMPPD	$0x1,%XMM0,%XMM4,%K1{%K1}

    (276) 0x23a205 KMOVB	%K1,%R15D

    (276) 0x23a209 VCOMPRESSPD	%XMM4,(%RSI,%RDX,8){%K1}

    (276) 0x23a210 POPCNT	%R15D,%R15D

    (276) 0x23a215 KORTESTB	%K1,%K1

    (276) 0x23a219 CMOVE	%R14D,%R15D

    (276) 0x23a21d ADD	$0x2,%R13

    (276) 0x23a221 ADD	%R15D,%EDX

    (276) 0x23a224 CMP	%R13,%R12

    (276) 0x23a227 JNE	23a1e0

  (275) 0x23a229 CMP	%RBX,%R12

  (275) 0x23a22c JNE	23a2b0

  (275) 0x23a232 VXORPD	%XMM0,%XMM0,%XMM0

  (275) 0x23a236 TEST	%EDX,%EDX

  (275) 0x23a238 JLE	23a160

  (275) 0x23a23e VMOVSD	0x238(%RAX),%XMM16

  (275) 0x23a245 VMOVUPD	0x18(%RAX),%XMM19

  (275) 0x23a24f VMOVSD	0x28(%RAX),%XMM20

  (275) 0x23a256 VMOVSD	0x30(%RAX),%XMM21

  (275) 0x23a25d VMOVSD	0x38(%RAX),%XMM4

  (275) 0x23a262 VMOVSD	0x40(%RAX),%XMM5

  (275) 0x23a267 VMOVSD	0x48(%RAX),%XMM2

  (275) 0x23a26c VMOVSD	0x50(%RAX),%XMM8

  (275) 0x23a271 VMOVSD	0x58(%RAX),%XMM7

  (275) 0x23a276 VMOVSD	0x60(%RAX),%XMM9

  (275) 0x23a27b VMOVSD	0x68(%RAX),%XMM10

  (275) 0x23a280 VMOVSD	0x70(%RAX),%XMM11

  (275) 0x23a285 VMOVUPD	0x78(%RAX),%XMM6

  (275) 0x23a28a VMOVSD	0x88(%RAX),%XMM17

  (275) 0x23a291 VMOVSD	0x90(%RAX),%XMM18

  (275) 0x23a298 MOV	0x218(%RAX),%R11

  (275) 0x23a29f MOV	%EDX,%EAX

  (275) 0x23a2a1 CMP	$0x4,%EDX

  (275) 0x23a2a4 JAE	23a2e9

  (275) 0x23a2a6 XOR	%EBX,%EBX

  (275) 0x23a2a8 JMP	23a6c5

0x23a2ad NOPL	(%RAX)

  (275) 0x23a2b0 MOV	%R8,%R13

  (275) 0x23a2b3 SUB	%RDI,%R13

  (275) 0x23a2b6 JMP	23a2cc

0x23a2b8 NOPL	(%RAX,%RAX,1)

    (279) 0x23a2c0 INC	%R12

    (279) 0x23a2c3 CMP	%R12,%RBX

    (279) 0x23a2c6 JE	23a232

    (279) 0x23a2cc CMP	%R12,%R13

    (279) 0x23a2cf JE	23a2c0

    (279) 0x23a2d1 VMOVSD	(%R11,%R12,8),%XMM0

    (279) 0x23a2d7 VUCOMISD	%XMM2,%XMM0

    (279) 0x23a2db JAE	23a2c0

    (279) 0x23a2dd MOVSXD	%EDX,%RDI

    (279) 0x23a2e0 INC	%EDX

    (279) 0x23a2e2 VMOVSD	%XMM0,(%RSI,%RDI,8)

    (279) 0x23a2e7 JMP	23a2c0

  (275) 0x23a2e9 MOV	%EAX,%R12D

  (275) 0x23a2ec VMOVAPD	%XMM17,%XMM0

  (275) 0x23a2f2 VMOVAPD	%XMM18,%XMM1

  (275) 0x23a2f8 SHR	$0x2,%R12D

  (275) 0x23a2fc VMOVAPD	%XMM21,-0x140(%RBP)

  (275) 0x23a303 VMOVDDUP	%XMM16,%XMM17

  (275) 0x23a309 VMOVDDUP	%XMM19,%XMM18

  (275) 0x23a30f VMOVDDUP	%XMM20,%XMM3

  (275) 0x23a315 VMOVDDUP	%XMM21,%XMM21

  (275) 0x23a31b VMOVDDUP	%XMM4,%XMM22

  (275) 0x23a321 VMOVDDUP	%XMM5,%XMM23

  (275) 0x23a327 VMOVDDUP	%XMM2,%XMM24

  (275) 0x23a32d VMOVDDUP	%XMM8,%XMM25

  (275) 0x23a333 VMOVDDUP	%XMM7,%XMM26

  (275) 0x23a339 VMOVAPD	%XMM9,-0xc0(%RBP)

  (275) 0x23a341 VMOVDDUP	%XMM9,%XMM27

  (275) 0x23a347 VMOVAPD	%XMM10,-0xb0(%RBP)

  (275) 0x23a34f VMOVDDUP	%XMM10,%XMM28

  (275) 0x23a355 VMOVDDUP	%XMM11,%XMM29

  (275) 0x23a35b VMOVDDUP	%XMM6,%XMM30

  (275) 0x23a361 VMOVDDUP	%XMM0,%XMM9

  (275) 0x23a365 VMOVDDUP	%XMM1,%XMM10

  (275) 0x23a369 MOV	%EAX,%EBX

  (275) 0x23a36b VMOVAPD	%XMM19,-0x160(%RBP)

  (275) 0x23a372 VMOVAPD	%XMM5,-0x100(%RBP)

  (275) 0x23a37a VMOVAPD	%XMM2,-0xe0(%RBP)

  (275) 0x23a382 AND	$-0x4,%EBX

  (275) 0x23a385 VSHUFPD	$0x3,%XMM19,%XMM19,%XMM19

  (275) 0x23a38c VSHUFPD	$0x3,%XMM6,%XMM6,%XMM31

  (275) 0x23a393 VXORPD	%XMM2,%XMM2,%XMM2

  (275) 0x23a397 VXORPD	%XMM5,%XMM5,%XMM5

  (275) 0x23a39b VMOVSD	%XMM14,-0x60(%RBP)

  (275) 0x23a3a0 VMOVAPD	%XMM16,-0x170(%RBP)

  (275) 0x23a3a7 VMOVAPD	%XMM20,-0x150(%RBP)

  (275) 0x23a3ae VMOVAPD	%XMM4,-0x110(%RBP)

  (275) 0x23a3b6 VMOVAPD	%XMM8,-0xd0(%RBP)

  (275) 0x23a3be VMOVAPD	%XMM7,-0xf0(%RBP)

  (275) 0x23a3c6 VMOVAPD	%XMM11,-0xa0(%RBP)

  (275) 0x23a3ce VMOVAPD	%XMM0,-0x130(%RBP)

  (275) 0x23a3d6 VMOVAPD	%XMM1,-0x120(%RBP)

  (275) 0x23a3de XOR	%EDX,%EDX

  (275) 0x23a3e0 SAL	$0x5,%R12

  (275) 0x23a3e4 NOPW	%CS:(%RAX,%RAX,1)

    (277) 0x23a3f0 VMULPD	(%RSI,%RDX,1),%XMM17,%XMM11

    (277) 0x23a3f7 VMULPD	0x10(%RSI,%RDX,1),%XMM17,%XMM13

    (277) 0x23a3ff VMOVAPD	%XMM3,%XMM20

    (277) 0x23a405 VMOVAPD	%XMM3,%XMM8

    (277) 0x23a409 ADD	$0x20,%RDX

    (277) 0x23a40d VROUNDPD	$0xb,%XMM11,%XMM12

    (277) 0x23a413 VROUNDPD	$0xb,%XMM13,%XMM14

    (277) 0x23a419 VCVTTPD2DQ	%XMM11,%XMM1

    (277) 0x23a41e VCVTTPD2DQ	%XMM13,%XMM0

    (277) 0x23a423 VSUBPD	%XMM12,%XMM11,%XMM12

    (277) 0x23a428 VSUBPD	%XMM14,%XMM13,%XMM11

    (277) 0x23a42d VPMOVSXDQ	%XMM1,%XMM4

    (277) 0x23a432 VPMOVSXDQ	%XMM0,%XMM7

    (277) 0x23a437 VMOVQ	%XMM4,%RDI

    (277) 0x23a43c VPEXTRQ	$0x1,%XMM4,%R15

    (277) 0x23a442 VMOVQ	%XMM7,%R13

    (277) 0x23a447 VPEXTRQ	$0x1,%XMM7,%R8

    (277) 0x23a44d VFMADD213PD	%XMM21,%XMM12,%XMM20

    (277) 0x23a453 VMULPD	%XMM12,%XMM12,%XMM16

    (277) 0x23a459 VFMADD213PD	%XMM21,%XMM11,%XMM8

    (277) 0x23a45f VMULPD	%XMM11,%XMM11,%XMM15

    (277) 0x23a464 VMOVSD	(%R11,%RDI,8),%XMM4

    (277) 0x23a46a VMOVSD	(%R11,%R13,8),%XMM7

    (277) 0x23a470 VMOVHPD	(%R11,%R15,8),%XMM4,%XMM4

    (277) 0x23a476 VMOVHPD	(%R11,%R8,8),%XMM7,%XMM7

    (277) 0x23a47c VMULPD	%XMM12,%XMM16,%XMM14

    (277) 0x23a482 VMULPD	%XMM11,%XMM15,%XMM13

    (277) 0x23a487 VFMADD231PD	%XMM19,%XMM16,%XMM20

    (277) 0x23a48d VFMADD231PD	%XMM19,%XMM15,%XMM8

    (277) 0x23a493 VFMADD231PD	%XMM18,%XMM14,%XMM20

    (277) 0x23a499 VFMADD231PD	%XMM18,%XMM13,%XMM8

    (277) 0x23a49f VFMADD213PD	%XMM2,%XMM4,%XMM20

    (277) 0x23a4a5 VPCMPEQD	%XMM4,%XMM4,%XMM4

    (277) 0x23a4a9 VFMADD213PD	%XMM5,%XMM7,%XMM8

    (277) 0x23a4ae VMOVAPD	%XMM24,%XMM5

    (277) 0x23a4b4 VFMADD213PD	%XMM25,%XMM12,%XMM5

    (277) 0x23a4ba VMOVAPD	%XMM24,%XMM7

    (277) 0x23a4c0 VFMADD213PD	%XMM25,%XMM11,%XMM7

    (277) 0x23a4c6 VPSUBD	%XMM4,%XMM1,%XMM2

    (277) 0x23a4ca VPSUBD	%XMM4,%XMM0,%XMM4

    (277) 0x23a4ce VPMOVSXDQ	%XMM2,%XMM2

    (277) 0x23a4d3 VPMOVSXDQ	%XMM4,%XMM4

    (277) 0x23a4d8 VMOVQ	%XMM2,%RDI

    (277) 0x23a4dd VPEXTRQ	$0x1,%XMM2,%R8

    (277) 0x23a4e3 VFMADD231PD	%XMM23,%XMM16,%XMM5

    (277) 0x23a4e9 VMOVQ	%XMM4,%R15

    (277) 0x23a4ee VPEXTRQ	$0x1,%XMM4,%R13

    (277) 0x23a4f4 VFMADD231PD	%XMM23,%XMM15,%XMM7

    (277) 0x23a4fa VMOVSD	(%R11,%RDI,8),%XMM2

    (277) 0x23a500 VMOVSD	(%R11,%R15,8),%XMM4

    (277) 0x23a506 VMOVHPD	(%R11,%R8,8),%XMM2,%XMM2

    (277) 0x23a50c VMOVHPD	(%R11,%R13,8),%XMM4,%XMM4

    (277) 0x23a512 VFMADD231PD	%XMM22,%XMM14,%XMM5

    (277) 0x23a518 VFMADD231PD	%XMM22,%XMM13,%XMM7

    (277) 0x23a51e VFMADD213PD	%XMM20,%XMM2,%XMM5

    (277) 0x23a524 VPBROADCASTD	-0x36481(%RIP),%XMM2

    (277) 0x23a52d VFMADD213PD	%XMM8,%XMM4,%XMM7

    (277) 0x23a532 VMOVAPD	%XMM28,%XMM8

    (277) 0x23a538 VFMADD213PD	%XMM29,%XMM12,%XMM8

    (277) 0x23a53e VMOVAPD	%XMM28,%XMM20

    (277) 0x23a544 VFMADD213PD	%XMM29,%XMM11,%XMM20

    (277) 0x23a54a VFMADD213PD	%XMM10,%XMM9,%XMM12

    (277) 0x23a54f VFMADD213PD	%XMM10,%XMM9,%XMM11

    (277) 0x23a554 VFMADD231PD	%XMM27,%XMM16,%XMM8

    (277) 0x23a55a VFMADD231PD	%XMM27,%XMM15,%XMM20

    (277) 0x23a560 VFMADD231PD	%XMM16,%XMM31,%XMM12

    (277) 0x23a566 VFMADD231PD	%XMM15,%XMM31,%XMM11

    (277) 0x23a56c VPADDD	%XMM2,%XMM1,%XMM4

    (277) 0x23a570 VPADDD	%XMM2,%XMM0,%XMM2

    (277) 0x23a574 VFMADD231PD	%XMM26,%XMM14,%XMM8

    (277) 0x23a57a VFMADD231PD	%XMM26,%XMM13,%XMM20

    (277) 0x23a580 VFMADD231PD	%XMM14,%XMM30,%XMM12

    (277) 0x23a586 VFMADD231PD	%XMM13,%XMM30,%XMM11

    (277) 0x23a58c VPMOVSXDQ	%XMM4,%XMM4

    (277) 0x23a591 VPMOVSXDQ	%XMM2,%XMM2

    (277) 0x23a596 VMOVQ	%XMM4,%RDI

    (277) 0x23a59b VPEXTRQ	$0x1,%XMM4,%R8

    (277) 0x23a5a1 VMOVQ	%XMM2,%R13

    (277) 0x23a5a6 VPEXTRQ	$0x1,%XMM2,%R15

    (277) 0x23a5ac VMOVSD	(%R11,%RDI,8),%XMM2

    (277) 0x23a5b2 VMOVSD	(%R11,%R13,8),%XMM4

    (277) 0x23a5b8 VMOVHPD	(%R11,%R8,8),%XMM2,%XMM2

    (277) 0x23a5be VMOVHPD	(%R11,%R15,8),%XMM4,%XMM4

    (277) 0x23a5c4 VFMADD213PD	%XMM5,%XMM2,%XMM8

    (277) 0x23a5c9 VPBROADCASTD	-0x36522(%RIP),%XMM2

    (277) 0x23a5d2 VFMADD213PD	%XMM7,%XMM4,%XMM20

    (277) 0x23a5d8 VMOVAPD	%XMM11,%XMM5

    (277) 0x23a5dc VPADDD	%XMM2,%XMM1,%XMM1

    (277) 0x23a5e0 VPADDD	%XMM2,%XMM0,%XMM0

    (277) 0x23a5e4 VMOVAPD	%XMM12,%XMM2

    (277) 0x23a5e8 VPMOVSXDQ	%XMM1,%XMM1

    (277) 0x23a5ed VPMOVSXDQ	%XMM0,%XMM0

    (277) 0x23a5f2 VMOVQ	%XMM1,%RDI

    (277) 0x23a5f7 VMOVQ	%XMM0,%R15

    (277) 0x23a5fc VPEXTRQ	$0x1,%XMM1,%R8

    (277) 0x23a602 VPEXTRQ	$0x1,%XMM0,%R13

    (277) 0x23a608 VMOVSD	(%R11,%RDI,8),%XMM0

    (277) 0x23a60e VMOVSD	(%R11,%R15,8),%XMM1

    (277) 0x23a614 VMOVHPD	(%R11,%R8,8),%XMM0,%XMM0

    (277) 0x23a61a VMOVHPD	(%R11,%R13,8),%XMM1,%XMM1

    (277) 0x23a620 VFMADD213PD	%XMM8,%XMM0,%XMM2

    (277) 0x23a625 VFMADD213PD	%XMM20,%XMM1,%XMM5

    (277) 0x23a62b CMP	%RDX,%R12

    (277) 0x23a62e JNE	23a3f0

  (275) 0x23a634 VADDPD	%XMM2,%XMM5,%XMM0

  (275) 0x23a638 VMOVSD	-0x60(%RBP),%XMM14

  (275) 0x23a63d VMOVDQA	-0x90(%RBP),%XMM15

  (275) 0x23a645 VMOVAPD	-0x170(%RBP),%XMM16

  (275) 0x23a64c VMOVAPD	-0x160(%RBP),%XMM19

  (275) 0x23a653 VMOVAPD	-0x150(%RBP),%XMM20

  (275) 0x23a65a VMOVAPD	-0x140(%RBP),%XMM21

  (275) 0x23a661 VMOVAPD	-0x130(%RBP),%XMM17

  (275) 0x23a668 VMOVAPD	-0x120(%RBP),%XMM18

  (275) 0x23a66f VMOVAPD	-0x110(%RBP),%XMM4

  (275) 0x23a677 VMOVAPD	-0x100(%RBP),%XMM5

  (275) 0x23a67f VMOVAPD	-0xf0(%RBP),%XMM7

  (275) 0x23a687 VMOVAPD	-0xe0(%RBP),%XMM2

  (275) 0x23a68f VMOVAPD	-0xd0(%RBP),%XMM8

  (275) 0x23a697 VMOVAPD	-0xc0(%RBP),%XMM9

  (275) 0x23a69f VMOVAPD	-0xb0(%RBP),%XMM10

  (275) 0x23a6a7 VMOVAPD	-0xa0(%RBP),%XMM11

  (275) 0x23a6af MOV	-0x58(%RBP),%R8

  (275) 0x23a6b3 VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

  (275) 0x23a6b8 VADDSD	%XMM1,%XMM0,%XMM0

  (275) 0x23a6bc CMP	%RAX,%RBX

  (275) 0x23a6bf JE	23a160

  (275) 0x23a6c5 VUNPCKLPD	%XMM10,%XMM2,%XMM1

  (275) 0x23a6ca VUNPCKLPD	%XMM9,%XMM5,%XMM5

  (275) 0x23a6cf VUNPCKLPD	%XMM11,%XMM8,%XMM2

  (275) 0x23a6d4 VUNPCKLPD	%XMM7,%XMM4,%XMM9

  (275) 0x23a6d8 NOPL	(%RAX,%RAX,1)

    (278) 0x23a6e0 VMULSD	(%RSI,%RBX,8),%XMM16,%XMM3

    (278) 0x23a6e7 INC	%RBX

    (278) 0x23a6ea VROUNDSD	$0xb,%XMM3,%XMM3,%XMM4

    (278) 0x23a6f0 VCVTTSD2SI	%XMM3,%EDX

    (278) 0x23a6f4 MOVSXD	%EDX,%RDX

    (278) 0x23a6f7 VSUBSD	%XMM4,%XMM3,%XMM3

    (278) 0x23a6fb VMOVAPD	%XMM20,%XMM4

    (278) 0x23a701 VMULSD	%XMM3,%XMM3,%XMM8

    (278) 0x23a705 VMOVDDUP	%XMM3,%XMM7

    (278) 0x23a709 VFMADD213SD	%XMM21,%XMM3,%XMM4

    (278) 0x23a70f VFMADD213PD	%XMM2,%XMM1,%XMM7

    (278) 0x23a714 VMULSD	%XMM3,%XMM8,%XMM10

    (278) 0x23a718 VMOVDDUP	%XMM8,%XMM8

    (278) 0x23a71d VFMADD213SD	%XMM18,%XMM17,%XMM3

    (278) 0x23a723 VMOVDDUP	%XMM10,%XMM10

    (278) 0x23a728 VFMADD231PD	%XMM8,%XMM5,%XMM7

    (278) 0x23a72d VUNPCKLPD	%XMM8,%XMM10,%XMM11

    (278) 0x23a732 VMULPD	%XMM19,%XMM11,%XMM12

    (278) 0x23a738 VMULPD	%XMM6,%XMM11,%XMM8

    (278) 0x23a73c VFMADD231PD	%XMM10,%XMM9,%XMM7

    (278) 0x23a741 VMULPD	0x8(%R11,%RDX,8),%XMM7,%XMM7

    (278) 0x23a748 VADDSD	%XMM4,%XMM12,%XMM4

    (278) 0x23a74c VSHUFPD	$0x1,%XMM12,%XMM12,%XMM13

    (278) 0x23a752 VADDSD	%XMM3,%XMM8,%XMM3

    (278) 0x23a756 VSHUFPD	$0x1,%XMM8,%XMM8,%XMM10

    (278) 0x23a75c VADDSD	%XMM4,%XMM13,%XMM4

    (278) 0x23a760 VFMADD132SD	(%R11,%RDX,8),%XMM0,%XMM4

    (278) 0x23a766 VADDSD	%XMM3,%XMM10,%XMM3

    (278) 0x23a76a VSHUFPD	$0x1,%XMM7,%XMM7,%XMM0

    (278) 0x23a76f VADDSD	%XMM0,%XMM7,%XMM0

    (278) 0x23a773 VADDSD	%XMM0,%XMM4,%XMM0

    (278) 0x23a777 VFMADD231SD	0x18(%R11,%RDX,8),%XMM3,%XMM0

    (278) 0x23a77e CMP	%RBX,%RAX

    (278) 0x23a781 JNE	23a6e0

  (275) 0x23a787 JMP	23a160

0x23a78c ADD	$0x148,%RSP

0x23a793 POP	%RBX

0x23a794 POP	%R12

0x23a796 POP	%R13

0x23a798 POP	%R14

0x23a79a POP	%R15

0x23a79c POP	%RBP

0x23a79d RET

0x23a79e CALL	23b4c0 <_ZSt27__throw_bad_optional_accessv>

0x23a7a3 INT	$0x3

0x23a7a4 INT	$0x3

0x23a7a5 INT	$0x3

0x23a7a6 INT	$0x3

0x23a7a7 INT	$0x3

0x23a7a8 INT	$0x3

0x23a7a9 INT	$0x3

0x23a7aa INT	$0x3

0x23a7ab INT	$0x3

0x23a7ac INT	$0x3

0x23a7ad INT	$0x3

0x23a7ae INT	$0x3

0x23a7af INT	$0x3

Coverage (%)	Name	Source Location	Module
►96.23+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:272	exec
○	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:135	exec
○	main.omp_outlined.64	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_launch_thread		libomp.so
○	__kmp_launch_worker(void*)		libomp.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►3.00+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:272	exec
○	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:135	exec
○	main.omp_outlined.64	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_fork_call		libomp.so
○	__kmpc_fork_call		libomp.so
○	main	miniqmc.cpp:411	exec
○	__libc_start_call_main		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_4

Source file and lines	TwoBodyJastrowRef.h:106-132
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/optional:433,950-952
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:106-109,126-132
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:236-260
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:919,1046,1064
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/refwrap.h:338
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:229

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 3.50 to 0.24 cycles (14.40x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

std::__throw_bad_optional_access(): 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/optional:952

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 16 bytes. The binary function is storing 32 bytes.

General properties

nb instructions	45
nb uops	28
loop length	128
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	3.50 cycles
front end	3.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	1.00	1.00	1.00	1.33	1.33	1.33	1.75	1.75	1.75	1.75	0.00	0.00	0.00	0.00	0.00	0.00
cycles	1.00	1.00	1.00	1.33	1.33	1.33	1.75	1.75	1.75	1.75	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	3.50
Dispatch	1.75
Overall L1	3.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 3.50 cycles. At this rate:

1% of peak load performance is reached (4.57 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
7% of peak store performance is reached (9.14 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 3.50 to 1.75 cycles (2.00x speedup).

ASM code

In the binary file, the address of the function is: 23a000

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x148,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x8(%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RAX,(%RDX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JE 23a78c <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x78c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RDI,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 23a083 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x83>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x148,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 23b4c0 <_ZSt27__throw_bad_optional_accessv>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_4

Source file and lines	TwoBodyJastrowRef.h:106-132
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/optional:433,950-952
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:106-109,126-132
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:236-260
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:919,1046,1064
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/refwrap.h:338
/home/eoseret/qaas_runs_ZEN5/173-938-0042/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:229

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

std::__throw_bad_optional_access(): 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/optional:952

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 16 bytes. The binary function is storing 32 bytes.

General properties

nb instructions	45
nb uops	28
loop length	128
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	3.50 cycles
front end	3.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	1.00	1.00	1.00	1.33	1.33	1.33	1.75	1.75	1.75	1.75	0.00	0.00	0.00	0.00	0.00	0.00
cycles	1.00	1.00	1.00	1.33	1.33	1.33	1.75	1.75	1.75	1.75	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	3.50
Dispatch	1.75
Overall L1	3.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 3.50 cycles. At this rate:

1% of peak load performance is reached (4.57 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
7% of peak store performance is reached (9.14 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 23a000

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x148,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x8(%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RAX,(%RDX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JE 23a78c <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x78c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RDI,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 23a083 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x83>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x148,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 23b4c0 <_ZSt27__throw_bad_optional_accessv>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)–	1.18	1.95
▼Loop 274 - TwoBodyJastrowRef.h:107-132 - exec–	0.01	0.01
▼Loop 275 - BsplineFunctor.h:236-260 - exec–	0.02	0.03
○Loop 276 - BsplineFunctor.h:236-241 - exec	1.11	1.83
○Loop 277 - BsplineFunctor.h:246-260 - exec	0.04	0.07
○Loop 278 - BsplineFunctor.h:246-260 - exec	0.00	0.01
○Loop 279 - BsplineFunctor.h:236-241 - exec	0.00	0.00

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code