OV - exec - Function miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::evaluateGL(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib<qmcplusplus::TinyVector<double, 3u>, std::allocator<qmcplusplus::TinyVector<double, 3u> > >&, qmcplusplus::ParticleAttrib<double, std::allocator<double> >&, bool)

	Function: miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::evalua ...	Module: exec	Source: :0-0	Coverage (incl. loops): 0.62% \| (excl. loops): 0.00%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x4a9120 LEA	0x8(%RSP),%R10

0x4a9125 AND	$-0x40,%RSP

0x4a9129 PUSHQ	-0x8(%R10)

0x4a912d PUSH	%RBP

0x4a912e MOV	%RSP,%RBP

0x4a9131 PUSH	%R15

0x4a9133 PUSH	%R14

0x4a9135 PUSH	%R13

0x4a9137 PUSH	%R12

0x4a9139 PUSH	%R10

0x4a913b PUSH	%RBX

0x4a913c MOV	%RDI,%R13

0x4a913f SUB	$0xc0,%RSP

0x4a9146 MOV	%RCX,-0xe0(%RBP)

0x4a914d MOV	0xc(%RDI),%ECX

0x4a9150 MOV	%RDX,-0xd8(%RBP)

0x4a9157 TEST	%ECX,%ECX

0x4a9159 JE	4a9bfc

0x4a915f MOV	0x484(%R13),%R11D

0x4a9166 MOVSXD	0x478(%R13),%R9

0x4a916d CMP	$0x1,%R11D

0x4a9171 JE	4a9b6d

0x4a9177 MOVSXD	%R11D,%RDX

0x4a917a VMOVQ	%RDX,%XMM14

0x4a917f TEST	%R11D,%R11D

0x4a9182 JE	4a9a9e

0x4a9188 MOV	-0xd8(%RBP),%RSI

0x4a918f MOV	-0xe0(%RBP),%RCX

0x4a9196 VMOVQ	0xd8(%R13),%XMM11

0x4a919f MOV	0x480(%R13),%EDI

0x4a91a6 VMOVDQA64	0x1302d0(%RIP),%ZMM8

0x4a91b0 VMOVDQA64	0x130306(%RIP),%ZMM7

0x4a91ba MOV	0x100(%R13),%R12

0x4a91c1 MOV	0x180(%R13),%R10

0x4a91c8 VMOVDQA64	0x13032e(%RIP),%ZMM6

0x4a91d2 VMOVDQA64	0x130364(%RIP),%ZMM5

0x4a91dc LEA	(%R9,%R9,2),%R8

0x4a91e0 MOV	%R13,-0xd8(%RBP)

0x4a91e7 VMOVDQA64	0x13038f(%RIP),%ZMM4

0x4a91f1 VMOVDQA64	0x1303c5(%RIP),%ZMM3

0x4a91fb VMOVQ	0x158(%R13),%XMM13

0x4a9204 VMOVDQA64	0x130072(%RIP),%YMM18

0x4a920e MOV	0x18(%RSI),%RBX

0x4a9212 MOV	0x18(%RCX),%RAX

0x4a9216 VMOVDQA64	0x130080(%RIP),%YMM17

0x4a9220 VMOVDQA64	0x130096(%RIP),%YMM16

0x4a922a VMOVDQA	0x1300ae(%RIP),%YMM15

0x4a9232 LEA	-0x1(%RDI),%R14D

0x4a9236 MOV	%R12,%RDX

0x4a9239 MOV	%R10,%RSI

0x4a923c VMOVQ	%XMM11,%R15

0x4a9241 MOV	%R14D,-0xc8(%RBP)

0x4a9248 XOR	%R14D,%R14D

0x4a924b MOV	%R12,-0xd0(%RBP)

0x4a9252 SAL	$0x3,%R15

0x4a9256 LEA	(%RBX,%R8,8),%R8

0x4a925a LEA	(%RAX,%R9,8),%R11

0x4a925e VMOVQ	%R15,%XMM12

0x4a9263 XOR	%EBX,%EBX

0x4a9265 XOR	%R9D,%R9D

0x4a9268 NOPL	(%RAX,%RAX,1)

(1135) 0x4a9270 LEA	(,%RBX,8),%R13

(1135) 0x4a9278 TEST	%EDI,%EDI

(1135) 0x4a927a JLE	4a9af7

(1135) 0x4a9280 CMPL	$0x6,-0xc8(%RBP)

(1135) 0x4a9287 JBE	4a9b36

(1135) 0x4a928d MOV	%EDI,%R12D

(1135) 0x4a9290 XOR	%EAX,%EAX

(1135) 0x4a9292 LEA	(%RSI,%R13,1),%R10

(1135) 0x4a9296 VXORPD	%XMM0,%XMM0,%XMM0

(1135) 0x4a929a SHR	$0x3,%R12D

(1135) 0x4a929e SAL	$0x6,%R12

(1135) 0x4a92a2 LEA	-0x40(%R12),%RCX

(1135) 0x4a92a7 SHR	$0x6,%RCX

(1135) 0x4a92ab INC	%RCX

(1135) 0x4a92ae AND	$0x7,%ECX

(1135) 0x4a92b1 JE	4a9365

(1135) 0x4a92b7 CMP	$0x1,%RCX

(1135) 0x4a92bb JE	4a934a

(1135) 0x4a92c1 CMP	$0x2,%RCX

(1135) 0x4a92c5 JE	4a9338

(1135) 0x4a92c7 CMP	$0x3,%RCX

(1135) 0x4a92cb JE	4a9326

(1135) 0x4a92cd CMP	$0x4,%RCX

(1135) 0x4a92d1 JE	4a9314

(1135) 0x4a92d3 CMP	$0x5,%RCX

(1135) 0x4a92d7 JE	4a9302

(1135) 0x4a92d9 CMP	$0x6,%RCX

(1135) 0x4a92dd JE	4a92f0

(1135) 0x4a92df MOV	$0x40,%EAX

(1135) 0x4a92e4 VMOVUPD	(%RDX),%ZMM1

(1135) 0x4a92ea VFMADD231PD	(%R10),%ZMM1,%ZMM0

(1135) 0x4a92f0 VMOVUPD	(%RDX,%RAX,1),%ZMM9

(1135) 0x4a92f7 VFMADD231PD	(%R10,%RAX,1),%ZMM9,%ZMM0

(1135) 0x4a92fe ADD	$0x40,%RAX

(1135) 0x4a9302 VMOVUPD	(%RDX,%RAX,1),%ZMM2

(1135) 0x4a9309 VFMADD231PD	(%R10,%RAX,1),%ZMM2,%ZMM0

(1135) 0x4a9310 ADD	$0x40,%RAX

(1135) 0x4a9314 VMOVUPD	(%RDX,%RAX,1),%ZMM10

(1135) 0x4a931b VFMADD231PD	(%R10,%RAX,1),%ZMM10,%ZMM0

(1135) 0x4a9322 ADD	$0x40,%RAX

(1135) 0x4a9326 VMOVUPD	(%RDX,%RAX,1),%ZMM1

(1135) 0x4a932d VFMADD231PD	(%R10,%RAX,1),%ZMM1,%ZMM0

(1135) 0x4a9334 ADD	$0x40,%RAX

(1135) 0x4a9338 VMOVUPD	(%RDX,%RAX,1),%ZMM9

(1135) 0x4a933f VFMADD231PD	(%R10,%RAX,1),%ZMM9,%ZMM0

(1135) 0x4a9346 ADD	$0x40,%RAX

(1135) 0x4a934a VMOVUPD	(%RDX,%RAX,1),%ZMM2

(1135) 0x4a9351 VFMADD231PD	(%R10,%RAX,1),%ZMM2,%ZMM0

(1135) 0x4a9358 ADD	$0x40,%RAX

(1135) 0x4a935c CMP	%RAX,%R12

(1135) 0x4a935f JE	4a93f2

  (1137) 0x4a9365 VMOVUPD	(%RDX,%RAX,1),%ZMM10

  (1137) 0x4a936c VMOVUPD	0x40(%RDX,%RAX,1),%ZMM1

  (1137) 0x4a9374 VMOVUPD	0x80(%RDX,%RAX,1),%ZMM9

  (1137) 0x4a937c VMOVUPD	0xc0(%RDX,%RAX,1),%ZMM2

  (1137) 0x4a9384 VFMADD231PD	(%R10,%RAX,1),%ZMM10,%ZMM0

  (1137) 0x4a938b VMOVUPD	0x100(%RDX,%RAX,1),%ZMM10

  (1137) 0x4a9393 VFMADD231PD	0x40(%R10,%RAX,1),%ZMM1,%ZMM0

  (1137) 0x4a939b VMOVUPD	0x140(%RDX,%RAX,1),%ZMM1

  (1137) 0x4a93a3 VFMADD231PD	0x80(%R10,%RAX,1),%ZMM9,%ZMM0

  (1137) 0x4a93ab VMOVUPD	0x180(%RDX,%RAX,1),%ZMM9

  (1137) 0x4a93b3 VFMADD231PD	0xc0(%R10,%RAX,1),%ZMM2,%ZMM0

  (1137) 0x4a93bb VMOVUPD	0x1c0(%RDX,%RAX,1),%ZMM2

  (1137) 0x4a93c3 VFMADD231PD	0x100(%R10,%RAX,1),%ZMM10,%ZMM0

  (1137) 0x4a93cb VFMADD231PD	0x140(%R10,%RAX,1),%ZMM1,%ZMM0

  (1137) 0x4a93d3 VFMADD231PD	0x180(%R10,%RAX,1),%ZMM9,%ZMM0

  (1137) 0x4a93db VFMADD231PD	0x1c0(%R10,%RAX,1),%ZMM2,%ZMM0

  (1137) 0x4a93e3 ADD	$0x200,%RAX

  (1137) 0x4a93e9 CMP	%RAX,%R12

  (1137) 0x4a93ec JNE	4a9365

(1135) 0x4a93f2 VEXTRACTF64X4	$0x1,%ZMM0,%YMM10

(1135) 0x4a93f9 MOV	%EDI,%R15D

(1135) 0x4a93fc VADDPD	%YMM0,%YMM10,%YMM10

(1135) 0x4a9400 AND	$-0x8,%R15D

(1135) 0x4a9404 MOV	%R15D,%ECX

(1135) 0x4a9407 VEXTRACTF64X2	$0x1,%YMM10,%XMM0

(1135) 0x4a940e VADDPD	%XMM10,%XMM0,%XMM9

(1135) 0x4a9413 VUNPCKHPD	%XMM9,%XMM9,%XMM19

(1135) 0x4a9419 VADDPD	%XMM9,%XMM19,%XMM22

(1135) 0x4a941f VMOVAPD	%XMM22,%XMM9

(1135) 0x4a9425 CMP	%R15D,%EDI

(1135) 0x4a9428 JE	4a9b18

(1135) 0x4a942e MOV	%EDI,%EAX

(1135) 0x4a9430 SUB	%ECX,%EAX

(1135) 0x4a9432 LEA	-0x1(%RAX),%R12D

(1135) 0x4a9436 CMP	$0x2,%R12D

(1135) 0x4a943a JBE	4a9485

(1135) 0x4a943c MOV	-0xd0(%RBP),%R10

(1135) 0x4a9443 LEA	(%R14,%RCX,1),%R12

(1135) 0x4a9447 ADD	%RBX,%RCX

(1135) 0x4a944a VMOVUPD	(%R10,%R12,8),%YMM2

(1135) 0x4a9450 VFMADD231PD	(%RSI,%RCX,8),%YMM2,%YMM10

(1135) 0x4a9456 VEXTRACTF64X2	$0x1,%YMM10,%XMM0

(1135) 0x4a945d VADDPD	%XMM10,%XMM0,%XMM10

(1135) 0x4a9462 MOV	%EAX,%ECX

(1135) 0x4a9464 AND	$-0x4,%ECX

(1135) 0x4a9467 VUNPCKHPD	%XMM10,%XMM10,%XMM23

(1135) 0x4a946d ADD	%ECX,%R15D

(1135) 0x4a9470 AND	$0x3,%EAX

(1135) 0x4a9473 VADDPD	%XMM10,%XMM23,%XMM24

(1135) 0x4a9479 VMOVAPD	%XMM24,%XMM9

(1135) 0x4a947f JE	4a9ab2

(1135) 0x4a9485 MOVSXD	%R15D,%RAX

(1135) 0x4a9488 ADD	%RSI,%R13

(1135) 0x4a948b LEA	0x1(%R15),%R10D

(1135) 0x4a948f VMOVSD	(%RDX,%RAX,8),%XMM1

(1135) 0x4a9494 LEA	(,%RAX,8),%R12

(1135) 0x4a949c VFMADD231SD	(%R13,%RAX,8),%XMM1,%XMM9

(1135) 0x4a94a3 CMP	%R10D,%EDI

(1135) 0x4a94a6 JLE	4a94cd

(1135) 0x4a94a8 ADD	$0x2,%R15D

(1135) 0x4a94ac VMOVSD	0x8(%R12,%R13,1),%XMM2

(1135) 0x4a94b3 VFMADD231SD	0x8(%RDX,%R12,1),%XMM2,%XMM9

(1135) 0x4a94ba CMP	%R15D,%EDI

(1135) 0x4a94bd JLE	4a94cd

(1135) 0x4a94bf VMOVSD	0x10(%RDX,%R12,1),%XMM0

(1135) 0x4a94c6 VFMADD231SD	0x10(%R12,%R13,1),%XMM0,%XMM9

(1135) 0x4a94cd MOV	-0xd8(%RBP),%R15

(1135) 0x4a94d4 MOV	0x140(%R15),%R10

(1135) 0x4a94db MOV	0x118(%R15),%R15

(1135) 0x4a94e2 IMUL	%R9,%R15

(1135) 0x4a94e6 CMPL	$0x6,-0xc8(%RBP)

(1135) 0x4a94ed JBE	4a9b4a

(1135) 0x4a94f3 MOV	%EDI,%R13D

(1135) 0x4a94f6 LEA	(%R15,%R15,2),%RCX

(1135) 0x4a94fa VXORPD	%XMM2,%XMM2,%XMM2

(1135) 0x4a94fe SHR	$0x3,%R13D

(1135) 0x4a9502 VMOVAPD	%ZMM2,%ZMM1

(1135) 0x4a9508 VMOVAPD	%ZMM2,%ZMM10

(1135) 0x4a950e SAL	$0x6,%R13

(1135) 0x4a9512 LEA	(%R13,%RDX,1),%R12

(1135) 0x4a9517 SUB	$0x40,%R13

(1135) 0x4a951b LEA	(%R10,%RCX,8),%RAX

(1135) 0x4a951f MOV	%RDX,%RCX

(1135) 0x4a9522 SHR	$0x6,%R13

(1135) 0x4a9526 INC	%R13

(1135) 0x4a9529 AND	$0x3,%R13D

(1135) 0x4a952d JE	4a967e

(1135) 0x4a9533 CMP	$0x1,%R13

(1135) 0x4a9537 JE	4a960f

(1135) 0x4a953d CMP	$0x2,%R13

(1135) 0x4a9541 JE	4a95a9

(1135) 0x4a9543 VMOVUPD	(%RAX),%ZMM10

(1135) 0x4a9549 VMOVUPD	0x40(%RAX),%ZMM26

(1135) 0x4a9550 VMOVUPD	0x80(%RAX),%ZMM27

(1135) 0x4a9557 VMOVUPD	(%RDX),%ZMM25

(1135) 0x4a955d ADD	$0xc0,%RAX

(1135) 0x4a9563 LEA	0x40(%RDX),%RCX

(1135) 0x4a9567 VMOVAPD	%ZMM10,%ZMM1

(1135) 0x4a956d VMOVAPD	%ZMM10,%ZMM31

(1135) 0x4a9573 VPERMT2PD	%ZMM26,%ZMM4,%ZMM10

(1135) 0x4a9579 VPERMT2PD	%ZMM26,%ZMM8,%ZMM1

(1135) 0x4a957f VPERMT2PD	%ZMM26,%ZMM6,%ZMM31

(1135) 0x4a9585 VPERMT2PD	%ZMM27,%ZMM3,%ZMM10

(1135) 0x4a958b VPERMT2PD	%ZMM27,%ZMM7,%ZMM1

(1135) 0x4a9591 VFMADD132PD	%ZMM25,%ZMM2,%ZMM10

(1135) 0x4a9597 VPERMT2PD	%ZMM27,%ZMM5,%ZMM31

(1135) 0x4a959d VFMADD132PD	%ZMM25,%ZMM2,%ZMM1

(1135) 0x4a95a3 VFMADD231PD	%ZMM25,%ZMM31,%ZMM2

(1135) 0x4a95a9 VMOVUPD	(%RAX),%ZMM20

(1135) 0x4a95af VMOVUPD	0x40(%RAX),%ZMM19

(1135) 0x4a95b6 VMOVUPD	0x80(%RAX),%ZMM22

(1135) 0x4a95bd VMOVUPD	(%RCX),%ZMM21

(1135) 0x4a95c3 ADD	$0xc0,%RAX

(1135) 0x4a95c9 ADD	$0x40,%RCX

(1135) 0x4a95cd VMOVAPD	%ZMM20,%ZMM24

(1135) 0x4a95d3 VMOVAPD	%ZMM20,%ZMM23

(1135) 0x4a95d9 VPERMT2PD	%ZMM19,%ZMM4,%ZMM20

(1135) 0x4a95df VPERMT2PD	%ZMM19,%ZMM8,%ZMM24

(1135) 0x4a95e5 VPERMT2PD	%ZMM19,%ZMM6,%ZMM23

(1135) 0x4a95eb VPERMT2PD	%ZMM22,%ZMM3,%ZMM20

(1135) 0x4a95f1 VPERMT2PD	%ZMM22,%ZMM7,%ZMM24

(1135) 0x4a95f7 VFMADD231PD	%ZMM21,%ZMM20,%ZMM10

(1135) 0x4a95fd VPERMT2PD	%ZMM22,%ZMM5,%ZMM23

(1135) 0x4a9603 VFMADD231PD	%ZMM21,%ZMM24,%ZMM1

(1135) 0x4a9609 VFMADD231PD	%ZMM21,%ZMM23,%ZMM2

(1135) 0x4a960f VMOVUPD	(%RAX),%ZMM29

(1135) 0x4a9615 VMOVUPD	0x40(%RAX),%ZMM30

(1135) 0x4a961c VMOVUPD	0x80(%RAX),%ZMM25

(1135) 0x4a9623 VMOVUPD	(%RCX),%ZMM28

(1135) 0x4a9629 ADD	$0x40,%RCX

(1135) 0x4a962d ADD	$0xc0,%RAX

(1135) 0x4a9633 VMOVAPD	%ZMM29,%ZMM26

(1135) 0x4a9639 VMOVAPD	%ZMM29,%ZMM27

(1135) 0x4a963f VPERMT2PD	%ZMM30,%ZMM4,%ZMM29

(1135) 0x4a9645 VPERMT2PD	%ZMM30,%ZMM8,%ZMM26

(1135) 0x4a964b VPERMT2PD	%ZMM30,%ZMM6,%ZMM27

(1135) 0x4a9651 VPERMT2PD	%ZMM25,%ZMM3,%ZMM29

(1135) 0x4a9657 VPERMT2PD	%ZMM25,%ZMM7,%ZMM26

(1135) 0x4a965d VFMADD231PD	%ZMM28,%ZMM29,%ZMM10

(1135) 0x4a9663 VPERMT2PD	%ZMM25,%ZMM5,%ZMM27

(1135) 0x4a9669 VFMADD231PD	%ZMM28,%ZMM26,%ZMM1

(1135) 0x4a966f VFMADD231PD	%ZMM28,%ZMM27,%ZMM2

(1135) 0x4a9675 CMP	%RCX,%R12

(1135) 0x4a9678 JE	4a9810

  (1136) 0x4a967e VMOVUPD	0x40(%RAX),%ZMM20

  (1136) 0x4a9685 VMOVUPD	(%RAX),%ZMM21

  (1136) 0x4a968b VMOVUPD	0x80(%RAX),%ZMM19

  (1136) 0x4a9692 VMOVUPD	(%RCX),%ZMM31

  (1136) 0x4a9698 VMOVUPD	0xc0(%RAX),%ZMM29

  (1136) 0x4a969f VMOVUPD	0x100(%RAX),%ZMM30

  (1136) 0x4a96a6 VMOVUPD	0x140(%RAX),%ZMM25

  (1136) 0x4a96ad VMOVUPD	0x40(%RCX),%ZMM28

  (1136) 0x4a96b4 VMOVUPD	0x180(%RAX),%ZMM0

  (1136) 0x4a96bb VMOVUPD	0x1c0(%RAX),%ZMM26

  (1136) 0x4a96c2 ADD	$0x100,%RCX

  (1136) 0x4a96c9 ADD	$0x300,%RAX

  (1136) 0x4a96cf VMOVAPD	%ZMM21,%ZMM22

  (1136) 0x4a96d5 VMOVAPD	%ZMM21,%ZMM24

  (1136) 0x4a96db VPERMT2PD	%ZMM20,%ZMM4,%ZMM21

  (1136) 0x4a96e1 VPERMT2PD	%ZMM19,%ZMM3,%ZMM21

  (1136) 0x4a96e7 VPERMT2PD	%ZMM20,%ZMM6,%ZMM24

  (1136) 0x4a96ed VMOVAPD	%ZMM29,%ZMM23

  (1136) 0x4a96f3 VPERMT2PD	%ZMM20,%ZMM8,%ZMM22

  (1136) 0x4a96f9 VFMADD231PD	%ZMM31,%ZMM21,%ZMM10

  (1136) 0x4a96ff VPERMT2PD	%ZMM19,%ZMM5,%ZMM24

  (1136) 0x4a9705 VMOVAPD	%ZMM29,%ZMM27

  (1136) 0x4a970b VPERMT2PD	%ZMM30,%ZMM6,%ZMM23

  (1136) 0x4a9711 VFMADD231PD	%ZMM31,%ZMM24,%ZMM2

  (1136) 0x4a9717 VPERMT2PD	%ZMM30,%ZMM4,%ZMM29

  (1136) 0x4a971d VPERMT2PD	%ZMM19,%ZMM7,%ZMM22

  (1136) 0x4a9723 VPERMT2PD	%ZMM25,%ZMM5,%ZMM23

  (1136) 0x4a9729 VPERMT2PD	%ZMM25,%ZMM3,%ZMM29

  (1136) 0x4a972f VFMADD231PD	%ZMM31,%ZMM22,%ZMM1

  (1136) 0x4a9735 VMOVUPD	-0x100(%RAX),%ZMM31

  (1136) 0x4a973c VMOVAPD	%ZMM0,%ZMM20

  (1136) 0x4a9742 VPERMT2PD	%ZMM26,%ZMM6,%ZMM20

  (1136) 0x4a9748 VPERMT2PD	%ZMM30,%ZMM8,%ZMM27

  (1136) 0x4a974e VMOVUPD	-0x80(%RAX),%ZMM22

  (1136) 0x4a9755 VMOVUPD	-0x40(%RAX),%ZMM24

  (1136) 0x4a975c VPERMT2PD	%ZMM25,%ZMM7,%ZMM27

  (1136) 0x4a9762 VMOVAPD	%ZMM0,%ZMM21

  (1136) 0x4a9768 VMOVUPD	-0x40(%RCX),%ZMM19

  (1136) 0x4a976f VFMADD132PD	%ZMM28,%ZMM10,%ZMM29

  (1136) 0x4a9775 VMOVAPD	%ZMM23,%ZMM10

  (1136) 0x4a977b VPERMT2PD	%ZMM26,%ZMM8,%ZMM21

  (1136) 0x4a9781 VFMADD132PD	%ZMM28,%ZMM2,%ZMM10

  (1136) 0x4a9787 VMOVUPD	-0x80(%RCX),%ZMM2

  (1136) 0x4a978e VFMADD132PD	%ZMM28,%ZMM1,%ZMM27

  (1136) 0x4a9794 VPERMT2PD	%ZMM26,%ZMM4,%ZMM0

  (1136) 0x4a979a VPERMT2PD	%ZMM31,%ZMM5,%ZMM20

  (1136) 0x4a97a0 VPERMT2PD	%ZMM31,%ZMM7,%ZMM21

  (1136) 0x4a97a6 VPERMT2PD	%ZMM31,%ZMM3,%ZMM0

  (1136) 0x4a97ac VFMADD132PD	%ZMM2,%ZMM10,%ZMM20

  (1136) 0x4a97b2 VMOVUPD	-0xc0(%RAX),%ZMM10

  (1136) 0x4a97b9 VFMADD231PD	%ZMM2,%ZMM0,%ZMM29

  (1136) 0x4a97bf VFMADD132PD	%ZMM2,%ZMM27,%ZMM21

  (1136) 0x4a97c5 VMOVAPD	%ZMM10,%ZMM1

  (1136) 0x4a97cb VMOVAPD	%ZMM10,%ZMM2

  (1136) 0x4a97d1 VPERMT2PD	%ZMM22,%ZMM4,%ZMM10

  (1136) 0x4a97d7 VPERMT2PD	%ZMM22,%ZMM8,%ZMM1

  (1136) 0x4a97dd VPERMT2PD	%ZMM22,%ZMM6,%ZMM2

  (1136) 0x4a97e3 VPERMT2PD	%ZMM24,%ZMM3,%ZMM10

  (1136) 0x4a97e9 VPERMT2PD	%ZMM24,%ZMM7,%ZMM1

  (1136) 0x4a97ef VFMADD132PD	%ZMM19,%ZMM29,%ZMM10

  (1136) 0x4a97f5 VPERMT2PD	%ZMM24,%ZMM5,%ZMM2

  (1136) 0x4a97fb VFMADD132PD	%ZMM19,%ZMM21,%ZMM1

  (1136) 0x4a9801 VFMADD132PD	%ZMM19,%ZMM20,%ZMM2

  (1136) 0x4a9807 CMP	%RCX,%R12

  (1136) 0x4a980a JNE	4a967e

(1135) 0x4a9810 VEXTRACTF64X4	$0x1,%ZMM2,%YMM28

(1135) 0x4a9817 MOV	%EDI,%ECX

(1135) 0x4a9819 VADDPD	%YMM2,%YMM28,%YMM28

(1135) 0x4a981f VEXTRACTF64X4	$0x1,%ZMM1,%YMM25

(1135) 0x4a9826 AND	$-0x8,%ECX

(1135) 0x4a9829 VEXTRACTF64X4	$0x1,%ZMM10,%YMM26

(1135) 0x4a9830 MOV	%ECX,%EAX

(1135) 0x4a9832 VADDPD	%YMM10,%YMM26,%YMM10

(1135) 0x4a9838 VEXTRACTF64X2	$0x1,%YMM28,%XMM29

(1135) 0x4a983f VADDPD	%XMM28,%XMM29,%XMM30

(1135) 0x4a9845 VEXTRACTF64X2	$0x1,%YMM10,%XMM31

(1135) 0x4a984c VADDPD	%XMM10,%XMM31,%XMM20

(1135) 0x4a9852 VMOVAPD	%YMM10,%YMM29

(1135) 0x4a9858 VUNPCKHPD	%XMM30,%XMM30,%XMM2

(1135) 0x4a985e VADDPD	%XMM30,%XMM2,%XMM2

(1135) 0x4a9864 VADDPD	%YMM1,%YMM25,%YMM30

(1135) 0x4a986a VUNPCKHPD	%XMM20,%XMM20,%XMM19

(1135) 0x4a9870 VADDPD	%XMM20,%XMM19,%XMM22

(1135) 0x4a9876 VEXTRACTF64X2	$0x1,%YMM30,%XMM27

(1135) 0x4a987d VADDPD	%XMM30,%XMM27,%XMM23

(1135) 0x4a9883 VUNPCKHPD	%XMM23,%XMM23,%XMM0

(1135) 0x4a9889 VADDPD	%XMM23,%XMM0,%XMM1

(1135) 0x4a988f VUNPCKLPD	%XMM1,%XMM22,%XMM1

(1135) 0x4a9895 CMP	%EDI,%ECX

(1135) 0x4a9897 JE	4a9a23

(1135) 0x4a989d MOV	%EDI,%R13D

(1135) 0x4a98a0 SUB	%EAX,%R13D

(1135) 0x4a98a3 LEA	-0x1(%R13),%R12D

(1135) 0x4a98a7 CMP	$0x2,%R12D

(1135) 0x4a98ab JBE	4a999a

(1135) 0x4a98b1 MOV	%EAX,%EAX

(1135) 0x4a98b3 VMOVDQA64	0x12fa43(%RIP),%YMM25

(1135) 0x4a98bd VMOVDQA64	0x12fa59(%RIP),%YMM26

(1135) 0x4a98c7 LEA	(%RAX,%R15,1),%R12

(1135) 0x4a98cb ADD	%R14,%RAX

(1135) 0x4a98ce LEA	(%R12,%R12,2),%R12

(1135) 0x4a98d2 LEA	(%R10,%R12,8),%R12

(1135) 0x4a98d6 VMOVQ	%R12,%XMM2

(1135) 0x4a98db MOV	-0xd0(%RBP),%R12

(1135) 0x4a98e2 VMOVUPD	(%R12,%RAX,8),%YMM0

(1135) 0x4a98e8 VMOVQ	%XMM2,%RAX

(1135) 0x4a98ed MOV	%R13D,%R12D

(1135) 0x4a98f0 VMOVUPD	(%RAX),%YMM24

(1135) 0x4a98f6 VMOVUPD	0x20(%RAX),%YMM27

(1135) 0x4a98fd VMOVUPD	0x40(%RAX),%YMM23

(1135) 0x4a9904 AND	$-0x4,%R12D

(1135) 0x4a9908 ADD	%R12D,%ECX

(1135) 0x4a990b AND	$0x3,%R13D

(1135) 0x4a990f VMOVAPD	%YMM24,%YMM1

(1135) 0x4a9915 VMOVAPD	%YMM24,%YMM10

(1135) 0x4a991b VPERMI2PD	%YMM27,%YMM24,%YMM25

(1135) 0x4a9921 VPERMT2PD	%YMM27,%YMM18,%YMM1

(1135) 0x4a9927 VPERMT2PD	%YMM27,%YMM16,%YMM10

(1135) 0x4a992d VPERMI2PD	%YMM23,%YMM25,%YMM26

(1135) 0x4a9933 VPERMT2PD	%YMM23,%YMM15,%YMM10

(1135) 0x4a9939 VFMADD231PD	%YMM26,%YMM0,%YMM29

(1135) 0x4a993f VPERMT2PD	%YMM23,%YMM17,%YMM1

(1135) 0x4a9945 VFMADD132PD	%YMM0,%YMM30,%YMM1

(1135) 0x4a994b VFMADD132PD	%YMM10,%YMM28,%YMM0

(1135) 0x4a9951 VEXTRACTF64X2	$0x1,%YMM29,%XMM28

(1135) 0x4a9958 VADDPD	%XMM29,%XMM28,%XMM29

(1135) 0x4a995e VEXTRACTF64X2	$0x1,%YMM0,%XMM2

(1135) 0x4a9965 VADDPD	%XMM0,%XMM2,%XMM0

(1135) 0x4a9969 VUNPCKHPD	%XMM0,%XMM0,%XMM10

(1135) 0x4a996d VADDPD	%XMM0,%XMM10,%XMM2

(1135) 0x4a9971 VEXTRACTF64X2	$0x1,%YMM1,%XMM0

(1135) 0x4a9978 VADDPD	%XMM1,%XMM0,%XMM1

(1135) 0x4a997c VUNPCKHPD	%XMM1,%XMM1,%XMM10

(1135) 0x4a9980 VADDPD	%XMM1,%XMM10,%XMM0

(1135) 0x4a9984 VUNPCKHPD	%XMM29,%XMM29,%XMM10

(1135) 0x4a998a VADDPD	%XMM29,%XMM10,%XMM1

(1135) 0x4a9990 VUNPCKLPD	%XMM0,%XMM1,%XMM1

(1135) 0x4a9994 JE	4a9a23

(1135) 0x4a999a MOVSXD	%ECX,%RAX

(1135) 0x4a999d LEA	(%RAX,%R15,1),%R13

(1135) 0x4a99a1 VMOVDDUP	(%RDX,%RAX,8),%XMM0

(1135) 0x4a99a6 LEA	(%R13,%R13,2),%R12

(1135) 0x4a99ab LEA	(%R10,%R12,8),%R13

(1135) 0x4a99af LEA	(,%RAX,8),%R12

(1135) 0x4a99b7 VMOVSD	0x10(%R13),%XMM10

(1135) 0x4a99bd VFMADD231SD	(%RDX,%RAX,8),%XMM10,%XMM2

(1135) 0x4a99c3 LEA	0x1(%RCX),%EAX

(1135) 0x4a99c6 VFMADD231PD	(%R13),%XMM0,%XMM1

(1135) 0x4a99cc CMP	%EAX,%EDI

(1135) 0x4a99ce JLE	4a9a23

(1135) 0x4a99d0 CLTQ

(1135) 0x4a99d2 VMOVDDUP	0x8(%RDX,%R12,1),%XMM0

(1135) 0x4a99d9 VMOVSD	0x8(%RDX,%R12,1),%XMM10

(1135) 0x4a99e0 ADD	%R15,%RAX

(1135) 0x4a99e3 LEA	(%RAX,%RAX,2),%R13

(1135) 0x4a99e7 LEA	(%R10,%R13,8),%RAX

(1135) 0x4a99eb VFMADD231PD	(%RAX),%XMM0,%XMM1

(1135) 0x4a99f0 VFMADD231SD	0x10(%RAX),%XMM10,%XMM2

(1135) 0x4a99f6 LEA	0x2(%RCX),%EAX

(1135) 0x4a99f9 CMP	%EAX,%EDI

(1135) 0x4a99fb JLE	4a9a23

(1135) 0x4a99fd CLTQ

(1135) 0x4a99ff VMOVDDUP	0x10(%RDX,%R12,1),%XMM0

(1135) 0x4a9a06 ADD	%R15,%RAX

(1135) 0x4a9a09 LEA	(%RAX,%RAX,2),%R15

(1135) 0x4a9a0d LEA	(%R10,%R15,8),%R10

(1135) 0x4a9a11 VMOVSD	0x10(%R10),%XMM10

(1135) 0x4a9a17 VFMADD231PD	(%R10),%XMM0,%XMM1

(1135) 0x4a9a1c VFMADD231SD	0x10(%RDX,%R12,1),%XMM10,%XMM2

(1135) 0x4a9a23 VUNPCKHPD	%XMM1,%XMM1,%XMM30

(1135) 0x4a9a29 VMULSD	%XMM2,%XMM2,%XMM21

(1135) 0x4a9a2f VMULSD	%XMM30,%XMM30,%XMM20

(1135) 0x4a9a35 VMULSD	%XMM1,%XMM1,%XMM0

(1135) 0x4a9a39 VADDPD	(%R8),%XMM1,%XMM1

(1135) 0x4a9a3e VADDSD	0x10(%R8),%XMM2,%XMM2

(1135) 0x4a9a44 VMOVQ	%XMM12,%RCX

(1135) 0x4a9a49 VMOVSD	%XMM2,0x10(%R8)

(1135) 0x4a9a4f VMOVQ	%XMM11,%R12

(1135) 0x4a9a54 VADDSD	%XMM0,%XMM20,%XMM31

(1135) 0x4a9a5a ADD	$0x18,%R8

(1135) 0x4a9a5e ADD	%RCX,%RDX

(1135) 0x4a9a61 VMOVQ	%XMM13,%R13

(1135) 0x4a9a66 VMOVQ	%XMM14,%RAX

(1135) 0x4a9a6b ADD	%R12,%R14

(1135) 0x4a9a6e ADD	%R13,%RBX

(1135) 0x4a9a71 VMOVUPD	%XMM1,-0x18(%R8)

(1135) 0x4a9a77 VADDSD	(%R11,%R9,8),%XMM9,%XMM9

(1135) 0x4a9a7d VSUBSD	%XMM21,%XMM9,%XMM10

(1135) 0x4a9a83 VSUBSD	%XMM31,%XMM10,%XMM0

(1135) 0x4a9a89 VMOVSD	%XMM0,(%R11,%R9,8)

(1135) 0x4a9a8f INC	%R9

(1135) 0x4a9a92 CMP	%RAX,%R9

(1135) 0x4a9a95 JNE	4a9270

0x4a9a9b VZEROUPPER

0x4a9a9e LEA	-0x30(%RBP),%RSP

0x4a9aa2 POP	%RBX

0x4a9aa3 POP	%RCX

0x4a9aa4 POP	%R12

0x4a9aa6 POP	%R13

0x4a9aa8 POP	%R14

0x4a9aaa POP	%R15

0x4a9aac POP	%RBP

0x4a9aad LEA	-0x8(%RCX),%RSP

0x4a9ab1 RET

(1135) 0x4a9ab2 MOV	-0xd8(%RBP),%R13

(1135) 0x4a9ab9 MOV	0x118(%R13),%R15

(1135) 0x4a9ac0 MOV	0x140(%R13),%R10

(1135) 0x4a9ac7 IMUL	%R9,%R15

(1135) 0x4a9acb CMPL	$0x6,-0xc8(%RBP)

(1135) 0x4a9ad2 JA	4a94f3

(1135) 0x4a9ad8 VXORPD	%XMM28,%XMM28,%XMM28

(1135) 0x4a9ade XOR	%ECX,%ECX

(1135) 0x4a9ae0 MOV	$0x4,%R13D

(1135) 0x4a9ae6 VMOVAPD	%YMM28,%YMM29

(1135) 0x4a9aec VMOVAPD	%YMM28,%YMM30

(1135) 0x4a9af2 JMP	4a98b1

(1135) 0x4a9af7 VXORPD	%XMM0,%XMM0,%XMM0

(1135) 0x4a9afb VXORPD	%XMM1,%XMM1,%XMM1

(1135) 0x4a9aff VMOVAPD	%XMM0,%XMM21

(1135) 0x4a9b05 VMOVAPD	%XMM0,%XMM20

(1135) 0x4a9b0b VMOVAPD	%XMM0,%XMM9

(1135) 0x4a9b0f VMOVAPD	%XMM0,%XMM2

(1135) 0x4a9b13 JMP	4a9a39

(1135) 0x4a9b18 MOV	-0xd8(%RBP),%R13

(1135) 0x4a9b1f MOV	0x118(%R13),%R15

(1135) 0x4a9b26 MOV	0x140(%R13),%R10

(1135) 0x4a9b2d IMUL	%R9,%R15

(1135) 0x4a9b31 JMP	4a94f3

(1135) 0x4a9b36 XOR	%ECX,%ECX

(1135) 0x4a9b38 XOR	%R15D,%R15D

(1135) 0x4a9b3b VXORPD	%XMM10,%XMM10,%XMM10

(1135) 0x4a9b40 VXORPD	%XMM9,%XMM9,%XMM9

(1135) 0x4a9b45 JMP	4a942e

(1135) 0x4a9b4a VXORPD	%XMM28,%XMM28,%XMM28

(1135) 0x4a9b50 XOR	%EAX,%EAX

(1135) 0x4a9b52 VMOVAPD	%YMM28,%YMM30

(1135) 0x4a9b58 VMOVAPD	%YMM28,%YMM29

(1135) 0x4a9b5e XOR	%ECX,%ECX

(1135) 0x4a9b60 VXORPD	%XMM1,%XMM1,%XMM1

(1135) 0x4a9b64 VXORPD	%XMM2,%XMM2,%XMM2

(1135) 0x4a9b68 JMP	4a989d

0x4a9b6d MOV	-0xd8(%RBP),%RDX

0x4a9b74 MOV	0x140(%R13),%R8

0x4a9b7b MOV	0x100(%R13),%RDI

0x4a9b82 MOV	-0xe0(%RBP),%R11

0x4a9b89 LEA	(%R9,%R9,2),%R14

0x4a9b8d MOV	0x180(%R13),%R10

0x4a9b94 MOV	0x18(%RDX),%RBX

0x4a9b98 VMOVSD	(%RDI),%XMM14

0x4a9b9c VMOVDDUP	%XMM14,%XMM13

0x4a9ba1 VMULPD	(%R8),%XMM13,%XMM11

0x4a9ba6 MOV	0x18(%R11),%R15

0x4a9baa VMULSD	0x10(%R8),%XMM14,%XMM8

0x4a9bb0 VMULSD	%XMM8,%XMM8,%XMM4

0x4a9bb5 LEA	(%RBX,%R14,8),%RSI

0x4a9bb9 VADDPD	(%RSI),%XMM11,%XMM7

0x4a9bbd LEA	(%R15,%R9,8),%R9

0x4a9bc1 VADDSD	0x10(%RSI),%XMM8,%XMM6

0x4a9bc6 VMOVSD	%XMM6,0x10(%RSI)

0x4a9bcb VMOVAPD	%XMM11,%XMM15

0x4a9bd0 VUNPCKHPD	%XMM11,%XMM11,%XMM12

0x4a9bd5 VFMADD132SD	%XMM12,%XMM4,%XMM12

0x4a9bda VMOVUPD	%XMM7,(%RSI)

0x4a9bde VMOVSD	(%R9),%XMM5

0x4a9be3 VFMADD132SD	(%R10),%XMM5,%XMM14

0x4a9be8 VFNMADD132SD	%XMM11,%XMM14,%XMM15

0x4a9bed VSUBSD	%XMM12,%XMM15,%XMM3

0x4a9bf2 VMOVSD	%XMM3,(%R9)

0x4a9bf7 JMP	4a9a9e

0x4a9bfc MOV	0x468(%RDI),%RDI

0x4a9c03 MOV	%RSI,%R12

0x4a9c06 MOV	%R13,-0xc8(%RBP)

0x4a9c0d CALL	544ee0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>

0x4a9c12 MOV	-0xc8(%RBP),%RSI

0x4a9c19 MOV	0x470(%RSI),%RBX

0x4a9c20 MOV	0x47c(%RSI),%ECX

0x4a9c26 MOV	0x478(%RSI),%R15D

0x4a9c2d MOV	(%RBX),%RAX

0x4a9c30 MOV	0x28(%RAX),%R11

0x4a9c34 CMP	$0x487df0,%R11

0x4a9c3b JNE	4a9e11

0x4a9c41 CMP	%R15D,%ECX

0x4a9c44 JLE	4a9d81

0x4a9c4a MOV	%ECX,%R14D

0x4a9c4d XOR	%R13D,%R13D

0x4a9c50 SUB	%R15D,%R14D

0x4a9c53 NOPW	%CS:(%RAX,%RAX,1)

0x4a9c5e XCHG	%AX,%AX

(1138) 0x4a9c60 MOV	0x98(%RSI),%R8

(1138) 0x4a9c67 MOV	0xc0(%RSI),%R9

(1138) 0x4a9c6e MOV	0x118(%RSI),%RCX

(1138) 0x4a9c75 MOV	0x140(%RSI),%R11

(1138) 0x4a9c7c MOVSXD	0x8(%RBX),%RDI

(1138) 0x4a9c80 MOVQ	$0x5d7ae8,-0xc0(%RBP)

(1138) 0x4a9c8b MOVQ	$0x5d7098,-0x90(%RBP)

(1138) 0x4a9c96 MOVQ	$0x5d7ae8,-0x60(%RBP)

(1138) 0x4a9c9e MOV	%RSI,-0xc8(%RBP)

(1138) 0x4a9ca5 MOVQ	$0,-0xb0(%RBP)

(1138) 0x4a9cb0 MOVQ	$0,-0x80(%RBP)

(1138) 0x4a9cb8 MOVQ	$0,-0x50(%RBP)

(1138) 0x4a9cc0 IMUL	%R13,%R8

(1138) 0x4a9cc4 IMUL	%R13,%RCX

(1138) 0x4a9cc8 MOV	%RDI,-0xb8(%RBP)

(1138) 0x4a9ccf MOV	%RDI,-0x88(%RBP)

(1138) 0x4a9cd6 MOV	%RDI,-0x58(%RBP)

(1138) 0x4a9cda MOV	%RBX,%RDI

(1138) 0x4a9cdd LEA	(%R9,%R8,8),%R10

(1138) 0x4a9ce1 MOV	0x158(%RSI),%R8

(1138) 0x4a9ce8 MOV	0x180(%RSI),%R9

(1138) 0x4a9cef MOV	%R10,-0xa8(%RBP)

(1138) 0x4a9cf6 MOV	(%RBX),%R10

(1138) 0x4a9cf9 LEA	(%RCX,%RCX,2),%RAX

(1138) 0x4a9cfd LEA	-0xc0(%RBP),%RCX

(1138) 0x4a9d04 LEA	(%R11,%RAX,8),%RDX

(1138) 0x4a9d08 MOV	%RDX,-0x78(%RBP)

(1138) 0x4a9d0c LEA	(%R15,%R13,1),%EDX

(1138) 0x4a9d10 IMUL	%R13,%R8

(1138) 0x4a9d14 LEA	(%R9,%R8,8),%RSI

(1138) 0x4a9d18 LEA	-0x60(%RBP),%R9

(1138) 0x4a9d1c LEA	-0x90(%RBP),%R8

(1138) 0x4a9d23 MOV	%RSI,-0x48(%RBP)

(1138) 0x4a9d27 MOV	%R12,%RSI

(1138) 0x4a9d2a CALLQ	0x18(%R10)

(1138) 0x4a9d2e MOV	-0x50(%RBP),%RDI

(1138) 0x4a9d32 MOV	-0xc8(%RBP),%RSI

(1138) 0x4a9d39 MOVQ	$0x5d7ae8,-0x60(%RBP)

(1138) 0x4a9d41 TEST	%RDI,%RDI

(1138) 0x4a9d44 JNE	4a9df4

(1138) 0x4a9d4a MOV	-0x80(%RBP),%RCX

(1138) 0x4a9d4e MOVQ	$0x5d7098,-0x90(%RBP)

(1138) 0x4a9d59 TEST	%RCX,%RCX

(1138) 0x4a9d5c JNE	4a9dd0

(1138) 0x4a9d5e MOV	-0xb0(%RBP),%RAX

(1138) 0x4a9d65 MOVQ	$0x5d7ae8,-0xc0(%RBP)

(1138) 0x4a9d70 TEST	%RAX,%RAX

(1138) 0x4a9d73 JNE	4a9da0

(1138) 0x4a9d75 INC	%R13

(1138) 0x4a9d78 CMP	%R14,%R13

(1138) 0x4a9d7b JNE	4a9c60

0x4a9d81 MOV	0x468(%RSI),%RDI

0x4a9d88 MOV	%RSI,-0xc8(%RBP)

0x4a9d8f CALL	545120 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>

0x4a9d94 MOV	-0xc8(%RBP),%R13

0x4a9d9b JMP	4a915f

(1138) 0x4a9da0 MOV	-0xa8(%RBP),%RDI

(1138) 0x4a9da7 MOV	%RSI,-0xc8(%RBP)

(1138) 0x4a9dae INC	%R13

(1138) 0x4a9db1 LEA	(,%RAX,8),%RSI

(1138) 0x4a9db9 CALL	404070 <_ZdlPvm@plt>

(1138) 0x4a9dbe CMP	%R14,%R13

(1138) 0x4a9dc1 MOV	-0xc8(%RBP),%RSI

(1138) 0x4a9dc8 JNE	4a9c60

0x4a9dce JMP	4a9d81

(1138) 0x4a9dd0 MOV	-0x78(%RBP),%RDI

(1138) 0x4a9dd4 MOV	%RSI,-0xc8(%RBP)

(1138) 0x4a9ddb LEA	(%RCX,%RCX,2),%RSI

(1138) 0x4a9ddf SAL	$0x3,%RSI

(1138) 0x4a9de3 CALL	404070 <_ZdlPvm@plt>

(1138) 0x4a9de8 MOV	-0xc8(%RBP),%RSI

(1138) 0x4a9def JMP	4a9d5e

(1138) 0x4a9df4 LEA	(,%RDI,8),%RSI

(1138) 0x4a9dfc MOV	-0x48(%RBP),%RDI

(1138) 0x4a9e00 CALL	404070 <_ZdlPvm@plt>

(1138) 0x4a9e05 MOV	-0xc8(%RBP),%RSI

(1138) 0x4a9e0c JMP	4a9d4a

0x4a9e11 SUB	$0x8,%RSP

0x4a9e15 LEA	0x150(%RSI),%RDX

0x4a9e1c LEA	0x110(%RSI),%R9

0x4a9e23 LEA	0x90(%RSI),%R8

0x4a9e2a PUSH	%RDX

0x4a9e2b MOV	%RBX,%RDI

0x4a9e2e MOV	%R15D,%EDX

0x4a9e31 MOV	%RSI,-0xc8(%RBP)

0x4a9e38 MOV	%R12,%RSI

0x4a9e3b CALL	%R11

0x4a9e3e POP	%RAX

0x4a9e3f MOV	-0xc8(%RBP),%RSI

0x4a9e46 POP	%RDX

0x4a9e47 JMP	4a9d81

0x4a9e4c MOV	%RAX,%R12

0x4a9e4f MOV	-0x50(%RBP),%RBX

0x4a9e53 MOVQ	$0x5d7ae8,-0x60(%RBP)

0x4a9e5b TEST	%RBX,%RBX

0x4a9e5e JE	4a9ec8

0x4a9e60 MOV	-0x48(%RBP),%RDI

0x4a9e64 LEA	(,%RBX,8),%RSI

0x4a9e6c VZEROUPPER

0x4a9e6f CALL	404070 <_ZdlPvm@plt>

(1134) 0x4a9e74 MOV	-0x80(%RBP),%R15

(1134) 0x4a9e78 MOVQ	$0x5d7098,-0x90(%RBP)

(1134) 0x4a9e83 TEST	%R15,%R15

(1134) 0x4a9e86 JE	4a9e95

(1134) 0x4a9e88 MOV	-0x78(%RBP),%RDI

(1134) 0x4a9e8c IMUL	$0x18,%R15,%RSI

(1134) 0x4a9e90 CALL	404070 <_ZdlPvm@plt>

(1134) 0x4a9e95 MOV	-0xb0(%RBP),%R14

(1134) 0x4a9e9c MOVQ	$0x5d7ae8,-0xc0(%RBP)

(1134) 0x4a9ea7 TEST	%R14,%R14

(1134) 0x4a9eaa JE	4a9ec0

(1134) 0x4a9eac MOV	-0xa8(%RBP),%RDI

(1134) 0x4a9eb3 LEA	(,%R14,8),%RSI

(1134) 0x4a9ebb CALL	404070 <_ZdlPvm@plt>

(1134) 0x4a9ec0 MOV	%R12,%RDI

(1134) 0x4a9ec3 CALL	404230 <_Unwind_Resume@plt>

(1134) 0x4a9ec8 VZEROUPPER

(1134) 0x4a9ecb JMP	4a9e74

0x4a9ecd NOPL	(%RAX)

Coverage (%)	Name	Source Location	Module
►48.60+	qmcplusplus::WaveFunction::eva[...]		exec
○	main._omp_fn.1		exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►48.15+	qmcplusplus::WaveFunction::eva[...]		exec
○	main._omp_fn.1		exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 18.75 to 6.75 cycles (2.78x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 26% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 18.75 to 14.79 cycles (1.27x speedup).

Details

31% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

60% of SSE/AVX loads are used in vector version.
8% of SSE/AVX stores are used in vector version.
33% of SSE/AVX addition or subtraction instructions are used in vector version.
33% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX fused multiply-add instructions are used in vector version.
20% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Detected 3 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

operator delete(void*, unsigned long): 1 occurrences►
qmcplusplus::TimerType
::start(): 1 occurrences►
qmcplusplus::TimerType
::stop(): 1 occurrences►
unknown: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

PUSH: 1 occurrences►

Type of elements and instruction set

7 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time). 2 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 14 FP arithmetical operations:

7: addition or subtraction (3 inside FMA instructions)
7: multiply (3 inside FMA instructions)

The binary function is loading 816 bytes (102 double precision FP elements). The binary function is storing 100 bytes (12 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.02 FP operations per loaded or stored byte.

General properties

nb instructions	149
nb uops	150
loop length	737
used x86 registers	16
used mmx registers	0
used xmm registers	11
used ymm registers	4
used zmm registers	6
nb stack references	9
ADD-SUB / MUL ratio	1.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	18.75 cycles
front end	18.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	7.33	7.33	7.33	7.33	7.33	7.33	16.25	16.25	16.25	16.25	3.00	3.00	2.50	2.50	2.00	2.00
cycles	7.33	7.33	7.33	7.33	7.33	7.33	16.25	16.25	16.25	16.25	3.00	3.00	2.50	2.50	2.00	2.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.75
Dispatch	16.25
Overall L1	18.75

Vectorization ratios

INT

all	35%
load	76%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	16%

all	23%
load	28%
store	33%
mul	33%
add-sub	33%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	33%

INT+FP

all	31%
load	60%
store	8%
mul	33%
add-sub	33%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	20%

Vector efficiency ratios

INT

all	31%
load	64%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	15%
load	16%
store	16%
mul	16%
add-sub	16%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	16%

INT+FP

all	26%
load	47%
store	12%
mul	16%
add-sub	16%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.75 cycles. At this rate:

17% of peak load performance is reached (43.52 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.33 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 18.75 to 16.25 cycles (1.15x speedup).

ASM code

In the binary file, the address of the function is: 4a9120

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
LEA 0x8(%RSP),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
AND $-0x40,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSHQ -0x8(%R10)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.71	N/A
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RDI,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB $0xc0,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc(%RDI),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %ECX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JE 4a9bfc <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xadc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x484(%R13),%R11D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD 0x478(%R13),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
CMP $0x1,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JE 4a9b6d <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xa4d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOVSXD %R11D,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %RDX,%XMM14	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
TEST %R11D,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JE 4a9a9e <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x97e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xd8(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xe0(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0xd8(%R13),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x480(%R13),%EDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVDQA64 0x1302d0(%RIP),%ZMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVDQA64 0x130306(%RIP),%ZMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
MOV 0x100(%R13),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x180(%R13),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVDQA64 0x13032e(%RIP),%ZMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVDQA64 0x130364(%RIP),%ZMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
LEA (%R9,%R9,2),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R13,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVDQA64 0x13038f(%RIP),%ZMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVDQA64 0x1303c5(%RIP),%ZMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVQ 0x158(%R13),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVDQA64 0x130072(%RIP),%YMM18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
MOV 0x18(%RSI),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RCX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVDQA64 0x130080(%RIP),%YMM17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVDQA64 0x130096(%RIP),%YMM16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVDQA 0x1300ae(%RIP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
LEA -0x1(%RDI),%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R10,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %XMM11,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R14D,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R12,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SAL $0x3,%R15	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA (%RBX,%R8,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%RAX,%R9,8),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %R15,%XMM12	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x30(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA -0x8(%RCX),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV -0xd8(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x140(%R13),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x100(%R13),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xe0(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R9,%R9,2),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x180(%R13),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RDX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVSD (%RDI),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVDDUP %XMM14,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMULPD (%R8),%XMM13,%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	vect (25.0%)
MOV 0x18(%R11),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMULSD 0x10(%R8),%XMM14,%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
VMULSD %XMM8,%XMM8,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
LEA (%RBX,%R14,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VADDPD (%RSI),%XMM11,%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
LEA (%R15,%R9,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VADDSD 0x10(%RSI),%XMM8,%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM6,0x10(%RSI)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVAPD %XMM11,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VUNPCKHPD %XMM11,%XMM11,%XMM12	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VFMADD132SD %XMM12,%XMM4,%XMM12	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	scal (12.5%)
VMOVUPD %XMM7,(%RSI)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD (%R9),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VFMADD132SD (%R10),%XMM5,%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	scal (12.5%)
VFNMADD132SD %XMM11,%XMM14,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	scal (12.5%)
VSUBSD %XMM12,%XMM15,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM3,(%R9)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
JMP 4a9a9e <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x97e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV 0x468(%RDI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RSI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R13,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 544ee0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0xc8(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x470(%RSI),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x47c(%RSI),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x478(%RSI),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RBX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x28(%RAX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP $0x487df0,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 4a9e11 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xcf1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP %R15D,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 4a9d81 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc61>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %ECX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R13D,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
SUB %R15D,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x468(%RSI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RSI,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 545120 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0xc8(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 4a915f <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x3f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a9d81 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc61>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x150(%RSI),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x110(%RSI),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x90(%RSI),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
PUSH %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15D,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL %R11	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	2	N/A
POP %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV -0xc8(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
POP %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 4a9d81 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc61>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV -0x50(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVQ $0x5d7ae8,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RBX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 4a9ec8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xda8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x48(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (,%RBX,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404070 <_ZdlPvm@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 18.75 to 6.75 cycles (2.78x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

31% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

60% of SSE/AVX loads are used in vector version.
8% of SSE/AVX stores are used in vector version.
33% of SSE/AVX addition or subtraction instructions are used in vector version.
33% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX fused multiply-add instructions are used in vector version.
20% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Detected 3 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

CALL instructions

Detected function call instructions.

Details

operator delete(void*, unsigned long): 1 occurrences►
qmcplusplus::TimerType
::start(): 1 occurrences►
qmcplusplus::TimerType
::stop(): 1 occurrences►
unknown: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

PUSH: 1 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function is composed of 14 FP arithmetical operations:

7: addition or subtraction (3 inside FMA instructions)
7: multiply (3 inside FMA instructions)

The binary function is loading 816 bytes (102 double precision FP elements). The binary function is storing 100 bytes (12 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.02 FP operations per loaded or stored byte.

General properties

nb instructions	149
nb uops	150
loop length	737
used x86 registers	16
used mmx registers	0
used xmm registers	11
used ymm registers	4
used zmm registers	6
nb stack references	9
ADD-SUB / MUL ratio	1.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	18.75 cycles
front end	18.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	7.33	7.33	7.33	7.33	7.33	7.33	16.25	16.25	16.25	16.25	3.00	3.00	2.50	2.50	2.00	2.00
cycles	7.33	7.33	7.33	7.33	7.33	7.33	16.25	16.25	16.25	16.25	3.00	3.00	2.50	2.50	2.00	2.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.75
Dispatch	16.25
Overall L1	18.75

Vectorization ratios

INT

all	35%
load	76%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	16%

all	23%
load	28%
store	33%
mul	33%
add-sub	33%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	33%

INT+FP

all	31%
load	60%
store	8%
mul	33%
add-sub	33%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	20%

Vector efficiency ratios

INT

all	31%
load	64%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	15%
load	16%
store	16%
mul	16%
add-sub	16%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	16%

INT+FP

all	26%
load	47%
store	12%
mul	16%
add-sub	16%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.75 cycles. At this rate:

17% of peak load performance is reached (43.52 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.33 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4a9120

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
LEA 0x8(%RSP),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
AND $-0x40,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSHQ -0x8(%R10)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.71	N/A
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RDI,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB $0xc0,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc(%RDI),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %ECX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JE 4a9bfc <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xadc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x484(%R13),%R11D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD 0x478(%R13),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
CMP $0x1,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JE 4a9b6d <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xa4d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOVSXD %R11D,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %RDX,%XMM14	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
TEST %R11D,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JE 4a9a9e <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x97e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xd8(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xe0(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0xd8(%R13),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x480(%R13),%EDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVDQA64 0x1302d0(%RIP),%ZMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVDQA64 0x130306(%RIP),%ZMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
MOV 0x100(%R13),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x180(%R13),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVDQA64 0x13032e(%RIP),%ZMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVDQA64 0x130364(%RIP),%ZMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
LEA (%R9,%R9,2),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R13,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVDQA64 0x13038f(%RIP),%ZMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVDQA64 0x1303c5(%RIP),%ZMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVQ 0x158(%R13),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVDQA64 0x130072(%RIP),%YMM18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
MOV 0x18(%RSI),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RCX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVDQA64 0x130080(%RIP),%YMM17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVDQA64 0x130096(%RIP),%YMM16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
VMOVDQA 0x1300ae(%RIP),%YMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (50.0%)
LEA -0x1(%RDI),%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R10,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %XMM11,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R14D,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R12,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SAL $0x3,%R15	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA (%RBX,%R8,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%RAX,%R9,8),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %R15,%XMM12	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x30(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA -0x8(%RCX),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV -0xd8(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x140(%R13),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x100(%R13),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xe0(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R9,%R9,2),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x180(%R13),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RDX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVSD (%RDI),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVDDUP %XMM14,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMULPD (%R8),%XMM13,%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	vect (25.0%)
MOV 0x18(%R11),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMULSD 0x10(%R8),%XMM14,%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
VMULSD %XMM8,%XMM8,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
LEA (%RBX,%R14,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VADDPD (%RSI),%XMM11,%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
LEA (%R15,%R9,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VADDSD 0x10(%RSI),%XMM8,%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM6,0x10(%RSI)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVAPD %XMM11,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VUNPCKHPD %XMM11,%XMM11,%XMM12	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VFMADD132SD %XMM12,%XMM4,%XMM12	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	scal (12.5%)
VMOVUPD %XMM7,(%RSI)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD (%R9),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VFMADD132SD (%R10),%XMM5,%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	4	0.50	scal (12.5%)
VFNMADD132SD %XMM11,%XMM14,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	scal (12.5%)
VSUBSD %XMM12,%XMM15,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM3,(%R9)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
JMP 4a9a9e <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x97e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV 0x468(%RDI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RSI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R13,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 544ee0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0xc8(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x470(%RSI),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x47c(%RSI),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x478(%RSI),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RBX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x28(%RAX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP $0x487df0,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 4a9e11 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xcf1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP %R15D,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 4a9d81 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc61>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %ECX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R13D,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
SUB %R15D,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x468(%RSI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RSI,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 545120 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0xc8(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 4a915f <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x3f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JMP 4a9d81 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc61>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x150(%RSI),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x110(%RSI),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x90(%RSI),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
PUSH %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15D,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL %R11	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	2	N/A
POP %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV -0xc8(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
POP %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 4a9d81 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc61>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV -0x50(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVQ $0x5d7ae8,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RBX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 4a9ec8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xda8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x48(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (,%RBX,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404070 <_ZdlPvm@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::DiracDeterminantRef >::evaluateGL(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib, std::allocator > >&, qmcplusplus:...–	0.62	1.03
▼Loop 1135 - - exec–	0.00	0.01
○Loop 1136 - - exec	0.38	0.62
○Loop 1137 - - exec	0.24	0.39
○Loop 1134 - - exec	0.00	0.00
○Loop 1138 - - exec	0.00	0.00

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

FMA

Workaround

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

FMA

Workaround

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code