OV - exec - Loop 324

	Loop Id: 324	Module: exec	Source: :0-0	Coverage: 0.02%

0x4214b0 VXORPD	%XMM21,%XMM21,%XMM21

0x4214b6 VADDSD	%XMM0,%XMM21,%XMM0

0x4214bc LEA	0x1(%R8),%RSI

0x4214c0 CMP	%RCX,%R8

0x4214c3 MOV	%RSI,%R8

0x4214c6 JE	421394

0x4214cc MOV	0x268(%RBP),%R9

0x4214d3 MOV	0x18(%R9),%R9

0x4214d7 MOV	(%R9,%R8,4),%R15

0x4214db MOV	%R15,%R14

0x4214de SHR	$0x20,%R14

0x4214e2 SUB	%R15D,%R14D

0x4214e5 TEST	%R14D,%R14D

0x4214e8 JLE	4214b0

0x4214ea MOV	0x30(%RSP),%RAX

0x4214ef LEA	(%R8,%RAX,1),%R9

0x4214f3 MOV	0x38(%RSP),%RAX

0x4214f8 MOV	(%RAX,%R9,8),%R9

0x4214fc VMOVSD	0x8(%R9),%XMM2

0x421502 MOV	%R14D,%R14D

0x421505 MOV	%R14,%R11

0x421508 MOVSXD	%R15D,%R13

0x42150b MOV	$-0x10,%ESI

0x421510 AND	%RSI,%R11

0x421513 JE	421800

0x421519 MOV	%RDI,%RAX

0x42151c VMOVQ	%R15,%XMM3

0x421521 VBROADCASTSD	%XMM2,%ZMM4

0x421527 MOV	(%RSP),%RSI

0x42152b LEA	(%RSI,%R13,8),%R12

0x42152f XOR	%R10D,%R10D

0x421532 XOR	%EBX,%EBX

0x421534 NOPW	%CS:(%RAX,%RAX,1)

  (327) 0x421540 VMOVUPD	(%R12,%RBX,8),%ZMM5

  (327) 0x421547 VMOVUPD	0x40(%R12,%RBX,8),%ZMM6

  (327) 0x42154f VMOVD	%EBX,%XMM7

  (327) 0x421553 VPADDD	%XMM3,%XMM7,%XMM7

  (327) 0x421557 VPBROADCASTD	%XMM7,%ZMM7

  (327) 0x42155d VPADDD	%ZMM29,%ZMM7,%ZMM7

  (327) 0x421563 VPCMPNEQD	%ZMM1,%ZMM7,%K0

  (327) 0x42156a VCMPPD	$0x1,%ZMM4,%ZMM5,%K1

  (327) 0x421571 VCMPPD	$0x1,%ZMM4,%ZMM6,%K2

  (327) 0x421578 KUNPCKBW	%K1,%K2,%K3

  (327) 0x42157c KANDW	%K0,%K3,%K3

  (327) 0x421580 MOVSXD	%R10D,%R10

  (327) 0x421583 KANDB	%K0,%K1,%K1

  (327) 0x421587 VCOMPRESSPD	%ZMM5,(%RDX,%R10,8){%K1}

  (327) 0x42158e LEA	(%RDX,%R10,8),%RSI

  (327) 0x421592 KSHIFTRW	$0x8,%K0,%K0

  (327) 0x421598 KANDB	%K0,%K2,%K2

  (327) 0x42159c KMOVB	%K1,%EDI

  (327) 0x4215a0 POPCNT	%EDI,%EDI

  (327) 0x4215a4 VCOMPRESSPD	%ZMM6,(%RSI,%RDI,8){%K2}

  (327) 0x4215ab KMOVW	%K3,%ESI

  (327) 0x4215af POPCNT	%ESI,%ESI

  (327) 0x4215b3 ADD	%ESI,%R10D

  (327) 0x4215b6 ADD	$0x10,%RBX

  (327) 0x4215ba CMP	%R11,%RBX

  (327) 0x4215bd JB	421540

0x4215bf CMP	%R14,%R11

0x4215c2 MOV	%RAX,%RDI

0x4215c5 JNE	421806

0x4215cb TEST	%R10D,%R10D

0x4215ce JLE	4214b0

0x4215d4 VMOVSD	0x238(%R9),%XMM4

0x4215dd MOV	0x218(%R9),%R11

0x4215e4 VMOVSD	0x18(%R9),%XMM21

0x4215eb VMOVSD	0x20(%R9),%XMM2

0x4215f1 VMOVSD	0x28(%R9),%XMM6

0x4215f7 VMOVSD	0x30(%R9),%XMM5

0x4215fd VMOVSD	0x38(%R9),%XMM13

0x421603 VMOVSD	0x40(%R9),%XMM12

0x421609 VMOVSD	0x48(%R9),%XMM15

0x42160f VMOVSD	0x50(%R9),%XMM14

0x421615 VMOVSD	0x58(%R9),%XMM7

0x42161b VMOVSD	0x60(%R9),%XMM3

0x421621 VMOVSD	0x68(%R9),%XMM10

0x421627 VMOVSD	0x70(%R9),%XMM9

0x42162d VMOVSD	0x78(%R9),%XMM16

0x421634 VMOVSD	0x80(%R9),%XMM8

0x42163d VMOVSD	0x88(%R9),%XMM18

0x421644 VMOVSD	0x90(%R9),%XMM17

0x42164b MOV	%R10D,%R10D

0x42164e MOV	%R10,%R9

0x421651 VPBROADCASTQ	%R10,%ZMM19

0x421657 VPBROADCASTQ	%R11,%ZMM11

0x42165d MOV	$-0x8,%ESI

0x421662 VBROADCASTSD	%XMM4,%ZMM20

0x421668 VBROADCASTSD	%XMM21,%ZMM4

0x42166e VBROADCASTSD	%XMM2,%ZMM2

0x421674 VBROADCASTSD	%XMM6,%ZMM6

0x42167a VBROADCASTSD	%XMM5,%ZMM5

0x421680 VBROADCASTSD	%XMM13,%ZMM13

0x421686 VBROADCASTSD	%XMM12,%ZMM12

0x42168c VBROADCASTSD	%XMM15,%ZMM15

0x421692 VBROADCASTSD	%XMM14,%ZMM14

0x421698 VBROADCASTSD	%XMM7,%ZMM7

0x42169e VBROADCASTSD	%XMM3,%ZMM3

0x4216a4 VBROADCASTSD	%XMM10,%ZMM10

0x4216aa VBROADCASTSD	%XMM9,%ZMM9

0x4216b0 VBROADCASTSD	%XMM16,%ZMM16

0x4216b6 VBROADCASTSD	%XMM8,%ZMM8

0x4216bc VBROADCASTSD	%XMM18,%ZMM18

0x4216c2 VBROADCASTSD	%XMM17,%ZMM17

0x4216c8 AND	%RSI,%R9

0x4216cb JE	42184b

0x4216d1 VXORPD	%XMM21,%XMM21,%XMM21

0x4216d7 XOR	%R14D,%R14D

0x4216da NOPW	(%RAX,%RAX,1)

  (325) 0x4216e0 VMULPD	(%RDX,%R14,8),%ZMM20,%ZMM22

  (325) 0x4216e7 VCVTTPD2DQ	%ZMM22,%YMM23

  (325) 0x4216ed VRNDSCALEPD	$0xb,%ZMM22,%ZMM24

  (325) 0x4216f4 VSUBPD	%ZMM24,%ZMM22,%ZMM22

  (325) 0x4216fa VXORPD	%XMM24,%XMM24,%XMM24

  (325) 0x421700 KXNORW	%K0,%K0,%K1

  (325) 0x421704 VGATHERDPD	(%R11,%YMM23,8),%ZMM24{%K1}

  (325) 0x42170b VXORPD	%XMM25,%XMM25,%XMM25

  (325) 0x421711 KXNORW	%K0,%K0,%K1

  (325) 0x421715 VGATHERDPD	0x8(%R11,%YMM23,8),%ZMM25{%K1}

  (325) 0x42171d VXORPD	%XMM26,%XMM26,%XMM26

  (325) 0x421723 KXNORW	%K0,%K0,%K1

  (325) 0x421727 VGATHERDPD	0x10(%R11,%YMM23,8),%ZMM26{%K1}

  (325) 0x42172f VXORPD	%XMM27,%XMM27,%XMM27

  (325) 0x421735 KXNORW	%K0,%K0,%K1

  (325) 0x421739 VGATHERDPD	0x18(%R11,%YMM23,8),%ZMM27{%K1}

  (325) 0x421741 VMOVAPD	%ZMM22,%ZMM23

  (325) 0x421747 VFMADD213PD	%ZMM2,%ZMM4,%ZMM23

  (325) 0x42174d VFMADD213PD	%ZMM6,%ZMM22,%ZMM23

  (325) 0x421753 VFMADD213PD	%ZMM5,%ZMM22,%ZMM23

  (325) 0x421759 VFMADD213PD	%ZMM21,%ZMM24,%ZMM23

  (325) 0x42175f VMOVAPD	%ZMM22,%ZMM21

  (325) 0x421765 VFMADD213PD	%ZMM12,%ZMM13,%ZMM21

  (325) 0x42176b VFMADD213PD	%ZMM15,%ZMM22,%ZMM21

  (325) 0x421771 VFMADD213PD	%ZMM14,%ZMM22,%ZMM21

  (325) 0x421777 VFMADD213PD	%ZMM23,%ZMM25,%ZMM21

  (325) 0x42177d VMOVAPD	%ZMM22,%ZMM23

  (325) 0x421783 VFMADD213PD	%ZMM3,%ZMM7,%ZMM23

  (325) 0x421789 VFMADD213PD	%ZMM10,%ZMM22,%ZMM23

  (325) 0x42178f VFMADD213PD	%ZMM9,%ZMM22,%ZMM23

  (325) 0x421795 VFMADD213PD	%ZMM21,%ZMM26,%ZMM23

  (325) 0x42179b VMOVAPD	%ZMM22,%ZMM21

  (325) 0x4217a1 VFMADD213PD	%ZMM8,%ZMM16,%ZMM21

  (325) 0x4217a7 VFMADD213PD	%ZMM18,%ZMM22,%ZMM21

  (325) 0x4217ad VFMADD213PD	%ZMM17,%ZMM22,%ZMM21

  (325) 0x4217b3 VFMADD213PD	%ZMM23,%ZMM27,%ZMM21

  (325) 0x4217b9 ADD	$0x8,%R14

  (325) 0x4217bd CMP	%R9,%R14

  (325) 0x4217c0 JB	4216e0

0x4217c6 VEXTRACTF64X4	$0x1,%ZMM21,%YMM22

0x4217cd VADDPD	%ZMM22,%ZMM21,%ZMM21

0x4217d3 VEXTRACTF32X4	$0x1,%YMM21,%XMM22

0x4217da VADDPD	%XMM22,%XMM21,%XMM21

0x4217e0 VSHUFPD	$0x1,%XMM21,%XMM21,%XMM22

0x4217e7 VADDSD	%XMM22,%XMM21,%XMM21

0x4217ed CMP	%R10,%R9

0x4217f0 JE	4214b6

0x4217f6 JMP	421854

0x421800 XOR	%R10D,%R10D

0x421803 XOR	%R11D,%R11D

0x421806 MOV	%EDI,%R12D

0x421809 SUB	%R15D,%R12D

0x42180c MOV	(%RSP),%RAX

0x421810 LEA	(%RAX,%R13,8),%RBX

0x421814 JMP	42182c

  (326) 0x421820 INC	%R11

  (326) 0x421823 CMP	%R11,%R14

  (326) 0x421826 JE	4215cb

  (326) 0x42182c VMOVSD	(%RBX,%R11,8),%XMM3

  (326) 0x421832 VUCOMISD	%XMM3,%XMM2

  (326) 0x421836 JBE	421820

  (326) 0x421838 CMP	%R11D,%R12D

  (326) 0x42183b JE	421820

  (326) 0x42183d MOVSXD	%R10D,%R10

  (326) 0x421840 VMOVSD	%XMM3,(%RDX,%R10,8)

  (326) 0x421846 INC	%R10D

  (326) 0x421849 JMP	421820

0x42184b VXORPD	%XMM21,%XMM21,%XMM21

0x421851 XOR	%R9D,%R9D

0x421854 VPBROADCASTQ	%R9,%ZMM22

0x42185a VPSUBQ	%ZMM22,%ZMM19,%ZMM19

0x421860 VPCMPNLEUQ	%ZMM28,%ZMM19,%K1

0x421867 VMOVUPD	(%RDX,%R9,8),%ZMM19{%K1}{z}

0x42186e VMOVUPD	0xc0(%RSP),%ZMM22

0x421876 VMOVAPD	%ZMM19,%ZMM22{%K1}

0x42187c VMOVUPD	%ZMM22,0xc0(%RSP)

0x421884 VMULPD	%ZMM22,%ZMM20,%ZMM19

0x42188a VCVTTPD2DQ	%ZMM19,%YMM20

0x421890 VRNDSCALEPD	$0xb,%ZMM19,%ZMM22

0x421897 VSUBPD	%ZMM22,%ZMM19,%ZMM19

0x42189d VPMOVSXDQ	%YMM20,%ZMM20

0x4218a3 VPSLLQ	$0x3,%ZMM20,%ZMM20

0x4218aa VPADDQ	%ZMM20,%ZMM11,%ZMM11

0x4218b0 KMOVQ	%K1,%K2

0x4218b5 VPXORD	%XMM20,%XMM20,%XMM20

0x4218bb VGATHERQPD	(,%ZMM11,1),%ZMM20{%K2}

0x4218c6 VMOVUPD	0x100(%RSP),%ZMM23

0x4218ce VMOVAPD	%ZMM20,%ZMM23{%K1}

0x4218d4 KMOVQ	%K1,%K2

0x4218d9 VXORPD	%XMM20,%XMM20,%XMM20

0x4218df VGATHERQPD	0x8(,%ZMM11,1),%ZMM20{%K2}

0x4218ea VMOVUPD	0x140(%RSP),%ZMM22

0x4218f2 VMOVAPD	%ZMM20,%ZMM22{%K1}

0x4218f8 VFMADD231PD	%ZMM13,%ZMM19,%ZMM12

0x4218fe VFMADD213PD	%ZMM15,%ZMM19,%ZMM12

0x421904 VFMADD213PD	%ZMM14,%ZMM19,%ZMM12

0x42190a VMOVUPD	%ZMM22,0x140(%RSP)

0x421912 VMULPD	%ZMM22,%ZMM12,%ZMM12

0x421918 KMOVQ	%K1,%K2

0x42191d VXORPD	%XMM13,%XMM13,%XMM13

0x421922 VGATHERQPD	0x10(,%ZMM11,1),%ZMM13{%K2}

0x42192d VMOVAPD	%ZMM13,%ZMM31{%K1}

0x421933 VFMADD231PD	%ZMM16,%ZMM19,%ZMM8

0x421939 VFMADD213PD	%ZMM18,%ZMM19,%ZMM8

0x42193f VFMADD213PD	%ZMM17,%ZMM19,%ZMM8

0x421945 KMOVQ	%K1,%K2

0x42194a VXORPD	%XMM13,%XMM13,%XMM13

0x42194f VGATHERQPD	0x18(,%ZMM11,1),%ZMM13{%K2}

0x42195a VMOVAPD	%ZMM13,%ZMM30{%K1}

0x421960 VFMADD231PD	%ZMM4,%ZMM19,%ZMM2

0x421966 VFMADD213PD	%ZMM6,%ZMM19,%ZMM2

0x42196c VFMADD213PD	%ZMM5,%ZMM19,%ZMM2

0x421972 VMOVUPD	%ZMM23,0x100(%RSP)

0x42197a VFMADD213PD	%ZMM12,%ZMM23,%ZMM2

0x421980 VFMADD231PD	%ZMM7,%ZMM19,%ZMM3

0x421986 VFMADD213PD	%ZMM10,%ZMM19,%ZMM3

0x42198c VFMADD213PD	%ZMM9,%ZMM19,%ZMM3

0x421992 VFMADD213PD	%ZMM2,%ZMM31,%ZMM3

0x421998 VFMADD231PD	%ZMM8,%ZMM30,%ZMM3{%K1}{z}

0x42199e VEXTRACTF64X4	$0x1,%ZMM3,%YMM2

0x4219a5 VADDPD	%ZMM2,%ZMM3,%ZMM2

0x4219ab VEXTRACTF128	$0x1,%YMM2,%XMM3

0x4219b1 VADDPD	%XMM3,%XMM2,%XMM2

0x4219b5 VSHUFPD	$0x1,%XMM2,%XMM2,%XMM3

0x4219ba VADDSD	%XMM3,%XMM2,%XMM2

0x4219be VADDSD	%XMM2,%XMM21,%XMM21

0x4219c4 JMP	4214b6

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

Coverage (%)	Name	Module
►95.51+	qmcplusplus::WaveFunction::eva[...]	exec
○	qmcplusplus::NonLocalPP<double[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►2.22+	qmcplusplus::WaveFunction::eva[...]	exec
○	qmcplusplus::NonLocalPP<double[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_fork_call	libiomp5.so
○	__kmpc_fork_call	libiomp5.so
○	main	exec
○	__libc_start_call_main	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.15
CQA speedup if FP arith vectorized	1.03
CQA speedup if fully vectorized	1.47
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.44
Bottlenecks	micro-operation queue,
Function	miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	43.50
CQA cycles if no scalar integer	37.88
CQA cycles if FP arith vectorized	42.13
CQA cycles if fully vectorized	29.50
Front-end cycles	43.50
P0 cycles	4.67
P1 cycles	4.67
P2 cycles	4.67
P3 cycles	4.67
P4 cycles	4.67
P5 cycles	4.67
P6 cycles	16.50
P7 cycles	16.50
P8 cycles	16.50
P9 cycles	16.50
P10 cycles	30.25
P11 cycles	30.25
P12 cycles	30.25
P13 cycles	30.25
P14 cycles	21.50
P15 cycles	21.50
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	159.00
Nb uops	348.00
Nb loads	36.00
Nb stores	3.00
Nb stack references	7.00
FLOP/cycle	6.62
Nb FLOP add-sub	32.00
Nb FLOP mul	16.00
Nb FLOP fma	120.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	21.15
Bytes prefetched	0.00
Bytes loaded	728.00
Bytes stored	192.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	47.93
Vectorization ratio load	29.63
Vectorization ratio store	100.00
Vectorization ratio mul	100.00
Vectorization ratio add_sub	58.33
Vectorization ratio fma	100.00
Vectorization ratio div_sqrt	NA
Vectorization ratio other	40.91
Vector-efficiency ratio all	44.63
Vector-efficiency ratio load	38.43
Vector-efficiency ratio store	100.00
Vector-efficiency ratio mul	100.00
Vector-efficiency ratio add_sub	50.52
Vector-efficiency ratio fma	100.00
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	32.67

Metric	Value
CQA speedup if no scalar integer	1.15
CQA speedup if FP arith vectorized	1.03
CQA speedup if fully vectorized	1.47
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.44
Bottlenecks	micro-operation queue,
Function	miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	43.50
CQA cycles if no scalar integer	37.88
CQA cycles if FP arith vectorized	42.13
CQA cycles if fully vectorized	29.50
Front-end cycles	43.50
P0 cycles	4.67
P1 cycles	4.67
P2 cycles	4.67
P3 cycles	4.67
P4 cycles	4.67
P5 cycles	4.67
P6 cycles	16.50
P7 cycles	16.50
P8 cycles	16.50
P9 cycles	16.50
P10 cycles	30.25
P11 cycles	30.25
P12 cycles	30.25
P13 cycles	30.25
P14 cycles	21.50
P15 cycles	21.50
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	159.00
Nb uops	348.00
Nb loads	36.00
Nb stores	3.00
Nb stack references	7.00
FLOP/cycle	6.62
Nb FLOP add-sub	32.00
Nb FLOP mul	16.00
Nb FLOP fma	120.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	21.15
Bytes prefetched	0.00
Bytes loaded	728.00
Bytes stored	192.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	47.93
Vectorization ratio load	29.63
Vectorization ratio store	100.00
Vectorization ratio mul	100.00
Vectorization ratio add_sub	58.33
Vectorization ratio fma	100.00
Vectorization ratio div_sqrt	NA
Vectorization ratio other	40.91
Vector-efficiency ratio all	44.63
Vector-efficiency ratio load	38.43
Vector-efficiency ratio store	100.00
Vector-efficiency ratio mul	100.00
Vector-efficiency ratio add_sub	50.52
Vector-efficiency ratio fma	100.00
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	32.67

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source file and lines
Module	exec

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=29
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 29 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 43.50 to 37.88 cycles (1.15x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is poorly vectorized. Only 44% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 43.50 to 29.50 cycles (1.47x speedup).

Details

47% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

29% of SSE/AVX loads are used in vector version.
58% of SSE/AVX addition or subtraction instructions are used in vector version.
40% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

Masked instructions

Detected masked instructions.

Details

Vector registers are partially exploited, which is expected if your loop is irregular or mixes elements of different sizes.

Workaround

If your loop is irregular, try to remove or hoist conditional structures out of your loop. If it mixes elements of different sizes, try to uniformize them.

FMA

Detected 120 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VCVTTPD2DQ: 1 occurrences►
VGATHERQPD: 4 occurrences►
VPBROADCASTQ: 3 occurrences►

Vector unaligned load/store instructions

Detected 4 suboptimal vector unaligned load/store instructions.

Details

VEXTRACTF128: 1 occurrences►
VEXTRACTF32X4: 1 occurrences►
VEXTRACTF64X4: 2 occurrences►

Workaround

Pass to your compiler a micro-architecture specialization option:
- Please look into your compiler manual for march=native or equivalent
Use vector aligned instructions:
1. align your arrays on 64 bytes boundaries
2. inform your compiler that your arrays are vector aligned: read your compiler manual.

Gather/scatter instructions

Detected gather/scatter instructions (typically caused by indirect accesses).

Details

VGATHERQPD: 4 occurrences►

Workaround

Try to simplify your code and/or replace indirect accesses with unit-stride ones.

Conversion instructions

Detected expensive conversion instructions.

Details

VCVTTPD2DQ (FP64 to INT32, SIMD): 1 occurrences►

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

4 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time). 2 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time). 21 AVX-512 instructions are processing arithmetic or math operations on double precision FP elements in vector mode (eight at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 288 FP arithmetical operations:

152: addition or subtraction (120 inside FMA instructions)
136: multiply (120 inside FMA instructions)

The binary loop is loading 728 bytes (91 double precision FP elements). The binary loop is storing 192 bytes (24 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.31 FP operations per loaded or stored byte.

General properties

nb instructions	159
nb uops	348
loop length	887
used x86 registers	16
used mmx registers	0
used xmm registers	20
used ymm registers	4
used zmm registers	25
nb stack references	7
ADD-SUB / MUL ratio	4.50

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	43.50 cycles
front end	43.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	4.67	4.67	4.67	4.67	4.67	4.67	16.50	16.50	16.50	16.50	30.25	30.25	30.25	30.25	21.50	21.50
cycles	4.67	4.67	4.67	4.67	4.67	4.67	16.50	16.50	16.50	16.50	30.25	30.25	30.25	30.25	21.50	21.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	43.50
Dispatch	30.25
Overall L1	43.50

Vectorization ratios

INT

all	20%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	66%
fma	NA (no fma vectorizable/vectorized instructions)
other	16%

all	56%
load	30%
store	100%
mul	100%
add-sub	55%
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	56%

INT+FP

all	47%
load	29%
store	100%
mul	100%
add-sub	58%
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	40%

Vector efficiency ratios

INT

all	24%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	68%
fma	NA (no fma vectorizable/vectorized instructions)
other	19%

all	51%
load	39%
store	100%
mul	100%
add-sub	44%
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	40%

INT+FP

all	44%
load	38%
store	100%
mul	100%
add-sub	50%
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	32%

Cycles and memory resources usage

Detected masked instructions: assuming all mask elements are active. Assuming all data fit into the L1 cache, each iteration of the binary loop takes 43.50 cycles. At this rate:

6% of peak load performance is reached (16.74 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
3% of peak store performance is reached (4.41 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 43.50 to 30.25 cycles (1.44x speedup).

ASM code

In the binary file, the address of the loop is: 4214cc

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
VXORPD %XMM21,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VADDSD %XMM0,%XMM21,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
LEA 0x1(%R8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP %RCX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSI,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JE 421394 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x54>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x268(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%R9),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R9,%R8,4),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R15,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SHR $0x20,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
SUB %R15D,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
TEST %R14D,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 4214b0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x170>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x30(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R8,%RAX,1),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x38(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%R9,8),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVSD 0x8(%R9),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %R14,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOVSXD %R15D,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $-0x10,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %RSI,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 421800 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x4c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %R15,%XMM3	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VBROADCASTSD %XMM2,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
MOV (%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RSI,%R13,8),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %R14,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
JNE 421806 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x4c6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
TEST %R10D,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 4214b0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x170>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VMOVSD 0x238(%R9),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x218(%R9),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVSD 0x18(%R9),%XMM21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x20(%R9),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x28(%R9),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x30(%R9),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x38(%R9),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x40(%R9),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x48(%R9),%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x50(%R9),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x58(%R9),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x60(%R9),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x68(%R9),%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x70(%R9),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x78(%R9),%XMM16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x80(%R9),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x88(%R9),%XMM18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x90(%R9),%XMM17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %R10,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ %R10,%ZMM19	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VPBROADCASTQ %R11,%ZMM11	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
MOV $-0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VBROADCASTSD %XMM4,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM21,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM2,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM6,%ZMM6	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM5,%ZMM5	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM13,%ZMM13	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM12,%ZMM12	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM15,%ZMM15	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM14,%ZMM14	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM7,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM3,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM10,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM9,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM16,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM8,%ZMM8	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM18,%ZMM18	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM17,%ZMM17	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
AND %RSI,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 42184b <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x50b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VXORPD %XMM21,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VEXTRACTF64X4 $0x1,%ZMM21,%YMM22	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VADDPD %ZMM22,%ZMM21,%ZMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VEXTRACTF32X4 $0x1,%YMM21,%XMM22	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM22,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM21,%XMM21,%XMM22	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM22,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
CMP %R10,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 4214b6 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x176>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 421854 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x514>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
XOR %R11D,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %EDI,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R15D,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RAX,%R13,8),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
JMP 42182c <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x4ec>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
VXORPD %XMM21,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
VPBROADCASTQ %R9,%ZMM22	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VPSUBQ %ZMM22,%ZMM19,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPCMPNLEUQ %ZMM28,%ZMM19,%K1																				vect (100.0%)
VMOVUPD (%RDX,%R9,8),%ZMM19{%K1}{z}	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVUPD 0xc0(%RSP),%ZMM22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVAPD %ZMM19,%ZMM22{%K1}	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VMOVUPD %ZMM22,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	1	vect (100.0%)
VMULPD %ZMM22,%ZMM20,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VCVTTPD2DQ %ZMM19,%YMM20	2	0	0	0	0	0	0	0	0	0	0	0	0.50	1	0.50	0	0	7	0.67	vect (100.0%)
VRNDSCALEPD $0xb,%ZMM19,%ZMM22	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VSUBPD %ZMM22,%ZMM19,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPMOVSXDQ %YMM20,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VPSLLQ $0x3,%ZMM20,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM20,%ZMM11,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
KMOVQ %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPXORD %XMM20,%XMM20,%XMM20	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VGATHERQPD (,%ZMM11,1),%ZMM20{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMOVUPD 0x100(%RSP),%ZMM23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVAPD %ZMM20,%ZMM23{%K1}	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
KMOVQ %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VXORPD %XMM20,%XMM20,%XMM20	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VGATHERQPD 0x8(,%ZMM11,1),%ZMM20{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMOVUPD 0x140(%RSP),%ZMM22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVAPD %ZMM20,%ZMM22{%K1}	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VFMADD231PD %ZMM13,%ZMM19,%ZMM12	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM15,%ZMM19,%ZMM12	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM14,%ZMM19,%ZMM12	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VMOVUPD %ZMM22,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	1	vect (100.0%)
VMULPD %ZMM22,%ZMM12,%ZMM12	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
KMOVQ %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VXORPD %XMM13,%XMM13,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VGATHERQPD 0x10(,%ZMM11,1),%ZMM13{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMOVAPD %ZMM13,%ZMM31{%K1}	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VFMADD231PD %ZMM16,%ZMM19,%ZMM8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM18,%ZMM19,%ZMM8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM17,%ZMM19,%ZMM8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
KMOVQ %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VXORPD %XMM13,%XMM13,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VGATHERQPD 0x18(,%ZMM11,1),%ZMM13{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMOVAPD %ZMM13,%ZMM30{%K1}	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VFMADD231PD %ZMM4,%ZMM19,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM6,%ZMM19,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM5,%ZMM19,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VMOVUPD %ZMM23,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	1	vect (100.0%)
VFMADD213PD %ZMM12,%ZMM23,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD231PD %ZMM7,%ZMM19,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM10,%ZMM19,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM9,%ZMM19,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM2,%ZMM31,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD231PD %ZMM8,%ZMM30,%ZMM3{%K1}{z}	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VEXTRACTF64X4 $0x1,%ZMM3,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VADDPD %ZMM2,%ZMM3,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM2,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM3,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM2,%XMM2,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM3,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VADDSD %XMM2,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
JMP 4214b6 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x176>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A

Function	miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source file and lines
Module	exec

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=29
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

47% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

29% of SSE/AVX loads are used in vector version.
58% of SSE/AVX addition or subtraction instructions are used in vector version.
40% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

Masked instructions

Detected masked instructions.

Details

Vector registers are partially exploited, which is expected if your loop is irregular or mixes elements of different sizes.

Workaround

If your loop is irregular, try to remove or hoist conditional structures out of your loop. If it mixes elements of different sizes, try to uniformize them.

FMA

Detected 120 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VCVTTPD2DQ: 1 occurrences►
VGATHERQPD: 4 occurrences►
VPBROADCASTQ: 3 occurrences►

Vector unaligned load/store instructions

Detected 4 suboptimal vector unaligned load/store instructions.

Details

VEXTRACTF128: 1 occurrences►
VEXTRACTF32X4: 1 occurrences►
VEXTRACTF64X4: 2 occurrences►

Workaround

Pass to your compiler a micro-architecture specialization option:
- Please look into your compiler manual for march=native or equivalent
Use vector aligned instructions:
1. align your arrays on 64 bytes boundaries
2. inform your compiler that your arrays are vector aligned: read your compiler manual.

Gather/scatter instructions

Detected gather/scatter instructions (typically caused by indirect accesses).

Details

VGATHERQPD: 4 occurrences►

Workaround

Try to simplify your code and/or replace indirect accesses with unit-stride ones.

Conversion instructions

Detected expensive conversion instructions.

Details

VCVTTPD2DQ (FP64 to INT32, SIMD): 1 occurrences►

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 288 FP arithmetical operations:

152: addition or subtraction (120 inside FMA instructions)
136: multiply (120 inside FMA instructions)

The binary loop is loading 728 bytes (91 double precision FP elements). The binary loop is storing 192 bytes (24 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.31 FP operations per loaded or stored byte.

General properties

nb instructions	159
nb uops	348
loop length	887
used x86 registers	16
used mmx registers	0
used xmm registers	20
used ymm registers	4
used zmm registers	25
nb stack references	7
ADD-SUB / MUL ratio	4.50

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	43.50 cycles
front end	43.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	4.67	4.67	4.67	4.67	4.67	4.67	16.50	16.50	16.50	16.50	30.25	30.25	30.25	30.25	21.50	21.50
cycles	4.67	4.67	4.67	4.67	4.67	4.67	16.50	16.50	16.50	16.50	30.25	30.25	30.25	30.25	21.50	21.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	43.50
Dispatch	30.25
Overall L1	43.50

Vectorization ratios

INT

all	20%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	66%
fma	NA (no fma vectorizable/vectorized instructions)
other	16%

all	56%
load	30%
store	100%
mul	100%
add-sub	55%
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	56%

INT+FP

all	47%
load	29%
store	100%
mul	100%
add-sub	58%
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	40%

Vector efficiency ratios

INT

all	24%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	68%
fma	NA (no fma vectorizable/vectorized instructions)
other	19%

all	51%
load	39%
store	100%
mul	100%
add-sub	44%
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	40%

INT+FP

all	44%
load	38%
store	100%
mul	100%
add-sub	50%
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	32%

Cycles and memory resources usage

Detected masked instructions: assuming all mask elements are active. Assuming all data fit into the L1 cache, each iteration of the binary loop takes 43.50 cycles. At this rate:

6% of peak load performance is reached (16.74 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
3% of peak store performance is reached (4.41 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 4214cc

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
VXORPD %XMM21,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VADDSD %XMM0,%XMM21,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
LEA 0x1(%R8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP %RCX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSI,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JE 421394 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x54>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x268(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%R9),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R9,%R8,4),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R15,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SHR $0x20,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
SUB %R15D,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
TEST %R14D,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 4214b0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x170>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x30(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R8,%RAX,1),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x38(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%R9,8),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVSD 0x8(%R9),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %R14,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOVSXD %R15D,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $-0x10,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %RSI,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 421800 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x4c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %R15,%XMM3	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VBROADCASTSD %XMM2,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
MOV (%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RSI,%R13,8),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %R14,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
JNE 421806 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x4c6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
TEST %R10D,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 4214b0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x170>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VMOVSD 0x238(%R9),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x218(%R9),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVSD 0x18(%R9),%XMM21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x20(%R9),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x28(%R9),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x30(%R9),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x38(%R9),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x40(%R9),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x48(%R9),%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x50(%R9),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x58(%R9),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x60(%R9),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x68(%R9),%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x70(%R9),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x78(%R9),%XMM16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x80(%R9),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x88(%R9),%XMM18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x90(%R9),%XMM17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %R10,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ %R10,%ZMM19	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VPBROADCASTQ %R11,%ZMM11	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
MOV $-0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VBROADCASTSD %XMM4,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM21,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM2,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM6,%ZMM6	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM5,%ZMM5	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM13,%ZMM13	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM12,%ZMM12	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM15,%ZMM15	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM14,%ZMM14	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM7,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM3,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM10,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM9,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM16,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM8,%ZMM8	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM18,%ZMM18	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
VBROADCASTSD %XMM17,%ZMM17	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
AND %RSI,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 42184b <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x50b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VXORPD %XMM21,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VEXTRACTF64X4 $0x1,%ZMM21,%YMM22	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VADDPD %ZMM22,%ZMM21,%ZMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VEXTRACTF32X4 $0x1,%YMM21,%XMM22	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM22,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM21,%XMM21,%XMM22	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM22,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
CMP %R10,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 4214b6 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x176>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 421854 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x514>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
XOR %R11D,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %EDI,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R15D,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RAX,%R13,8),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
JMP 42182c <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x4ec>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
VXORPD %XMM21,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
VPBROADCASTQ %R9,%ZMM22	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VPSUBQ %ZMM22,%ZMM19,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPCMPNLEUQ %ZMM28,%ZMM19,%K1																				vect (100.0%)
VMOVUPD (%RDX,%R9,8),%ZMM19{%K1}{z}	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVUPD 0xc0(%RSP),%ZMM22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVAPD %ZMM19,%ZMM22{%K1}	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VMOVUPD %ZMM22,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	1	vect (100.0%)
VMULPD %ZMM22,%ZMM20,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VCVTTPD2DQ %ZMM19,%YMM20	2	0	0	0	0	0	0	0	0	0	0	0	0.50	1	0.50	0	0	7	0.67	vect (100.0%)
VRNDSCALEPD $0xb,%ZMM19,%ZMM22	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VSUBPD %ZMM22,%ZMM19,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPMOVSXDQ %YMM20,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VPSLLQ $0x3,%ZMM20,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM20,%ZMM11,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
KMOVQ %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPXORD %XMM20,%XMM20,%XMM20	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VGATHERQPD (,%ZMM11,1),%ZMM20{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMOVUPD 0x100(%RSP),%ZMM23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVAPD %ZMM20,%ZMM23{%K1}	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
KMOVQ %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VXORPD %XMM20,%XMM20,%XMM20	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VGATHERQPD 0x8(,%ZMM11,1),%ZMM20{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMOVUPD 0x140(%RSP),%ZMM22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVAPD %ZMM20,%ZMM22{%K1}	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VFMADD231PD %ZMM13,%ZMM19,%ZMM12	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM15,%ZMM19,%ZMM12	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM14,%ZMM19,%ZMM12	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VMOVUPD %ZMM22,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	1	vect (100.0%)
VMULPD %ZMM22,%ZMM12,%ZMM12	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
KMOVQ %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VXORPD %XMM13,%XMM13,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VGATHERQPD 0x10(,%ZMM11,1),%ZMM13{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMOVAPD %ZMM13,%ZMM31{%K1}	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VFMADD231PD %ZMM16,%ZMM19,%ZMM8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM18,%ZMM19,%ZMM8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM17,%ZMM19,%ZMM8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
KMOVQ %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VXORPD %XMM13,%XMM13,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VGATHERQPD 0x18(,%ZMM11,1),%ZMM13{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMOVAPD %ZMM13,%ZMM30{%K1}	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VFMADD231PD %ZMM4,%ZMM19,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM6,%ZMM19,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM5,%ZMM19,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VMOVUPD %ZMM23,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	1	vect (100.0%)
VFMADD213PD %ZMM12,%ZMM23,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD231PD %ZMM7,%ZMM19,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM10,%ZMM19,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM9,%ZMM19,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD213PD %ZMM2,%ZMM31,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VFMADD231PD %ZMM8,%ZMM30,%ZMM3{%K1}{z}	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VEXTRACTF64X4 $0x1,%ZMM3,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VADDPD %ZMM2,%ZMM3,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM2,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM3,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM2,%XMM2,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM3,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VADDSD %XMM2,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
JMP 4214b6 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x176>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A

Report Configuration

Code clean check

Workaround

Vectorization

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Workaround

Execution units bottlenecks

Masked instructions

Details

Workaround

FMA

Workaround

Complex instructions

Details

Vector unaligned load/store instructions

Details

Workaround

Gather/scatter instructions

Details

Workaround

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Masked instructions

Details

Workaround

FMA

Workaround

Complex instructions

Details

Vector unaligned load/store instructions

Details

Workaround

Gather/scatter instructions

Details

Workaround

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code