OV - exec - Function qmcplusplus::TimerType<std::chrono::_V2::system

	Function: qmcplusplus::TimerType<std::chrono::_V2::system_clock>::start()	Module: exec	Source: :0-0	Coverage (incl. loops): 0.02% \| (excl. loops): 0.02%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x48ac70 CMPB	$0,0x38(%RDI)

0x48ac74 JE	48ae1d

0x48ac7a PUSH	%RBP

0x48ac7b PUSH	%R15

0x48ac7d PUSH	%R14

0x48ac7f PUSH	%R13

0x48ac81 PUSH	%R12

0x48ac83 PUSH	%RBX

0x48ac84 SUB	$0x18,%RSP

0x48ac88 MOV	%RDI,%R14

0x48ac8b CALL	4045f0 <omp_get_level@plt>

0x48ac90 TEST	%EAX,%EAX

0x48ac92 JLE	48ad8d

0x48ac98 MOV	%R14,0x10(%RSP)

0x48ac9d MOV	$0x1,%BL

0x48ac9f MOV	%EAX,0xc(%RSP)

0x48aca3 CMP	$0x8,%EAX

0x48aca6 JB	48ad48

0x48acac MOV	0xc(%RSP),%EAX

0x48acb0 MOV	%EAX,%EBP

0x48acb2 SHR	$0x3,%EBP

0x48acb5 MOV	$0x1,%BL

0x48acb7 MOV	%EAX,%R14D

0x48acba NOPW	(%RAX,%RAX,1)

(1359) 0x48acc0 MOV	%R14D,%EDI

(1359) 0x48acc3 CALL	404230 <omp_get_ancestor_thread_num@plt>

(1359) 0x48acc8 MOV	%EAX,%R15D

(1359) 0x48accb LEA	-0x1(%R14),%EDI

(1359) 0x48accf CALL	404230 <omp_get_ancestor_thread_num@plt>

(1359) 0x48acd4 MOV	%EAX,%R12D

(1359) 0x48acd7 OR	%R15D,%R12D

(1359) 0x48acda LEA	-0x2(%R14),%EDI

(1359) 0x48acde CALL	404230 <omp_get_ancestor_thread_num@plt>

(1359) 0x48ace3 MOV	%EAX,%R15D

(1359) 0x48ace6 LEA	-0x3(%R14),%EDI

(1359) 0x48acea CALL	404230 <omp_get_ancestor_thread_num@plt>

(1359) 0x48acef MOV	%EAX,%R13D

(1359) 0x48acf2 OR	%R15D,%R13D

(1359) 0x48acf5 OR	%R12D,%R13D

(1359) 0x48acf8 LEA	-0x4(%R14),%EDI

(1359) 0x48acfc CALL	404230 <omp_get_ancestor_thread_num@plt>

(1359) 0x48ad01 MOV	%EAX,%R15D

(1359) 0x48ad04 LEA	-0x5(%R14),%EDI

(1359) 0x48ad08 CALL	404230 <omp_get_ancestor_thread_num@plt>

(1359) 0x48ad0d MOV	%EAX,%R12D

(1359) 0x48ad10 OR	%R15D,%R12D

(1359) 0x48ad13 OR	%R13D,%R12D

(1359) 0x48ad16 LEA	-0x6(%R14),%EDI

(1359) 0x48ad1a CALL	404230 <omp_get_ancestor_thread_num@plt>

(1359) 0x48ad1f MOV	%EAX,%R15D

(1359) 0x48ad22 LEA	-0x7(%R14),%EDI

(1359) 0x48ad26 CALL	404230 <omp_get_ancestor_thread_num@plt>

(1359) 0x48ad2b OR	%R15D,%EAX

(1359) 0x48ad2e MOVZX	%BL,%EBX

(1359) 0x48ad31 OR	%R12D,%EAX

(1359) 0x48ad34 MOV	$0,%EAX

(1359) 0x48ad39 CMOVNE	%EAX,%EBX

(1359) 0x48ad3c ADD	$-0x8,%R14D

(1359) 0x48ad40 DEC	%EBP

(1359) 0x48ad42 JNE	48acc0

0x48ad48 MOV	0xc(%RSP),%R15D

0x48ad4d MOV	%R15D,%EAX

0x48ad50 AND	$-0x8,%EAX

0x48ad53 SUB	%EAX,%R15D

0x48ad56 JBE	48ad7f

0x48ad58 XOR	%EBP,%EBP

0x48ad5a MOV	0x10(%RSP),%R14

0x48ad5f NOP

(1358) 0x48ad60 MOV	%R15D,%EDI

(1358) 0x48ad63 CALL	404230 <omp_get_ancestor_thread_num@plt>

(1358) 0x48ad68 TEST	%EAX,%EAX

(1358) 0x48ad6a MOVZX	%BL,%EBX

(1358) 0x48ad6d CMOVNE	%EBP,%EBX

(1358) 0x48ad70 DEC	%R15D

(1358) 0x48ad73 JNE	48ad60

0x48ad75 TEST	$0x1,%BL

0x48ad78 JNE	48ad8d

0x48ad7a JMP	48ae0f

0x48ad7f MOV	0x10(%RSP),%R14

0x48ad84 TEST	$0x1,%BL

0x48ad87 JE	48ae0f

0x48ad8d MOV	0x48(%R14),%RAX

0x48ad91 TEST	%RAX,%RAX

0x48ad94 JE	48ae07

0x48ad96 MOV	0x48(%RAX),%RCX

0x48ad9a CMP	0x40(%RAX),%RCX

0x48ad9e JE	48add8

0x48ada0 MOV	-0x8(%RCX),%RAX

0x48ada4 TEST	%RAX,%RAX

0x48ada7 JE	48add8

0x48ada9 VMOVUPS	0x50(%RAX),%XMM0

0x48adae VMOVUPS	%XMM0,0x50(%R14)

0x48adb4 MOVSXD	0x60(%RAX),%RAX

0x48adb8 MOV	%EAX,0x60(%R14)

0x48adbc MOVZX	0x40(%R14),%ECX

0x48adc1 MOV	%CL,0x50(%R14,%RAX,1)

0x48adc6 MOV	0x60(%R14),%EAX

0x48adca CMP	$0xf,%EAX

0x48adcd JL	48adf5

0x48adcf MOVB	$0x1,0xe5201(%RIP)

0x48add6 JMP	48adfb

0x48add8 VXORPS	%XMM0,%XMM0,%XMM0

0x48addc VMOVUPS	%XMM0,0x50(%R14)

0x48ade2 MOVZX	0x40(%R14),%EAX

0x48ade7 MOV	%AL,0x50(%R14)

0x48adeb MOVL	$0x1,0x60(%R14)

0x48adf3 JMP	48adfb

0x48adf5 INC	%EAX

0x48adf7 MOV	%EAX,0x60(%R14)

0x48adfb MOV	0x48(%R14),%RDI

0x48adff MOV	%R14,%RSI

0x48ae02 CALL	490860 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>

0x48ae07 CALL	4046b0 <_ZNSt6chrono3_V212system_clock3nowEv@plt>

0x48ae0c MOV	%RAX,(%R14)

0x48ae0f ADD	$0x18,%RSP

0x48ae13 POP	%RBX

0x48ae14 POP	%R12

0x48ae16 POP	%R13

0x48ae18 POP	%R14

0x48ae1a POP	%R15

0x48ae1c POP	%RBP

0x48ae1d RET

0x48ae1e XCHG	%AX,%AX

Coverage (%)	Name	Module
►17.96+	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►11.36+	qmcplusplus::SoaDistanceTableA[...]	exec
○	qmcplusplus::ParticleSet::upda[...]	exec
○	qmcplusplus::NonLocalPP<double[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►10.41+	qmcplusplus::ParticleSet::upda[...]	exec
○	qmcplusplus::NonLocalPP<double[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►8.06+	miniqmcreference::DiracDetermi[...]	exec
○	qmcplusplus::WaveFunction::rat[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►5.79+	qmcplusplus::WaveFunction::eva[...]	exec
○	qmcplusplus::NonLocalPP<double[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►4.91+	qmcplusplus::WaveFunction::eva[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►4.69+	qmcplusplus::SoaDistanceTableA[...]	exec
○	qmcplusplus::ParticleSet::acce[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►3.96+	miniqmcreference::einspline_sp[...]	exec
○	miniqmcreference::DiracDetermi[...]	exec
○	qmcplusplus::WaveFunction::rat[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►3.96+	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►3.08+	qmcplusplus::WaveFunction::acc[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►2.71+	qmcplusplus::ParticleSet::acce[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►1.83+	qmcplusplus::SoaDistanceTableA[...]	exec
○	qmcplusplus::ParticleSet::comp[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►1.83+	qmcplusplus::WaveFunction::rat[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►1.76+	qmcplusplus::SoaDistanceTableA[...]	exec
○	qmcplusplus::ParticleSet::acce[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►1.61+	qmcplusplus::SoaDistanceTableA[...]	exec
○	qmcplusplus::ParticleSet::comp[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►1.47+	miniqmcreference::DiracDetermi[...]	exec
○	qmcplusplus::WaveFunction::eva[...]	exec
○	qmcplusplus::NonLocalPP<double[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►1.47+	qmcplusplus::ParticleSet::comp[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►1.39+	qmcplusplus::SoaDistanceTableA[...]	exec
○	qmcplusplus::ParticleSet::upda[...]	exec
○	qmcplusplus::NonLocalPP<double[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►1.39+	miniqmcreference::DiracDetermi[...]	exec
○	qmcplusplus::WaveFunction::eva[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►1.25+	miniqmcreference::DiracDetermi[...]	exec
○	qmcplusplus::WaveFunction::rat[...]	exec
○	main.extracted.109	exec
○	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.02% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 10.00 to 3.33 cycles (3.00x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 10% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 10.00 to 0.43 cycles (23.27x speedup).

Details

16% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

25% of SSE/AVX loads are used in vector version.
22% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
8% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

omp_get_level@plt: 1 occurrences►
qmcplusplus::TimerManager
>::push_timer(qmcplusplus::TimerType
*): 1 occurrences►
std::chrono::_V2::system_clock::now(): 1 occurrences►

Conversion instructions

Detected expensive conversion instructions.

Details

MOVZX: 2 occurrences►

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 91 bytes. The binary function is storing 67 bytes.

General properties

nb instructions	80
nb uops	80
loop length	275
used x86 registers	11
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	0
nb stack references	2

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	10.00 cycles
front end	10.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.17	6.17	6.17	6.17	6.17	6.17	7.25	7.25	7.25	7.25	0.00	0.00	0.00	0.00	1.00	1.00
cycles	6.17	6.17	6.17	6.17	6.17	6.17	7.25	7.25	7.25	7.25	0.00	0.00	0.00	0.00	1.00	1.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	10.00
Dispatch	7.25
Overall L1	10.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	100%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	16%
load	25%
store	22%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	8%

Vector efficiency ratios

INT

all	7%
load	6%
store	7%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
other	8%

all	25%
load	25%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	10%
load	11%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 10.00 cycles. At this rate:

3% of peak load performance is reached (9.10 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (6.70 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 10.00 to 7.25 cycles (1.38x speedup).

ASM code

In the binary file, the address of the function is: 48ac70

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P14	P15	Latency	Recip. throughput	Vectorization
CMPB $0,0x38(%RDI)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (1.6%)
JE 48ae1d <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1ad>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x18,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4045f0 <omp_get_level@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
TEST %EAX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 48ad8d <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x11d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R14,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV $0x1,%BL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %EAX,0xc(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
CMP $0x8,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
JB 48ad48 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xd8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0xc(%RSP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %EAX,%EBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
SHR $0x3,%EBP	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33	scal (6.3%)
MOV $0x1,%BL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %EAX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0xc(%RSP),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (6.3%)
MOV %R15D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x8,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SUB %EAX,%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
JBE 48ad7f <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x10f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EBP,%EBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV 0x10(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
TEST $0x1,%BL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JNE 48ad8d <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x11d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
JMP 48ae0f <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x19f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV 0x10(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
TEST $0x1,%BL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JE 48ae0f <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x19f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x48(%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 48ae07 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x197>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x48(%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP 0x40(%RAX),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 48add8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x168>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x8(%RCX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 48add8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x168>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
VMOVUPS 0x50(%RAX),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.50	vect (25.0%)
VMOVUPS %XMM0,0x50(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (25.0%)
MOVSXD 0x60(%RAX),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	N/A
MOV %EAX,0x60(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOVZX 0x40(%R14),%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	N/A
MOV %CL,0x50(%R14,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	N/A
MOV 0x60(%R14),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP $0xf,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 48adf5 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x185>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOVB $0x1,0xe5201(%RIP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (1.6%)
JMP 48adfb <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x18b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
VXORPS %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVUPS %XMM0,0x50(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (25.0%)
MOVZX 0x40(%R14),%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	N/A
MOV %AL,0x50(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	N/A
MOVL $0x1,0x60(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
JMP 48adfb <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x18b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %EAX,0x60(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV 0x48(%R14),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 490860 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
CALL 4046b0 <_ZNSt6chrono3_V212system_clock3nowEv@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
MOV %RAX,(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x18,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.02% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 10.00 to 3.33 cycles (3.00x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

16% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

25% of SSE/AVX loads are used in vector version.
22% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
8% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

omp_get_level@plt: 1 occurrences►
qmcplusplus::TimerManager
>::push_timer(qmcplusplus::TimerType
*): 1 occurrences►
std::chrono::_V2::system_clock::now(): 1 occurrences►

Conversion instructions

Detected expensive conversion instructions.

Details

MOVZX: 2 occurrences►

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 91 bytes. The binary function is storing 67 bytes.

General properties

nb instructions	80
nb uops	80
loop length	275
used x86 registers	11
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	0
nb stack references	2

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	10.00 cycles
front end	10.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.17	6.17	6.17	6.17	6.17	6.17	7.25	7.25	7.25	7.25	0.00	0.00	0.00	0.00	1.00	1.00
cycles	6.17	6.17	6.17	6.17	6.17	6.17	7.25	7.25	7.25	7.25	0.00	0.00	0.00	0.00	1.00	1.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	10.00
Dispatch	7.25
Overall L1	10.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	100%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	16%
load	25%
store	22%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	8%

Vector efficiency ratios

INT

all	7%
load	6%
store	7%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
other	8%

all	25%
load	25%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	10%
load	11%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 10.00 cycles. At this rate:

3% of peak load performance is reached (9.10 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (6.70 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 48ac70

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P14	P15	Latency	Recip. throughput	Vectorization
CMPB $0,0x38(%RDI)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (1.6%)
JE 48ae1d <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1ad>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x18,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4045f0 <omp_get_level@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
TEST %EAX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 48ad8d <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x11d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R14,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV $0x1,%BL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %EAX,0xc(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
CMP $0x8,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
JB 48ad48 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xd8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0xc(%RSP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %EAX,%EBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
SHR $0x3,%EBP	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33	scal (6.3%)
MOV $0x1,%BL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %EAX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0xc(%RSP),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (6.3%)
MOV %R15D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x8,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SUB %EAX,%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
JBE 48ad7f <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x10f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EBP,%EBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV 0x10(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
TEST $0x1,%BL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JNE 48ad8d <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x11d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
JMP 48ae0f <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x19f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV 0x10(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
TEST $0x1,%BL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JE 48ae0f <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x19f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x48(%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 48ae07 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x197>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x48(%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP 0x40(%RAX),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 48add8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x168>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x8(%RCX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 48add8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x168>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
VMOVUPS 0x50(%RAX),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.50	vect (25.0%)
VMOVUPS %XMM0,0x50(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (25.0%)
MOVSXD 0x60(%RAX),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	N/A
MOV %EAX,0x60(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOVZX 0x40(%R14),%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	N/A
MOV %CL,0x50(%R14,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	N/A
MOV 0x60(%R14),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP $0xf,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 48adf5 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x185>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOVB $0x1,0xe5201(%RIP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (1.6%)
JMP 48adfb <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x18b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
VXORPS %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVUPS %XMM0,0x50(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (25.0%)
MOVZX 0x40(%R14),%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	N/A
MOV %AL,0x50(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	N/A
MOVL $0x1,0x60(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
JMP 48adfb <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x18b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %EAX,0x60(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV 0x48(%R14),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 490860 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
CALL 4046b0 <_ZNSt6chrono3_V212system_clock3nowEv@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
MOV %RAX,(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x18,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼qmcplusplus::TimerType::start()–	0.02	0.03
○Loop 1358 - - exec	0.00	0.01
○Loop 1359 - - exec	0.00	0.00

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code