OV - - Function _ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7

	Function: _ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGL ...	Module: exec	Source: DiracDeterminantRef.cpp:152-181 [...]	Coverage: 0.26%

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h: 217 - 217

--------------------------------------------------------------------------------

217:   inline Type_t* operator[](size_type i) { return X.data() + i * D2; }

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp: 82 - 156

--------------------------------------------------------------------------------

82:   for (int i = 0; i < n; i++)

83:     res += a[i] * b[i];

[...]

155:   for (int i = 0; i < n; i++)

156:     res += a[i] * b[i];

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h: 129 - 131

--------------------------------------------------------------------------------

129:     Type_t res = lhs[0] * rhs[0];

130:     for (unsigned d = 1; d < D; ++d)

131:       res += lhs[d] * rhs[d];

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h: 62 - 62

--------------------------------------------------------------------------------

62:       X[d] = T(0);

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 56 - 248

--------------------------------------------------------------------------------

56:   explicit inline Vector(T* ref, size_t n) : nLocal(n), X(ref) {}

[...]

144:   virtual ~Vector() { free(); }

[...]

210:     if (nAllocated)

[...]

221:   inline Type_t& operator[](size_t i)

222:   {

223:     return X[i];

[...]

248:   inline pointer data() { return X; }

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/SPOSet.h: 106 - 111

--------------------------------------------------------------------------------

106:     for (int iat = first, i = 0; iat < last; ++iat, ++i)

107:     {

108:       ValueVector_t v(logdet[i], OrbitalSetSize);

109:       GradVector_t g(dlogdet[i], OrbitalSetSize);

110:       ValueVector_t l(d2logdet[i], OrbitalSetSize);

111:       evaluate(P, iat, v, g, l);

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 63 - 94

--------------------------------------------------------------------------------

63:     return (a * b);

[...]

94:     (const_cast<T1&>(a) += b);

/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/unique_ptr.h: 199 - 199

--------------------------------------------------------------------------------

199:       pointer    _M_ptr() const noexcept { return std::get<0>(_M_t); }

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp: 152 - 181

--------------------------------------------------------------------------------

152: void DiracDeterminantRef<DU_TYPE>::evaluateGL(ParticleSet& P,

153:                                               ParticleSet::ParticleGradient& G,

154:                                               ParticleSet::ParticleLaplacian& L,

155:                                               bool fromscratch)

156: {

157:   if (UpdateMode == ORB_PBYP_RATIO)

158:   { //need to compute dpsiM and d2psiM. Do not touch psiM!

159:     SPOVGLTimer->start();

160:     Phi->evaluate_notranspose(P, FirstIndex, LastIndex, psiM_temp, dpsiM, d2psiM);

161:     SPOVGLTimer->stop();

162:   }

163:

164:   if (NumPtcls == 1)

165:   {

166:     ValueType y = psiM(0, 0);

167:     GradType rv = y * dpsiM(0, 0);

168:     G[FirstIndex] += rv;

169:     L[FirstIndex] += y * d2psiM(0, 0) - dot(rv, rv);

170:   }

171:   else

172:   {

173:     for (size_t i = 0, iat = FirstIndex; i < NumPtcls; ++i, ++iat)

174:     {

175:       mValueType dot_temp = simd::dot(psiM[i], d2psiM[i], NumOrbitals);

176:       mGradType rv        = simd::dot(psiM[i], dpsiM[i], NumOrbitals);

177:       G[iat] += rv;

178:       L[iat] += dot_temp - dot(rv, rv);

179:     }

180:   }

181: }

/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/new_allocator.h: 100 - 168

--------------------------------------------------------------------------------

100:       ~__new_allocator() _GLIBCXX_USE_NOEXCEPT { }

[...]

168: 	_GLIBCXX_OPERATOR_DELETE(_GLIBCXX_SIZED_DEALLOC(__p, __n));

0x4967f0 LEA	0x8(%RSP),%R10

0x4967f5 AND	$-0x40,%RSP

0x4967f9 PUSHQ	-0x8(%R10)

0x4967fd PUSH	%RBP

0x4967fe MOV	%RSP,%RBP

0x496801 PUSH	%R15

0x496803 PUSH	%R14

0x496805 PUSH	%R13

0x496807 PUSH	%R12

0x496809 PUSH	%R10

0x49680b PUSH	%RBX

0x49680c MOV	%RDI,%R15

0x49680f SUB	$0xc0,%RSP

0x496816 MOV	%RCX,-0xe0(%RBP)

0x49681d MOV	0xc(%RDI),%ECX

0x496820 MOV	%RDX,-0xd8(%RBP)

0x496827 TEST	%ECX,%ECX

0x496829 JE	49728f

0x49682f MOV	0x484(%R15),%EBX

0x496836 MOVSXD	0x478(%R15),%R8

0x49683d CMP	$0x1,%EBX

0x496840 JE	497187

0x496846 MOVSXD	%EBX,%RCX

0x496849 VMOVQ	%RCX,%XMM19

0x49684f TEST	%EBX,%EBX

0x496851 JE	497173

0x496857 MOV	-0xe0(%RBP),%RAX

0x49685e MOV	-0xd8(%RBP),%RDI

0x496865 MOV	0x480(%R15),%ESI

0x49686c LEA	(%R8,%R8,2),%R13

0x496870 MOV	0x100(%R15),%R11

0x496877 VMOVQ	0xd8(%R15),%XMM16

0x49687e VMOVDQA64	0x10eb78(%RIP),%ZMM8

0x496888 MOV	%R15,-0xe0(%RBP)

0x49688f VMOVDQA64	0x10eba7(%RIP),%ZMM7

0x496899 VMOVDQA64	0x10ebdd(%RIP),%ZMM6

0x4968a3 VMOVDQA64	0x10ec13(%RIP),%ZMM5

0x4968ad VMOVDQA64	0x10ec49(%RIP),%ZMM4

0x4968b7 MOV	0x18(%RAX),%RBX

0x4968bb MOV	0x18(%RDI),%R12

0x4968bf LEA	-0x1(%RSI),%R9D

0x4968c3 VMOVDQA64	0x10ec73(%RIP),%ZMM3

0x4968cd MOV	%R11,%RDX

0x4968d0 MOV	%R11,-0xd0(%RBP)

0x4968d7 MOV	%ESI,%R11D

0x4968da VMOVQ	0x180(%R15),%XMM29

0x4968e1 MOV	%ESI,%R10D

0x4968e4 MOV	%R9D,-0xd8(%RBP)

0x4968eb XOR	%R9D,%R9D

0x4968ee VMOVQ	0x158(%R15),%XMM18

0x4968f5 VMOVDQA	0x10e943(%RIP),%YMM15

0x4968fd AND	$-0x8,%R10D

0x496901 VMOVDQA	0x10e957(%RIP),%YMM14

0x496909 VMOVDQA	0x10e96f(%RIP),%YMM13

0x496911 VMOVDQA	0x10e987(%RIP),%YMM12

0x496919 LEA	(%RBX,%R8,8),%R8

0x49691d LEA	(%R12,%R13,8),%RDI

0x496921 XOR	%EBX,%EBX

0x496923 SHR	$0x3,%R11D

0x496927 VMOVQ	%XMM16,%R14

0x49692d VMOVQ	%R8,%XMM11

0x496932 SAL	$0x3,%R14

0x496936 SAL	$0x6,%R11

0x49693a VMOVQ	%R14,%XMM17

0x496940 XOR	%R8D,%R8D

0x496943 MOV	%R11,-0xc8(%RBP)

0x49694a NOPW	(%RAX,%RAX,1)

(989) 0x496950 LEA	(,%RBX,8),%R13

(989) 0x496958 TEST	%ESI,%ESI

(989) 0x49695a JLE	497215

(989) 0x496960 CMPL	$0x6,-0xd8(%RBP)

(989) 0x496967 JBE	49725a

(989) 0x49696d MOV	-0xc8(%RBP),%R14

(989) 0x496974 VMOVQ	%XMM29,%R15

(989) 0x49697a XOR	%EAX,%EAX

(989) 0x49697c VXORPD	%XMM10,%XMM10,%XMM10

(989) 0x496981 LEA	(%R15,%R13,1),%R12

(989) 0x496985 SUB	$0x40,%R14

(989) 0x496989 SHR	$0x6,%R14

(989) 0x49698d INC	%R14

(989) 0x496990 AND	$0x7,%R14D

(989) 0x496994 JE	496a4d

(989) 0x49699a CMP	$0x1,%R14

(989) 0x49699e JE	496a2e

(989) 0x4969a4 CMP	$0x2,%R14

(989) 0x4969a8 JE	496a1c

(989) 0x4969aa CMP	$0x3,%R14

(989) 0x4969ae JE	496a0a

(989) 0x4969b0 CMP	$0x4,%R14

(989) 0x4969b4 JE	4969f8

(989) 0x4969b6 CMP	$0x5,%R14

(989) 0x4969ba JE	4969e6

(989) 0x4969bc CMP	$0x6,%R14

(989) 0x4969c0 JE	4969d4

(989) 0x4969c2 MOV	$0x40,%EAX

(989) 0x4969c7 VMOVUPD	(%RDX),%ZMM2

(989) 0x4969cd VFMADD231PD	(%R12),%ZMM2,%ZMM10

(989) 0x4969d4 VMOVUPD	(%RDX,%RAX,1),%ZMM9

(989) 0x4969db VFMADD231PD	(%R12,%RAX,1),%ZMM9,%ZMM10

(989) 0x4969e2 ADD	$0x40,%RAX

(989) 0x4969e6 VMOVUPD	(%RDX,%RAX,1),%ZMM1

(989) 0x4969ed VFMADD231PD	(%R12,%RAX,1),%ZMM1,%ZMM10

(989) 0x4969f4 ADD	$0x40,%RAX

(989) 0x4969f8 VMOVUPD	(%RDX,%RAX,1),%ZMM0

(989) 0x4969ff VFMADD231PD	(%R12,%RAX,1),%ZMM0,%ZMM10

(989) 0x496a06 ADD	$0x40,%RAX

(989) 0x496a0a VMOVUPD	(%RDX,%RAX,1),%ZMM2

(989) 0x496a11 VFMADD231PD	(%R12,%RAX,1),%ZMM2,%ZMM10

(989) 0x496a18 ADD	$0x40,%RAX

(989) 0x496a1c VMOVUPD	(%RDX,%RAX,1),%ZMM9

(989) 0x496a23 VFMADD231PD	(%R12,%RAX,1),%ZMM9,%ZMM10

(989) 0x496a2a ADD	$0x40,%RAX

(989) 0x496a2e VMOVUPD	(%RDX,%RAX,1),%ZMM1

(989) 0x496a35 VFMADD231PD	(%R12,%RAX,1),%ZMM1,%ZMM10

(989) 0x496a3c ADD	$0x40,%RAX

(989) 0x496a40 CMP	%RAX,-0xc8(%RBP)

(989) 0x496a47 JE	496ae8

(989) 0x496a4d MOV	-0xc8(%RBP),%R11

  (991) 0x496a54 VMOVUPD	(%RDX,%RAX,1),%ZMM0

  (991) 0x496a5b VMOVUPD	0x40(%RDX,%RAX,1),%ZMM2

  (991) 0x496a63 VMOVUPD	0x80(%RDX,%RAX,1),%ZMM9

  (991) 0x496a6b VFMADD231PD	(%R12,%RAX,1),%ZMM0,%ZMM10

  (991) 0x496a72 VMOVUPD	0xc0(%RDX,%RAX,1),%ZMM1

  (991) 0x496a7a VFMADD231PD	0x40(%R12,%RAX,1),%ZMM2,%ZMM10

  (991) 0x496a82 VMOVUPD	0x100(%RDX,%RAX,1),%ZMM0

  (991) 0x496a8a VFMADD231PD	0x80(%R12,%RAX,1),%ZMM9,%ZMM10

  (991) 0x496a92 VMOVUPD	0x140(%RDX,%RAX,1),%ZMM2

  (991) 0x496a9a VFMADD231PD	0xc0(%R12,%RAX,1),%ZMM1,%ZMM10

  (991) 0x496aa2 VMOVUPD	0x180(%RDX,%RAX,1),%ZMM9

  (991) 0x496aaa VMOVUPD	0x1c0(%RDX,%RAX,1),%ZMM1

  (991) 0x496ab2 VFMADD231PD	0x100(%R12,%RAX,1),%ZMM0,%ZMM10

  (991) 0x496aba VFMADD231PD	0x140(%R12,%RAX,1),%ZMM2,%ZMM10

  (991) 0x496ac2 VFMADD231PD	0x180(%R12,%RAX,1),%ZMM9,%ZMM10

  (991) 0x496aca VFMADD231PD	0x1c0(%R12,%RAX,1),%ZMM1,%ZMM10

  (991) 0x496ad2 ADD	$0x200,%RAX

  (991) 0x496ad8 CMP	%RAX,%R11

  (991) 0x496adb JNE	496a54

(989) 0x496ae1 MOV	%R11,-0xc8(%RBP)

(989) 0x496ae8 VEXTRACTF64X4	$0x1,%ZMM10,%YMM0

(989) 0x496aef VADDPD	%YMM10,%YMM0,%YMM9

(989) 0x496af4 VADDPD	%YMM0,%YMM10,%YMM0

(989) 0x496af8 VEXTRACTF64X2	$0x1,%YMM9,%XMM2

(989) 0x496aff VADDPD	%XMM9,%XMM2,%XMM9

(989) 0x496b04 VUNPCKHPD	%XMM9,%XMM9,%XMM1

(989) 0x496b09 VADDPD	%XMM9,%XMM1,%XMM1

(989) 0x496b0e CMP	%R10D,%ESI

(989) 0x496b11 JE	49723c

(989) 0x496b17 MOV	%R10D,%EAX

(989) 0x496b1a MOV	%R10D,%ECX

(989) 0x496b1d MOV	%ESI,%R14D

(989) 0x496b20 SUB	%EAX,%R14D

(989) 0x496b23 LEA	-0x1(%R14),%R15D

(989) 0x496b27 CMP	$0x2,%R15D

(989) 0x496b2b JBE	496b6e

(989) 0x496b2d MOV	-0xd0(%RBP),%R12

(989) 0x496b34 LEA	(%R9,%RAX,1),%R15

(989) 0x496b38 VMOVQ	%XMM29,%R11

(989) 0x496b3e ADD	%RBX,%RAX

(989) 0x496b41 VMOVUPD	(%R12,%R15,8),%YMM10

(989) 0x496b47 VFMADD231PD	(%R11,%RAX,8),%YMM10,%YMM0

(989) 0x496b4d VEXTRACTF64X2	$0x1,%YMM0,%XMM2

(989) 0x496b54 VADDPD	%XMM0,%XMM2,%XMM0

(989) 0x496b58 MOV	%R14D,%EAX

(989) 0x496b5b AND	$-0x4,%EAX

(989) 0x496b5e VUNPCKHPD	%XMM0,%XMM0,%XMM9

(989) 0x496b62 ADD	%EAX,%ECX

(989) 0x496b64 AND	$0x3,%R14D

(989) 0x496b68 VADDPD	%XMM0,%XMM9,%XMM1

(989) 0x496b6c JE	496bbb

(989) 0x496b6e VMOVQ	%XMM29,%R12

(989) 0x496b74 MOVSXD	%ECX,%R14

(989) 0x496b77 LEA	0x1(%RCX),%R11D

(989) 0x496b7b ADD	%R12,%R13

(989) 0x496b7e VMOVSD	(%RDX,%R14,8),%XMM10

(989) 0x496b84 LEA	(,%R14,8),%R15

(989) 0x496b8c VFMADD231SD	(%R13,%R14,8),%XMM10,%XMM1

(989) 0x496b93 CMP	%R11D,%ESI

(989) 0x496b96 JLE	496bbb

(989) 0x496b98 ADD	$0x2,%ECX

(989) 0x496b9b VMOVSD	0x8(%R15,%R13,1),%XMM2

(989) 0x496ba2 VFMADD231SD	0x8(%RDX,%R15,1),%XMM2,%XMM1

(989) 0x496ba9 CMP	%ECX,%ESI

(989) 0x496bab JLE	496bbb

(989) 0x496bad VMOVSD	0x10(%RDX,%R15,1),%XMM0

(989) 0x496bb4 VFMADD231SD	0x10(%R15,%R13,1),%XMM0,%XMM1

(989) 0x496bbb MOV	-0xe0(%RBP),%RCX

(989) 0x496bc2 MOV	0x118(%RCX),%R13

(989) 0x496bc9 MOV	0x140(%RCX),%R12

(989) 0x496bd0 IMUL	%R8,%R13

(989) 0x496bd4 CMPL	$0x6,-0xd8(%RBP)

(989) 0x496bdb JBE	49726b

(989) 0x496be1 MOV	-0xc8(%RBP),%R11

(989) 0x496be8 LEA	(%R13,%R13,2),%R14

(989) 0x496bed VXORPD	%XMM24,%XMM24,%XMM24

(989) 0x496bf3 MOV	%RDX,%RCX

(989) 0x496bf6 LEA	(%R12,%R14,8),%RAX

(989) 0x496bfa VMOVAPD	%ZMM24,%ZMM30

(989) 0x496c00 VMOVAPD	%ZMM24,%ZMM0

(989) 0x496c06 LEA	-0x40(%R11),%R14

(989) 0x496c0a LEA	(%RDX,%R11,1),%R15

(989) 0x496c0e SHR	$0x6,%R14

(989) 0x496c12 INC	%R14

(989) 0x496c15 AND	$0x3,%R14D

(989) 0x496c19 JE	496d4d

(989) 0x496c1f CMP	$0x1,%R14

(989) 0x496c23 JE	496ce2

(989) 0x496c29 CMP	$0x2,%R14

(989) 0x496c2d JE	496c87

(989) 0x496c2f VMOVUPD	(%RAX),%ZMM30

(989) 0x496c35 VMOVUPD	(%RAX),%ZMM9

(989) 0x496c3b VMOVUPD	(%RAX),%ZMM0

(989) 0x496c41 LEA	0x40(%RDX),%RCX

(989) 0x496c45 ADD	$0xc0,%RAX

(989) 0x496c4b VPERMT2PD	-0x80(%RAX),%ZMM8,%ZMM30

(989) 0x496c52 VPERMT2PD	-0x80(%RAX),%ZMM6,%ZMM9

(989) 0x496c59 VPERMT2PD	-0x80(%RAX),%ZMM4,%ZMM0

(989) 0x496c60 VPERMT2PD	-0x40(%RAX),%ZMM7,%ZMM30

(989) 0x496c67 VFMADD132PD	(%RDX),%ZMM24,%ZMM30

(989) 0x496c6d VPERMT2PD	-0x40(%RAX),%ZMM5,%ZMM9

(989) 0x496c74 VPERMT2PD	-0x40(%RAX),%ZMM3,%ZMM0

(989) 0x496c7b VFMADD132PD	(%RDX),%ZMM24,%ZMM0

(989) 0x496c81 VFMADD231PD	(%RDX),%ZMM9,%ZMM24

(989) 0x496c87 VMOVUPD	(%RAX),%ZMM21

(989) 0x496c8d VMOVUPD	(%RAX),%ZMM10

(989) 0x496c93 VMOVUPD	(%RAX),%ZMM2

(989) 0x496c99 ADD	$0x40,%RCX

(989) 0x496c9d ADD	$0xc0,%RAX

(989) 0x496ca3 VPERMT2PD	-0x80(%RAX),%ZMM8,%ZMM21

(989) 0x496caa VPERMT2PD	-0x80(%RAX),%ZMM6,%ZMM10

(989) 0x496cb1 VPERMT2PD	-0x80(%RAX),%ZMM4,%ZMM2

(989) 0x496cb8 VPERMT2PD	-0x40(%RAX),%ZMM7,%ZMM21

(989) 0x496cbf VFMADD231PD	-0x40(%RCX),%ZMM21,%ZMM30

(989) 0x496cc6 VPERMT2PD	-0x40(%RAX),%ZMM5,%ZMM10

(989) 0x496ccd VPERMT2PD	-0x40(%RAX),%ZMM3,%ZMM2

(989) 0x496cd4 VFMADD231PD	-0x40(%RCX),%ZMM10,%ZMM24

(989) 0x496cdb VFMADD231PD	-0x40(%RCX),%ZMM2,%ZMM0

(989) 0x496ce2 VMOVUPD	(%RAX),%ZMM27

(989) 0x496ce8 VMOVUPD	(%RAX),%ZMM9

(989) 0x496cee VMOVUPD	(%RAX),%ZMM10

(989) 0x496cf4 ADD	$0x40,%RCX

(989) 0x496cf8 MOV	-0xc8(%RBP),%R11

(989) 0x496cff ADD	$0xc0,%RAX

(989) 0x496d05 VPERMT2PD	-0x80(%RAX),%ZMM8,%ZMM27

(989) 0x496d0c VPERMT2PD	-0x80(%RAX),%ZMM6,%ZMM9

(989) 0x496d13 VPERMT2PD	-0x80(%RAX),%ZMM4,%ZMM10

(989) 0x496d1a VPERMT2PD	-0x40(%RAX),%ZMM7,%ZMM27

(989) 0x496d21 VFMADD231PD	-0x40(%RCX),%ZMM27,%ZMM30

(989) 0x496d28 VPERMT2PD	-0x40(%RAX),%ZMM5,%ZMM9

(989) 0x496d2f VPERMT2PD	-0x40(%RAX),%ZMM3,%ZMM10

(989) 0x496d36 VFMADD231PD	-0x40(%RCX),%ZMM9,%ZMM24

(989) 0x496d3d VFMADD231PD	-0x40(%RCX),%ZMM10,%ZMM0

(989) 0x496d44 CMP	%RCX,%R15

(989) 0x496d47 JE	496edc

  (990) 0x496d4d VMOVUPD	(%RAX),%ZMM9

  (990) 0x496d53 VMOVUPD	0x100(%RAX),%ZMM31

  (990) 0x496d5a VMOVUPD	(%RAX),%ZMM2

  (990) 0x496d60 ADD	$0x100,%RCX

  (990) 0x496d67 VMOVUPD	0xc0(%RAX),%ZMM20

  (990) 0x496d6e VMOVUPD	0xc0(%RAX),%ZMM10

  (990) 0x496d75 VMOVUPD	0x1c0(%RAX),%ZMM25

  (990) 0x496d7c ADD	$0x300,%RAX

  (990) 0x496d82 VMOVUPD	-0x300(%RAX),%ZMM28

  (990) 0x496d89 VMOVUPD	-0x240(%RAX),%ZMM22

  (990) 0x496d90 VMOVUPD	-0x100(%RAX),%ZMM23

  (990) 0x496d97 VMOVUPD	-0x40(%RAX),%ZMM27

  (990) 0x496d9e VPERMT2PD	-0x2c0(%RAX),%ZMM6,%ZMM9

  (990) 0x496da5 VPERMT2PD	-0x2c0(%RAX),%ZMM4,%ZMM2

  (990) 0x496dac VPERMT2PD	-0x280(%RAX),%ZMM5,%ZMM9

  (990) 0x496db3 VFMADD132PD	-0x100(%RCX),%ZMM24,%ZMM9

  (990) 0x496dba VMOVUPD	-0x1c0(%RAX),%ZMM24

  (990) 0x496dc1 VPERMT2PD	%ZMM31,%ZMM6,%ZMM20

  (990) 0x496dc7 VPERMT2PD	%ZMM31,%ZMM4,%ZMM10

  (990) 0x496dcd VPERMT2PD	-0x280(%RAX),%ZMM3,%ZMM2

  (990) 0x496dd4 VFMADD231PD	-0x100(%RCX),%ZMM2,%ZMM0

  (990) 0x496ddb VMOVUPD	-0x180(%RAX),%ZMM2

  (990) 0x496de2 VPERMT2PD	-0x2c0(%RAX),%ZMM8,%ZMM28

  (990) 0x496de9 VPERMT2PD	%ZMM31,%ZMM8,%ZMM22

  (990) 0x496def VPERMT2PD	-0x280(%RAX),%ZMM7,%ZMM28

  (990) 0x496df6 VFMADD132PD	-0x100(%RCX),%ZMM30,%ZMM28

  (990) 0x496dfd VMOVUPD	-0x80(%RAX),%ZMM30

  (990) 0x496e04 VPERMT2PD	%ZMM24,%ZMM5,%ZMM20

  (990) 0x496e0a VPERMT2PD	%ZMM24,%ZMM3,%ZMM10

  (990) 0x496e10 VFMADD132PD	-0xc0(%RCX),%ZMM9,%ZMM20

  (990) 0x496e17 VFMADD132PD	-0xc0(%RCX),%ZMM0,%ZMM10

  (990) 0x496e1e VMOVUPD	-0x180(%RAX),%ZMM9

  (990) 0x496e25 VMOVUPD	-0x180(%RAX),%ZMM0

  (990) 0x496e2c VPERMT2PD	%ZMM24,%ZMM7,%ZMM22

  (990) 0x496e32 VMOVAPD	%ZMM10,%ZMM26

  (990) 0x496e38 VPERMT2PD	%ZMM25,%ZMM6,%ZMM2

  (990) 0x496e3e VFMADD132PD	-0xc0(%RCX),%ZMM28,%ZMM22

  (990) 0x496e45 VMOVUPD	-0xc0(%RAX),%ZMM24

  (990) 0x496e4c VPERMT2PD	%ZMM23,%ZMM5,%ZMM2

  (990) 0x496e52 VFMADD132PD	-0x80(%RCX),%ZMM20,%ZMM2

  (990) 0x496e59 VPERMT2PD	%ZMM25,%ZMM8,%ZMM9

  (990) 0x496e5f VPERMT2PD	%ZMM25,%ZMM4,%ZMM0

  (990) 0x496e65 VPERMT2PD	%ZMM23,%ZMM3,%ZMM0

  (990) 0x496e6b VPERMT2PD	%ZMM23,%ZMM7,%ZMM9

  (990) 0x496e71 VFMADD231PD	-0x80(%RCX),%ZMM0,%ZMM26

  (990) 0x496e78 VFMADD132PD	-0x80(%RCX),%ZMM22,%ZMM9

  (990) 0x496e7f VMOVUPD	-0xc0(%RAX),%ZMM22

  (990) 0x496e86 VPERMT2PD	%ZMM30,%ZMM6,%ZMM24

  (990) 0x496e8c VMOVUPD	-0xc0(%RAX),%ZMM0

  (990) 0x496e93 VPERMT2PD	%ZMM27,%ZMM5,%ZMM24

  (990) 0x496e99 VFMADD132PD	-0x40(%RCX),%ZMM2,%ZMM24

  (990) 0x496ea0 VPERMT2PD	%ZMM30,%ZMM8,%ZMM22

  (990) 0x496ea6 VPERMT2PD	%ZMM30,%ZMM4,%ZMM0

  (990) 0x496eac VPERMT2PD	%ZMM27,%ZMM7,%ZMM22

  (990) 0x496eb2 VPERMT2PD	%ZMM27,%ZMM3,%ZMM0

  (990) 0x496eb8 VFMADD132PD	-0x40(%RCX),%ZMM9,%ZMM22

  (990) 0x496ebf VFMADD132PD	-0x40(%RCX),%ZMM26,%ZMM0

  (990) 0x496ec6 VMOVAPD	%ZMM22,%ZMM30

  (990) 0x496ecc CMP	%RCX,%R15

  (990) 0x496ecf JNE	496d4d

(989) 0x496ed5 MOV	%R11,-0xc8(%RBP)

(989) 0x496edc VEXTRACTF64X4	$0x1,%ZMM24,%YMM28

(989) 0x496ee3 VEXTRACTF64X4	$0x1,%ZMM30,%YMM20

(989) 0x496eea VADDPD	%YMM24,%YMM28,%YMM10

(989) 0x496ef0 VEXTRACTF64X4	$0x1,%ZMM0,%YMM26

(989) 0x496ef7 VEXTRACTF64X2	$0x1,%YMM10,%XMM9

(989) 0x496efe VADDPD	%XMM10,%XMM9,%XMM2

(989) 0x496f03 VADDPD	%YMM30,%YMM20,%YMM9

(989) 0x496f09 VUNPCKHPD	%XMM2,%XMM2,%XMM21

(989) 0x496f0f VADDPD	%XMM2,%XMM21,%XMM31

(989) 0x496f15 VEXTRACTF64X2	$0x1,%YMM9,%XMM2

(989) 0x496f1c VADDPD	%XMM9,%XMM2,%XMM2

(989) 0x496f21 VUNPCKHPD	%XMM2,%XMM2,%XMM9

(989) 0x496f25 VMOVAPD	%XMM31,%XMM10

(989) 0x496f2b VADDPD	%XMM2,%XMM9,%XMM9

(989) 0x496f2f VADDPD	%YMM0,%YMM26,%YMM2

(989) 0x496f35 VADDPD	%YMM0,%YMM26,%YMM26

(989) 0x496f3b VEXTRACTF64X2	$0x1,%YMM2,%XMM25

(989) 0x496f42 VADDPD	%XMM2,%XMM25,%XMM23

(989) 0x496f48 VADDPD	%YMM30,%YMM20,%YMM25

(989) 0x496f4e VUNPCKHPD	%XMM23,%XMM23,%XMM2

(989) 0x496f54 VADDPD	%XMM23,%XMM2,%XMM2

(989) 0x496f5a VADDPD	%YMM24,%YMM28,%YMM23

(989) 0x496f60 VUNPCKLPD	%XMM9,%XMM2,%XMM2

(989) 0x496f65 CMP	%R10D,%ESI

(989) 0x496f68 JE	4970f4

(989) 0x496f6e MOV	%R10D,%EAX

(989) 0x496f71 MOV	%R10D,%ECX

(989) 0x496f74 MOV	%ESI,%R14D

(989) 0x496f77 SUB	%EAX,%R14D

(989) 0x496f7a LEA	-0x1(%R14),%R15D

(989) 0x496f7e CMP	$0x2,%R15D

(989) 0x496f82 JBE	497069

(989) 0x496f88 LEA	(%RAX,%R13,1),%R11

(989) 0x496f8c ADD	%R9,%RAX

(989) 0x496f8f VMOVDQA64	0x10d087(%RIP),%YMM28

(989) 0x496f99 VMOVDQA64	0x10d09d(%RIP),%YMM31

(989) 0x496fa3 LEA	(%R11,%R11,2),%R15

(989) 0x496fa7 MOV	-0xd0(%RBP),%R11

(989) 0x496fae LEA	(%R12,%R15,8),%R15

(989) 0x496fb2 VMOVUPD	(%R15),%YMM30

(989) 0x496fb8 VMOVUPD	0x20(%R15),%YMM27

(989) 0x496fbf VMOVUPD	0x40(%R15),%YMM24

(989) 0x496fc6 VMOVUPD	(%R11,%RAX,8),%YMM10

(989) 0x496fcc MOV	%R14D,%EAX

(989) 0x496fcf AND	$-0x4,%EAX

(989) 0x496fd2 ADD	%EAX,%ECX

(989) 0x496fd4 AND	$0x3,%R14D

(989) 0x496fd8 VMOVAPD	%YMM30,%YMM9

(989) 0x496fde VMOVAPD	%YMM30,%YMM2

(989) 0x496fe4 VPERMI2PD	%YMM27,%YMM30,%YMM28

(989) 0x496fea VPERMT2PD	%YMM27,%YMM15,%YMM9

(989) 0x496ff0 VPERMT2PD	%YMM27,%YMM13,%YMM2

(989) 0x496ff6 VPERMI2PD	%YMM24,%YMM28,%YMM31

(989) 0x496ffc VPERMT2PD	%YMM24,%YMM14,%YMM9

(989) 0x497002 VPERMT2PD	%YMM24,%YMM12,%YMM2

(989) 0x497008 VFMADD132PD	%YMM10,%YMM25,%YMM9

(989) 0x49700e VFMADD132PD	%YMM10,%YMM26,%YMM31

(989) 0x497014 VFMADD132PD	%YMM2,%YMM23,%YMM10

(989) 0x49701a VEXTRACTF64X2	$0x1,%YMM9,%XMM2

(989) 0x497021 VADDPD	%XMM9,%XMM2,%XMM9

(989) 0x497026 VEXTRACTF64X2	$0x1,%YMM31,%XMM2

(989) 0x49702d VEXTRACTF64X2	$0x1,%YMM10,%XMM0

(989) 0x497034 VADDPD	%XMM10,%XMM0,%XMM10

(989) 0x497039 VUNPCKHPD	%XMM9,%XMM9,%XMM0

(989) 0x49703e VADDPD	%XMM9,%XMM0,%XMM0

(989) 0x497043 VADDPD	%XMM31,%XMM2,%XMM9

(989) 0x497049 VUNPCKHPD	%XMM10,%XMM10,%XMM21

(989) 0x49704f VADDPD	%XMM10,%XMM21,%XMM10

(989) 0x497055 VUNPCKHPD	%XMM9,%XMM9,%XMM2

(989) 0x49705a VADDPD	%XMM9,%XMM2,%XMM9

(989) 0x49705f VUNPCKLPD	%XMM0,%XMM9,%XMM2

(989) 0x497063 JE	4970f4

(989) 0x497069 MOVSXD	%ECX,%R11

(989) 0x49706c LEA	(%R11,%R13,1),%R14

(989) 0x497070 VMOVDDUP	(%RDX,%R11,8),%XMM0

(989) 0x497076 VMOVSD	(%RDX,%R11,8),%XMM9

(989) 0x49707c LEA	(%R14,%R14,2),%R15

(989) 0x497080 LEA	(,%R11,8),%R14

(989) 0x497088 LEA	(%R12,%R15,8),%RAX

(989) 0x49708c VFMADD231PD	(%RAX),%XMM0,%XMM2

(989) 0x497091 VFMADD231SD	0x10(%RAX),%XMM9,%XMM10

(989) 0x497097 LEA	0x1(%RCX),%EAX

(989) 0x49709a CMP	%EAX,%ESI

(989) 0x49709c JLE	4970f4

(989) 0x49709e CLTQ

(989) 0x4970a0 ADD	$0x2,%ECX

(989) 0x4970a3 VMOVDDUP	0x8(%RDX,%R14,1),%XMM0

(989) 0x4970aa ADD	%R13,%RAX

(989) 0x4970ad LEA	(%RAX,%RAX,2),%R11

(989) 0x4970b1 LEA	(%R12,%R11,8),%R15

(989) 0x4970b5 VMOVSD	0x10(%R15),%XMM9

(989) 0x4970bb VFMADD231PD	(%R15),%XMM0,%XMM2

(989) 0x4970c0 VFMADD231SD	0x8(%RDX,%R14,1),%XMM9,%XMM10

(989) 0x4970c7 CMP	%ECX,%ESI

(989) 0x4970c9 JLE	4970f4

(989) 0x4970cb MOVSXD	%ECX,%RCX

(989) 0x4970ce VMOVDDUP	0x10(%RDX,%R14,1),%XMM0

(989) 0x4970d5 ADD	%R13,%RCX

(989) 0x4970d8 LEA	(%RCX,%RCX,2),%R13

(989) 0x4970dc LEA	(%R12,%R13,8),%R12

(989) 0x4970e0 VMOVSD	0x10(%R12),%XMM9

(989) 0x4970e7 VFMADD231PD	(%R12),%XMM0,%XMM2

(989) 0x4970ed VFMADD231SD	0x10(%RDX,%R14,1),%XMM9,%XMM10

(989) 0x4970f4 VUNPCKHPD	%XMM2,%XMM2,%XMM20

(989) 0x4970fa VMULSD	%XMM2,%XMM2,%XMM9

(989) 0x4970fe VMULSD	%XMM20,%XMM20,%XMM20

(989) 0x497104 VMULSD	%XMM10,%XMM10,%XMM22

(989) 0x49710a VADDPD	(%RDI),%XMM2,%XMM2

(989) 0x49710e VMOVQ	%XMM11,%R14

(989) 0x497113 VADDSD	0x10(%RDI),%XMM10,%XMM10

(989) 0x497118 VMOVQ	%XMM17,%RAX

(989) 0x49711e VMOVSD	%XMM10,0x10(%RDI)

(989) 0x497123 VMOVQ	%XMM16,%R11

(989) 0x497129 VADDSD	%XMM20,%XMM9,%XMM9

(989) 0x49712f ADD	$0x18,%RDI

(989) 0x497133 VMOVQ	%XMM18,%R15

(989) 0x497139 VMOVQ	%XMM19,%RCX

(989) 0x49713f ADD	%RAX,%RDX

(989) 0x497142 ADD	%R11,%R9

(989) 0x497145 ADD	%R15,%RBX

(989) 0x497148 VMOVUPD	%XMM2,-0x18(%RDI)

(989) 0x49714d VADDSD	(%R14,%R8,8),%XMM1,%XMM1

(989) 0x497153 VSUBSD	%XMM9,%XMM1,%XMM0

(989) 0x497158 VSUBSD	%XMM22,%XMM0,%XMM2

(989) 0x49715e VMOVSD	%XMM2,(%R14,%R8,8)

(989) 0x497164 INC	%R8

(989) 0x497167 CMP	%RCX,%R8

(989) 0x49716a JNE	496950

0x497170 VZEROUPPER

0x497173 LEA	-0x30(%RBP),%RSP

0x497177 POP	%RBX

0x497178 POP	%RAX

0x497179 POP	%R12

0x49717b POP	%R13

0x49717d POP	%R14

0x49717f POP	%R15

0x497181 POP	%RBP

0x497182 LEA	-0x8(%RAX),%RSP

0x497186 RET

0x497187 MOV	-0xd8(%RBP),%RDX

0x49718e MOV	0x140(%R15),%RDI

0x497195 MOV	0x100(%R15),%RSI

0x49719c LEA	(%R8,%R8,2),%R10

0x4971a0 MOV	-0xe0(%RBP),%R12

0x4971a7 MOV	0x180(%R15),%R13

0x4971ae MOV	0x18(%RDX),%RBX

0x4971b2 VMOVSD	(%RSI),%XMM11

0x4971b6 VMOVDDUP	%XMM11,%XMM15

0x4971bb VMULPD	(%RDI),%XMM15,%XMM14

0x4971bf MOV	0x18(%R12),%R14

0x4971c4 VMULSD	0x10(%RDI),%XMM11,%XMM8

0x4971c9 LEA	(%RBX,%R10,8),%R9

0x4971cd VADDPD	(%R9),%XMM14,%XMM7

0x4971d2 LEA	(%R14,%R8,8),%R8

0x4971d6 VADDSD	0x10(%R9),%XMM8,%XMM6

0x4971dc VMOVSD	%XMM6,0x10(%R9)

0x4971e2 VUNPCKHPD	%XMM14,%XMM14,%XMM13

0x4971e7 VMOVSD	%XMM14,%XMM14,%XMM12

0x4971ec VMULSD	%XMM13,%XMM13,%XMM5

0x4971f1 VFMADD132SD	%XMM14,%XMM5,%XMM12

0x4971f6 VMOVUPD	%XMM7,(%R9)

0x4971fb VFNMADD213SD	(%R8),%XMM8,%XMM8

0x497200 VSUBSD	%XMM12,%XMM8,%XMM4

0x497205 VFMADD132SD	(%R13),%XMM4,%XMM11

0x49720b VMOVSD	%XMM11,(%R8)

0x497210 JMP	497173

(989) 0x497215 VXORPD	%XMM22,%XMM22,%XMM22

(989) 0x49721b VXORPD	%XMM2,%XMM2,%XMM2

(989) 0x49721f VMOVSD	%XMM22,%XMM22,%XMM20

(989) 0x497225 VMOVSD	%XMM22,%XMM22,%XMM9

(989) 0x49722b VMOVSD	%XMM22,%XMM22,%XMM1

(989) 0x497231 VMOVSD	%XMM22,%XMM22,%XMM10

(989) 0x497237 JMP	49710a

(989) 0x49723c MOV	-0xe0(%RBP),%R13

(989) 0x497243 MOV	0x140(%R13),%R12

(989) 0x49724a MOV	0x118(%R13),%R13

(989) 0x497251 IMUL	%R8,%R13

(989) 0x497255 JMP	496be1

(989) 0x49725a XOR	%EAX,%EAX

(989) 0x49725c XOR	%ECX,%ECX

(989) 0x49725e VXORPD	%XMM0,%XMM0,%XMM0

(989) 0x497262 VXORPD	%XMM1,%XMM1,%XMM1

(989) 0x497266 JMP	496b1d

(989) 0x49726b VXORPD	%XMM23,%XMM23,%XMM23

(989) 0x497271 XOR	%EAX,%EAX

(989) 0x497273 VMOVAPD	%YMM23,%YMM25

(989) 0x497279 VMOVAPD	%YMM23,%YMM26

(989) 0x49727f XOR	%ECX,%ECX

(989) 0x497281 VXORPD	%XMM2,%XMM2,%XMM2

(989) 0x497285 VXORPD	%XMM10,%XMM10,%XMM10

(989) 0x49728a JMP	496f74

0x49728f MOV	0x468(%RDI),%RDI

0x497296 MOV	%RSI,%R13

0x497299 CALL	51ed20 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>

0x49729e MOV	0x470(%R15),%R12

0x4972a5 MOV	0x47c(%R15),%ECX

0x4972ac MOV	0x478(%R15),%R14D

0x4972b3 MOV	(%R12),%RAX

0x4972b7 MOV	0x28(%RAX),%RBX

0x4972bb CMP	$0x477f30,%RBX

0x4972c2 JNE	49745f

0x4972c8 CMP	%R14D,%ECX

0x4972cb JLE	4973fc

0x4972d1 SUB	%R14D,%ECX

0x4972d4 XOR	%EBX,%EBX

0x4972d6 MOV	%RCX,-0xc8(%RBP)

0x4972dd NOPL	(%RAX)

(992) 0x4972e0 MOV	0x98(%R15),%RDI

(992) 0x4972e7 MOV	0x118(%R15),%R11

(992) 0x4972ee MOV	0xc0(%R15),%R8

(992) 0x4972f5 MOVQ	$0x5a3ac8,-0xc0(%RBP)

(992) 0x497300 MOV	0x158(%R15),%RCX

(992) 0x497307 MOV	0x140(%R15),%RAX

(992) 0x49730e MOVSXD	0x8(%R12),%RSI

(992) 0x497313 MOVQ	$0x5a3098,-0x90(%RBP)

(992) 0x49731e MOVQ	$0x5a3ac8,-0x60(%RBP)

(992) 0x497326 MOVQ	$0,-0xb0(%RBP)

(992) 0x497331 MOVQ	$0,-0x80(%RBP)

(992) 0x497339 MOVQ	$0,-0x50(%RBP)

(992) 0x497341 IMUL	%RBX,%RDI

(992) 0x497345 IMUL	%RBX,%R11

(992) 0x497349 MOV	%RSI,-0xb8(%RBP)

(992) 0x497350 MOV	%RSI,-0x88(%RBP)

(992) 0x497357 MOV	%RSI,-0x58(%RBP)

(992) 0x49735b IMUL	%RBX,%RCX

(992) 0x49735f MOV	%R13,%RSI

(992) 0x497362 LEA	(%R8,%RDI,8),%R9

(992) 0x497366 MOV	0x180(%R15),%RDI

(992) 0x49736d LEA	(%R11,%R11,2),%R10

(992) 0x497371 MOV	(%R12),%R11

(992) 0x497375 MOV	%R9,-0xa8(%RBP)

(992) 0x49737c LEA	-0x60(%RBP),%R9

(992) 0x497380 LEA	(%RAX,%R10,8),%RDX

(992) 0x497384 MOV	%RDX,-0x78(%RBP)

(992) 0x497388 LEA	(%R14,%RBX,1),%EDX

(992) 0x49738c LEA	(%RDI,%RCX,8),%R8

(992) 0x497390 LEA	-0xc0(%RBP),%RCX

(992) 0x497397 MOV	%R12,%RDI

(992) 0x49739a MOV	%R8,-0x48(%RBP)

(992) 0x49739e LEA	-0x90(%RBP),%R8

(992) 0x4973a5 CALLQ	0x18(%R11)

(992) 0x4973a9 MOV	-0x50(%RBP),%RSI

(992) 0x4973ad MOVQ	$0x5a3ac8,-0x60(%RBP)

(992) 0x4973b5 TEST	%RSI,%RSI

(992) 0x4973b8 JNE	497449

(992) 0x4973be MOV	-0x80(%RBP),%R9

(992) 0x4973c2 MOVQ	$0x5a3098,-0x90(%RBP)

(992) 0x4973cd TEST	%R9,%R9

(992) 0x4973d0 JNE	497436

(992) 0x4973d2 MOV	-0xb0(%RBP),%R10

(992) 0x4973d9 MOVQ	$0x5a3ac8,-0xc0(%RBP)

(992) 0x4973e4 TEST	%R10,%R10

(992) 0x4973e7 JNE	49740d

(992) 0x4973e9 MOV	-0xc8(%RBP),%RAX

(992) 0x4973f0 INC	%RBX

(992) 0x4973f3 CMP	%RAX,%RBX

(992) 0x4973f6 JNE	4972e0

0x4973fc MOV	0x468(%R15),%RDI

0x497403 CALL	51ef50 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>

0x497408 JMP	49682f

(992) 0x49740d MOV	-0xa8(%RBP),%RDI

(992) 0x497414 LEA	(,%R10,8),%RSI

(992) 0x49741c INC	%RBX

(992) 0x49741f CALL	404070 <_ZdlPvm@plt>

(992) 0x497424 MOV	-0xc8(%RBP),%RDX

(992) 0x49742b CMP	%RDX,%RBX

(992) 0x49742e JNE	4972e0

0x497434 JMP	4973fc

(992) 0x497436 MOV	-0x78(%RBP),%RDI

(992) 0x49743a LEA	(%R9,%R9,2),%RSI

(992) 0x49743e SAL	$0x3,%RSI

(992) 0x497442 CALL	404070 <_ZdlPvm@plt>

(992) 0x497447 JMP	4973d2

(992) 0x497449 MOV	-0x48(%RBP),%RDI

(992) 0x49744d LEA	(,%RSI,8),%RSI

(992) 0x497455 CALL	404070 <_ZdlPvm@plt>

(992) 0x49745a JMP	4973be

0x49745f SUB	$0x8,%RSP

0x497463 LEA	0x150(%R15),%RDX

0x49746a LEA	0x110(%R15),%R9

0x497471 LEA	0x90(%R15),%R8

0x497478 PUSH	%RDX

0x497479 MOV	%R13,%RSI

0x49747c MOV	%R14D,%EDX

0x49747f MOV	%R12,%RDI

0x497482 CALL	%RBX

0x497484 POP	%RAX

0x497485 POP	%RDX

0x497486 JMP	4973fc

0x49748b MOV	%RAX,%R15

0x49748e MOV	-0x50(%RBP),%R13

0x497492 MOVQ	$0x5a3ac8,-0x60(%RBP)

0x49749a TEST	%R13,%R13

0x49749d JE	497507

0x49749f MOV	-0x48(%RBP),%RDI

0x4974a3 LEA	(,%R13,8),%RSI

0x4974ab VZEROUPPER

0x4974ae CALL	404070 <_ZdlPvm@plt>

(988) 0x4974b3 MOV	-0x80(%RBP),%R12

(988) 0x4974b7 MOVQ	$0x5a3098,-0x90(%RBP)

(988) 0x4974c2 TEST	%R12,%R12

(988) 0x4974c5 JE	4974d4

(988) 0x4974c7 MOV	-0x78(%RBP),%RDI

(988) 0x4974cb IMUL	$0x18,%R12,%RSI

(988) 0x4974cf CALL	404070 <_ZdlPvm@plt>

(988) 0x4974d4 MOV	-0xb0(%RBP),%R14

(988) 0x4974db MOVQ	$0x5a3ac8,-0xc0(%RBP)

(988) 0x4974e6 TEST	%R14,%R14

(988) 0x4974e9 JE	4974ff

(988) 0x4974eb MOV	-0xa8(%RBP),%RDI

(988) 0x4974f2 LEA	(,%R14,8),%RSI

(988) 0x4974fa CALL	404070 <_ZdlPvm@plt>

(988) 0x4974ff MOV	%R15,%RDI

(988) 0x497502 CALL	404230 <_Unwind_Resume@plt>

(988) 0x497507 VZEROUPPER

(988) 0x49750a JMP	4974b3

0x49750c NOPL	(%RAX)

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	DiracDeterminantRef.cpp:152-181
Module	exec

The function is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:217
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:82-83,155-156
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h:129-131
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:62
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:56,144,210,221-223,248
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/SPOSet.h:106-111
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:63,94
/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/unique_ptr.h:199
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:152-181
/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/new_allocator.h:100,168

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 24.83 to 10.67 cycles (2.33x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 24% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 24.83 to 18.88 cycles (1.32x speedup).

Details

26% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

52% of SSE/AVX loads are used in vector version.
9% of SSE/AVX stores are used in vector version.
25% of SSE/AVX addition or subtraction instructions are used in vector version.
33% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX fused multiply-add instructions are used in vector version.
11% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Detected 3 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv: 1 occurrences
_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv: 1 occurrences
_ZdlPvm@plt: 1 occurrences
unknown: 1 occurrences

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

PUSH: 1 occurrences

Type of elements and instruction set

7 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time). 2 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 14 FP arithmetical operations:

7: addition or subtraction (3 inside FMA instructions)
7: multiply (3 inside FMA instructions)

The binary function is loading 792 bytes (99 double precision FP elements). The binary function is storing 92 bytes (11 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.02 FP operations per loaded or stored byte.

General properties

nb instructions	147
nb uops	149
loop length	705
used x86 registers	16
used mmx registers	0
used xmm registers	15
used ymm registers	4
used zmm registers	6
nb stack references	9
ADD-SUB / MUL ratio	1.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	24.83 cycles
front end	24.83 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	10.25	10.25	10.00	10.00	7.50	20.33	20.33	20.33	3.00	3.00	3.00	3.00	2.00	2.00
cycles	10.25	10.25	10.00	10.00	7.50	22.33	22.33	22.33	3.00	3.00	3.00	3.00	2.00	2.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	24.83
Dispatch	22.33
Overall L1	24.83

Vectorization ratios

INT

all	30%
load	62%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	13%

all	18%
load	28%
store	33%
mul	33%
add-sub	33%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	26%
load	52%
store	9%
mul	33%
add-sub	25%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Vector efficiency ratios

INT

all	28%
load	53%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	14%
load	16%
store	16%
mul	16%
add-sub	16%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	24%
load	42%
store	12%
mul	16%
add-sub	14%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 24.83 cycles. At this rate:

33% of peak load performance is reached (31.89 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (3.70 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 24.83 to 22.33 cycles (1.11x speedup).

ASM code

In the binary file, the address of the function is: 4967f0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
LEA 0x8(%RSP),%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
AND $-0x40,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
PUSHQ -0x8(%R10)	2	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.71
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RDI,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SUB $0xc0,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RCX,-0xe0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0xc(%RDI),%ECX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDX,-0xd8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
TEST %ECX,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 49728f <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xa9f>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x484(%R15),%EBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOVSXD 0x478(%R15),%R8	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
CMP $0x1,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 497187 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x997>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOVSXD %EBX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVQ %RCX,%XMM19	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1
TEST %EBX,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 497173 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x983>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV -0xe0(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0xd8(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x480(%R15),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R8,%R8,2),%R13	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x100(%R15),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVQ 0xd8(%R15),%XMM16	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVDQA64 0x10eb78(%RIP),%ZMM8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
MOV %R15,-0xe0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
VMOVDQA64 0x10eba7(%RIP),%ZMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
VMOVDQA64 0x10ebdd(%RIP),%ZMM6	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
VMOVDQA64 0x10ec13(%RIP),%ZMM5	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
VMOVDQA64 0x10ec49(%RIP),%ZMM4	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
MOV 0x18(%RAX),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x18(%RDI),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA -0x1(%RSI),%R9D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVDQA64 0x10ec73(%RIP),%ZMM3	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
MOV %R11,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R11,-0xd0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %ESI,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
VMOVQ 0x180(%R15),%XMM29	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %ESI,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R9D,-0xd8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
VMOVQ 0x158(%R15),%XMM18	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVDQA 0x10e943(%RIP),%YMM15	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
AND $-0x8,%R10D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVDQA 0x10e957(%RIP),%YMM14	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
VMOVDQA 0x10e96f(%RIP),%YMM13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
VMOVDQA 0x10e987(%RIP),%YMM12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
LEA (%RBX,%R8,8),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA (%R12,%R13,8),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
SHR $0x3,%R11D	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
VMOVQ %XMM16,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	1
VMOVQ %R8,%XMM11	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1
SAL $0x3,%R14	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SAL $0x6,%R11	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
VMOVQ %R14,%XMM17	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1
XOR %R8D,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
MOV %R11,-0xc8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1
LEA -0x30(%RBP),%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
LEA -0x8(%RAX),%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
RET	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MOV -0xd8(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x140(%R15),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x100(%R15),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R8,%R8,2),%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0xe0(%RBP),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x180(%R15),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x18(%RDX),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%RSI),%XMM11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVDDUP %XMM11,%XMM15	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	1	0.33
VMULPD (%RDI),%XMM15,%XMM14	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	3	0.50
MOV 0x18(%R12),%R14	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMULSD 0x10(%RDI),%XMM11,%XMM8	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	3	0.50
LEA (%RBX,%R10,8),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VADDPD (%R9),%XMM14,%XMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0.50	0.50	0	0	3	0.50
LEA (%R14,%R8,8),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VADDSD 0x10(%R9),%XMM8,%XMM6	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0.50	0.50	0	0	3	0.50
VMOVSD %XMM6,0x10(%R9)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
VUNPCKHPD %XMM14,%XMM14,%XMM13	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	1	0.33
VMOVSD %XMM14,%XMM14,%XMM12	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25
VMULSD %XMM13,%XMM13,%XMM5	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VFMADD132SD %XMM14,%XMM5,%XMM12	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50
VMOVUPD %XMM7,(%R9)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	4	1
VFNMADD213SD (%R8),%XMM8,%XMM8	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	4	0.50
VSUBSD %XMM12,%XMM8,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VFMADD132SD (%R13),%XMM4,%XMM11	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	4	0.50
VMOVSD %XMM11,(%R8)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
JMP 497173 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x983>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV 0x468(%RDI),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CALL 51ed20 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
MOV 0x470(%R15),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x47c(%R15),%ECX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x478(%R15),%R14D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%R12),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x28(%RAX),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP $0x477f30,%RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JNE 49745f <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc6f>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMP %R14D,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JLE 4973fc <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc0c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
SUB %R14D,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
MOV %RCX,-0xc8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
MOV 0x468(%R15),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CALL 51ef50 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
JMP 49682f <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x3f>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
JMP 4973fc <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc0c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
SUB $0x8,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x150(%R15),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x110(%R15),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x90(%R15),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
PUSH %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %R13,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R14D,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CALL %RBX	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	2
POP %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
JMP 4973fc <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc0c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV -0x50(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOVQ $0x5a3ac8,-0x60(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
TEST %R13,%R13	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 497507 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xd17>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV -0x48(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (,%R13,8),%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1
CALL 404070 <_ZdlPvm@plt>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09

Source file and lines	DiracDeterminantRef.cpp:152-181
Module	exec

The function is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:217
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:82-83,155-156
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h:129-131
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:62
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:56,144,210,221-223,248
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/SPOSet.h:106-111
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:63,94
/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/unique_ptr.h:199
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:152-181
/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/new_allocator.h:100,168

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

26% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

52% of SSE/AVX loads are used in vector version.
9% of SSE/AVX stores are used in vector version.
25% of SSE/AVX addition or subtraction instructions are used in vector version.
33% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX fused multiply-add instructions are used in vector version.
11% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Detected 3 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

CALL instructions

Detected function call instructions.

Details

_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv: 1 occurrences
_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv: 1 occurrences
_ZdlPvm@plt: 1 occurrences
unknown: 1 occurrences

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

PUSH: 1 occurrences

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function is composed of 14 FP arithmetical operations:

7: addition or subtraction (3 inside FMA instructions)
7: multiply (3 inside FMA instructions)

The binary function is loading 792 bytes (99 double precision FP elements). The binary function is storing 92 bytes (11 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.02 FP operations per loaded or stored byte.

General properties

nb instructions	147
nb uops	149
loop length	705
used x86 registers	16
used mmx registers	0
used xmm registers	15
used ymm registers	4
used zmm registers	6
nb stack references	9
ADD-SUB / MUL ratio	1.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	24.83 cycles
front end	24.83 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	10.25	10.25	10.00	10.00	7.50	20.33	20.33	20.33	3.00	3.00	3.00	3.00	2.00	2.00
cycles	10.25	10.25	10.00	10.00	7.50	22.33	22.33	22.33	3.00	3.00	3.00	3.00	2.00	2.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	24.83
Dispatch	22.33
Overall L1	24.83

Vectorization ratios

INT

all	30%
load	62%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	13%

all	18%
load	28%
store	33%
mul	33%
add-sub	33%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	26%
load	52%
store	9%
mul	33%
add-sub	25%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Vector efficiency ratios

INT

all	28%
load	53%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	14%
load	16%
store	16%
mul	16%
add-sub	16%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	24%
load	42%
store	12%
mul	16%
add-sub	14%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 24.83 cycles. At this rate:

33% of peak load performance is reached (31.89 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (3.70 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4967f0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
LEA 0x8(%RSP),%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
AND $-0x40,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
PUSHQ -0x8(%R10)	2	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.71
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RDI,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SUB $0xc0,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RCX,-0xe0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0xc(%RDI),%ECX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDX,-0xd8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
TEST %ECX,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 49728f <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xa9f>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x484(%R15),%EBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOVSXD 0x478(%R15),%R8	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
CMP $0x1,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 497187 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x997>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOVSXD %EBX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVQ %RCX,%XMM19	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1
TEST %EBX,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 497173 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x983>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV -0xe0(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0xd8(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x480(%R15),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R8,%R8,2),%R13	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x100(%R15),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVQ 0xd8(%R15),%XMM16	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVDQA64 0x10eb78(%RIP),%ZMM8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
MOV %R15,-0xe0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
VMOVDQA64 0x10eba7(%RIP),%ZMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
VMOVDQA64 0x10ebdd(%RIP),%ZMM6	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
VMOVDQA64 0x10ec13(%RIP),%ZMM5	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
VMOVDQA64 0x10ec49(%RIP),%ZMM4	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
MOV 0x18(%RAX),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x18(%RDI),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA -0x1(%RSI),%R9D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVDQA64 0x10ec73(%RIP),%ZMM3	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
MOV %R11,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R11,-0xd0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %ESI,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
VMOVQ 0x180(%R15),%XMM29	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %ESI,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R9D,-0xd8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
VMOVQ 0x158(%R15),%XMM18	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVDQA 0x10e943(%RIP),%YMM15	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
AND $-0x8,%R10D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVDQA 0x10e957(%RIP),%YMM14	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
VMOVDQA 0x10e96f(%RIP),%YMM13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
VMOVDQA 0x10e987(%RIP),%YMM12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
LEA (%RBX,%R8,8),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA (%R12,%R13,8),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
SHR $0x3,%R11D	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
VMOVQ %XMM16,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	1
VMOVQ %R8,%XMM11	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1
SAL $0x3,%R14	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SAL $0x6,%R11	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
VMOVQ %R14,%XMM17	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1
XOR %R8D,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
MOV %R11,-0xc8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1
LEA -0x30(%RBP),%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
LEA -0x8(%RAX),%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
RET	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MOV -0xd8(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x140(%R15),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x100(%R15),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R8,%R8,2),%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0xe0(%RBP),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x180(%R15),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x18(%RDX),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%RSI),%XMM11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVDDUP %XMM11,%XMM15	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	1	0.33
VMULPD (%RDI),%XMM15,%XMM14	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	3	0.50
MOV 0x18(%R12),%R14	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMULSD 0x10(%RDI),%XMM11,%XMM8	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	3	0.50
LEA (%RBX,%R10,8),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VADDPD (%R9),%XMM14,%XMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0.50	0.50	0	0	3	0.50
LEA (%R14,%R8,8),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VADDSD 0x10(%R9),%XMM8,%XMM6	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0.50	0.50	0	0	3	0.50
VMOVSD %XMM6,0x10(%R9)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
VUNPCKHPD %XMM14,%XMM14,%XMM13	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	1	0.33
VMOVSD %XMM14,%XMM14,%XMM12	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25
VMULSD %XMM13,%XMM13,%XMM5	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VFMADD132SD %XMM14,%XMM5,%XMM12	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50
VMOVUPD %XMM7,(%R9)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	4	1
VFNMADD213SD (%R8),%XMM8,%XMM8	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	4	0.50
VSUBSD %XMM12,%XMM8,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VFMADD132SD (%R13),%XMM4,%XMM11	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	4	0.50
VMOVSD %XMM11,(%R8)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
JMP 497173 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x983>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV 0x468(%RDI),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CALL 51ed20 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
MOV 0x470(%R15),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x47c(%R15),%ECX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x478(%R15),%R14D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%R12),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x28(%RAX),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP $0x477f30,%RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JNE 49745f <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc6f>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMP %R14D,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JLE 4973fc <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc0c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
SUB %R14D,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
MOV %RCX,-0xc8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
MOV 0x468(%R15),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CALL 51ef50 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
JMP 49682f <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x3f>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
JMP 4973fc <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc0c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
SUB $0x8,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x150(%R15),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x110(%R15),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x90(%R15),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
PUSH %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %R13,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R14D,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CALL %RBX	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	2
POP %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
JMP 4973fc <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xc0c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV -0x50(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOVQ $0x5a3ac8,-0x60(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
TEST %R13,%R13	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 497507 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xd17>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV -0x48(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (,%R13,8),%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1
CALL 404070 <_ZdlPvm@plt>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09

▶Scalability Runs Description

Run 2x1	Number processes: 2Number nodes: 1Number processes per node: 2Run Command: <executable> -g "4 2 2" -bMPI Command: mpirun -np <number_processes>Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/run/oneview_runs/compilers/gcc_2/oneview_run_1708580749I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spreadOMP_NUM_THREADS: 1
Run 2x2	OMP_NUM_THREADS: 2I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x4	OMP_NUM_THREADS: 4I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x8	OMP_NUM_THREADS: 8I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x16	OMP_NUM_THREADS: 16I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x32	OMP_NUM_THREADS: 32I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x64	OMP_NUM_THREADS: 64I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x96	OMP_NUM_THREADS: 96I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread

(2x1) Efficiency	(2x1) Potential Speed-Up (%)	(2x2) Efficiency	(2x2) Potential Speed-Up (%)	(2x4) Efficiency	(2x4) Potential Speed-Up (%)	(2x8) Efficiency	(2x8) Potential Speed-Up (%)	(2x16) Efficiency	(2x16) Potential Speed-Up (%)	(2x32) Efficiency	(2x32) Potential Speed-Up (%)	(2x64) Efficiency	(2x64) Potential Speed-Up (%)	(2x96) Efficiency	(2x96) Potential Speed-Up (%)
1	0	0.55	0.12	0.28	0.2	0.16	0.23	0.05	0.29	0.02	0.39	0	0.48	0	0.48

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
2x1	2	1	1	1	0.12	0.26
2x2	4	0.55	0.92	1.6666666666667	0.13	0.27
2x4	8	0.28	0.92	3.3333333333333	0.13	0.27
2x8	16	0.16	0.92	5.6666666666667	0.13	0.27
2x16	32	0.05	0.6	11.333333333333	0.28	0.31
2x32	64	0.02	0.4	22	0.51	0.4
2x64	128	0	0.18	43.333333333333	1.2	0.48
2x96	192	0	0.12	64.666666666667	1.48	0.48

Name	Coverage (%)	Time (s)
▼_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb–	0.26	0.12
○Loop 992 - SPOSet.h:106-111 - exec	0	0
○Loop 988 - new_allocator.h:100-168 - exec	0	0
▼Loop 989 - DiracDeterminantRef.cpp:173-178 - exec–	0	0
○Loop 990 - inner_product.hpp:155-155 - exec	0.19	0.08
○Loop 991 - inner_product.hpp:82-83 - exec	0.08	0.04

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

FMA

Workaround

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

FMA

Workaround

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Colums Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency