OV - - Function _ZN11qmcplusplus12WaveFunction8evalGradERNS

	Function: _ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi	Module: exec	Source: WaveFunction.cpp:182-191 [...]	Coverage: NA%

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249

--------------------------------------------------------------------------------

242:   ScopeGuard(TIMER& t) : timer(t) { timer.start(); }

[...]

249:   ~ScopeGuard() { timer.stop(); }

/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/refwrap.h: 347 - 347

--------------------------------------------------------------------------------

347:       { return *_M_data; }

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/WaveFunction.cpp: 182 - 191

--------------------------------------------------------------------------------

182: {

183:   posT grad_iat = (iat < nelup ? Det_up->evalGrad(P, iat) : Det_dn->evalGrad(P, iat));

184:

185:   for (size_t i = 0; i < Jastrows.size(); i++)

186:   {

187:     ScopedTimer local_timer(jastrow_timers[i]);

188:     grad_iat += Jastrows[i]->evalGrad(P, iat);

189:   }

190:   return grad_iat;

191: }

/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/stl_vector.h: 990 - 990

--------------------------------------------------------------------------------

990:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 94 - 94

--------------------------------------------------------------------------------

94:     (const_cast<T1&>(a) += b);

0x4183a0 PUSH	%RBP

0x4183a1 MOV	%RSP,%RBP

0x4183a4 PUSH	%R15

0x4183a6 PUSH	%R14

0x4183a8 PUSH	%R13

0x4183aa PUSH	%R12

0x4183ac PUSH	%RBX

0x4183ad MOV	%RDI,%R12

0x4183b0 MOV	%RSI,%RBX

0x4183b3 SUB	$0x38,%RSP

0x4183b7 MOV	%RDX,-0x58(%RBP)

0x4183bb MOV	%ECX,-0x5c(%RBP)

0x4183be CMP	%ECX,0x34(%RSI)

0x4183c1 JLE	418470

0x4183c7 MOV	(%RSI),%RSI

0x4183ca MOV	(%RSI),%R8

0x4183cd CALLQ	0x18(%R8)

0x4183d1 MOV	0x18(%RBX),%RDX

0x4183d5 XOR	%R13D,%R13D

0x4183d8 CMP	%RDX,0x10(%RBX)

0x4183dc JE	418452

0x4183de XCHG	%AX,%AX

(171) 0x4183e0 MOV	0x58(%RBX),%RCX

(171) 0x4183e4 LEA	(,%R13,8),%R15

(171) 0x4183ec MOV	(%RCX,%R15,1),%R14

(171) 0x4183f0 MOV	%R14,%RDI

(171) 0x4183f3 CALL	51ed20 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>

(171) 0x4183f8 MOV	0x10(%RBX),%RSI

(171) 0x4183fc MOV	-0x5c(%RBP),%ECX

(171) 0x4183ff MOV	-0x58(%RBP),%RDX

(171) 0x418403 LEA	-0x50(%RBP),%RDI

(171) 0x418407 MOV	(%RSI,%R15,1),%RSI

(171) 0x41840b MOV	(%RSI),%R9

(171) 0x41840e CALLQ	0x18(%R9)

(171) 0x418412 VMOVUPD	(%R12),%XMM1

(171) 0x418418 VADDPD	-0x50(%RBP),%XMM1,%XMM0

(171) 0x41841d MOV	%R14,%RDI

(171) 0x418420 VMOVSD	0x10(%R12),%XMM2

(171) 0x418427 VADDSD	-0x40(%RBP),%XMM2,%XMM3

(171) 0x41842c VMOVSD	%XMM3,0x10(%R12)

(171) 0x418433 INC	%R13

(171) 0x418436 VMOVUPD	%XMM0,(%R12)

(171) 0x41843c CALL	51ef50 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>

(171) 0x418441 MOV	0x18(%RBX),%RDI

(171) 0x418445 SUB	0x10(%RBX),%RDI

(171) 0x418449 SAR	$0x3,%RDI

(171) 0x41844d CMP	%RDI,%R13

(171) 0x418450 JB	4183e0

0x418452 ADD	$0x38,%RSP

0x418456 MOV	%R12,%RAX

0x418459 POP	%RBX

0x41845a POP	%R12

0x41845c POP	%R13

0x41845e POP	%R14

0x418460 POP	%R15

0x418462 POP	%RBP

0x418463 RET

0x418464 NOPW	%CS:(%RAX,%RAX,1)

0x41846f NOP

0x418470 MOV	0x8(%RSI),%RSI

0x418474 MOV	(%RSI),%RAX

0x418477 CALLQ	0x18(%RAX)

0x41847a JMP	4183d1

0x41847f MOV	%RAX,%R12

0x418482 JMP	404fcc

0x418487 NOP

0x418488 NOPL	(%RAX,%RAX,1)

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	WaveFunction.cpp:182-191
Module	exec

The function is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/refwrap.h:347
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/WaveFunction.cpp:182-191
/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/stl_vector.h:990
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:94

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 10% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 7.00 to 0.94 cycles (7.47x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 68 bytes. The binary function is storing 12 bytes.

General properties

nb instructions	41
nb uops	42
loop length	126
used x86 registers	13
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	2

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	7.00 cycles
front end	7.00 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	3.50	1.50	1.25	1.25	3.50	4.33	4.33	4.33	0.00	0.00	0.00	0.00	0.00	0.00
cycles	3.50	1.50	1.25	1.25	3.50	4.33	4.33	4.33	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	7.00
Dispatch	4.33
Overall L1	7.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	10%
store	9%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 7.00 cycles. At this rate:

10% of peak load performance is reached (9.71 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.71 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 7.00 to 4.33 cycles (1.62x speedup).

ASM code

In the binary file, the address of the function is: 4183a0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	Latency	Recip. throughput
PUSH %RBP	1	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0.17
PUSH %R15	1	0	0	0	0	0	0	0	0	1	0.50
PUSH %R14	1	0	0	0	0	0	0	0	0	1	0.50
PUSH %R13	1	0	0	0	0	0	0	0	0	1	0.50
PUSH %R12	1	0	0	0	0	0	0	0	0	1	0.50
PUSH %RBX	1	0	0	0	0	0	0	0	0	1	0.50
MOV %RDI,%R12	1	0	0	0	0	0	0	0	0	0	0.17
MOV %RSI,%RBX	1	0	0	0	0	0	0	0	0	0	0.17
SUB $0x38,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV %RDX,-0x58(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50
MOV %ECX,-0x5c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50
CMP %ECX,0x34(%RSI)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
JLE 418470 <_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi+0xd0>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
MOV (%RSI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
MOV (%RSI),%R8	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
CALLQ 0x18(%R8)	4	0.50	0	0	0	0.50	0.67	0.67	0.67	0	2.20
MOV 0x18(%RBX),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
XOR %R13D,%R13D	1	0	0	0	0	0	0	0	0	0	0.25
CMP %RDX,0x10(%RBX)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
JE 418452 <_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi+0xb2>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0.09
ADD $0x38,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0.17
POP %RBX	1	0	0	0	0	0	0	0	0	1	0.33
POP %R12	1	0	0	0	0	0	0	0	0	1	0.33
POP %R13	1	0	0	0	0	0	0	0	0	1	0.33
POP %R14	1	0	0	0	0	0	0	0	0	1	0.33
POP %R15	1	0	0	0	0	0	0	0	0	1	0.33
POP %RBP	1	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	1	0.50
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0.09
NOP	0	0	0	0	0	0	0	0	0	0	0.09
MOV 0x8(%RSI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
MOV (%RSI),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
CALLQ 0x18(%RAX)	4	0.50	0	0	0	0.50	0.67	0.67	0.67	0	2.20
JMP 4183d1 <_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi+0x31>	1	0.50	0	0	0	0.50	0	0	0	0	1
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.17
JMP 404fcc <_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi.cold>	1	0.50	0	0	0	0.50	0	0	0	0	1
NOP	0	0	0	0	0	0	0	0	0	0	0.09
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0.09

Source file and lines	WaveFunction.cpp:182-191
Module	exec

The function is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/refwrap.h:347
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/WaveFunction.cpp:182-191
/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/stl_vector.h:990
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:94

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 68 bytes. The binary function is storing 12 bytes.

General properties

nb instructions	41
nb uops	42
loop length	126
used x86 registers	13
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	2

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	7.00 cycles
front end	7.00 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	3.50	1.50	1.25	1.25	3.50	4.33	4.33	4.33	0.00	0.00	0.00	0.00	0.00	0.00
cycles	3.50	1.50	1.25	1.25	3.50	4.33	4.33	4.33	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	7.00
Dispatch	4.33
Overall L1	7.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	10%
store	9%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 7.00 cycles. At this rate:

10% of peak load performance is reached (9.71 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.71 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4183a0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	Latency	Recip. throughput
PUSH %RBP	1	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0.17
PUSH %R15	1	0	0	0	0	0	0	0	0	1	0.50
PUSH %R14	1	0	0	0	0	0	0	0	0	1	0.50
PUSH %R13	1	0	0	0	0	0	0	0	0	1	0.50
PUSH %R12	1	0	0	0	0	0	0	0	0	1	0.50
PUSH %RBX	1	0	0	0	0	0	0	0	0	1	0.50
MOV %RDI,%R12	1	0	0	0	0	0	0	0	0	0	0.17
MOV %RSI,%RBX	1	0	0	0	0	0	0	0	0	0	0.17
SUB $0x38,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV %RDX,-0x58(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50
MOV %ECX,-0x5c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50
CMP %ECX,0x34(%RSI)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
JLE 418470 <_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi+0xd0>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
MOV (%RSI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
MOV (%RSI),%R8	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
CALLQ 0x18(%R8)	4	0.50	0	0	0	0.50	0.67	0.67	0.67	0	2.20
MOV 0x18(%RBX),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
XOR %R13D,%R13D	1	0	0	0	0	0	0	0	0	0	0.25
CMP %RDX,0x10(%RBX)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
JE 418452 <_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi+0xb2>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0.09
ADD $0x38,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0.17
POP %RBX	1	0	0	0	0	0	0	0	0	1	0.33
POP %R12	1	0	0	0	0	0	0	0	0	1	0.33
POP %R13	1	0	0	0	0	0	0	0	0	1	0.33
POP %R14	1	0	0	0	0	0	0	0	0	1	0.33
POP %R15	1	0	0	0	0	0	0	0	0	1	0.33
POP %RBP	1	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	1	0.50
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0.09
NOP	0	0	0	0	0	0	0	0	0	0	0.09
MOV 0x8(%RSI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
MOV (%RSI),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
CALLQ 0x18(%RAX)	4	0.50	0	0	0	0.50	0.67	0.67	0.67	0	2.20
JMP 4183d1 <_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi+0x31>	1	0.50	0	0	0	0.50	0	0	0	0	1
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.17
JMP 404fcc <_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi.cold>	1	0.50	0	0	0	0.50	0	0	0	0	1
NOP	0	0	0	0	0	0	0	0	0	0	0.09
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0.09

▶Scalability Runs Description

Run 2x1	Number processes: 2Number nodes: 1Number processes per node: 2Run Command: <executable> -g "4 2 2" -bMPI Command: mpirun -np <number_processes>Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/run/oneview_runs/compilers/gcc_2/oneview_run_1708580749I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spreadOMP_NUM_THREADS: 1
Run 2x2	OMP_NUM_THREADS: 2I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x4	OMP_NUM_THREADS: 4I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x8	OMP_NUM_THREADS: 8I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x16	OMP_NUM_THREADS: 16I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x32	OMP_NUM_THREADS: 32I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x64	OMP_NUM_THREADS: 64I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x96	OMP_NUM_THREADS: 96I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread

(2x1) Efficiency	(2x1) Potential Speed-Up (%)	(2x2) Efficiency	(2x2) Potential Speed-Up (%)	(2x4) Efficiency	(2x4) Potential Speed-Up (%)	(2x8) Efficiency	(2x8) Potential Speed-Up (%)	(2x16) Efficiency	(2x16) Potential Speed-Up (%)	(2x32) Efficiency	(2x32) Potential Speed-Up (%)	(2x64) Efficiency	(2x64) Potential Speed-Up (%)	(2x96) Efficiency	(2x96) Potential Speed-Up (%)
		1	0	1	0	1	0	1	0	1	0	1	0	1	0

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
2x1
2x2	2	1	1	1.6666666666667	0.01	0.01
2x4	6	1	1	3.3333333333333	0	0
2x8	15	1	1	5.6666666666667	0	0
2x16	24	1	1	11.333333333333	0.01	0
2x32	54	1	1	22	0.02	0
2x64	100	1	1	43.333333333333	0.01	0
2x96	169	1	1	64.666666666667	0.04	0

Name	Coverage (%)	Time (s)
▼_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi–	0	0
○Loop 171 - stl_vector.h:990-990 - exec	0	0

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Colums Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency