OV - exec - Loop 2214

	Loop Id: 2214	Module: exec	Source: SoaDistanceTableABOMPTarget.h:215-228 [...]	Coverage: 0.01%

0x4df0c0 MOV	-0xf0(%RBP),%RDX

0x4df0c7 LEA	0x1(%RDX),%R14

0x4df0cb MOV	-0x74(%RBP),%ECX

0x4df0ce ADD	$0x200,%ECX

0x4df0d4 MOV	-0xa8(%RBP),%RBX

0x4df0db ADD	$0x200,%EBX

0x4df0e1 CMP	-0xe8(%RBP),%RDX

0x4df0e8 JE	4def10

0x4df0ee MOV	-0xa0(%RBP),%RDX

0x4df0f5 CMP	%EDX,%ECX

0x4df0f7 MOV	%EDX,%R15D

0x4df0fa MOV	%ECX,-0x74(%RBP)

0x4df0fd CMOVL	%ECX,%R15D

0x4df101 MOV	%EBX,%EBX

0x4df103 MOV	%RBX,-0xa8(%RBP)

0x4df10a MOV	%R14,-0xf0(%RBP)

0x4df111 MOV	%R14D,%EAX

0x4df114 SAL	$0x9,%EAX

0x4df117 LEA	0x200(%RAX),%ECX

0x4df11d CMP	%EDX,%ECX

0x4df11f CMOVGE	%EDX,%ECX

0x4df122 CMP	%ECX,%EAX

0x4df124 JGE	4df0c0

0x4df126 MOV	-0xc8(%RBP),%RAX

0x4df12d MOV	-0xe0(%RBP),%RCX

0x4df134 MOVSD	(%RAX,%RCX,8),%XMM0

0x4df139 MOVSD	%XMM0,-0x70(%RBP)

0x4df13e MOV	-0xd8(%RBP),%RCX

0x4df145 MOVSD	(%RAX,%RCX,8),%XMM0

0x4df14a MOVSD	%XMM0,-0x40(%RBP)

0x4df14f MOV	-0xd0(%RBP),%RCX

0x4df156 MOVSD	(%RAX,%RCX,8),%XMM0

0x4df15b MOVSD	%XMM0,-0x68(%RBP)

0x4df160 MOV	-0xa8(%RBP),%R13

0x4df167 MOV	%R15,-0x58(%RBP)

0x4df16b NOPL	(%RAX,%RAX,1)

  (2215) 0x4df170 MOVAPD	%XMM11,%XMM5

  (2215) 0x4df175 MOVSD	(%RSI,%R13,8),%XMM1

  (2215) 0x4df17b SUBSD	-0x70(%RBP),%XMM1

  (2215) 0x4df180 MOVSD	(%R10,%R13,8),%XMM0

  (2215) 0x4df186 SUBSD	-0x40(%RBP),%XMM0

  (2215) 0x4df18b MOVSD	(%R11,%R13,8),%XMM11

  (2215) 0x4df191 SUBSD	-0x68(%RBP),%XMM11

  (2215) 0x4df197 MOVSD	-0x180(%RBP),%XMM2

  (2215) 0x4df19f MULSD	%XMM1,%XMM2

  (2215) 0x4df1a3 MOVSD	-0x178(%RBP),%XMM3

  (2215) 0x4df1ab MULSD	%XMM0,%XMM3

  (2215) 0x4df1af ADDSD	%XMM2,%XMM3

  (2215) 0x4df1b3 MOVSD	-0x170(%RBP),%XMM4

  (2215) 0x4df1bb MULSD	%XMM11,%XMM4

  (2215) 0x4df1c0 ADDSD	%XMM3,%XMM4

  (2215) 0x4df1c4 MOVSD	%XMM4,-0x38(%RBP)

  (2215) 0x4df1c9 MOVSD	-0x168(%RBP),%XMM2

  (2215) 0x4df1d1 MULSD	%XMM1,%XMM2

  (2215) 0x4df1d5 MULSD	%XMM0,%XMM6

  (2215) 0x4df1d9 ADDSD	%XMM2,%XMM6

  (2215) 0x4df1dd MULSD	%XMM11,%XMM7

  (2215) 0x4df1e2 ADDSD	%XMM6,%XMM7

  (2215) 0x4df1e6 MOVSD	%XMM7,-0x30(%RBP)

  (2215) 0x4df1eb MULSD	%XMM9,%XMM1

  (2215) 0x4df1f0 MULSD	%XMM10,%XMM0

  (2215) 0x4df1f5 ADDSD	%XMM1,%XMM0

  (2215) 0x4df1f9 MULSD	%XMM5,%XMM11

  (2215) 0x4df1fe ADDSD	%XMM0,%XMM11

  (2215) 0x4df203 MOVSD	%XMM11,-0x48(%RBP)

  (2215) 0x4df209 MOVAPD	%XMM4,%XMM0

  (2215) 0x4df20d MOV	%R9,%R14

  (2215) 0x4df210 MOV	%R12,%RBX

  (2215) 0x4df213 MOV	%R10,%R12

  (2215) 0x4df216 MOV	%R11,%R15

  (2215) 0x4df219 CALL	4f2080 <round>

  (2215) 0x4df21e MOVSD	-0x38(%RBP),%XMM1

  (2215) 0x4df223 SUBSD	%XMM0,%XMM1

  (2215) 0x4df227 MOVSD	%XMM1,-0x38(%RBP)

  (2215) 0x4df22c MOVSD	-0x30(%RBP),%XMM0

  (2215) 0x4df231 CALL	4f2080 <round>

  (2215) 0x4df236 MOVSD	-0x30(%RBP),%XMM1

  (2215) 0x4df23b SUBSD	%XMM0,%XMM1

  (2215) 0x4df23f MOVSD	%XMM1,-0x30(%RBP)

  (2215) 0x4df244 MOVSD	-0x48(%RBP),%XMM0

  (2215) 0x4df249 CALL	4f2080 <round>

  (2215) 0x4df24e MOVSD	-0x118(%RBP),%XMM15

  (2215) 0x4df257 MOVSD	-0x120(%RBP),%XMM14

  (2215) 0x4df260 MOVSD	-0x128(%RBP),%XMM12

  (2215) 0x4df269 MOVSD	-0x130(%RBP),%XMM3

  (2215) 0x4df271 MOVSD	-0x138(%RBP),%XMM1

  (2215) 0x4df279 MOVSD	-0x140(%RBP),%XMM11

  (2215) 0x4df282 MOVSD	-0x148(%RBP),%XMM10

  (2215) 0x4df28b MOVSD	-0x150(%RBP),%XMM9

  (2215) 0x4df294 MOVSD	-0x158(%RBP),%XMM7

  (2215) 0x4df29c MOVSD	-0x160(%RBP),%XMM6

  (2215) 0x4df2a4 MOV	%R15,%R11

  (2215) 0x4df2a7 MOV	-0x58(%RBP),%R15

  (2215) 0x4df2ab MOV	%R12,%R10

  (2215) 0x4df2ae MOV	%RBX,%R12

  (2215) 0x4df2b1 MOV	%R14,%R9

  (2215) 0x4df2b4 MOV	-0x188(%RBP),%R8

  (2215) 0x4df2bb MOV	-0x50(%RBP),%RDI

  (2215) 0x4df2bf MOV	-0xb0(%RBP),%RSI

  (2215) 0x4df2c6 MOVSD	-0x48(%RBP),%XMM13

  (2215) 0x4df2cc SUBSD	%XMM0,%XMM13

  (2215) 0x4df2d1 MOVAPD	%XMM1,%XMM0

  (2215) 0x4df2d5 MOVSD	-0x38(%RBP),%XMM2

  (2215) 0x4df2da MULSD	%XMM2,%XMM0

  (2215) 0x4df2de MOVAPD	%XMM3,%XMM1

  (2215) 0x4df2e2 MOVSD	-0x30(%RBP),%XMM4

  (2215) 0x4df2e7 MULSD	%XMM4,%XMM1

  (2215) 0x4df2eb ADDSD	%XMM0,%XMM1

  (2215) 0x4df2ef MOVAPD	%XMM13,%XMM0

  (2215) 0x4df2f4 MULSD	%XMM12,%XMM0

  (2215) 0x4df2f9 ADDSD	%XMM1,%XMM0

  (2215) 0x4df2fd MOVAPD	%XMM14,%XMM1

  (2215) 0x4df302 MULSD	%XMM2,%XMM1

  (2215) 0x4df306 MOVAPD	%XMM2,%XMM3

  (2215) 0x4df30a MOVAPD	%XMM15,%XMM2

  (2215) 0x4df30f MULSD	%XMM4,%XMM2

  (2215) 0x4df313 ADDSD	%XMM1,%XMM2

  (2215) 0x4df317 MOVSD	-0x110(%RBP),%XMM1

  (2215) 0x4df31f MULSD	%XMM13,%XMM1

  (2215) 0x4df324 ADDSD	%XMM2,%XMM1

  (2215) 0x4df328 MULSD	-0x108(%RBP),%XMM3

  (2215) 0x4df330 MULSD	-0x100(%RBP),%XMM4

  (2215) 0x4df338 ADDSD	%XMM3,%XMM4

  (2215) 0x4df33c MULSD	-0xf8(%RBP),%XMM13

  (2215) 0x4df345 ADDSD	%XMM4,%XMM13

  (2215) 0x4df34a MOVSD	%XMM0,(%R14,%R13,8)

  (2215) 0x4df350 MOVSD	%XMM1,(%RBX,%R13,8)

  (2215) 0x4df356 MULSD	%XMM0,%XMM0

  (2215) 0x4df35a MULSD	%XMM1,%XMM1

  (2215) 0x4df35e ADDSD	%XMM0,%XMM1

  (2215) 0x4df362 MOVSD	%XMM13,(%R8,%R13,8)

  (2215) 0x4df368 MULSD	%XMM13,%XMM13

  (2215) 0x4df36d ADDSD	%XMM1,%XMM13

  (2215) 0x4df372 XORPS	%XMM0,%XMM0

  (2215) 0x4df375 SQRTSD	%XMM13,%XMM0

  (2215) 0x4df37a MOVSD	%XMM0,(%RDI,%R13,8)

  (2215) 0x4df380 INC	%R13

  (2215) 0x4df383 CMP	%R13,%R15

  (2215) 0x4df386 JNE	4df170

0x4df38c JMP	4df0c0

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Particle/SoaDistanceTableABOMPTarget.h: 215 - 228

--------------------------------------------------------------------------------

215:         for (int team_id = 0; team_id < num_teams; team_id++)

216:         {

217:           const int first = ChunkSizePerTeam * team_id;

218:           const int last  = omptarget::min(first + ChunkSizePerTeam, num_sources_local);

219:

220:           T pos[D];

221:           for (int idim = 0; idim < D; idim++)

222:             pos[idim] = target_pos_ptr[iat * D + idim];

[...]

228:           for (int iel = first; iel < last; iel++)

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Platforms/OMPTarget/OMPTargetMath.hpp: 38 - 38

--------------------------------------------------------------------------------

38:   return a < b ? a : b;

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds3DSoa.h: 280 - 298

--------------------------------------------------------------------------------

280:     T displ_0 = px[iat] - x0;

281:     T displ_1 = py[iat] - y0;

282:     T displ_2 = pz[iat] - z0;

283:

284:     T ar_0 = displ_0 * g00 + displ_1 * g10 + displ_2 * g20;

285:     T ar_1 = displ_0 * g01 + displ_1 * g11 + displ_2 * g21;

286:     T ar_2 = displ_0 * g02 + displ_1 * g12 + displ_2 * g22;

287:

288:     //put them in the box

289:     ar_0 -= round(ar_0);

290:     ar_1 -= round(ar_1);

291:     ar_2 -= round(ar_2);

292:

293:     //unit2cart

294:     dx[iat] = ar_0 * r00 + ar_1 * r10 + ar_2 * r20;

295:     dy[iat] = ar_0 * r01 + ar_1 * r11 + ar_2 * r21;

296:     dz[iat] = ar_0 * r02 + ar_1 * r12 + ar_2 * r22;

297:

298:     temp_r[iat] = std::sqrt(dx[iat] * dx[iat] + dy[iat] * dy[iat] + dz[iat] * dz[iat]);

Path /

Metric	Value
CQA speedup if no scalar integer	1.68
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	5.77
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.18
Bottlenecks
Function	_ZN11qmcplusplus27SoaDistanceTableABOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE
Source	SoaDistanceTableABOMPTarget.h:215-217,SoaDistanceTableABOMPTarget.h:222-222,SoaDistanceTableABOMPTarget.h:228-228,OMPTargetMath.hpp:38-38,ParticleBConds3DSoa.h:296-296
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	5.17
CQA cycles if no scalar integer	3.08
CQA cycles if FP arith vectorized	5.17
CQA cycles if fully vectorized	0.90
Front-end cycles	4.83
DIV/SQRT cycles	2.88
P0 cycles	2.88
P1 cycles	2.75
P2 cycles	2.75
P3 cycles	1.75
P4 cycles	4.67
P5 cycles	4.67
P6 cycles	4.67
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	0.75
P12 cycles	0.75
P13 cycles	0.00
Inter-iter dependencies cycles	0
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	30.00
Nb uops	29.00
Nb loads	9.00
Nb stores	5.00
Nb stack references	9.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	19.04
Bytes prefetched	0.00
Bytes loaded	68.00
Bytes stored	36.00
Stride 0	1.00
Stride 1	2.50
Stride n	0.50
Stride unknown	1.00
Stride indirect	0.00
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	9.36
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	11.01
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	6.25
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	7.29

Metric	Value
CQA speedup if no scalar integer	2.67
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	5.08
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.11
Bottlenecks	P5, P6, P7,
Function	_ZN11qmcplusplus27SoaDistanceTableABOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE
Source	SoaDistanceTableABOMPTarget.h:215-217,SoaDistanceTableABOMPTarget.h:222-222,SoaDistanceTableABOMPTarget.h:228-228,OMPTargetMath.hpp:38-38,ParticleBConds3DSoa.h:296-296
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	6.67
CQA cycles if no scalar integer	2.50
CQA cycles if FP arith vectorized	6.67
CQA cycles if fully vectorized	1.31
Front-end cycles	6.00
DIV/SQRT cycles	3.00
P0 cycles	3.00
P1 cycles	3.00
P2 cycles	3.00
P3 cycles	2.00
P4 cycles	6.67
P5 cycles	6.67
P6 cycles	6.67
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	1.50
P12 cycles	1.50
P13 cycles	0.00
Inter-iter dependencies cycles	0
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	37.00
Nb uops	36.00
Nb loads	13.00
Nb stores	7.00
Nb stack references	13.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	22.80
Bytes prefetched	0.00
Bytes loaded	100.00
Bytes stored	52.00
Stride 0	1.00
Stride 1	5.00
Stride n	1.00
Stride unknown	2.00
Stride indirect	0.00
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	10.20
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	11.61
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	6.25
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	7.29

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	7.65
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.33
Bottlenecks	micro-operation queue,
Function	_ZN11qmcplusplus27SoaDistanceTableABOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE
Source	SoaDistanceTableABOMPTarget.h:215-217,SoaDistanceTableABOMPTarget.h:222-222,SoaDistanceTableABOMPTarget.h:228-228,OMPTargetMath.hpp:38-38,ParticleBConds3DSoa.h:296-296
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	3.67
CQA cycles if no scalar integer	3.67
CQA cycles if FP arith vectorized	3.67
CQA cycles if fully vectorized	0.48
Front-end cycles	3.67
DIV/SQRT cycles	2.75
P0 cycles	2.75
P1 cycles	2.50
P2 cycles	2.50
P3 cycles	1.50
P4 cycles	2.67
P5 cycles	2.67
P6 cycles	2.67
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	0.00
Inter-iter dependencies cycles	0
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	23.00
Nb uops	22.00
Nb loads	5.00
Nb stores	3.00
Nb stack references	5.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	15.27
Bytes prefetched	0.00
Bytes loaded	36.00
Bytes stored	20.00
Stride 0	1.00
Stride 1	0.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	0.00
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	8.52
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	10.42
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	6.25
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	7.29

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	_ZN11qmcplusplus27SoaDistanceTableABOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE
Source file and lines	SoaDistanceTableABOMPTarget.h:215-228
Module	exec

The loop is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Particle/SoaDistanceTableABOMPTarget.h:215-222,228
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Platforms/OMPTarget/OMPTargetMath.hpp:38
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds3DSoa.h:280-298

Warnings:
Non-innermost loop: analyzing only self part (ignoring child loops).
The structure of this loop is probably <if then [else] end>.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. Only 9% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your loop, you can lower the cost of an iteration from 5.17 to 0.90 cycles (5.77x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 68 bytes. The binary loop is storing 36 bytes.

General properties

nb instructions	30
nb uops	29
loop length	141.50
used x86 registers	7.50
used mmx registers	0
used xmm registers	0.50
used ymm registers	0
used zmm registers	0
nb stack references	9

Front-end

MACRO FUSION NOT POSSIBLE

micro-operation queue	4.83 cycles
front end	4.83 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	2.88	2.88	2.75	2.75	1.75	4.67	4.67	4.67	0.00	0.00	0.00	0.00	0.75	0.75
cycles	2.88	2.88	2.75	2.75	1.75	4.67	4.67	4.67	0.00	0.00	0.00	0.00	0.75	0.75

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	0.00

Cycles summary

Front-end	4.83
Dispatch	4.71
Data deps.	0.00
Overall L1	5.17

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	8%
load	12%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
other	7%

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	9%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	7%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 5.17 cycles. At this rate:

12% of peak load performance is reached (12.41 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (6.63 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Function	_ZN11qmcplusplus27SoaDistanceTableABOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE
Source file and lines	SoaDistanceTableABOMPTarget.h:215-228
Module	exec

The loop is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Particle/SoaDistanceTableABOMPTarget.h:215-222,228
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Platforms/OMPTarget/OMPTargetMath.hpp:38
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds3DSoa.h:280-298

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 6.67 to 2.50 cycles (2.67x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. Only 10% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your loop, you can lower the cost of an iteration from 6.67 to 1.31 cycles (5.08x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 6.67 to 6.00 cycles (1.11x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- hardcode the bounds of the corresponding 'for' loop

No data for this section

Slow data structures access

Detected data structures (typically arrays) that cannot be efficiently read/written

Details

Constant unknown stride: 2 occurrence(s)
Constant non-unit stride: 1 occurrence(s)

Non-unit stride (uncontiguous) accesses are not efficiently using data caches

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 100 bytes. The binary loop is storing 52 bytes.

General properties

nb instructions	37
nb uops	36
loop length	181
used x86 registers	8
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	0
nb stack references	13

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	6.00 cycles
front end	6.00 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	3.00	3.00	3.00	3.00	2.00	6.67	6.67	6.67	0.00	0.00	0.00	0.00	1.50	1.50
cycles	3.00	3.00	3.00	3.00	2.00	6.67	6.67	6.67	0.00	0.00	0.00	0.00	1.50	1.50

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	0.00

Cycles summary

Front-end	6.00
Dispatch	6.67
Data deps.	0.00
Overall L1	6.67

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	9%
load	12%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
other	7%

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	10%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	7%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 6.67 cycles. At this rate:

15% of peak load performance is reached (15.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
12% of peak store performance is reached (7.80 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 4df0ee

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP4	FP5	Latency	Recip. throughput
MOV -0xf0(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	3	0.33
LEA 0x1(%RDX),%R14	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25
MOV -0x74(%RBP),%ECX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	3	0.33
ADD $0x200,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25
MOV -0xa8(%RBP),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	3	0.33
ADD $0x200,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25
CMP -0xe8(%RBP),%RDX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	1	0.33
JE 4def10 <_ZN11qmcplusplus27SoaDistanceTableABOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE+0x490>	1	0.50	0	0	0	0.50	0	0	0	0	0	1	0.50-1
MOV -0xa0(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	3	0.33
CMP %EDX,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25
MOV %EDX,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %ECX,-0x74(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50
CMOVL %ECX,%R15D	1	0.50	0	0	0.50	0	0	0	0	0	0	1	0.50
MOV %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RBX,-0xa8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50
MOV %R14,-0xf0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17
SAL $0x9,%EAX	1	0	0.50	0.50	0	0	0	0	0	0	0	1	0.50
LEA 0x200(%RAX),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25
CMP %EDX,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25
CMOVGE %EDX,%ECX	1	0.50	0	0	0.50	0	0	0	0	0	0	1	0.50
CMP %ECX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25
JGE 4df0c0 <_ZN11qmcplusplus27SoaDistanceTableABOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE+0x640>	1	0.50	0	0	0	0.50	0	0	0	0	0	1	0.50-1
MOV -0xc8(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	3	0.33
MOV -0xe0(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	3	0.33
MOVSD (%RAX,%RCX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	1	0.50
MOVSD %XMM0,-0x70(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	1	1
MOV -0xd8(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	3	0.33
MOVSD (%RAX,%RCX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	1	0.50
MOVSD %XMM0,-0x40(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	1	1
MOV -0xd0(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	3	0.33
MOVSD (%RAX,%RCX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	1	0.50
MOVSD %XMM0,-0x68(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	1	1
MOV -0xa8(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	3	0.33
MOV %R15,-0x58(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09
JMP 4df0c0 <_ZN11qmcplusplus27SoaDistanceTableABOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE+0x640>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	1

Function	_ZN11qmcplusplus27SoaDistanceTableABOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE
Source file and lines	SoaDistanceTableABOMPTarget.h:215-228
Module	exec

The loop is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Particle/SoaDistanceTableABOMPTarget.h:215-222,228
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Platforms/OMPTarget/OMPTargetMath.hpp:38
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds3DSoa.h:280-298

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. Only 8% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your loop, you can lower the cost of an iteration from 3.67 to 0.48 cycles (7.65x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 36 bytes. The binary loop is storing 20 bytes.

General properties

nb instructions	23
nb uops	22
loop length	102
used x86 registers	7
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	5

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	3.67 cycles
front end	3.67 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	2.75	2.75	2.50	2.50	1.50	2.67	2.67	2.67	0.00	0.00	0.00	0.00	0.00	0.00
cycles	2.75	2.75	2.50	2.50	1.50	2.67	2.67	2.67	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	0.00

Cycles summary

Front-end	3.67
Dispatch	2.75
Data deps.	0.00
Overall L1	3.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	8%
load	12%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	7%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 3.67 cycles. At this rate:

10% of peak load performance is reached (9.82 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (5.45 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 3.67 to 2.75 cycles (1.33x speedup).

ASM code

In the binary file, the address of the loop is: 4df0ee

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	Latency	Recip. throughput
MOV -0xf0(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
LEA 0x1(%RDX),%R14	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV -0x74(%RBP),%ECX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
ADD $0x200,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV -0xa8(%RBP),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
ADD $0x200,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
CMP -0xe8(%RBP),%RDX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
JE 4def10 <_ZN11qmcplusplus27SoaDistanceTableABOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE+0x490>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
MOV -0xa0(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
CMP %EDX,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV %EDX,%R15D	1	0	0	0	0	0	0	0	0	0	0.17
MOV %ECX,-0x74(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50
CMOVL %ECX,%R15D	1	0.50	0	0	0.50	0	0	0	0	1	0.50
MOV %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0.17
MOV %RBX,-0xa8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50
MOV %R14,-0xf0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0.17
SAL $0x9,%EAX	1	0	0.50	0.50	0	0	0	0	0	1	0.50
LEA 0x200(%RAX),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
CMP %EDX,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
CMOVGE %EDX,%ECX	1	0.50	0	0	0.50	0	0	0	0	1	0.50
CMP %ECX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JGE 4df0c0 <_ZN11qmcplusplus27SoaDistanceTableABOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE+0x640>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1

Report Configuration

Vectorization

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

Slow data structures access

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code