OV - exec - Function __libm_logl

	Function: __libm_logl_ex	Module: exec	Source: :0-0	Coverage: 0.01%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x4f20f0 ENDBR64

0x4f20f4 PUSH	%RBX

0x4f20f5 SUB	$0x50,%RSP

0x4f20f9 FLDT	0x60(%RSP)

0x4f20fd FSTPT	0x10(%RSP)

0x4f2101 FNSTCW	0xc(%RSP)

0x4f2105 MOV	0x18(%RSP),%RAX

0x4f210a AND	$0x8000,%EAX

0x4f210f MOV	0x18(%RSP),%RCX

0x4f2114 AND	$0x7fff,%ECX

0x4f211a OR	%EAX,%ECX

0x4f211c MOV	0x14(%RSP),%EAX

0x4f2120 SHRD	$0x10,%ECX,%EAX

0x4f2124 CMP	$0x7fff7fff,%EAX

0x4f2129 JA	4f21ff

0x4f212f LEA	-0x3ffef800(%RAX),%ECX

0x4f2135 CMP	$0x9000,%ECX

0x4f213b JA	4f223d

0x4f2141 ADD	$-0x3ffeffff,%EAX

0x4f2146 CMP	$0x8001,%EAX

0x4f214b JA	4f23de

0x4f2151 MOV	0x18(%RSP),%RAX

0x4f2156 AND	$0x7fff,%EAX

0x4f215b CMP	$0x3fff,%EAX

0x4f2160 FLDZ

0x4f2162 JNE	4f2182

0x4f2164 FSTP	%ST0

0x4f2166 MOV	0x14(%RSP),%EAX

0x4f216a CMP	$-0x80000000,%EAX

0x4f216f FLDZ

0x4f2171 JNE	4f2182

0x4f2173 FSTP	%ST0

0x4f2175 FLDZ

0x4f2177 CMPL	$0,0x10(%RSP)

0x4f217c JE	4f23d8

0x4f2182 FSTP	%ST0

0x4f2184 MOVZX	0xc(%RSP),%ECX

0x4f2189 MOV	%ECX,%EAX

0x4f218b AND	$0x300,%EAX

0x4f2190 CMP	$0x300,%EAX

0x4f2195 JE	4f21a6

0x4f2197 OR	$0x300,%ECX

0x4f219d MOV	%CX,0xe(%RSP)

0x4f21a2 FLDCW	0xe(%RSP)

0x4f21a6 MOVZX	%AX,%EAX

0x4f21a9 FLDT	0x10(%RSP)

0x4f21ad FLD1

0x4f21af FCHS

0x4f21b1 FADDP	%ST0,%ST1

0x4f21b3 FLD	%ST0

0x4f21b5 FSTPT	0x10(%RSP)

0x4f21b9 FLD	%ST0

0x4f21bb FMUL	%ST1,%ST0

0x4f21bd FLDT	0x312dd(%RIP)

0x4f21c3 FMUL	%ST1,%ST0

0x4f21c5 FLDT	0x312e5(%RIP)

0x4f21cb FADDP	%ST0,%ST1

0x4f21cd FMUL	%ST1,%ST0

0x4f21cf FLDT	0x312eb(%RIP)

0x4f21d5 FMUL	%ST2,%ST0

0x4f21d7 FADDS	0x31173(%RIP)

0x4f21dd FMULP	%ST0,%ST2

0x4f21df FMUL	%ST2,%ST0

0x4f21e1 FADDP	%ST0,%ST1

0x4f21e3 FADDP	%ST0,%ST1

0x4f21e5 FLD	%ST0

0x4f21e7 FSTPT	0x20(%RSP)

0x4f21eb CMP	$0x300,%EAX

0x4f21f0 JE	4f23d8

0x4f21f6 FLDCW	0xc(%RSP)

0x4f21fa JMP	4f23d8

0x4f21ff MOVZX	0xc(%RSP),%EAX

0x4f2204 MOV	%EAX,%EBX

0x4f2206 AND	$0x300,%EBX

0x4f220c CMP	$0x300,%EBX

0x4f2212 JE	4f2222

0x4f2214 OR	$0x300,%EAX

0x4f2219 MOV	%AX,0xe(%RSP)

0x4f221e FLDCW	0xe(%RSP)

0x4f2222 MOV	0x18(%RSP),%RAX

0x4f2227 TEST	%AX,%AX

0x4f222a JS	4f2360

0x4f2230 FLDT	0x10(%RSP)

0x4f2234 FSTPT	0x20(%RSP)

0x4f2238 JMP	4f23c6

0x4f223d MOVZX	0xc(%RSP),%ECX

0x4f2242 MOV	%ECX,%EAX

0x4f2244 AND	$0x300,%EAX

0x4f2249 CMP	$0x300,%EAX

0x4f224e JE	4f225f

0x4f2250 OR	$0x300,%ECX

0x4f2256 MOV	%CX,0xe(%RSP)

0x4f225b FLDCW	0xe(%RSP)

0x4f225f MOV	0x18(%RSP),%RCX

0x4f2264 SAL	$0x31,%RCX

0x4f2268 MOV	$-0x3fff,%EDX

0x4f226d JE	4f252f

0x4f2273 MOVZX	%AX,%EAX

0x4f2276 MOV	0x18(%RSP),%RCX

0x4f227b AND	$0x7fff,%ECX

0x4f2281 ADD	%EDX,%ECX

0x4f2283 MOV	$-0x8000,%RDX

0x4f228a AND	0x18(%RSP),%RDX

0x4f228f OR	$0x3fff,%RDX

0x4f2296 MOV	%RDX,0x18(%RSP)

0x4f229b MOV	0x14(%RSP),%EDX

0x4f229f SHR	$0x17,%EDX

0x4f22a2 MOVZX	%DL,%EDX

0x4f22a5 FLDT	0x10(%RSP)

0x4f22a9 FLD	%ST0

0x4f22ab FADDS	0x31093(%RIP)

0x4f22b1 MOV	$0x5244e0,%RSI

0x4f22b8 FLDS	(%RSI,%RDX,4)

0x4f22bb LEA	(%RDX,%RDX,1),%ESI

0x4f22be FXCH	%ST1

0x4f22c0 FADDS	0x31082(%RIP)

0x4f22c6 FSUBR	%ST0,%ST2

0x4f22c8 FMUL	%ST1,%ST0

0x4f22ca FXCH	%ST2

0x4f22cc FMULP	%ST0,%ST1

0x4f22ce FLD1

0x4f22d0 FCHS

0x4f22d2 FADDP	%ST0,%ST2

0x4f22d4 FLD	%ST1

0x4f22d6 FADD	%ST1,%ST0

0x4f22d8 FLD	%ST0

0x4f22da FSTPT	0x10(%RSP)

0x4f22de FLD	%ST0

0x4f22e0 FMUL	%ST1,%ST0

0x4f22e2 FLDT	0x31078(%RIP)

0x4f22e8 FMUL	%ST1,%ST0

0x4f22ea FLDT	0x31080(%RIP)

0x4f22f0 FADDP	%ST0,%ST1

0x4f22f2 FMUL	%ST1,%ST0

0x4f22f4 FLDT	0x31086(%RIP)

0x4f22fa FADDP	%ST0,%ST1

0x4f22fc FMUL	%ST1,%ST0

0x4f22fe FLDT	0x3108c(%RIP)

0x4f2304 FMUL	%ST2,%ST0

0x4f2306 FLDT	0x31094(%RIP)

0x4f230c FADDP	%ST0,%ST1

0x4f230e FMUL	%ST2,%ST0

0x4f2310 FLDT	0x3109a(%RIP)

0x4f2316 FADDP	%ST0,%ST1

0x4f2318 FMULP	%ST0,%ST2

0x4f231a FMULP	%ST0,%ST2

0x4f231c FADDP	%ST0,%ST1

0x4f231e FADDP	%ST0,%ST1

0x4f2320 LEA	0x1(%RDX,%RDX,1),%EDX

0x4f2324 MOV	%ECX,0x34(%RSP)

0x4f2328 FILDL	0x34(%RSP)

0x4f232c FLD	%ST0

0x4f232e FMULL	0x3119c(%RIP)

0x4f2334 MOV	$0x5234e0,%RCX

0x4f233b FADDL	(%RCX,%RDX,8)

0x4f233e FADDP	%ST0,%ST2

0x4f2340 FMULL	0x31192(%RIP)

0x4f2346 FADDL	(%RCX,%RSI,8)

0x4f2349 FADDP	%ST0,%ST2

0x4f234b FADDP	%ST0,%ST1

0x4f234d FLD	%ST0

0x4f234f FSTPT	0x20(%RSP)

0x4f2353 CMP	$0x300,%EAX

0x4f2358 JE	4f23d8

0x4f235a FLDCW	0xc(%RSP)

0x4f235e JMP	4f23d8

0x4f2360 MOV	0x18(%RSP),%RAX

0x4f2365 NOT	%EAX

0x4f2367 TEST	$0x7fff,%EAX

0x4f236c JNE	4f2388

0x4f236e MOV	0x14(%RSP),%EAX

0x4f2372 CMP	$-0x80000000,%EAX

0x4f2377 JNE	4f2230

0x4f237d CMPL	$0,0x10(%RSP)

0x4f2382 JNE	4f2230

0x4f2388 MOV	0x18(%RSP),%RAX

0x4f238d SAL	$0x31,%RAX

0x4f2391 JNE	4f23a5

0x4f2393 CMPL	$0,0x14(%RSP)

0x4f2398 JNE	4f23a5

0x4f239a CMPL	$0,0x10(%RSP)

0x4f239f JE	4f258b

0x4f23a5 FLDS	0x30f8d(%RIP)

0x4f23ab FSTPT	0x20(%RSP)

0x4f23af LEA	0x10(%RSP),%RDI

0x4f23b4 LEA	0x20(%RSP),%RDX

0x4f23b9 MOV	%RDI,%RSI

0x4f23bc MOV	$0x1,%ECX

0x4f23c1 CALL	4f2740 <__libm_error_support>

0x4f23c6 MOVZX	%BX,%EAX

0x4f23c9 CMP	$0x300,%EAX

0x4f23ce JE	4f23d4

0x4f23d0 FLDCW	0xc(%RSP)

0x4f23d4 FLDT	0x20(%RSP)

0x4f23d8 ADD	$0x50,%RSP

0x4f23dc POP	%RBX

0x4f23dd RET

0x4f23de MOVZX	0xc(%RSP),%ECX

0x4f23e3 MOV	%ECX,%EAX

0x4f23e5 AND	$0x300,%EAX

0x4f23ea CMP	$0x300,%EAX

0x4f23ef JE	4f2400

0x4f23f1 OR	$0x300,%ECX

0x4f23f7 MOV	%CX,0xe(%RSP)

0x4f23fc FLDCW	0xe(%RSP)

0x4f2400 FLDT	0x10(%RSP)

0x4f2404 FLD1

0x4f2406 FCHS

0x4f2408 FADDP	%ST0,%ST1

0x4f240a FLD	%ST0

0x4f240c FMULS	0x30f3a(%RIP)

0x4f2412 FLD	%ST1

0x4f2414 FADD	%ST1,%ST0

0x4f2416 FSUBP	%ST0,%ST1

0x4f2418 FLD	%ST1

0x4f241a FSUB	%ST1,%ST0

0x4f241c FLD	%ST2

0x4f241e FMUL	%ST1,%ST0

0x4f2420 FLD	%ST2

0x4f2422 FMUL	%ST2,%ST0

0x4f2424 FADDP	%ST0,%ST1

0x4f2426 FLD	%ST0

0x4f2428 FSTPT	0x44(%RSP)

0x4f242c FLD	%ST2

0x4f242e FMUL	%ST3,%ST0

0x4f2430 FLD	%ST0

0x4f2432 FSTPT	0x38(%RSP)

0x4f2436 FADDP	%ST0,%ST1

0x4f2438 FLDT	0x30f82(%RIP)

0x4f243e FMUL	%ST1,%ST0

0x4f2440 FLDT	0x30f8a(%RIP)

0x4f2446 FADDP	%ST0,%ST1

0x4f2448 FMUL	%ST1,%ST0

0x4f244a FLDT	0x30f90(%RIP)

0x4f2450 FADDP	%ST0,%ST1

0x4f2452 FMUL	%ST1,%ST0

0x4f2454 FLDT	0x30f96(%RIP)

0x4f245a FADDP	%ST0,%ST1

0x4f245c FMUL	%ST1,%ST0

0x4f245e FLDT	0x30f9c(%RIP)

0x4f2464 FADDP	%ST0,%ST1

0x4f2466 FMUL	%ST1,%ST0

0x4f2468 FLDT	0x30fa2(%RIP)

0x4f246e FADDP	%ST0,%ST1

0x4f2470 FMUL	%ST1,%ST0

0x4f2472 FLDT	0x30fa8(%RIP)

0x4f2478 FADDP	%ST0,%ST1

0x4f247a FLDT	0x30fb0(%RIP)

0x4f2480 FMUL	%ST2,%ST0

0x4f2482 FLDT	0x30fb8(%RIP)

0x4f2488 FADDP	%ST0,%ST1

0x4f248a FMUL	%ST2,%ST0

0x4f248c FLDT	0x30fbe(%RIP)

0x4f2492 FADDP	%ST0,%ST1

0x4f2494 FMUL	%ST2,%ST0

0x4f2496 FLDT	0x30fc4(%RIP)

0x4f249c FADDP	%ST0,%ST1

0x4f249e FMUL	%ST2,%ST0

0x4f24a0 FLDT	0x30fca(%RIP)

0x4f24a6 FADDP	%ST0,%ST1

0x4f24a8 FMUL	%ST2,%ST0

0x4f24aa FLDT	0x30fd0(%RIP)

0x4f24b0 FADDP	%ST0,%ST1

0x4f24b2 FMUL	%ST2,%ST0

0x4f24b4 FLDT	0x30fd6(%RIP)

0x4f24ba FADDP	%ST0,%ST1

0x4f24bc FLD	%ST5

0x4f24be FSTPT	0x10(%RSP)

0x4f24c2 FMULP	%ST0,%ST5

0x4f24c4 FMULP	%ST0,%ST1

0x4f24c6 FADDP	%ST0,%ST3

0x4f24c8 FLDS	0x30e82(%RIP)

0x4f24ce FLDS	0x30e80(%RIP)

0x4f24d4 FLDT	0x38(%RSP)

0x4f24d8 FMUL	%ST1,%ST0

0x4f24da FLD	%ST4

0x4f24dc FMUL	%ST3,%ST0

0x4f24de FADDP	%ST0,%ST1

0x4f24e0 FLDT	0x44(%RSP)

0x4f24e4 FMULP	%ST0,%ST2

0x4f24e6 FXCH	%ST1

0x4f24e8 FADDP	%ST0,%ST5

0x4f24ea FXCH	%ST1

0x4f24ec FMUL	%ST2,%ST0

0x4f24ee FADDP	%ST0,%ST4

0x4f24f0 FLD	%ST0

0x4f24f2 FADD	%ST4,%ST0

0x4f24f4 FMUL	%ST2,%ST0

0x4f24f6 FXCH	%ST4

0x4f24f8 FMUL	%ST3,%ST0

0x4f24fa FADDP	%ST0,%ST4

0x4f24fc FMUL	%ST2,%ST0

0x4f24fe FXCH	%ST1

0x4f2500 FADDP	%ST0,%ST3

0x4f2502 FLD	%ST1

0x4f2504 FADD	%ST1,%ST0

0x4f2506 FSUBR	%ST0,%ST2

0x4f2508 FXCH	%ST1

0x4f250a FADDP	%ST0,%ST2

0x4f250c FXCH	%ST1

0x4f250e FADDP	%ST0,%ST2

0x4f2510 FADDP	%ST0,%ST1

0x4f2512 MOVZX	%AX,%EAX

0x4f2515 FLD	%ST0

0x4f2517 FSTPT	0x20(%RSP)

0x4f251b CMP	$0x300,%EAX

0x4f2520 JE	4f23d8

0x4f2526 FLDCW	0xc(%RSP)

0x4f252a JMP	4f23d8

0x4f252f FLDT	0x10(%RSP)

0x4f2533 FMULS	0x30e07(%RIP)

0x4f2539 FLD	%ST0

0x4f253b FSTPT	0x10(%RSP)

0x4f253f FLDZ

0x4f2541 FXCH	%ST1

0x4f2543 FUCOMIP	%ST1,%ST0

0x4f2545 FSTP	%ST0

0x4f2547 JNE	4f2581

0x4f2549 JP	4f2581

0x4f254b MOVZX	%AX,%EBX

0x4f254e FLDS	0x30de8(%RIP)

0x4f2554 FSTPT	0x20(%RSP)

0x4f2558 LEA	0x10(%RSP),%RDI

0x4f255d LEA	0x20(%RSP),%RDX

0x4f2562 MOV	%RDI,%RSI

0x4f2565 XOR	%ECX,%ECX

0x4f2567 CALL	4f2740 <__libm_error_support>

0x4f256c CMP	$0x300,%EBX

0x4f2572 JE	4f23d4

0x4f2578 FLDCW	0xc(%RSP)

0x4f257c JMP	4f23d4

0x4f2581 MOV	$-0x404a,%EDX

0x4f2586 JMP	4f2273

0x4f258b FLDS	0x30dab(%RIP)

0x4f2591 FSTPT	0x20(%RSP)

0x4f2595 LEA	0x10(%RSP),%RDI

0x4f259a LEA	0x20(%RSP),%RDX

0x4f259f MOV	%RDI,%RSI

0x4f25a2 XOR	%ECX,%ECX

0x4f25a4 JMP	4f23c1

0x4f25a9 NOPL	(%RAX)

0x4f25ac NOPL	(%RAX)

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines
Module	exec

Warnings:

Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 77 paths individually, rerun with max-paths=77

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This function has 77 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside function: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the function)
turning them into conditional moves, MIN or MAX

gain
potential
hint
expert

Obsolete instructions

Detected X87 INSTRUCTIONS. x87 is the legacy x86 extension to process FP values. This instruction set is much less efficient than SSE or AVX. In particular, it does not support vectorization (x87 units not being vector units). A recent compiler should never generate x87 code as soon as you don't use any 80 bits FP elements or complex divides in your code.

Workaround

If you don't need 80 bits precision, use only single or double precision elements in your code and then, if necessary, tune your compiler to make it generate only instructions operating on vector registers.

Vectorization

Your function is not vectorized. Only 6% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 142.83 to 30.31 cycles (4.71x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 142.83 to 102.50 cycles (1.39x speedup).

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Pass to your compiler a micro-architecture specialization option:
- Please look into your compiler manual for march=native or equivalent
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__libm_error_support: 2 occurrences

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

FLD: 32 occurrences
FSTP: 14 occurrences
FUCOMIP: 1 occurrences
LEA: 1 occurrences
SHRD: 1 occurrences

Conversion instructions

Detected expensive conversion instructions.

Details

FILD: 1 occurrences

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

96 x87 instructions are processing arithmetic or math operations on FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 95 FP arithmetical operations:

51: addition or subtraction
44: multiply

The binary function is loading 530 bytes. The binary function is storing 162 bytes.

Arithmetic intensity

Arithmetic intensity is 0.14 FP operations per loaded or stored byte.

General properties

nb instructions	342
nb uops	857
loop length	1216
used x86 registers	7
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	10
ADD-SUB / MUL ratio	1.16

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	142.83 cycles
front end	142.83 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	22.75	22.75	22.50	22.50	17.50	16.33	16.33	16.33	105.00	38.00	3.00	3.00	0.50	0.50
cycles	22.75	22.75	22.50	22.50	17.50	16.33	16.33	16.33	105.00	38.00	3.00	3.00	0.50	0.50

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	142.83
Dispatch	105.00
Overall L1	142.83

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	6%
load	6%
store	9%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	6%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 142.83 cycles. At this rate:

3% of peak load performance is reached (3.71 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (1.13 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 142.83 to 105.00 cycles (1.36x speedup).

ASM code

In the binary file, the address of the function is: 4f20f0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
ENDBR64
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB $0x50,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDT 0x60(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FSTPT 0x10(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FNSTCW 0xc(%RSP)
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
AND $0x8000,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x18(%RSP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
AND $0x7fff,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
OR %EAX,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x14(%RSP),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SHRD $0x10,%ECX,%EAX	4	0.50	1.50	1.50	0.50	0	0	0	0	0	0	0	0	0	0	2	1.50
CMP $0x7fff7fff,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JA 4f21ff <__libm_logl_ex+0x10f>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
LEA -0x3ffef800(%RAX),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x9000,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JA 4f223d <__libm_logl_ex+0x14d>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
ADD $-0x3ffeffff,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x8001,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JA 4f23de <__libm_logl_ex+0x2ee>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
AND $0x7fff,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x3fff,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDZ	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
JNE 4f2182 <__libm_logl_ex+0x92>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FSTP %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
MOV 0x14(%RSP),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP $-0x80000000,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDZ	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
JNE 4f2182 <__libm_logl_ex+0x92>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FSTP %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FLDZ	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
CMPL $0,0x10(%RSP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
JE 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FSTP %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
MOVZX 0xc(%RSP),%ECX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %ECX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f21a6 <__libm_logl_ex+0xb6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
OR $0x300,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %CX,0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
FLDCW 0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
MOVZX %AX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDT 0x10(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FLD1	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
FCHS	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x10(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x312dd(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x312e5(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x312eb(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDS 0x31173(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FMULP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDCW 0xc(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
JMP 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOVZX 0xc(%RSP),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %EAX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $0x300,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x300,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f2222 <__libm_logl_ex+0x132>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
OR $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %AX,0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
FLDCW 0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
TEST %AX,%AX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JS 4f2360 <__libm_logl_ex+0x270>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDT 0x10(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
JMP 4f23c6 <__libm_logl_ex+0x2d6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOVZX 0xc(%RSP),%ECX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %ECX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f225f <__libm_logl_ex+0x16f>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
OR $0x300,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %CX,0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
FLDCW 0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
MOV 0x18(%RSP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SAL $0x31,%RCX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV $-0x3fff,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f252f <__libm_logl_ex+0x43f>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOVZX %AX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x18(%RSP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
AND $0x7fff,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %EDX,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $-0x8000,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
AND 0x18(%RSP),%RDX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
OR $0x3fff,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RDX,0x18(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x14(%RSP),%EDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SHR $0x17,%EDX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZX %DL,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDT 0x10(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADDS 0x31093(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
MOV $0x5244e0,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDS (%RSI,%RDX,4)	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50
LEA (%RDX,%RDX,1),%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FADDS 0x31082(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FSUBR %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FMULP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD1	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
FCHS	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADDP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST1	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADD %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x10(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x31078(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x31080(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x31086(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x3108c(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x31094(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x3109a(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMULP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMULP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
LEA 0x1(%RDX,%RDX,1),%EDX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
MOV %ECX,0x34(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
FILDL 0x34(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	1	0	0	0	0	4	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMULL 0x3119c(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
MOV $0x5234e0,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FADDL (%RCX,%RDX,8)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FADDP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMULL 0x31192(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FADDL (%RCX,%RSI,8)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FADDP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDCW 0xc(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
JMP 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
NOT %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
TEST $0x7fff,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JNE 4f2388 <__libm_logl_ex+0x298>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x14(%RSP),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP $-0x80000000,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JNE 4f2230 <__libm_logl_ex+0x140>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMPL $0,0x10(%RSP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
JNE 4f2230 <__libm_logl_ex+0x140>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SAL $0x31,%RAX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
JNE 4f23a5 <__libm_logl_ex+0x2b5>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMPL $0,0x14(%RSP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
JNE 4f23a5 <__libm_logl_ex+0x2b5>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMPL $0,0x10(%RSP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
JE 4f258b <__libm_logl_ex+0x49b>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDS 0x30f8d(%RIP)	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
LEA 0x10(%RSP),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x20(%RSP),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RDI,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV $0x1,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CALL 4f2740 <__libm_error_support>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
MOVZX %BX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f23d4 <__libm_logl_ex+0x2e4>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDCW 0xc(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
FLDT 0x20(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
ADD $0x50,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MOVZX 0xc(%RSP),%ECX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %ECX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f2400 <__libm_logl_ex+0x310>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
OR $0x300,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %CX,0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
FLDCW 0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
FLDT 0x10(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FLD1	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
FCHS	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMULS 0x30f3a(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FLD %ST1	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADD %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FSUBP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST1	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSUB %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST2	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST2	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x44(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FLD %ST2	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMUL %ST3,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x38(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30f82(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30f8a(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30f90(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30f96(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30f9c(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fa2(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fa8(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fb0(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fb8(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fbe(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fc4(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fca(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fd0(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fd6(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST5	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x10(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FMULP %ST0,%ST5	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMULP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST3	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDS 0x30e82(%RIP)	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50
FLDS 0x30e80(%RIP)	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50
FLDT 0x38(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST4	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMUL %ST3,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x44(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMULP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FADDP %ST0,%ST5	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST4	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADD %ST4,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST4	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FMUL %ST3,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST4	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FADDP %ST0,%ST3	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST1	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADD %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FSUBR %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FADDP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FADDP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
MOVZX %AX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDCW 0xc(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
JMP 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
FLDT 0x10(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMULS 0x30e07(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x10(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FLDZ	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FUCOMIP %ST1,%ST0	2	0	0	0	0	0	0	0	0	1	0	0	0	0.50	0.50	4	1
FSTP %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
JNE 4f2581 <__libm_logl_ex+0x491>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
JP 4f2581 <__libm_logl_ex+0x491>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOVZX %AX,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDS 0x30de8(%RIP)	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
LEA 0x10(%RSP),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x20(%RSP),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RDI,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
CALL 4f2740 <__libm_error_support>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
CMP $0x300,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f23d4 <__libm_logl_ex+0x2e4>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDCW 0xc(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
JMP 4f23d4 <__libm_logl_ex+0x2e4>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV $-0x404a,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JMP 4f2273 <__libm_logl_ex+0x183>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
FLDS 0x30dab(%RIP)	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
LEA 0x10(%RSP),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x20(%RSP),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RDI,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
JMP 4f23c1 <__libm_logl_ex+0x2d1>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09

Source file and lines
Module	exec

Warnings:

Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 77 paths individually, rerun with max-paths=77

hoisting them (moving them outside the function)
turning them into conditional moves, MIN or MAX

gain
potential
hint
expert

Obsolete instructions

Workaround

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 142.83 to 102.50 cycles (1.39x speedup).

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Pass to your compiler a micro-architecture specialization option:
- Please look into your compiler manual for march=native or equivalent
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

CALL instructions

Detected function call instructions.

Details

__libm_error_support: 2 occurrences

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

FLD: 32 occurrences
FSTP: 14 occurrences
FUCOMIP: 1 occurrences
LEA: 1 occurrences
SHRD: 1 occurrences

Conversion instructions

Detected expensive conversion instructions.

Details

FILD: 1 occurrences

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

96 x87 instructions are processing arithmetic or math operations on FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 95 FP arithmetical operations:

51: addition or subtraction
44: multiply

The binary function is loading 530 bytes. The binary function is storing 162 bytes.

Arithmetic intensity

Arithmetic intensity is 0.14 FP operations per loaded or stored byte.

General properties

nb instructions	342
nb uops	857
loop length	1216
used x86 registers	7
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	10
ADD-SUB / MUL ratio	1.16

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	142.83 cycles
front end	142.83 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	22.75	22.75	22.50	22.50	17.50	16.33	16.33	16.33	105.00	38.00	3.00	3.00	0.50	0.50
cycles	22.75	22.75	22.50	22.50	17.50	16.33	16.33	16.33	105.00	38.00	3.00	3.00	0.50	0.50

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	142.83
Dispatch	105.00
Overall L1	142.83

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	6%
load	6%
store	9%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	6%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 142.83 cycles. At this rate:

3% of peak load performance is reached (3.71 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (1.13 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4f20f0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
ENDBR64
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB $0x50,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDT 0x60(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FSTPT 0x10(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FNSTCW 0xc(%RSP)
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
AND $0x8000,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x18(%RSP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
AND $0x7fff,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
OR %EAX,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x14(%RSP),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SHRD $0x10,%ECX,%EAX	4	0.50	1.50	1.50	0.50	0	0	0	0	0	0	0	0	0	0	2	1.50
CMP $0x7fff7fff,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JA 4f21ff <__libm_logl_ex+0x10f>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
LEA -0x3ffef800(%RAX),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x9000,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JA 4f223d <__libm_logl_ex+0x14d>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
ADD $-0x3ffeffff,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x8001,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JA 4f23de <__libm_logl_ex+0x2ee>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
AND $0x7fff,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x3fff,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDZ	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
JNE 4f2182 <__libm_logl_ex+0x92>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FSTP %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
MOV 0x14(%RSP),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP $-0x80000000,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDZ	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
JNE 4f2182 <__libm_logl_ex+0x92>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FSTP %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FLDZ	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
CMPL $0,0x10(%RSP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
JE 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FSTP %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
MOVZX 0xc(%RSP),%ECX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %ECX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f21a6 <__libm_logl_ex+0xb6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
OR $0x300,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %CX,0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
FLDCW 0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
MOVZX %AX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDT 0x10(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FLD1	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
FCHS	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x10(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x312dd(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x312e5(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x312eb(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDS 0x31173(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FMULP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDCW 0xc(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
JMP 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOVZX 0xc(%RSP),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %EAX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $0x300,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x300,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f2222 <__libm_logl_ex+0x132>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
OR $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %AX,0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
FLDCW 0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
TEST %AX,%AX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JS 4f2360 <__libm_logl_ex+0x270>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDT 0x10(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
JMP 4f23c6 <__libm_logl_ex+0x2d6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOVZX 0xc(%RSP),%ECX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %ECX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f225f <__libm_logl_ex+0x16f>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
OR $0x300,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %CX,0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
FLDCW 0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
MOV 0x18(%RSP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SAL $0x31,%RCX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV $-0x3fff,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f252f <__libm_logl_ex+0x43f>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOVZX %AX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x18(%RSP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
AND $0x7fff,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %EDX,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $-0x8000,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
AND 0x18(%RSP),%RDX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
OR $0x3fff,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RDX,0x18(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x14(%RSP),%EDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SHR $0x17,%EDX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZX %DL,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDT 0x10(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADDS 0x31093(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
MOV $0x5244e0,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDS (%RSI,%RDX,4)	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50
LEA (%RDX,%RDX,1),%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FADDS 0x31082(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FSUBR %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FMULP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD1	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
FCHS	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADDP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST1	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADD %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x10(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x31078(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x31080(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x31086(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x3108c(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x31094(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x3109a(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMULP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMULP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
LEA 0x1(%RDX,%RDX,1),%EDX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
MOV %ECX,0x34(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
FILDL 0x34(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	1	0	0	0	0	4	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMULL 0x3119c(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
MOV $0x5234e0,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FADDL (%RCX,%RDX,8)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FADDP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMULL 0x31192(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FADDL (%RCX,%RSI,8)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FADDP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDCW 0xc(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
JMP 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
NOT %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
TEST $0x7fff,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JNE 4f2388 <__libm_logl_ex+0x298>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x14(%RSP),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP $-0x80000000,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JNE 4f2230 <__libm_logl_ex+0x140>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMPL $0,0x10(%RSP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
JNE 4f2230 <__libm_logl_ex+0x140>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SAL $0x31,%RAX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
JNE 4f23a5 <__libm_logl_ex+0x2b5>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMPL $0,0x14(%RSP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
JNE 4f23a5 <__libm_logl_ex+0x2b5>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMPL $0,0x10(%RSP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
JE 4f258b <__libm_logl_ex+0x49b>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDS 0x30f8d(%RIP)	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
LEA 0x10(%RSP),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x20(%RSP),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RDI,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV $0x1,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CALL 4f2740 <__libm_error_support>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
MOVZX %BX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f23d4 <__libm_logl_ex+0x2e4>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDCW 0xc(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
FLDT 0x20(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
ADD $0x50,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MOVZX 0xc(%RSP),%ECX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %ECX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f2400 <__libm_logl_ex+0x310>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
OR $0x300,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %CX,0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
FLDCW 0xe(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
FLDT 0x10(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FLD1	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
FCHS	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMULS 0x30f3a(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FLD %ST1	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADD %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FSUBP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST1	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSUB %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST2	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST2	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x44(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FLD %ST2	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMUL %ST3,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x38(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30f82(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30f8a(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30f90(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30f96(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30f9c(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fa2(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fa8(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fb0(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fb8(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fbe(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fc4(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fca(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fd0(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x30fd6(%RIP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST5	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x10(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FMULP %ST0,%ST5	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMULP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST3	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDS 0x30e82(%RIP)	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50
FLDS 0x30e80(%RIP)	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50
FLDT 0x38(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMUL %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST4	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FMUL %ST3,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLDT 0x44(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMULP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FADDP %ST0,%ST5	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST4	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADD %ST4,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST4	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FMUL %ST3,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST4	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FMUL %ST2,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FADDP %ST0,%ST3	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FLD %ST1	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FADD %ST1,%ST0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FSUBR %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FADDP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FADDP %ST0,%ST2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
FADDP %ST0,%ST1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	6	1
MOVZX %AX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
CMP $0x300,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDCW 0xc(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
JMP 4f23d8 <__libm_logl_ex+0x2e8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
FLDT 0x10(%RSP)	10	0	0	0	0	0	0	0	0	0	0	0	0	0	0	9	16
FMULS 0x30e07(%RIP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	6	1
FLD %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
FSTPT 0x10(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
FLDZ	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	4	1
FXCH %ST1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
FUCOMIP %ST1,%ST0	2	0	0	0	0	0	0	0	0	1	0	0	0	0.50	0.50	4	1
FSTP %ST0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	1	0.50
JNE 4f2581 <__libm_logl_ex+0x491>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
JP 4f2581 <__libm_logl_ex+0x491>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOVZX %AX,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
FLDS 0x30de8(%RIP)	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
LEA 0x10(%RSP),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x20(%RSP),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RDI,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
CALL 4f2740 <__libm_error_support>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
CMP $0x300,%EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 4f23d4 <__libm_logl_ex+0x2e4>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
FLDCW 0xc(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	1	0	0	0	0	0	0	2
JMP 4f23d4 <__libm_logl_ex+0x2e4>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV $-0x404a,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JMP 4f2273 <__libm_logl_ex+0x183>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
FLDS 0x30dab(%RIP)	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50
FSTPT 0x20(%RSP)	17	0	0	0	0	0	0	0	0	0	0	0	0	0	0	8	0
LEA 0x10(%RSP),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x20(%RSP),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RDI,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
JMP 4f23c1 <__libm_logl_ex+0x2d1>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09

Name	Coverage (%)	Time (s)
○__libm_logl_ex	0.01	0.01

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Obsolete instructions

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Vectorization

Details

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Execution units bottlenecks

Expensive FP math instructions/calls

FMA

Workaround

CALL instructions

Details

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Obsolete instructions

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Expensive FP math instructions/calls

FMA

Workaround

CALL instructions

Details

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code