Loop Id: 243 | Module: libqmcwfs.so | Source: stl_algobase.h:918-919 | Coverage: 0.02% |
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Loop Id: 243 | Module: libqmcwfs.so | Source: stl_algobase.h:918-919 | Coverage: 0.02% |
---|
0x28719 MOV %RBX,0x10(%RAX) [2] |
0x2871d ADD $0xc0,%RAX |
0x28723 VMOVDQU %XMM2,-0xc0(%RAX) [1] |
0x2872b VMOVDQU %XMM2,-0xa8(%RAX) [1] |
0x28733 MOV %RBX,-0x98(%RAX) [1] |
0x2873a VMOVDQU %XMM2,-0x90(%RAX) [1] |
0x28742 MOV %RBX,-0x80(%RAX) [1] |
0x28746 VMOVDQU %XMM2,-0x78(%RAX) [1] |
0x2874b MOV %RBX,-0x68(%RAX) [1] |
0x2874f VMOVDQU %XMM2,-0x60(%RAX) [1] |
0x28754 MOV %RBX,-0x50(%RAX) [1] |
0x28758 VMOVDQU %XMM2,-0x48(%RAX) [1] |
0x2875d MOV %RBX,-0x38(%RAX) [1] |
0x28761 VMOVDQU %XMM2,-0x30(%RAX) [1] |
0x28766 MOV %RBX,-0x20(%RAX) [1] |
0x2876a VMOVDQU %XMM2,-0x18(%RAX) [1] |
0x2876f MOV %RBX,-0x8(%RAX) [1] |
0x28773 CMP %RAX,%R12 |
0x28776 JNE 28719 |
/cluster/comp/gcc/13.2.0/include/c++/13.2.0/bits/stl_algobase.h: 918 - 919 |
-------------------------------------------------------------------------------- |
918: for (; __first != __last; ++__first) |
919: *__first = __value; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 5.33 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.67 |
Bottlenecks | P4, P7, P8, P9, |
Function | _ZN11qmcplusplus6VectorINS_10TinyVectorIdLj3EEESaIS2_EE6resizeEmS2_ |
Source | stl_algobase.h:918-919 |
Source loop unroll info | multi-versionned |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.00 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 8.00 |
CQA cycles if fully vectorized | 1.50 |
Front-end cycles | 3.00 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.40 |
P1 cycles | 0.00 |
P2 cycles | 0.00 |
P3 cycles | 8.00 |
P4 cycles | 0.40 |
P5 cycles | 0.50 |
P6 cycles | 8.00 |
P7 cycles | 8.00 |
P8 cycles | 8.00 |
P9 cycles | 0.20 |
P10 cycles | 0.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 8.08 |
Stall cycles (UFS) | 4.88 |
Nb insns | 19.00 |
Nb uops | 18.00 |
Nb loads | 0.00 |
Nb stores | 16.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 24.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 192.00 |
Stride 0 | 0.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 50.00 |
Vectorization ratio load | NA |
Vectorization ratio store | 50.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 18.75 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 18.75 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 5.33 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.67 |
Bottlenecks | P4, P7, P8, P9, |
Function | _ZN11qmcplusplus6VectorINS_10TinyVectorIdLj3EEESaIS2_EE6resizeEmS2_ |
Source | stl_algobase.h:918-919 |
Source loop unroll info | multi-versionned |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.00 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 8.00 |
CQA cycles if fully vectorized | 1.50 |
Front-end cycles | 3.00 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.40 |
P1 cycles | 0.00 |
P2 cycles | 0.00 |
P3 cycles | 8.00 |
P4 cycles | 0.40 |
P5 cycles | 0.50 |
P6 cycles | 8.00 |
P7 cycles | 8.00 |
P8 cycles | 8.00 |
P9 cycles | 0.20 |
P10 cycles | 0.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 8.08 |
Stall cycles (UFS) | 4.88 |
Nb insns | 19.00 |
Nb uops | 18.00 |
Nb loads | 0.00 |
Nb stores | 16.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 24.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 192.00 |
Stride 0 | 0.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 50.00 |
Vectorization ratio load | NA |
Vectorization ratio store | 50.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 18.75 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 18.75 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
Function | _ZN11qmcplusplus6VectorINS_10TinyVectorIdLj3EEESaIS2_EE6resizeEmS2_ |
Source file and lines | stl_algobase.h:918-919 |
Module | libqmcwfs.so |
nb instructions | 19 |
nb uops | 18 |
loop length | 95 |
used x86 registers | 3 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 3.00 cycles |
front end | 3.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.40 | 0.00 | 0.00 | 8.00 | 0.40 | 0.50 | 8.00 | 8.00 | 8.00 | 0.20 | 0.00 |
cycles | 0.50 | 0.40 | 0.00 | 0.00 | 8.00 | 0.40 | 0.50 | 8.00 | 8.00 | 8.00 | 0.20 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 8.08 |
Stall cycles | 4.88 |
RS full (events) | 7.80 |
Front-end | 3.00 |
Dispatch | 8.00 |
Data deps. | 1.00 |
Overall L1 | 8.00 |
all | 50% |
load | NA (no load vectorizable/vectorized instructions) |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 18% |
load | NA (no load vectorizable/vectorized instructions) |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV %RBX,0x10(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $0xc0,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVDQU %XMM2,-0xc0(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU %XMM2,-0xa8(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x98(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVDQU %XMM2,-0x90(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x80(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVDQU %XMM2,-0x78(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x68(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVDQU %XMM2,-0x60(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x50(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVDQU %XMM2,-0x48(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x38(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVDQU %XMM2,-0x30(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x20(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVDQU %XMM2,-0x18(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x8(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 28719 <_ZN11qmcplusplus6VectorINS_10TinyVectorIdLj3EEESaIS2_EE6resizeEmS2_+0x279> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | _ZN11qmcplusplus6VectorINS_10TinyVectorIdLj3EEESaIS2_EE6resizeEmS2_ |
Source file and lines | stl_algobase.h:918-919 |
Module | libqmcwfs.so |
nb instructions | 19 |
nb uops | 18 |
loop length | 95 |
used x86 registers | 3 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 3.00 cycles |
front end | 3.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.40 | 0.00 | 0.00 | 8.00 | 0.40 | 0.50 | 8.00 | 8.00 | 8.00 | 0.20 | 0.00 |
cycles | 0.50 | 0.40 | 0.00 | 0.00 | 8.00 | 0.40 | 0.50 | 8.00 | 8.00 | 8.00 | 0.20 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 8.08 |
Stall cycles | 4.88 |
RS full (events) | 7.80 |
Front-end | 3.00 |
Dispatch | 8.00 |
Data deps. | 1.00 |
Overall L1 | 8.00 |
all | 50% |
load | NA (no load vectorizable/vectorized instructions) |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 18% |
load | NA (no load vectorizable/vectorized instructions) |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV %RBX,0x10(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $0xc0,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVDQU %XMM2,-0xc0(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU %XMM2,-0xa8(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x98(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVDQU %XMM2,-0x90(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x80(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVDQU %XMM2,-0x78(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x68(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVDQU %XMM2,-0x60(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x50(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVDQU %XMM2,-0x48(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x38(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVDQU %XMM2,-0x30(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x20(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVDQU %XMM2,-0x18(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RBX,-0x8(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 28719 <_ZN11qmcplusplus6VectorINS_10TinyVectorIdLj3EEESaIS2_EE6resizeEmS2_+0x279> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |