Loop Id: 887 | Module: exec | Source: MultiBsplineRef.hpp:227-262 | Coverage: 0.02% |
---|
Loop Id: 887 | Module: exec | Source: MultiBsplineRef.hpp:227-262 | Coverage: 0.02% |
---|
0x47ec4b VMOVSD 0x120(%RSP,%RDX,1),%XMM4 |
0x47ec54 VMOVSD 0x160(%RSP,%RDX,1),%XMM1 |
0x47ec5d MOV %RDX,0xe0(%RSP) |
0x47ec65 MOV %RSI,%R10 |
0x47ec68 VMULSD 0x1a0(%RSP,%RDX,1),%XMM2,%XMM27 |
0x47ec70 MOV 0xd8(%RSP),%RAX |
0x47ec78 VMULSD %XMM4,%XMM31,%XMM26 |
0x47ec7e VMULSD %XMM22,%XMM4,%XMM8 |
0x47ec84 SUB %RAX,%R10 |
0x47ec87 XOR %EAX,%EAX |
0x47ec89 VMULSD %XMM2,%XMM4,%XMM3 |
0x47ec8d VMULSD %XMM1,%XMM22,%XMM20 |
0x47ec93 VMULSD %XMM1,%XMM2,%XMM4 |
0x47ec97 NOPW (%RAX,%RAX,1) |
(886) 0x47eca0 VMOVSD (%RSI,%RAX,8),%XMM25 |
(886) 0x47eca7 VMOVSD (%R8,%RAX,8),%XMM24 |
(886) 0x47ecae VMOVSD (%R10,%RAX,8),%XMM28 |
(886) 0x47ecb5 VMOVSD (%RDI,%RAX,8),%XMM23 |
(886) 0x47ecbc VMULSD %XMM10,%XMM25,%XMM0 |
(886) 0x47ecc2 MOV 0xf8(%RSP),%RDX |
(886) 0x47ecca VMULSD %XMM12,%XMM24,%XMM1 |
(886) 0x47ecd0 VMULSD %XMM18,%XMM25,%XMM30 |
(886) 0x47ecd6 VMULSD %XMM17,%XMM24,%XMM29 |
(886) 0x47ecdc VFMADD231SD %XMM15,%XMM28,%XMM0 |
(886) 0x47ece2 VFMADD231SD %XMM11,%XMM23,%XMM1 |
(886) 0x47ece8 VFMADD231SD %XMM14,%XMM28,%XMM30 |
(886) 0x47ecee VFMADD231SD %XMM13,%XMM23,%XMM29 |
(886) 0x47ecf4 VADDSD %XMM1,%XMM0,%XMM0 |
(886) 0x47ecf8 VMULSD %XMM19,%XMM25,%XMM1 |
(886) 0x47ecfe VFMADD231SD %XMM16,%XMM28,%XMM1 |
(886) 0x47ed04 VMULSD %XMM9,%XMM24,%XMM28 |
(886) 0x47ed0a VMOVSD %XMM20,%XMM20,%XMM24 |
(886) 0x47ed10 VADDSD %XMM29,%XMM1,%XMM1 |
(886) 0x47ed16 VMOVSD %XMM8,%XMM8,%XMM29 |
(886) 0x47ed1c VFMADD132SD %XMM21,%XMM28,%XMM23 |
(886) 0x47ed22 VMOVSD %XMM4,%XMM4,%XMM28 |
(886) 0x47ed28 VADDSD %XMM23,%XMM30,%XMM25 |
(886) 0x47ed2e VMOVSD %XMM26,%XMM26,%XMM23 |
(886) 0x47ed34 VMOVSD %XMM27,%XMM27,%XMM30 |
(886) 0x47ed3a VFMADD213SD (%R9,%RAX,8),%XMM0,%XMM23 |
(886) 0x47ed41 VMOVSD %XMM23,(%R9,%RAX,8) |
(886) 0x47ed48 VMOVSD %XMM4,%XMM4,%XMM23 |
(886) 0x47ed4e VFMADD213SD (%R13,%RAX,8),%XMM0,%XMM24 |
(886) 0x47ed56 VMOVSD %XMM24,(%R13,%RAX,8) |
(886) 0x47ed5e VFMADD213SD (%R12,%RAX,8),%XMM1,%XMM29 |
(886) 0x47ed65 VMOVSD %XMM29,(%R12,%RAX,8) |
(886) 0x47ed6c VFMADD213SD (%R14,%RAX,8),%XMM0,%XMM30 |
(886) 0x47ed73 VMOVSD %XMM30,(%R14,%RAX,8) |
(886) 0x47ed7a VFMADD213SD (%RBX,%RAX,8),%XMM1,%XMM28 |
(886) 0x47ed81 VMOVSD %XMM28,(%RBX,%RAX,8) |
(886) 0x47ed88 VFMADD213SD (%RDX,%RAX,8),%XMM3,%XMM25 |
(886) 0x47ed8f VMOVSD %XMM25,(%RDX,%RAX,8) |
(886) 0x47ed96 VMOVSD %XMM8,%XMM8,%XMM25 |
(886) 0x47ed9c MOV 0xf0(%RSP),%RDX |
(886) 0x47eda4 VFMADD213SD (%R11,%RAX,8),%XMM0,%XMM25 |
(886) 0x47edab VMOVSD %XMM25,(%R11,%RAX,8) |
(886) 0x47edb2 VFMADD213SD (%R15,%RAX,8),%XMM0,%XMM23 |
(886) 0x47edb9 VFMADD213SD (%RDX,%RAX,8),%XMM3,%XMM0 |
(886) 0x47edbf VMOVSD %XMM23,(%R15,%RAX,8) |
(886) 0x47edc6 VFMADD213SD (%RCX,%RAX,8),%XMM3,%XMM1 |
(886) 0x47edcc VMOVSD %XMM0,(%RDX,%RAX,8) |
(886) 0x47edd1 MOV %RAX,%RDX |
(886) 0x47edd4 VMOVSD %XMM1,(%RCX,%RAX,8) |
(886) 0x47edd9 INC %RAX |
(886) 0x47eddc CMP %RDX,0xe8(%RSP) |
(886) 0x47ede4 JNE 47eca0 |
0x47edea MOV 0xe0(%RSP),%RDX |
0x47edf2 MOV 0xd0(%RSP),%R10 |
0x47edfa ADD $0x8,%RDX |
0x47edfe ADD %R10,%RSI |
0x47ee01 ADD %R10,%RDI |
0x47ee04 ADD %R10,%R8 |
0x47ee07 CMP $0x20,%RDX |
0x47ee0b JNE 47ec4b |
/scratch_na/users/xoserete/qaas_runs/171-284-5202/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp: 227 - 262 |
-------------------------------------------------------------------------------- |
227: for (int j = 0; j < 4; j++) |
228: { |
229: const T* restrict coefs = spline_m->coefs + (ix + i) * xs + (iy + j) * ys + iz * zs; |
230: const T* restrict coefszs = coefs + zs; |
231: const T* restrict coefs2zs = coefs + 2 * zs; |
232: const T* restrict coefs3zs = coefs + 3 * zs; |
233: |
234: const T pre20 = d2a[i] * b[j]; |
235: const T pre10 = da[i] * b[j]; |
236: const T pre00 = a[i] * b[j]; |
237: const T pre11 = da[i] * db[j]; |
238: const T pre01 = a[i] * db[j]; |
239: const T pre02 = a[i] * d2b[j]; |
240: |
241: const int iSplitPoint = num_splines; |
242: for (int n = 0; n < iSplitPoint; n++) |
243: { |
244: T coefsv = coefs[n]; |
245: T coefsvzs = coefszs[n]; |
246: T coefsv2zs = coefs2zs[n]; |
247: T coefsv3zs = coefs3zs[n]; |
248: |
249: T sum0 = c[0] * coefsv + c[1] * coefsvzs + c[2] * coefsv2zs + c[3] * coefsv3zs; |
250: T sum1 = dc[0] * coefsv + dc[1] * coefsvzs + dc[2] * coefsv2zs + dc[3] * coefsv3zs; |
251: T sum2 = d2c[0] * coefsv + d2c[1] * coefsvzs + d2c[2] * coefsv2zs + d2c[3] * coefsv3zs; |
252: |
253: hxx[n] += pre20 * sum0; |
254: hxy[n] += pre11 * sum0; |
255: hxz[n] += pre10 * sum1; |
256: hyy[n] += pre02 * sum0; |
257: hyz[n] += pre01 * sum1; |
258: hzz[n] += pre00 * sum2; |
259: gx[n] += pre10 * sum0; |
260: gy[n] += pre01 * sum0; |
261: gz[n] += pre00 * sum1; |
262: vals[n] += pre00 * sum0; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.22 |
CQA speedup if FP arith vectorized | 2.16 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.22 |
Bottlenecks | micro-operation queue, |
Function | void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh |
Source | MultiBsplineRef.hpp:227-229,MultiBsplineRef.hpp:234-239,MultiBsplineRef.hpp:242-242 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.67 |
CQA cycles if no scalar integer | 3.00 |
CQA cycles if FP arith vectorized | 1.70 |
CQA cycles if fully vectorized | 0.46 |
Front-end cycles | 3.67 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 3.00 |
P1 cycles | 2.00 |
P2 cycles | 2.00 |
P3 cycles | 0.50 |
P4 cycles | 1.80 |
P5 cycles | 1.60 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 1.60 |
P10 cycles | 2.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 3.83 |
Stall cycles (UFS) | 0.00 |
Nb insns | 22.00 |
Nb uops | 21.00 |
Nb loads | 6.00 |
Nb stores | 1.00 |
Nb stack references | 3.00 |
FLOP/cycle | 1.64 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 6.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 15.27 |
Bytes prefetched | 0.00 |
Bytes loaded | 48.00 |
Bytes stored | 8.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 13.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.22 |
CQA speedup if FP arith vectorized | 2.16 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.22 |
Bottlenecks | micro-operation queue, |
Function | void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh |
Source | MultiBsplineRef.hpp:227-229,MultiBsplineRef.hpp:234-239,MultiBsplineRef.hpp:242-242 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.67 |
CQA cycles if no scalar integer | 3.00 |
CQA cycles if FP arith vectorized | 1.70 |
CQA cycles if fully vectorized | 0.46 |
Front-end cycles | 3.67 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 3.00 |
P1 cycles | 2.00 |
P2 cycles | 2.00 |
P3 cycles | 0.50 |
P4 cycles | 1.80 |
P5 cycles | 1.60 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 1.60 |
P10 cycles | 2.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 3.83 |
Stall cycles (UFS) | 0.00 |
Nb insns | 22.00 |
Nb uops | 21.00 |
Nb loads | 6.00 |
Nb stores | 1.00 |
Nb stack references | 3.00 |
FLOP/cycle | 1.64 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 6.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 15.27 |
Bytes prefetched | 0.00 |
Bytes loaded | 48.00 |
Bytes stored | 8.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 13.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh |
Source file and lines | MultiBsplineRef.hpp:227-262 |
Module | exec |
nb instructions | 22 |
nb uops | 21 |
loop length | 124 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 10 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 3 |
micro-operation queue | 3.67 cycles |
front end | 3.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 3.00 | 2.00 | 2.00 | 0.50 | 1.80 | 1.60 | 0.50 | 0.50 | 0.50 | 1.60 | 2.00 |
cycles | 3.00 | 3.00 | 2.00 | 2.00 | 0.50 | 1.80 | 1.60 | 0.50 | 0.50 | 0.50 | 1.60 | 2.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 3.83 |
Stall cycles | 0.00 |
Front-end | 3.67 |
Dispatch | 3.00 |
Data deps. | 1.00 |
Overall L1 | 3.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVSD 0x120(%RSP,%RDX,1),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x160(%RSP,%RDX,1),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMULSD 0x1a0(%RSP,%RDX,1),%XMM2,%XMM27 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0xd8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM4,%XMM31,%XMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM22,%XMM4,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SUB %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMULSD %XMM2,%XMM4,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM1,%XMM22,%XMM20 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM1,%XMM2,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xe0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x8,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R10,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R10,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R10,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x20,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 47ec4b <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x72b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh |
Source file and lines | MultiBsplineRef.hpp:227-262 |
Module | exec |
nb instructions | 22 |
nb uops | 21 |
loop length | 124 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 10 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 3 |
micro-operation queue | 3.67 cycles |
front end | 3.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 3.00 | 2.00 | 2.00 | 0.50 | 1.80 | 1.60 | 0.50 | 0.50 | 0.50 | 1.60 | 2.00 |
cycles | 3.00 | 3.00 | 2.00 | 2.00 | 0.50 | 1.80 | 1.60 | 0.50 | 0.50 | 0.50 | 1.60 | 2.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 3.83 |
Stall cycles | 0.00 |
Front-end | 3.67 |
Dispatch | 3.00 |
Data deps. | 1.00 |
Overall L1 | 3.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVSD 0x120(%RSP,%RDX,1),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x160(%RSP,%RDX,1),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMULSD 0x1a0(%RSP,%RDX,1),%XMM2,%XMM27 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0xd8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM4,%XMM31,%XMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM22,%XMM4,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SUB %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMULSD %XMM2,%XMM4,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM1,%XMM22,%XMM20 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM1,%XMM2,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xe0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x8,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R10,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R10,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R10,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x20,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 47ec4b <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x72b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |