OV - exec - Loop 346

	Loop Id: 346	Module: exec	Source: TwoBodyJastrowRef.h:107-132 [...]	Coverage: 0.03%

0x4201c0 LDR	X3, [X22, #24]

0x4201c4 LDR	W23, [X19, #672]

0x4201c8 LDRB	W2, [X21, #8]

0x4201cc LDR	D10, [X3, X23,SXTW #3]

0x4201d0 SBFM	X28, X23, #0, #31

0x4201d4 TBZ	W2, #0, 420710

0x4201d8 ORR	X0, XZR, X19

0x4201dc LDR	X27, [X19, #656]

0x4201e0 LDR	W1, [X25, #584]

0x4201e4 BL	47e08c

0x4201e8 LDR	X5, [X0, #72]

0x4201ec ADD	X4, X24, X24,LSL #2

0x4201f0 LDR	X7, [X27, #24]

0x4201f4 LDR	X9, [X25, #160]

0x4201f8 ADD	X6, X5, X4

0x4201fc LDR	X11, [X6, #24]

0x420200 LDR	W8, [X7, X28,LSL #2]

0x420204 MADD	W10, W8, W9, WZR

0x420208 CBZ	X9, 4206c0

0x42020c LDR	X13, [X27, #616]

0x420210 MOVI	D25, #0

0x420214 FMOV	D28, D10

0x420218 MOVZ	X7, #0

0x42021c LDR	X12, [X25, #512]

0x420220 ADD	X8, X12, W10,SXTW #3

0x420224 LDR	X6, [X25, #464]

0x420228 LDR	X10, [X13, #24]

0x42022c LDR	W5, [X10], #4

  (347) 0x420230 ORR	W14, WZR, W5

  (347) 0x420234 LDR	W5, [X10, X7,LSL #2]

  (347) 0x420238 LDR	X15, [X8, X7,LSL #3]

  (347) 0x42023c CMP	W5, W14

  (347) 0x420240 B.LE	4206b0

  (347) 0x420244 SUB	W16, W5, W14

  (347) 0x420248 SBFM	X17, X14, #61, #31

  (347) 0x42024c LDR	D31, [X15, #8]

  (347) 0x420250 ANDS	W18, W16, #128

  (347) 0x420254 MOVZ	W4, #0

  (347) 0x420258 ADD	X16, X11, X17

  (347) 0x42025c ORR	W13, WZR, W14

  (347) 0x420260 B.EQ	420398

  (347) 0x420264 CMP	W18, #1

  (347) 0x420268 B.EQ	42036c

  (347) 0x42026c CMP	W18, #2

  (347) 0x420270 B.EQ	420348

  (347) 0x420274 CMP	W18, #3

  (347) 0x420278 B.EQ	420324

  (347) 0x42027c CMP	W18, #4

  (347) 0x420280 B.EQ	420300

  (347) 0x420284 CMP	W18, #5

  (347) 0x420288 B.EQ	4202dc

  (347) 0x42028c CMP	W18, #6

  (347) 0x420290 B.EQ	4202b8

  (347) 0x420294 LDR	D30, [X11, X17]

  (347) 0x420298 FCMPE	D30, D31

  (347) 0x42029c B.GE	4202b0

  (347) 0x4202a0 CMP	W23, W14

  (347) 0x4202a4 B.EQ	4202b0

  (347) 0x4202a8 MOVZ	W4, #1

  (347) 0x4202ac STR	D30, [X6]

  (347) 0x4202b0 ADD	X16, X16, #8

  (347) 0x4202b4 ADD	W13, W14, #1

  (347) 0x4202b8 LDR	D0, [X16]

  (347) 0x4202bc FCMPE	D0, D31

  (347) 0x4202c0 B.GE	4202d4

  (347) 0x4202c4 CMP	W23, W13

  (347) 0x4202c8 B.EQ	4202d4

  (347) 0x4202cc STR	D0, [X6, X4,UXTW #3]

  (347) 0x4202d0 ADD	W4, W4, #1

  (347) 0x4202d4 ADD	X16, X16, #8

  (347) 0x4202d8 ADD	W13, W13, #1

  (347) 0x4202dc LDR	D1, [X16]

  (347) 0x4202e0 FCMPE	D1, D31

  (347) 0x4202e4 B.GE	4202f8

  (347) 0x4202e8 CMP	W23, W13

  (347) 0x4202ec B.EQ	4202f8

  (347) 0x4202f0 STR	D1, [X6, X4,UXTW #3]

  (347) 0x4202f4 ADD	W4, W4, #1

  (347) 0x4202f8 ADD	X16, X16, #8

  (347) 0x4202fc ADD	W13, W13, #1

  (347) 0x420300 LDR	D2, [X16]

  (347) 0x420304 FCMPE	D2, D31

  (347) 0x420308 B.GE	42031c

  (347) 0x42030c CMP	W23, W13

  (347) 0x420310 B.EQ	42031c

  (347) 0x420314 STR	D2, [X6, X4,UXTW #3]

  (347) 0x420318 ADD	W4, W4, #1

  (347) 0x42031c ADD	X16, X16, #8

  (347) 0x420320 ADD	W13, W13, #1

  (347) 0x420324 LDR	D3, [X16]

  (347) 0x420328 FCMPE	D3, D31

  (347) 0x42032c B.GE	420340

  (347) 0x420330 CMP	W23, W13

  (347) 0x420334 B.EQ	420340

  (347) 0x420338 STR	D3, [X6, X4,UXTW #3]

  (347) 0x42033c ADD	W4, W4, #1

  (347) 0x420340 ADD	X16, X16, #8

  (347) 0x420344 ADD	W13, W13, #1

  (347) 0x420348 LDR	D4, [X16]

  (347) 0x42034c FCMPE	D4, D31

  (347) 0x420350 B.GE	420364

  (347) 0x420354 CMP	W23, W13

  (347) 0x420358 B.EQ	420364

  (347) 0x42035c STR	D4, [X6, X4,UXTW #3]

  (347) 0x420360 ADD	W4, W4, #1

  (347) 0x420364 ADD	X16, X16, #8

  (347) 0x420368 ADD	W13, W13, #1

  (347) 0x42036c LDR	D5, [X16]

  (347) 0x420370 FCMPE	D5, D31

  (347) 0x420374 B.GE	420388

  (347) 0x420378 CMP	W23, W13

  (347) 0x42037c B.EQ	420388

  (347) 0x420380 STR	D5, [X6, X4,UXTW #3]

  (347) 0x420384 ADD	W4, W4, #1

  (347) 0x420388 ADD	W13, W13, #1

  (347) 0x42038c ADD	X16, X16, #8

  (347) 0x420390 CMP	W5, W13

  (347) 0x420394 B.EQ	4204a8

    (348) 0x420398 LDR	D6, [X16]

    (348) 0x42039c FCMPE	D6, D31

    (348) 0x4203a0 B.GE	4203b4

    (348) 0x4203a4 CMP	W23, W13

    (348) 0x4203a8 B.EQ	4203b4

    (348) 0x4203ac STR	D6, [X6, X4,UXTW #3]

    (348) 0x4203b0 ADD	W4, W4, #1

    (348) 0x4203b4 LDR	D7, [X16, #8]

    (348) 0x4203b8 ADD	W30, W13, #1

    (348) 0x4203bc ADD	X0, X16, #8

    (348) 0x4203c0 FCMPE	D7, D31

    (348) 0x4203c4 B.GE	4203d8

    (348) 0x4203c8 CMP	W23, W30

    (348) 0x4203cc B.EQ	4203d8

    (348) 0x4203d0 STR	D7, [X6, X4,UXTW #3]

    (348) 0x4203d4 ADD	W4, W4, #1

    (348) 0x4203d8 LDR	D8, [X0, #8]

    (348) 0x4203dc ADD	W1, W30, #1

    (348) 0x4203e0 FCMPE	D8, D31

    (348) 0x4203e4 B.GE	4203f8

    (348) 0x4203e8 CMP	W23, W1

    (348) 0x4203ec B.EQ	4203f8

    (348) 0x4203f0 STR	D8, [X6, X4,UXTW #3]

    (348) 0x4203f4 ADD	W4, W4, #1

    (348) 0x4203f8 LDR	D9, [X0, #16]

    (348) 0x4203fc ADD	W2, W30, #2

    (348) 0x420400 FCMPE	D9, D31

    (348) 0x420404 B.GE	420418

    (348) 0x420408 CMP	W23, W2

    (348) 0x42040c B.EQ	420418

    (348) 0x420410 STR	D9, [X6, X4,UXTW #3]

    (348) 0x420414 ADD	W4, W4, #1

    (348) 0x420418 LDR	D10, [X0, #24]

    (348) 0x42041c ADD	W28, W30, #3

    (348) 0x420420 FCMPE	D10, D31

    (348) 0x420424 B.GE	420438

    (348) 0x420428 CMP	W23, W28

    (348) 0x42042c B.EQ	420438

    (348) 0x420430 STR	D10, [X6, X4,UXTW #3]

    (348) 0x420434 ADD	W4, W4, #1

    (348) 0x420438 LDR	D11, [X0, #32]

    (348) 0x42043c ADD	W3, W30, #4

    (348) 0x420440 FCMPE	D11, D31

    (348) 0x420444 B.GE	420458

    (348) 0x420448 CMP	W23, W3

    (348) 0x42044c B.EQ	420458

    (348) 0x420450 STR	D11, [X6, X4,UXTW #3]

    (348) 0x420454 ADD	W4, W4, #1

    (348) 0x420458 LDR	D12, [X0, #40]

    (348) 0x42045c ADD	W27, W30, #5

    (348) 0x420460 FCMPE	D12, D31

    (348) 0x420464 B.GE	420478

    (348) 0x420468 CMP	W23, W27

    (348) 0x42046c B.EQ	420478

    (348) 0x420470 STR	D12, [X6, X4,UXTW #3]

    (348) 0x420474 ADD	W4, W4, #1

    (348) 0x420478 LDR	D13, [X0, #48]

    (348) 0x42047c ADD	W12, W30, #6

    (348) 0x420480 FCMPE	D13, D31

    (348) 0x420484 B.GE	420498

    (348) 0x420488 CMP	W23, W12

    (348) 0x42048c B.EQ	420498

    (348) 0x420490 STR	D13, [X6, X4,UXTW #3]

    (348) 0x420494 ADD	W4, W4, #1

    (348) 0x420498 ADD	W13, W30, #7

    (348) 0x42049c ADD	X16, X0, #56

    (348) 0x4204a0 CMP	W5, W13

    (348) 0x4204a4 B.NE	420398

  (347) 0x4204a8 CBZ	W4, 4206b0

  (347) 0x4204ac STR	XZR, [SP, #160]

  (347) 0x4204b0 ORR	X18, XZR, X6

  (347) 0x4204b4 ADD	X14, X6, W4,UXTW #3

  (347) 0x4204b8 LDR	X17, [X15, #536]

  (347) 0x4204bc LDR	D5, [X15, #568]

  (347) 0x4204c0 LDP	D4, D16, [X15, #24]

  (347) 0x4204c4 LDP	D10, D11, [X15, #40]

  (347) 0x4204c8 LDP	D18, D14, [X15, #56]

  (347) 0x4204cc LDP	D6, D7, [X15, #72]

  (347) 0x4204d0 LDP	D2, D17, [X15, #88]

  (347) 0x4204d4 LDP	D12, D13, [X15, #104]

  (347) 0x4204d8 LDP	D3, D15, [X15, #120]

  (347) 0x4204dc LDP	D8, D9, [X15, #136]

  (347) 0x4204e0 TBZ	W4, #0, 420574

  (347) 0x4204e4 LDR	D19, [X18], #8

  (347) 0x4204e8 FMUL	D20, D19, D5

  (347) 0x4204ec FRINTZ	D21, D20

  (347) 0x4204f0 FSUB	D22, D20, S21

  (347) 0x4204f4 FCVTZS	W15, D20

  (347) 0x4204f8 FMUL	D24, D22, D22

  (347) 0x4204fc FMADD	D19, D22, D6, D7

  (347) 0x420500 SBFM	X30, X15, #61, #31

  (347) 0x420504 FMADD	D29, D22, D8, D9

  (347) 0x420508 FMADD	D27, D22, D10, D11

  (347) 0x42050c ADD	X0, X17, X30

  (347) 0x420510 FMADD	D20, D22, D12, D13

  (347) 0x420514 LDR	D23, [X17, X30]

  (347) 0x420518 FMUL	D31, D22, D24

  (347) 0x42051c FMUL	D30, D24, D14

  (347) 0x420520 FMUL	D1, D24, D15

  (347) 0x420524 FMUL	D0, D24, D17

  (347) 0x420528 FMUL	D26, D24, D16

  (347) 0x42052c LDP	D21, D24, [X0, #8]

  (347) 0x420530 FMADD	D22, D31, D18, D30

  (347) 0x420534 FMADD	D1, D31, D3, D1

  (347) 0x420538 FMADD	D26, D31, D4, D26

  (347) 0x42053c FMADD	D31, D31, D2, D0

  (347) 0x420540 LDR	D0, [X0, #24]

  (347) 0x420544 FADD	D19, D22, D19

  (347) 0x420548 FADD	D29, D29, D1

  (347) 0x42054c FADD	D27, D27, D26

  (347) 0x420550 FADD	D20, D31, D20

  (347) 0x420554 FMUL	D30, D19, D21

  (347) 0x420558 FMUL	D21, D29, D0

  (347) 0x42055c FMADD	D23, D23, D27, D30

  (347) 0x420560 FMADD	D24, D24, D20, D21

  (347) 0x420564 FADD	D22, D24, D23

  (347) 0x420568 STR	D22, [SP, #160]

  (347) 0x42056c CMP	X14, X18

  (347) 0x420570 B.EQ	4206ac

  (347) 0x420574 STP	D25, D28, [SP, #192]

    (349) 0x420578 LDP	D25, D28, [X18], #8

    (349) 0x42057c FMUL	D1, D28, D5

    (349) 0x420580 FMUL	D31, D25, D5

    (349) 0x420584 FRINTZ	D26, D1

    (349) 0x420588 FRINTZ	D19, D31

    (349) 0x42058c ADD	X18, X18, #8

    (349) 0x420590 FCVTZS	W2, D1

    (349) 0x420594 FCVTZS	W1, D31

    (349) 0x420598 FSUB	D27, D31, S19

    (349) 0x42059c FSUB	D29, D1, S26

    (349) 0x4205a0 SBFM	X28, X2, #61, #31

    (349) 0x4205a4 SBFM	X27, X1, #61, #31

    (349) 0x4205a8 FMUL	D30, D29, D29

    (349) 0x4205ac FMUL	D28, D27, D27

    (349) 0x4205b0 ADD	X12, X17, X27

    (349) 0x4205b4 ADD	X3, X17, X28

    (349) 0x4205b8 LDR	D25, [X17, X28]

    (349) 0x4205bc FMADD	D31, D29, D10, D11

    (349) 0x4205c0 FMADD	D26, D29, D8, D9

    (349) 0x4205c4 FMADD	D1, D27, D6, D7

    (349) 0x4205c8 FMADD	D19, D29, D6, D7

    (349) 0x4205cc LDR	D24, [X17, X27]

    (349) 0x4205d0 FMADD	D0, D27, D10, D11

    (349) 0x4205d4 FMUL	D22, D29, D30

    (349) 0x4205d8 FMUL	D23, D28, D14

    (349) 0x4205dc FMUL	D20, D30, D15

    (349) 0x4205e0 FMUL	D21, D28, D15

    (349) 0x4205e4 FMADD	D29, D29, D12, D13

    (349) 0x4205e8 STP	D24, D25, [SP, #168]

    (349) 0x4205ec FMUL	D25, D27, D28

    (349) 0x4205f0 FMUL	D24, D28, D16

    (349) 0x4205f4 FMUL	D28, D28, D17

    (349) 0x4205f8 STR	D31, [SP, #184]

    (349) 0x4205fc FMADD	D31, D27, D8, D9

    (349) 0x420600 FMADD	D20, D22, D3, D20

    (349) 0x420604 FMADD	D27, D27, D12, D13

    (349) 0x420608 FMADD	D23, D25, D18, D23

    (349) 0x42060c FMADD	D21, D25, D3, D21

    (349) 0x420610 FMADD	D28, D25, D2, D28

    (349) 0x420614 FADD	D26, D26, D20

    (349) 0x420618 FMADD	D20, D25, D4, D24

    (349) 0x42061c FMUL	D25, D30, D14

    (349) 0x420620 FADD	D1, D23, D1

    (349) 0x420624 FMUL	D23, D30, D16

    (349) 0x420628 FMUL	D30, D30, D17

    (349) 0x42062c FADD	D31, D31, D21

    (349) 0x420630 FMADD	D25, D22, D18, D25

    (349) 0x420634 FMADD	D21, D22, D4, D23

    (349) 0x420638 LDR	D23, [SP, #184]

    (349) 0x42063c FMADD	D22, D22, D2, D30

    (349) 0x420640 FADD	D24, D0, D20

    (349) 0x420644 FADD	D20, D28, D27

    (349) 0x420648 LDP	D27, D0, [X12, #8]

    (349) 0x42064c FADD	D19, D25, D19

    (349) 0x420650 FMUL	D27, D1, D27

    (349) 0x420654 FADD	D30, D22, D29

    (349) 0x420658 LDR	D29, [X12, #24]

    (349) 0x42065c FMUL	D28, D31, D29

    (349) 0x420660 LDR	D29, [X3, #24]

    (349) 0x420664 FMADD	D1, D0, D20, D28

    (349) 0x420668 LDP	D0, D22, [SP, #168]

    (349) 0x42066c FMUL	D26, D26, D29

    (349) 0x420670 LDP	D25, D20, [X3, #8]

    (349) 0x420674 FMADD	D24, D0, D24, D27

    (349) 0x420678 FADD	D27, D23, D21

    (349) 0x42067c FMUL	D31, D19, D25

    (349) 0x420680 FMADD	D30, D20, D30, D26

    (349) 0x420684 FMADD	D21, D22, D27, D31

    (349) 0x420688 FADD	D19, D1, D24

    (349) 0x42068c LDR	D1, [SP, #160]

    (349) 0x420690 FADD	D25, D1, D19

    (349) 0x420694 FADD	D28, D30, D21

    (349) 0x420698 FADD	D22, D25, D28

    (349) 0x42069c STR	D22, [SP, #160]

    (349) 0x4206a0 CMP	X14, X18

    (349) 0x4206a4 B.NE	420578

  (347) 0x4206a8 LDP	D25, D28, [SP, #192]

  (347) 0x4206ac FADD	D25, D25, D22

  (347) 0x4206b0 ADD	X7, X7, #1

  (347) 0x4206b4 CMP	X9, X7

  (347) 0x4206b8 B.NE	420230

0x4206bc FSUB	D10, D28, S25

0x4206c0 FMOV	D0, D10

0x4206c4 ADD	X20, X20, #1

0x4206c8 BL	403da0

0x4206cc LDP	X4, X13, [X26]

0x4206d0 SUB	X5, X13, X4

0x4206d4 STR	D0, [X4, X24]

0x4206d8 ADD	X24, X24, #8

0x4206dc CMP	X20, X5,ASR #3

0x4206e0 B.CC	4201c0

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h: 993 - 1150

--------------------------------------------------------------------------------

993:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1128:       operator[](size_type __n) _GLIBCXX_NOEXCEPT

[...]

1147:       operator[](size_type __n) const _GLIBCXX_NOEXCEPT

1148:       {

1149: 	__glibcxx_requires_subscript(__n);

1150: 	return *(this->_M_impl._M_start + __n);

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 249

--------------------------------------------------------------------------------

223:     return X[i];

[...]

249:   inline const_pointer data() const { return X; }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h: 107 - 132

--------------------------------------------------------------------------------

107:     for (int k = 0; k < ratios.size(); ++k)

108:       ratios[k] = std::exp(Uat[VP.refPtcl] - computeU(VP.getRefPS(), VP.refPtcl, VP.getDistTableAB(myTableID).getDistRow(k).data()));

[...]

125:     valT curUat(0);

126:     const int igt = P.GroupID[iat] * NumGroups;

127:     for (int jg = 0; jg < NumGroups; ++jg)

128:     {

129:       const FuncType& f2(*F[igt + jg]);

130:       int iStart = P.first(jg);

131:       int iEnd   = P.last(jg);

132:       curUat += f2.evaluateV(iat, iStart, iEnd, dist, DistCompressed.data());

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 313 - 316

--------------------------------------------------------------------------------

313:   inline int first(int igroup) const { return (*group_offsets_)[igroup]; }

314:

315:   ///return the last index of a group i

316:   inline int last(int igroup) const { return (*group_offsets_)[igroup + 1]; }

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/optional: 991 - 991

--------------------------------------------------------------------------------

991: 	if (this->_M_is_engaged())

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/refwrap.h: 351 - 351

--------------------------------------------------------------------------------

351:       { return *_M_data; }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 231 - 260

--------------------------------------------------------------------------------

231:   ASSUME_ALIGNED(distArrayCompressed);

232:   int iCount       = 0;

233:   const int iLimit = iEnd - iStart;

234:

235: #pragma vector always

236:   for (int jat = 0; jat < iLimit; jat++)

237:   {

238:     real_type r = distArray[jat];

239:     // pick the distances smaller than the cutoff and avoid the reference atom

240:     if (r < cutoff_radius && iStart + jat != iat)

241:       distArrayCompressed[iCount++] = distArray[jat];

242:   }

243:

244:   real_type d = 0.0;

245:   //#pragma omp simd reduction(+:d)

246:   for (int jat = 0; jat < iCount; jat++)

247:   {

248:     real_type r = distArrayCompressed[jat];

249:     r *= DeltaRInv;

250:     int i         = (int)r;

251:     real_type t   = r - real_type(i);

252:     real_type tp0 = t * t * t;

253:     real_type tp1 = t * t;

254:     real_type tp2 = t;

255:

256:     real_type d1 = SplineCoefs[i + 0] * (A[0] * tp0 + A[1] * tp1 + A[2] * tp2 + A[3]);

257:     real_type d2 = SplineCoefs[i + 1] * (A[4] * tp0 + A[5] * tp1 + A[6] * tp2 + A[7]);

258:     real_type d3 = SplineCoefs[i + 2] * (A[8] * tp0 + A[9] * tp1 + A[10] * tp2 + A[11]);

259:     real_type d4 = SplineCoefs[i + 3] * (A[12] * tp0 + A[13] * tp1 + A[14] * tp2 + A[15]);

260:     d += (d1 + d2 + d3 + d4);

Coverage (%)	Name	Source Location	Module
►99.13+	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:992	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	5.29
CQA speedup if FP arith vectorized	1.42
CQA speedup if fully vectorized	5.02
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.03
Bottlenecks	P12,
Function	miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source	stl_vector.h:993-993,OhmmsVector.h:223-223,OhmmsVector.h:249-249,TwoBodyJastrowRef.h:107-108,TwoBodyJastrowRef.h:125-127,ParticleSet.h:313-313,optional:991-991,refwrap.h:351-351,BsplineFunctor.h:231-231
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	6.17
CQA cycles if no scalar integer	1.17
CQA cycles if FP arith vectorized	4.33
CQA cycles if fully vectorized	1.23
Front-end cycles	4.75
P0 cycles	2.50
P1 cycles	2.50
P2 cycles	2.33
P3 cycles	2.33
P4 cycles	2.33
P5 cycles	2.33
P6 cycles	2.33
P7 cycles	2.33
P8 cycles	1.25
P9 cycles	1.25
P10 cycles	1.25
P11 cycles	1.25
P12 cycles	6.17
P13 cycles	5.83
P14 cycles	6.00
P15 cycles	0.00
P16 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	38.00
Nb uops	38.00
Nb loads	NA
Nb stores	1.00
Nb stack references	0.00
FLOP/cycle	0.16
Nb FLOP add-sub	1.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	20.92
Bytes prefetched	0.00
Bytes loaded	121.00
Bytes stored	8.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	42.79
Vector-efficiency ratio load	36.61
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	50.00

Metric	Value
CQA speedup if no scalar integer	5.29
CQA speedup if FP arith vectorized	1.42
CQA speedup if fully vectorized	5.02
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.03
Bottlenecks	P12,
Function	miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source	stl_vector.h:993-993,OhmmsVector.h:223-223,OhmmsVector.h:249-249,TwoBodyJastrowRef.h:107-108,TwoBodyJastrowRef.h:125-127,ParticleSet.h:313-313,optional:991-991,refwrap.h:351-351,BsplineFunctor.h:231-231
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	6.17
CQA cycles if no scalar integer	1.17
CQA cycles if FP arith vectorized	4.33
CQA cycles if fully vectorized	1.23
Front-end cycles	4.75
P0 cycles	2.50
P1 cycles	2.50
P2 cycles	2.33
P3 cycles	2.33
P4 cycles	2.33
P5 cycles	2.33
P6 cycles	2.33
P7 cycles	2.33
P8 cycles	1.25
P9 cycles	1.25
P10 cycles	1.25
P11 cycles	1.25
P12 cycles	6.17
P13 cycles	5.83
P14 cycles	6.00
P15 cycles	0.00
P16 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	38.00
Nb uops	38.00
Nb loads	NA
Nb stores	1.00
Nb stack references	0.00
FLOP/cycle	0.16
Nb FLOP add-sub	1.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	20.92
Bytes prefetched	0.00
Bytes loaded	121.00
Bytes stored	8.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	42.79
Vector-efficiency ratio load	36.61
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	50.00

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source file and lines	TwoBodyJastrowRef.h:107-132
Module	exec

The loop is defined in:

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h:993,1128,1147-1150
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,249
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:107-108,125-132
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/optional:991
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/refwrap.h:351
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:231-260

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths (too many, greater than internal limit = 100000)
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is very high. Force analysis with --force-loop-streams-analysis: expect potentially high RAM/CPU footprint

Try to simplify control.

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 6.17 to 1.17 cycles (5.29x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. Only 42% of vector register length is used (average across all VPU instructions). By vectorizing your loop, you can lower the cost of an iteration from 6.17 to 1.23 cycles (5.02x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 6.17 to 1.00 cycles (6.17x speedup).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 1 FP arithmetical operations:

1: addition or subtraction

The binary loop is loading 121 bytes. The binary loop is storing 8 bytes.

Arithmetic intensity

Arithmetic intensity is 0.01 FP operations per loaded or stored byte.

General properties

nb instructions	38
loop length	152
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

4.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	2.50	2.50	2.33	2.33	2.33	2.33	2.33	2.33	1.25	1.25	1.25	1.25	6.17	5.83	6.00	0.00	0.00
cycles	2.50	2.50	2.33	2.33	2.33	2.33	2.33	2.33	1.25	1.25	1.25	1.25	6.17	5.83	6.00	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	4.75
Overall L1	6.17

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 6.17 cycles. At this rate:

20% of peak load performance is reached (19.62 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.30 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4201c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
LDR X3, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR W23, [X19, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDRB W2, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (6.3%)
LDR D10, [X3, X23,SXTW #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
SBFM X28, X23, #0, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
TBZ W2, #0, 420710 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x5b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [X19, #656]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR W1, [X25, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (25.0%)
BL 47e08c <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
ADD X4, X24, X24,LSL #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [X27, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR X9, [X25, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (50.0%)
ADD X6, X5, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR X11, [X6, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (50.0%)
LDR W8, [X7, X28,LSL #2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (25.0%)
MADD W10, W8, W9, WZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
CBZ X9, 4206c0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x560>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [X27, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
MOVI D25, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
FMOV D28, D10	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X25, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (50.0%)
ADD X8, X12, W10,SXTW #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	scal (50.0%)
LDR X6, [X25, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR X10, [X13, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR W5, [X10], #4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
FSUB D10, D28, S25	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
FMOV D0, D10	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
ADD X20, X20, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
BL 403da0 <@plt_start@+0xc0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X4, X13, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.50	N/A
SUB X5, X13, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STR D0, [X4, X24]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
ADD X24, X24, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
CMP X20, X5,ASR #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	N/A
B.CC 4201c0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Function	miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source file and lines	TwoBodyJastrowRef.h:107-132
Module	exec

The loop is defined in:

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h:993,1128,1147-1150
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,249
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:107-108,125-132
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/optional:991
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/refwrap.h:351
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:231-260

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths (too many, greater than internal limit = 100000)
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is very high. Force analysis with --force-loop-streams-analysis: expect potentially high RAM/CPU footprint

Try to simplify control.

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 6.17 to 1.17 cycles (5.29x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 6.17 to 1.00 cycles (6.17x speedup).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 1 FP arithmetical operations:

1: addition or subtraction

The binary loop is loading 121 bytes. The binary loop is storing 8 bytes.

Arithmetic intensity

Arithmetic intensity is 0.01 FP operations per loaded or stored byte.

General properties

nb instructions	38
loop length	152
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

4.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	2.50	2.50	2.33	2.33	2.33	2.33	2.33	2.33	1.25	1.25	1.25	1.25	6.17	5.83	6.00	0.00	0.00
cycles	2.50	2.50	2.33	2.33	2.33	2.33	2.33	2.33	1.25	1.25	1.25	1.25	6.17	5.83	6.00	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	4.75
Overall L1	6.17

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 6.17 cycles. At this rate:

20% of peak load performance is reached (19.62 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.30 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4201c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
LDR X3, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR W23, [X19, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDRB W2, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (6.3%)
LDR D10, [X3, X23,SXTW #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
SBFM X28, X23, #0, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
TBZ W2, #0, 420710 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x5b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [X19, #656]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR W1, [X25, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (25.0%)
BL 47e08c <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
ADD X4, X24, X24,LSL #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [X27, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR X9, [X25, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (50.0%)
ADD X6, X5, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR X11, [X6, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (50.0%)
LDR W8, [X7, X28,LSL #2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (25.0%)
MADD W10, W8, W9, WZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
CBZ X9, 4206c0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x560>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [X27, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
MOVI D25, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
FMOV D28, D10	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X25, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (50.0%)
ADD X8, X12, W10,SXTW #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	scal (50.0%)
LDR X6, [X25, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR X10, [X13, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR W5, [X10], #4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
FSUB D10, D28, S25	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
FMOV D0, D10	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
ADD X20, X20, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
BL 403da0 <@plt_start@+0xc0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X4, X13, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.50	N/A
SUB X5, X13, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STR D0, [X4, X24]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
ADD X24, X24, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
CMP X20, X5,ASR #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	N/A
B.CC 4201c0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code