OV - exec - Loop 260

	Loop Id: 260	Module: exec	Source: OneBodyJastrowRef.h:134-146 [...]	Coverage: 0.01%

0x4161c0 LDR	X4, [X23, #24]

0x4161c4 ORR	X0, XZR, X20

0x4161c8 LDRSW	X3, [X20, #672]

0x4161cc LDR	W1, [X22, #168]

0x4161d0 LDR	D15, [X4, X3,LSL #3]

0x4161d4 BL	47e08c

0x4161d8 LDR	X6, [X0, #72]

0x4161dc LDR	W5, [X22, #152]

0x4161e0 ADD	X7, X6, X19

0x4161e4 LDR	X24, [X7, #24]

0x4161e8 CMP	W5, #0

0x4161ec B.LE	416708

0x4161f0 LDR	X9, [X22, #456]

0x4161f4 MOVI	D30, #0

0x4161f8 FMOV	D25, D15

0x4161fc MOVZ	X7, #0

0x416200 UBFM	X2, X5, #62, #31

  (259) 0x416204 UBFM	X17, X7, #63, #62

  (259) 0x416208 LDR	X30, [X9, X17]

  (259) 0x41620c CBZ	X30, 4166a4

  (259) 0x416210 LDR	X26, [X22, #160]

  (259) 0x416214 LDR	X8, [X22, #328]

  (259) 0x416218 LDR	X28, [X26, #616]

  (259) 0x41621c LDR	X10, [X28, #24]

  (259) 0x416220 ADD	X11, X10, X7

  (259) 0x416224 LDR	W12, [X10, X7]

  (259) 0x416228 LDR	W13, [X11, #4]

  (259) 0x41622c CMP	W13, W12

  (259) 0x416230 B.LE	4166a4

  (259) 0x416234 SUB	W14, W13, W12

  (259) 0x416238 SBFM	X15, X12, #61, #31

  (259) 0x41623c LDR	D7, [X30, #8]

  (259) 0x416240 ANDS	W18, W14, #128

  (259) 0x416244 MOVZ	W1, #0

  (259) 0x416248 ADD	X26, X24, X15

  (259) 0x41624c ORR	W17, WZR, W12

  (259) 0x416250 B.EQ	416388

  (259) 0x416254 CMP	W18, #1

  (259) 0x416258 B.EQ	41635c

  (259) 0x41625c CMP	W18, #2

  (259) 0x416260 B.EQ	416338

  (259) 0x416264 CMP	W18, #3

  (259) 0x416268 B.EQ	416314

  (259) 0x41626c CMP	W18, #4

  (259) 0x416270 B.EQ	4162f0

  (259) 0x416274 CMP	W18, #5

  (259) 0x416278 B.EQ	4162cc

  (259) 0x41627c CMP	W18, #6

  (259) 0x416280 B.EQ	4162a8

  (259) 0x416284 LDR	D8, [X24, X15]

  (259) 0x416288 FCMPE	D8, D7

  (259) 0x41628c B.GE	4162a0

  (259) 0x416290 CMN	W12, #1

  (259) 0x416294 B.EQ	4162a0

  (259) 0x416298 MOVZ	W1, #1

  (259) 0x41629c STR	D8, [X8]

  (259) 0x4162a0 ADD	X26, X26, #8

  (259) 0x4162a4 ADD	W17, W12, #1

  (259) 0x4162a8 LDR	D9, [X26]

  (259) 0x4162ac FCMPE	D9, D7

  (259) 0x4162b0 B.GE	4162c4

  (259) 0x4162b4 CMN	W17, #1

  (259) 0x4162b8 B.EQ	4162c4

  (259) 0x4162bc STR	D9, [X8, X1,UXTW #3]

  (259) 0x4162c0 ADD	W1, W1, #1

  (259) 0x4162c4 ADD	X26, X26, #8

  (259) 0x4162c8 ADD	W17, W17, #1

  (259) 0x4162cc LDR	D24, [X26]

  (259) 0x4162d0 FCMPE	D24, D7

  (259) 0x4162d4 B.GE	4162e8

  (259) 0x4162d8 CMN	W17, #1

  (259) 0x4162dc B.EQ	4162e8

  (259) 0x4162e0 STR	D24, [X8, X1,UXTW #3]

  (259) 0x4162e4 ADD	W1, W1, #1

  (259) 0x4162e8 ADD	X26, X26, #8

  (259) 0x4162ec ADD	W17, W17, #1

  (259) 0x4162f0 LDR	D10, [X26]

  (259) 0x4162f4 FCMPE	D10, D7

  (259) 0x4162f8 B.GE	41630c

  (259) 0x4162fc CMN	W17, #1

  (259) 0x416300 B.EQ	41630c

  (259) 0x416304 STR	D10, [X8, X1,UXTW #3]

  (259) 0x416308 ADD	W1, W1, #1

  (259) 0x41630c ADD	X26, X26, #8

  (259) 0x416310 ADD	W17, W17, #1

  (259) 0x416314 LDR	D21, [X26]

  (259) 0x416318 FCMPE	D21, D7

  (259) 0x41631c B.GE	416330

  (259) 0x416320 CMN	W17, #1

  (259) 0x416324 B.EQ	416330

  (259) 0x416328 STR	D21, [X8, X1,UXTW #3]

  (259) 0x41632c ADD	W1, W1, #1

  (259) 0x416330 ADD	X26, X26, #8

  (259) 0x416334 ADD	W17, W17, #1

  (259) 0x416338 LDR	D11, [X26]

  (259) 0x41633c FCMPE	D11, D7

  (259) 0x416340 B.GE	416354

  (259) 0x416344 CMN	W17, #1

  (259) 0x416348 B.EQ	416354

  (259) 0x41634c STR	D11, [X8, X1,UXTW #3]

  (259) 0x416350 ADD	W1, W1, #1

  (259) 0x416354 ADD	X26, X26, #8

  (259) 0x416358 ADD	W17, W17, #1

  (259) 0x41635c LDR	D12, [X26]

  (259) 0x416360 FCMPE	D12, D7

  (259) 0x416364 B.GE	416378

  (259) 0x416368 CMN	W17, #1

  (259) 0x41636c B.EQ	416378

  (259) 0x416370 STR	D12, [X8, X1,UXTW #3]

  (259) 0x416374 ADD	W1, W1, #1

  (259) 0x416378 ADD	W17, W17, #1

  (259) 0x41637c ADD	X26, X26, #8

  (259) 0x416380 CMP	W13, W17

  (259) 0x416384 B.EQ	416498

    (261) 0x416388 LDR	D13, [X26]

    (261) 0x41638c FCMPE	D13, D7

    (261) 0x416390 B.GE	4163a4

    (261) 0x416394 CMN	W17, #1

    (261) 0x416398 B.EQ	4163a4

    (261) 0x41639c STR	D13, [X8, X1,UXTW #3]

    (261) 0x4163a0 ADD	W1, W1, #1

    (261) 0x4163a4 LDR	D16, [X26, #8]

    (261) 0x4163a8 ADD	W16, W17, #1

    (261) 0x4163ac ADD	X3, X26, #8

    (261) 0x4163b0 FCMPE	D16, D7

    (261) 0x4163b4 B.GE	4163c8

    (261) 0x4163b8 CMN	W16, #1

    (261) 0x4163bc B.EQ	4163c8

    (261) 0x4163c0 STR	D16, [X8, X1,UXTW #3]

    (261) 0x4163c4 ADD	W1, W1, #1

    (261) 0x4163c8 LDR	D17, [X3, #8]

    (261) 0x4163cc ADD	W0, W16, #1

    (261) 0x4163d0 FCMPE	D17, D7

    (261) 0x4163d4 B.GE	4163e8

    (261) 0x4163d8 CMN	W0, #1

    (261) 0x4163dc B.EQ	4163e8

    (261) 0x4163e0 STR	D17, [X8, X1,UXTW #3]

    (261) 0x4163e4 ADD	W1, W1, #1

    (261) 0x4163e8 LDR	D18, [X3, #16]

    (261) 0x4163ec ADD	W27, W16, #2

    (261) 0x4163f0 FCMPE	D18, D7

    (261) 0x4163f4 B.GE	416408

    (261) 0x4163f8 CMN	W27, #1

    (261) 0x4163fc B.EQ	416408

    (261) 0x416400 STR	D18, [X8, X1,UXTW #3]

    (261) 0x416404 ADD	W1, W1, #1

    (261) 0x416408 LDR	D19, [X3, #24]

    (261) 0x41640c ADD	W4, W16, #3

    (261) 0x416410 FCMPE	D19, D7

    (261) 0x416414 B.GE	416428

    (261) 0x416418 CMN	W4, #1

    (261) 0x41641c B.EQ	416428

    (261) 0x416420 STR	D19, [X8, X1,UXTW #3]

    (261) 0x416424 ADD	W1, W1, #1

    (261) 0x416428 LDR	D29, [X3, #32]

    (261) 0x41642c ADD	W5, W16, #4

    (261) 0x416430 FCMPE	D29, D7

    (261) 0x416434 B.GE	416448

    (261) 0x416438 CMN	W5, #1

    (261) 0x41643c B.EQ	416448

    (261) 0x416440 STR	D29, [X8, X1,UXTW #3]

    (261) 0x416444 ADD	W1, W1, #1

    (261) 0x416448 LDR	D31, [X3, #40]

    (261) 0x41644c ADD	W6, W16, #5

    (261) 0x416450 FCMPE	D31, D7

    (261) 0x416454 B.GE	416468

    (261) 0x416458 CMN	W6, #1

    (261) 0x41645c B.EQ	416468

    (261) 0x416460 STR	D31, [X8, X1,UXTW #3]

    (261) 0x416464 ADD	W1, W1, #1

    (261) 0x416468 LDR	D27, [X3, #48]

    (261) 0x41646c ADD	W25, W16, #6

    (261) 0x416470 FCMPE	D27, D7

    (261) 0x416474 B.GE	416488

    (261) 0x416478 CMN	W25, #1

    (261) 0x41647c B.EQ	416488

    (261) 0x416480 STR	D27, [X8, X1,UXTW #3]

    (261) 0x416484 ADD	W1, W1, #1

    (261) 0x416488 ADD	W17, W16, #7

    (261) 0x41648c ADD	X26, X3, #56

    (261) 0x416490 CMP	W13, W17

    (261) 0x416494 B.NE	416388

  (259) 0x416498 CBZ	W1, 4166a4

  (259) 0x41649c STR	XZR, [SP, #168]

  (259) 0x4164a0 ORR	X11, XZR, X8

  (259) 0x4164a4 ADD	X28, X8, W1,UXTW #3

  (259) 0x4164a8 LDR	X10, [X30, #536]

  (259) 0x4164ac LDR	D7, [X30, #568]

  (259) 0x4164b0 LDP	D5, D18, [X30, #24]

  (259) 0x4164b4 LDP	D12, D13, [X30, #40]

  (259) 0x4164b8 LDP	D20, D16, [X30, #56]

  (259) 0x4164bc LDP	D8, D9, [X30, #72]

  (259) 0x4164c0 LDP	D0, D19, [X30, #88]

  (259) 0x4164c4 LDP	D14, D15, [X30, #104]

  (259) 0x4164c8 LDP	D6, D17, [X30, #120]

  (259) 0x4164cc LDP	D10, D11, [X30, #136]

  (259) 0x4164d0 TBZ	W1, #0, 416568

  (259) 0x4164d4 ADD	X11, X8, #8

  (259) 0x4164d8 LDR	D1, [X8]

  (259) 0x4164dc FMUL	D26, D1, D7

  (259) 0x4164e0 FRINTZ	D23, D26

  (259) 0x4164e4 FSUB	D22, D26, S23

  (259) 0x4164e8 FCVTZS	W30, D26

  (259) 0x4164ec FMUL	D3, D22, D22

  (259) 0x4164f0 FMADD	D1, D22, D8, D9

  (259) 0x4164f4 SBFM	X8, X30, #61, #31

  (259) 0x4164f8 FMADD	D2, D22, D10, D11

  (259) 0x4164fc FMADD	D27, D22, D12, D13

  (259) 0x416500 ADD	X12, X10, X8

  (259) 0x416504 FMADD	D28, D22, D14, D15

  (259) 0x416508 LDR	D23, [X10, X8]

  (259) 0x41650c LDP	D21, D24, [X12, #8]

  (259) 0x416510 FMUL	D31, D22, D3

  (259) 0x416514 FMUL	D4, D16, D3

  (259) 0x416518 FMUL	D29, D17, D3

  (259) 0x41651c FMUL	D22, D19, D3

  (259) 0x416520 FMUL	D26, D18, D3

  (259) 0x416524 FMADD	D3, D31, D20, D4

  (259) 0x416528 FMADD	D29, D31, D6, D29

  (259) 0x41652c FMADD	D26, D31, D5, D26

  (259) 0x416530 FMADD	D31, D31, D0, D22

  (259) 0x416534 LDR	D22, [X12, #24]

  (259) 0x416538 FADD	D1, D1, D3

  (259) 0x41653c FADD	D2, D29, D2

  (259) 0x416540 FADD	D27, D27, D26

  (259) 0x416544 FADD	D28, D28, D31

  (259) 0x416548 FMUL	D4, D1, D21

  (259) 0x41654c FMUL	D21, D2, D22

  (259) 0x416550 FMADD	D23, D23, D27, D4

  (259) 0x416554 FMADD	D24, D24, D28, D21

  (259) 0x416558 FADD	D3, D23, D24

  (259) 0x41655c STR	D3, [SP, #168]

  (259) 0x416560 CMP	X28, X11

  (259) 0x416564 B.EQ	4166a0

  (259) 0x416568 STP	D30, D25, [SP, #200]

    (262) 0x41656c LDP	D25, D30, [X11], #8

    (262) 0x416570 FMUL	D26, D30, D7

    (262) 0x416574 FMUL	D31, D25, D7

    (262) 0x416578 FRINTZ	D29, D26

    (262) 0x41657c FRINTZ	D1, D31

    (262) 0x416580 ADD	X11, X11, #8

    (262) 0x416584 FCVTZS	W13, D26

    (262) 0x416588 FCVTZS	W14, D31

    (262) 0x41658c FSUB	D23, D26, S29

    (262) 0x416590 FSUB	D28, D31, S1

    (262) 0x416594 SBFM	X15, X13, #61, #31

    (262) 0x416598 SBFM	X16, X14, #61, #31

    (262) 0x41659c FMUL	D31, D23, D23

    (262) 0x4165a0 FMADD	D24, D23, D12, D13

    (262) 0x4165a4 ADD	X3, X10, X16

    (262) 0x4165a8 ADD	X18, X10, X15

    (262) 0x4165ac LDR	D30, [X10, X15]

    (262) 0x4165b0 FMADD	D27, D23, D8, D9

    (262) 0x4165b4 FMADD	D2, D28, D10, D11

    (262) 0x4165b8 FMADD	D29, D23, D14, D15

    (262) 0x4165bc FMADD	D4, D23, D10, D11

    (262) 0x4165c0 LDR	D25, [X10, X16]

    (262) 0x4165c4 FMADD	D3, D28, D12, D13

    (262) 0x4165c8 FMUL	D22, D23, D31

    (262) 0x4165cc FMUL	D21, D16, D31

    (262) 0x4165d0 FMADD	D1, D28, D8, D9

    (262) 0x4165d4 STP	D25, D30, [SP, #176]

    (262) 0x4165d8 FMUL	D30, D28, D28

    (262) 0x4165dc STR	D24, [SP, #192]

    (262) 0x4165e0 FMADD	D26, D22, D20, D21

    (262) 0x4165e4 FMUL	D25, D17, D30

    (262) 0x4165e8 FMUL	D21, D28, D30

    (262) 0x4165ec FMUL	D23, D16, D30

    (262) 0x4165f0 FMUL	D24, D18, D30

    (262) 0x4165f4 FMADD	D28, D28, D14, D15

    (262) 0x4165f8 FMADD	D25, D21, D6, D25

    (262) 0x4165fc FMADD	D23, D21, D20, D23

    (262) 0x416600 FADD	D27, D27, D26

    (262) 0x416604 FMUL	D26, D19, D30

    (262) 0x416608 FMADD	D24, D21, D5, D24

    (262) 0x41660c FMADD	D30, D21, D0, D26

    (262) 0x416610 FMUL	D21, D17, D31

    (262) 0x416614 FADD	D25, D25, D2

    (262) 0x416618 FMUL	D2, D18, D31

    (262) 0x41661c FMUL	D31, D19, D31

    (262) 0x416620 FMADD	D26, D22, D6, D21

    (262) 0x416624 FADD	D1, D1, D23

    (262) 0x416628 FADD	D24, D3, D24

    (262) 0x41662c FMADD	D21, D22, D5, D2

    (262) 0x416630 FMADD	D22, D22, D0, D31

    (262) 0x416634 FADD	D30, D28, D30

    (262) 0x416638 LDP	D28, D3, [X3, #8]

    (262) 0x41663c FADD	D4, D26, D4

    (262) 0x416640 LDR	D26, [X18, #24]

    (262) 0x416644 FMUL	D1, D1, D28

    (262) 0x416648 FADD	D31, D29, D22

    (262) 0x41664c LDR	D29, [X3, #24]

    (262) 0x416650 FMUL	D23, D25, D29

    (262) 0x416654 FMUL	D25, D4, D26

    (262) 0x416658 LDP	D22, D4, [X18, #8]

    (262) 0x41665c FMADD	D2, D3, D30, D23

    (262) 0x416660 LDP	D28, D30, [SP, #176]

    (262) 0x416664 FMUL	D27, D27, D22

    (262) 0x416668 FMADD	D31, D4, D31, D25

    (262) 0x41666c FMADD	D24, D28, D24, D1

    (262) 0x416670 LDR	D1, [SP, #192]

    (262) 0x416674 FADD	D21, D1, D21

    (262) 0x416678 FADD	D3, D24, D2

    (262) 0x41667c LDR	D2, [SP, #168]

    (262) 0x416680 FMADD	D29, D30, D21, D27

    (262) 0x416684 FADD	D26, D2, D3

    (262) 0x416688 FADD	D23, D29, D31

    (262) 0x41668c FADD	D3, D26, D23

    (262) 0x416690 STR	D3, [SP, #168]

    (262) 0x416694 CMP	X28, X11

    (262) 0x416698 B.NE	41656c

  (259) 0x41669c LDP	D30, D25, [SP, #200]

  (259) 0x4166a0 FADD	D30, D30, D3

  (259) 0x4166a4 ADD	X7, X7, #4

  (259) 0x4166a8 CMP	X2, X7

  (259) 0x4166ac B.NE	416204

0x4166b0 FSUB	D15, D25, S30

0x4166b4 FMOV	D0, D15

0x4166b8 ADD	X19, X19, #40

0x4166bc BL	403da0

0x4166c0 LDR	X0, [SP, #216]

0x4166c4 LDP	X27, X4, [X0]

0x4166c8 SUB	X5, X4, X27

0x4166cc STR	D0, [X27, X21,UXTW #3]

0x4166d0 ADD	X21, X21, #1

0x4166d4 CMP	X21, X5,ASR #3

0x4166d8 B.CC	4161c0

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h: 993 - 1150

--------------------------------------------------------------------------------

993:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1131: 	return *(this->_M_impl._M_start + __n);

[...]

1147:       operator[](size_type __n) const _GLIBCXX_NOEXCEPT

1148:       {

1149: 	__glibcxx_requires_subscript(__n);

1150: 	return *(this->_M_impl._M_start + __n);

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/shared_ptr_base.h: 1667 - 1667

--------------------------------------------------------------------------------

1667:       { return _M_ptr; }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h: 134 - 146

--------------------------------------------------------------------------------

134:     for (int k = 0; k < ratios.size(); ++k)

135:       ratios[k] = std::exp(Vat[VP.refPtcl] - computeU(VP.getDistTableAB(myTableID).getDistRow(k).data()));

136:   }

137:

138:   inline valT computeU(const valT* dist)

139:   {

140:     valT curVat(0);

141:     if (NumGroups > 0)

142:     {

143:       for (int jg = 0; jg < NumGroups; ++jg)

144:       {

145:         if (F[jg] != nullptr)

146:           curVat += F[jg]->evaluateV(-1, Ions.first(jg), Ions.last(jg), dist, DistCompressed.data());

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 249

--------------------------------------------------------------------------------

223:     return X[i];

[...]

249:   inline const_pointer data() const { return X; }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 313 - 316

--------------------------------------------------------------------------------

313:   inline int first(int igroup) const { return (*group_offsets_)[igroup]; }

314:

315:   ///return the last index of a group i

316:   inline int last(int igroup) const { return (*group_offsets_)[igroup + 1]; }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 231 - 260

--------------------------------------------------------------------------------

231:   ASSUME_ALIGNED(distArrayCompressed);

232:   int iCount       = 0;

233:   const int iLimit = iEnd - iStart;

234:

235: #pragma vector always

236:   for (int jat = 0; jat < iLimit; jat++)

237:   {

238:     real_type r = distArray[jat];

239:     // pick the distances smaller than the cutoff and avoid the reference atom

240:     if (r < cutoff_radius && iStart + jat != iat)

241:       distArrayCompressed[iCount++] = distArray[jat];

242:   }

243:

244:   real_type d = 0.0;

245:   //#pragma omp simd reduction(+:d)

246:   for (int jat = 0; jat < iCount; jat++)

247:   {

248:     real_type r = distArrayCompressed[jat];

249:     r *= DeltaRInv;

250:     int i         = (int)r;

251:     real_type t   = r - real_type(i);

252:     real_type tp0 = t * t * t;

253:     real_type tp1 = t * t;

254:     real_type tp2 = t;

255:

256:     real_type d1 = SplineCoefs[i + 0] * (A[0] * tp0 + A[1] * tp1 + A[2] * tp2 + A[3]);

257:     real_type d2 = SplineCoefs[i + 1] * (A[4] * tp0 + A[5] * tp1 + A[6] * tp2 + A[7]);

258:     real_type d3 = SplineCoefs[i + 2] * (A[8] * tp0 + A[9] * tp1 + A[10] * tp2 + A[11]);

259:     real_type d4 = SplineCoefs[i + 3] * (A[12] * tp0 + A[13] * tp1 + A[14] * tp2 + A[15]);

260:     d += (d1 + d2 + d3 + d4);

Coverage (%)	Name	Source Location	Module
►98.46+	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:992	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	4.60
CQA speedup if FP arith vectorized	1.35
CQA speedup if fully vectorized	2.88
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.05
Bottlenecks	P12,
Function	miniqmcreference::OneBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source	stl_vector.h:993-993,stl_vector.h:1131-1131,OneBodyJastrowRef.h:134-135,OneBodyJastrowRef.h:140-141,OhmmsVector.h:223-223,OhmmsVector.h:249-249
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	3.83
CQA cycles if no scalar integer	0.83
CQA cycles if FP arith vectorized	2.83
CQA cycles if fully vectorized	1.33
Front-end cycles	3.50
P0 cycles	2.00
P1 cycles	2.00
P2 cycles	1.83
P3 cycles	1.83
P4 cycles	1.83
P5 cycles	1.83
P6 cycles	1.83
P7 cycles	1.83
P8 cycles	1.25
P9 cycles	1.25
P10 cycles	1.25
P11 cycles	1.25
P12 cycles	3.83
P13 cycles	3.50
P14 cycles	3.67
P15 cycles	0.00
P16 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	28.00
Nb uops	28.00
Nb loads	NA
Nb stores	1.00
Nb stack references	0.00
FLOP/cycle	0.26
Nb FLOP add-sub	1.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	21.91
Bytes prefetched	0.00
Bytes loaded	76.00
Bytes stored	8.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	46.15
Vector-efficiency ratio load	45.00
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	45.00

Metric	Value
CQA speedup if no scalar integer	4.60
CQA speedup if FP arith vectorized	1.35
CQA speedup if fully vectorized	2.88
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.05
Bottlenecks	P12,
Function	miniqmcreference::OneBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source	stl_vector.h:993-993,stl_vector.h:1131-1131,OneBodyJastrowRef.h:134-135,OneBodyJastrowRef.h:140-141,OhmmsVector.h:223-223,OhmmsVector.h:249-249
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	3.83
CQA cycles if no scalar integer	0.83
CQA cycles if FP arith vectorized	2.83
CQA cycles if fully vectorized	1.33
Front-end cycles	3.50
P0 cycles	2.00
P1 cycles	2.00
P2 cycles	1.83
P3 cycles	1.83
P4 cycles	1.83
P5 cycles	1.83
P6 cycles	1.83
P7 cycles	1.83
P8 cycles	1.25
P9 cycles	1.25
P10 cycles	1.25
P11 cycles	1.25
P12 cycles	3.83
P13 cycles	3.50
P14 cycles	3.67
P15 cycles	0.00
P16 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	28.00
Nb uops	28.00
Nb loads	NA
Nb stores	1.00
Nb stack references	0.00
FLOP/cycle	0.26
Nb FLOP add-sub	1.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	21.91
Bytes prefetched	0.00
Bytes loaded	76.00
Bytes stored	8.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	46.15
Vector-efficiency ratio load	45.00
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	45.00

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	miniqmcreference::OneBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source file and lines	OneBodyJastrowRef.h:134-146
Module	exec

The loop is defined in:

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h:993,1131,1147-1150
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/shared_ptr_base.h:1667
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:134-146
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,249
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:231-260

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 3.83 to 0.83 cycles (4.60x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. Only 46% of vector register length is used (average across all VPU instructions). By vectorizing your loop, you can lower the cost of an iteration from 3.83 to 1.33 cycles (2.88x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 3.83 to 1.00 cycles (3.83x speedup).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 1 FP arithmetical operations:

1: addition or subtraction

The binary loop is loading 76 bytes. The binary loop is storing 8 bytes.

Arithmetic intensity

Arithmetic intensity is 0.01 FP operations per loaded or stored byte.

General properties

nb instructions	28
loop length	112
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

3.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	2.00	2.00	1.83	1.83	1.83	1.83	1.83	1.83	1.25	1.25	1.25	1.25	3.83	3.50	3.67	0.00	0.00
cycles	2.00	2.00	1.83	1.83	1.83	1.83	1.83	1.83	1.25	1.25	1.25	1.25	3.83	3.50	3.67	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	3.50
Overall L1	3.83

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 3.83 cycles. At this rate:

20% of peak load performance is reached (19.83 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (2.09 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4166b4

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
LDR X4, [X23, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDRSW X3, [X20, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR W1, [X22, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (25.0%)
LDR D15, [X4, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
BL 47e08c <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (50.0%)
LDR W5, [X22, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
ADD X7, X6, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [X7, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (50.0%)
CMP W5, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 416708 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x5a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X22, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (50.0%)
MOVI D30, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
FMOV D25, D15	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X2, X5, #62, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
FSUB D15, D25, S30	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
FMOV D0, D15	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
ADD X19, X19, #40	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
BL 403da0 <@plt_start@+0xc0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDP X27, X4, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.50	N/A
SUB X5, X4, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STR D0, [X27, X21,UXTW #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
ADD X21, X21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
CMP X21, X5,ASR #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	N/A
B.CC 4161c0 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Function	miniqmcreference::OneBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source file and lines	OneBodyJastrowRef.h:134-146
Module	exec

The loop is defined in:

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h:993,1131,1147-1150
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/shared_ptr_base.h:1667
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:134-146
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,249
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:231-260

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 3.83 to 0.83 cycles (4.60x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 3.83 to 1.00 cycles (3.83x speedup).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 1 FP arithmetical operations:

1: addition or subtraction

The binary loop is loading 76 bytes. The binary loop is storing 8 bytes.

Arithmetic intensity

Arithmetic intensity is 0.01 FP operations per loaded or stored byte.

General properties

nb instructions	28
loop length	112
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

3.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	2.00	2.00	1.83	1.83	1.83	1.83	1.83	1.83	1.25	1.25	1.25	1.25	3.83	3.50	3.67	0.00	0.00
cycles	2.00	2.00	1.83	1.83	1.83	1.83	1.83	1.83	1.25	1.25	1.25	1.25	3.83	3.50	3.67	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	3.50
Overall L1	3.83

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 3.83 cycles. At this rate:

20% of peak load performance is reached (19.83 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (2.09 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4166b4

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
LDR X4, [X23, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDRSW X3, [X20, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR W1, [X22, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (25.0%)
LDR D15, [X4, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
BL 47e08c <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (50.0%)
LDR W5, [X22, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
ADD X7, X6, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [X7, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (50.0%)
CMP W5, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 416708 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x5a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X22, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	scal (50.0%)
MOVI D30, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
FMOV D25, D15	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X2, X5, #62, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
FSUB D15, D25, S30	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
FMOV D0, D15	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
ADD X19, X19, #40	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
BL 403da0 <@plt_start@+0xc0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDP X27, X4, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.50	N/A
SUB X5, X4, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STR D0, [X27, X21,UXTW #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
ADD X21, X21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
CMP X21, X5,ASR #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	N/A
B.CC 4161c0 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code