OV - exec - Function miniqmcreference::einspline_spo_ref<double>::evaluate(qmcplusplus::ParticleSet const&, int, qmcplusplus::Vector<double, std::allocator<double> >&, qmcplusplus::Vector<qmcplusplus::TinyVector<double, 3u>, std::allocator<qmcplusplus::TinyVector<double, 3u> > >&, qmcplusplus::Vector<double, std::allocator<double> >&)

	Function: miniqmcreference::einspline_spo_ref<double>::evaluate(qmcplusplus::ParticleSet const&, int ...	Module: exec	Source: einspline_spo_ref.hpp:203-230 [...]	Coverage (incl. loops): 10.35% \| (excl. loops): 0.00%

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp: 187 - 286

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187:   x -= spline_m->x_grid.start;

188:   y -= spline_m->y_grid.start;

189:   z -= spline_m->z_grid.start;

190:   spline2::getSplineBound(x * spline_m->x_grid.delta_inv, tx, ix, spline_m->x_grid.num - 1);

191:   spline2::getSplineBound(y * spline_m->y_grid.delta_inv, ty, iy, spline_m->y_grid.num - 1);

192:   spline2::getSplineBound(z * spline_m->z_grid.delta_inv, tz, iz, spline_m->z_grid.num - 1);

[...]

199:   const intptr_t ys = spline_m->y_stride;

200:   const intptr_t zs = spline_m->z_stride;

201:

202:   const size_t out_offset = spline_m->num_splines;

203:

204:   T* restrict gx = grads;

205:   T* restrict gy = grads + out_offset;

206:   T* restrict gz = grads + 2 * out_offset;

207:

208:   T* restrict hxx = hess;

209:   T* restrict hxy = hess + out_offset;

210:   T* restrict hxz = hess + 2 * out_offset;

211:   T* restrict hyy = hess + 3 * out_offset;

212:   T* restrict hyz = hess + 4 * out_offset;

213:   T* restrict hzz = hess + 5 * out_offset;

214:

215:   std::fill(vals, vals + num_splines, T());

[...]

226:   for (int i = 0; i < 4; i++)

227:     for (int j = 0; j < 4; j++)

228:     {

229:       const T* restrict coefs    = spline_m->coefs + (ix + i) * xs + (iy + j) * ys + iz * zs;

230:       const T* restrict coefszs  = coefs + zs;

231:       const T* restrict coefs2zs = coefs + 2 * zs;

232:       const T* restrict coefs3zs = coefs + 3 * zs;

233:

234:       const T pre20 = d2a[i] * b[j];

235:       const T pre10 = da[i] * b[j];

236:       const T pre00 = a[i] * b[j];

237:       const T pre11 = da[i] * db[j];

238:       const T pre01 = a[i] * db[j];

239:       const T pre02 = a[i] * d2b[j];

240:

241:       const int iSplitPoint = num_splines;

242:       for (int n = 0; n < iSplitPoint; n++)

243:       {

244:         T coefsv    = coefs[n];

245:         T coefsvzs  = coefszs[n];

246:         T coefsv2zs = coefs2zs[n];

247:         T coefsv3zs = coefs3zs[n];

248:

249:         T sum0 = c[0] * coefsv + c[1] * coefsvzs + c[2] * coefsv2zs + c[3] * coefsv3zs;

250:         T sum1 = dc[0] * coefsv + dc[1] * coefsvzs + dc[2] * coefsv2zs + dc[3] * coefsv3zs;

251:         T sum2 = d2c[0] * coefsv + d2c[1] * coefsvzs + d2c[2] * coefsv2zs + d2c[3] * coefsv3zs;

252:

253:         hxx[n] += pre20 * sum0;

254:         hxy[n] += pre11 * sum0;

255:         hxz[n] += pre10 * sum1;

256:         hyy[n] += pre02 * sum0;

257:         hyz[n] += pre01 * sum1;

258:         hzz[n] += pre00 * sum2;

259:         gx[n] += pre10 * sum0;

260:         gy[n] += pre01 * sum0;

261:         gz[n] += pre00 * sum1;

262:         vals[n] += pre00 * sum0;

[...]

269:   const T dxx   = dxInv * dxInv;

270:   const T dyy   = dyInv * dyInv;

271:   const T dzz   = dzInv * dzInv;

272:   const T dxy   = dxInv * dyInv;

273:   const T dxz   = dxInv * dzInv;

274:   const T dyz   = dyInv * dzInv;

275:

276:   for (int n = 0; n < num_splines; n++)

277:   {

278:     gx[n] *= dxInv;

279:     gy[n] *= dyInv;

280:     gz[n] *= dzInv;

281:     hxx[n] *= dxx;

282:     hyy[n] *= dyy;

283:     hzz[n] *= dzz;

284:     hxy[n] *= dxy;

285:     hxz[n] *= dxz;

286:     hyz[n] *= dyz;

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h: 170 - 173

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170:       if (-std::numeric_limits<T1>::epsilon() < val_dot[i] && val_dot[i] < 0)

171:         val_dot[i] = T1(0.0);

172:       else

173:         val_dot[i] -= std::floor(val_dot[i]);

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249

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242:   ScopeGuard(TIMER& t) : timer(t) { timer.start(); }

[...]

249:   ~ScopeGuard() { timer.stop(); }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/Tensor.h: 213 - 213

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213:   inline Type_t operator[](unsigned int i) const { return X[i]; }

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h: 1131 - 1263

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1131: 	return *(this->_M_impl._M_start + __n);

[...]

1263:       { return _M_data_ptr(this->_M_impl._M_start); }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h: 150 - 152

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150:     return TinyVector<Type_t, 3>(lhs[0] * rhs[0] + lhs[1] * rhs[3] + lhs[2] * rhs[6],

151:                                  lhs[0] * rhs[1] + lhs[1] * rhs[4] + lhs[2] * rhs[7],

152:                                  lhs[0] * rhs[2] + lhs[1] * rhs[5] + lhs[2] * rhs[8]);

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp: 203 - 230

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203:     ScopedTimer local_timer(timer);

204:

205:     auto u = Lattice.toUnit_floor(P.activeR(iat));

206:     for (int i = 0; i < nBlocks; ++i)

207:       MultiBsplineEvalRef::evaluate_vgh(einsplines[i], u[0], u[1], u[2], psi[i].data(), grad[i].data(), hess[i].data(),

208:                                         nSplinesPerBlock);

209:   }

210:

211:   inline void evaluate(const ParticleSet& P,

[...]

219:     for (int i = 0; i < nBlocks; ++i)

220:     {

221:       // in real simulation, phase needs to be applied. Here just fake computation

222:       const int first = i * nBlocks;

223:       for (int j = first; j < std::min((i + 1) * nSplinesPerBlock, OrbitalSetSize); j++)

224:       {

225:         psi_v[j]   = psi[i][j - first];

226:         dpsi_v[j]  = grad[i][j - first];

227:         d2psi_v[j] = hess[i].data(0)[j - first];

228:       }

229:     }

230:   }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 229

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223:     return X[i];

[...]

229:     return X[i];

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp: 53 - 66

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53:   if (x < 0)

54:   {

55:     ind = 0;

56:     dx  = T(0);

57:   }

58:   else

59:   {

60:     ind = static_cast<int>(x);

61:     dx = x - ind;

62:     // upper bound

63:     if (ind > nmax)

64:     {

65:       ind = nmax;

66:       dx  = T(1) - std::numeric_limits<T>::epsilon();

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 143 - 143

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143:     return (active_ptcl_ == iat) ? active_pos_ : R[iat];

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp: 68 - 79

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68:     a[0]   = ((A00 * tx + A01) * tx + A02) * tx + A03;

69:     a[1]   = ((A10 * tx + A11) * tx + A12) * tx + A13;

70:     a[2]   = ((A20 * tx + A21) * tx + A22) * tx + A23;

71:     a[3]   = ((A30 * tx + A31) * tx + A32) * tx + A33;

72:     da[0]  = (dA01 * tx + dA02) * tx + dA03;

73:     da[1]  = (dA11 * tx + dA12) * tx + dA13;

74:     da[2]  = (dA21 * tx + dA22) * tx + dA23;

75:     da[3]  = (dA31 * tx + dA32) * tx + dA33;

76:     d2a[0] = d2A02 * tx + d2A03;

77:     d2a[1] = d2A12 * tx + d2A13;

78:     d2a[2] = d2A22 * tx + d2A23;

79:     d2a[3] = d2A32 * tx + d2A33;

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_algobase.h: 238 - 952

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238:       if (__b < __a)

[...]

951:       for (; __first != __last; ++__first)

952: 	*__first = __tmp;

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h: 231 - 271

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231:   inline const AoSElement_t operator[](size_t i) const { return AoSElement_t(myData + i, nGhosts); }

[...]

265:   inline T* data() { return myData; }

[...]

271:   inline T* restrict data(size_t i) { return myData + i * nGhosts; }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h: 145 - 145

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145:       X[i] = base[i * offset];

0x451060 SUB	SP, SP, #672

0x451064 STP	X29, X30, [SP]

0x451068 ADD	X29, SP, #0

0x45106c STP	X19, X20, [SP, #16]

0x451070 ORR	X20, XZR, X0

0x451074 ORR	W19, WZR, W2

0x451078 STP	X21, X22, [SP, #32]

0x45107c ORR	X22, XZR, X4

0x451080 ORR	X21, XZR, X5

0x451084 STP	X23, X24, [SP, #48]

0x451088 ORR	X23, XZR, X3

0x45108c STP	X25, X26, [SP, #64]

0x451090 ORR	X25, XZR, X1

0x451094 STP	X27, X28, [SP, #80]

0x451098 LDR	X24, [X0, #856]

0x45109c ORR	X0, XZR, X24

0x4510a0 BL	4be880

0x4510a4 LDR	W0, [X25, #292]

0x4510a8 ADD	X3, X25, #296

0x4510ac CMP	W19, W0

0x4510b0 B.EQ	4510c0

0x4510b4 LDR	X2, [X25, #64]

0x4510b8 MOVZ	W1, #24

0x4510bc SMADDL	X3, W19, W1, X2

0x4510c0 ADD	X4, X20, #216

0x4510c4 LDP	D23, D31, [X3]

0x4510c8 MOVI	D27, #0

0x4510cc MOVZ	X5, #48304

0x4510d0 LDP	D29, D30, [X4, #24]

0x4510d4 FMOV	D28, X5

0x4510d8 LDR	D25, [X20, #216]

0x4510dc LDR	D26, [X3, #16]

0x4510e0 FMUL	D0, D31, D29

0x4510e4 LDP	D20, D4, [X4, #40]

0x4510e8 FMUL	D1, D31, D30

0x4510ec LDP	D19, D21, [X4, #8]

0x4510f0 LDP	D6, D22, [X4, #56]

0x4510f4 FMADD	D3, D23, D25, D0

0x4510f8 FMUL	D7, D31, D20

0x4510fc LDR	W9, [X20, #48]

0x451100 FMADD	D2, D23, D19, D1

0x451104 FMADD	D5, D26, D4, D3

0x451108 FRINTM	D24, D5

0x45110c FMADD	D23, D23, D21, D7

0x451110 FMADD	D16, D26, D6, D2

0x451114 FRINTM	D17, D16

0x451118 FMADD	D31, D26, D22, D23

0x45111c FRINTM	D0, D31

0x451120 FCMPE	D5, D27

0x451124 FSUB	D18, D5, S24

0x451128 FSUB	D30, D16, S17

0x45112c FCCMPE	D5, D28, #4, #4

0x451130 CSINC	W6, WZR, WZR, #13

0x451134 CMP	W6, #0

0x451138 FCSEL	D29, D18, D27, #0

0x45113c FCMPE	D16, D27

0x451140 STR	D29, [SP, #416]

0x451144 FCCMPE	D16, D28, #4, #4

0x451148 CSINC	W7, WZR, WZR, #13

0x45114c CMP	W7, #0

0x451150 FCSEL	D1, D30, D27, #0

0x451154 FCMPE	D31, D27

0x451158 FCCMPE	D31, D28, #4, #4

0x45115c FSUB	D28, D31, S0

0x451160 CSINC	W8, WZR, WZR, #13

0x451164 CMP	W8, #0

0x451168 FCSEL	D27, D28, D27, #0

0x45116c STP	D27, D1, [SP, #400]

0x451170 CMP	W9, #0

0x451174 B.LE	4519ec

0x451178 STP	D8, D9, [SP, #96]

0x45117c ORR	X10, XZR, #3840

0x451180 MOVZ	X12, #24

0x451184 STP	D10, D11, [SP, #112]

0x451188 MOVK	X10, #16325

0x45118c ORR	X11, XZR, #3840

0x451190 STP	D12, D13, [SP, #128]

0x451194 MOVK	X11, #16357

0x451198 STP	D14, D15, [SP, #144]

0x45119c LDR	X13, [X20, #784]

0x4511a0 FMOV	D1, X10

0x4511a4 LDR	X4, [X20, #760]

0x4511a8 ADD	X14, X4, W9,UXTW #3

0x4511ac STP	X24, X20, [SP, #440]

0x4511b0 STP	X12, X13, [SP, #192]

0x4511b4 STP	X23, X22, [SP, #456]

0x4511b8 LDR	W15, [X20, #64]

0x4511bc STR	X11, [SP, #208]

0x4511c0 LDR	X17, [X20, #808]

0x4511c4 STR	X14, [SP, #424]

0x4511c8 LDR	X20, [X20, #832]

0x4511cc SBFM	X16, X15, #61, #31

0x4511d0 SBFM	X18, X15, #0, #31

0x4511d4 STR	W15, [SP, #396]

0x4511d8 ORR	X2, XZR, X16

0x4511dc STR	X21, [SP, #472]

0x4511e0 STR	X17, [SP, #376]

0x4511e4 STR	X18, [SP, #432]

0x4511e8 STR	X20, [SP, #384]

    (999) 0x4511ec LDR	X10, [X4]

    (999) 0x4511f0 LDR	D11, [SP, #416]

    (999) 0x4511f4 LDR	D19, [SP, #400]

    (999) 0x4511f8 LDR	D9, [X10, #40]

    (999) 0x4511fc LDP	D22, D8, [X10, #72]

    (999) 0x451200 LDR	D10, [X10, #120]

    (999) 0x451204 FSUB	D12, D11, S9

    (999) 0x451208 LDR	D14, [SP, #408]

    (999) 0x45120c LDR	X23, [SP, #192]

    (999) 0x451210 LDR	X21, [SP, #200]

    (999) 0x451214 FSUB	D7, D19, S10

    (999) 0x451218 FMUL	D13, D12, D22

    (999) 0x45121c LDR	X22, [SP, #376]

    (999) 0x451220 FSUB	D15, D14, S8

    (999) 0x451224 LDR	X24, [SP, #384]

    (999) 0x451228 LDR	X28, [X21]

    (999) 0x45122c FCMPE	D13, #0

    (999) 0x451230 LDR	X21, [X22, X23]

    (999) 0x451234 LDR	X20, [X24, X23]

    (999) 0x451238 B.MI	451cb0

    (999) 0x45123c FCVTZS	W26, D13

    (999) 0x451240 LDR	W27, [X10, #56]

    (999) 0x451244 SUB	W8, W27, #1

    (999) 0x451248 CMP	W8, W26

    (999) 0x45124c B.LT	451d60

    (999) 0x451250 ORR	X30, XZR, #3840

    (999) 0x451254 FRINTZ	D2, D13

    (999) 0x451258 FSUB	D26, D13, S2

    (999) 0x45125c FMOV	D5, #0.5000000

    (999) 0x451260 LDR	D12, [SP, #208]

    (999) 0x451264 MOVK	X30, #49093

    (999) 0x451268 FMOV	D3, #-1.0000000

    (999) 0x45126c FMOV	D4, #1.5000000

    (999) 0x451270 ORR	W8, WZR, W26

    (999) 0x451274 FMOV	D20, #-2.0000000

    (999) 0x451278 FMOV	D16, #1.0000000

    (999) 0x45127c FMOV	D21, X30

    (999) 0x451280 FMOV	D6, #-0.5000000

    (999) 0x451284 FMOV	D24, #3.0000000

    (999) 0x451288 FSUB	D25, D2, S13

    (999) 0x45128c FMADD	D17, D26, D5, D3

    (999) 0x451290 FMSUB	D23, D26, D5, D5

    (999) 0x451294 FMADD	D18, D26, D4, D20

    (999) 0x451298 FMSUB	D31, D26, D4, D16

    (999) 0x45129c FMUL	D0, D26, D26

    (999) 0x4512a0 FMADD	D27, D26, D24, D20

    (999) 0x4512a4 FMADD	D29, D26, D23, D5

    (999) 0x4512a8 FMUL	D30, D26, D21

    (999) 0x4512ac FMADD	D28, D26, D31, D5

    (999) 0x4512b0 FMSUB	D23, D26, D24, D16

    (999) 0x4512b4 FADD	D4, D25, D16

    (999) 0x4512b8 FMUL	D19, D0, D5

    (999) 0x4512bc FMUL	D8, D26, D17

    (999) 0x4512c0 FMADD	D3, D26, D29, D1

    (999) 0x4512c4 FMUL	D10, D26, D18

    (999) 0x4512c8 FADD	D9, D30, D5

    (999) 0x4512cc FNMUL	D21, D30, D0

    (999) 0x4512d0 STR	D27, [SP, #216]

    (999) 0x4512d4 FMADD	D2, D26, D8, D12

    (999) 0x4512d8 FADD	D13, D8, D5

    (999) 0x4512dc STR	D28, [SP, #184]

    (999) 0x4512e0 STR	D10, [SP, #176]

    (999) 0x4512e4 FMADD	D11, D26, D9, D6

    (999) 0x4512e8 FNEG	D5, D13

    (999) 0x4512ec FMADD	D6, D26, D11, D1

    (999) 0x4512f0 LDR	D25, [X10, #112]

    (999) 0x4512f4 FMUL	D15, D15, D25

    (999) 0x4512f8 FCMPE	D15, #0

    (999) 0x4512fc B.MI	451c78

    (999) 0x451300 LDR	W12, [X10, #96]

    (999) 0x451304 FCVTZS	W11, D15

    (999) 0x451308 SUB	W7, W12, #1

    (999) 0x45130c CMP	W7, W11

    (999) 0x451310 B.LT	451cec

    (999) 0x451314 ORR	X13, XZR, #3840

    (999) 0x451318 FRINTZ	D17, D15

    (999) 0x45131c FSUB	D28, D15, S17

    (999) 0x451320 FMOV	D0, #0.5000000

    (999) 0x451324 ORR	W7, WZR, W11

    (999) 0x451328 MOVK	X13, #49093

    (999) 0x45132c FMOV	D31, #-1.0000000

    (999) 0x451330 FSUB	D30, D17, S15

    (999) 0x451334 FMOV	D16, #1.5000000

    (999) 0x451338 FMOV	D29, #-2.0000000

    (999) 0x45133c FMOV	D18, X13

    (999) 0x451340 FMOV	D24, #1.0000000

    (999) 0x451344 FMOV	D9, #3.0000000

    (999) 0x451348 FMOV	D8, #-0.5000000

    (999) 0x45134c FMADD	D10, D28, D0, D31

    (999) 0x451350 FMADD	D15, D28, D16, D29

    (999) 0x451354 FADD	D14, D30, D24

    (999) 0x451358 FMSUB	D27, D28, D0, D0

    (999) 0x45135c FMADD	D30, D28, D9, D29

    (999) 0x451360 FMUL	D11, D28, D28

    (999) 0x451364 FMSUB	D12, D28, D16, D24

    (999) 0x451368 FMSUB	D24, D28, D9, D24

    (999) 0x45136c FMUL	D17, D28, D18

    (999) 0x451370 FMADD	D20, D28, D27, D0

    (999) 0x451374 STR	D14, [SP, #264]

    (999) 0x451378 FMADD	D13, D28, D12, D0

    (999) 0x45137c FMUL	D31, D28, D10

    (999) 0x451380 LDR	D10, [SP, #208]

    (999) 0x451384 FMUL	D9, D28, D15

    (999) 0x451388 FMADD	D16, D28, D20, D1

    (999) 0x45138c FMUL	D20, D11, D0

    (999) 0x451390 FADD	D29, D17, D0

    (999) 0x451394 FNMUL	D18, D17, D11

    (999) 0x451398 FMADD	D27, D28, D31, D10

    (999) 0x45139c FADD	D0, D31, D0

    (999) 0x4513a0 FMADD	D8, D28, D29, D8

    (999) 0x4513a4 STR	D18, [SP, #240]

    (999) 0x4513a8 STP	D9, D13, [SP, #248]

    (999) 0x4513ac STR	D16, [SP, #232]

    (999) 0x4513b0 FNEG	D29, D0

    (999) 0x4513b4 FMADD	D11, D28, D8, D1

    (999) 0x4513b8 STR	D27, [SP, #224]

    (999) 0x4513bc STR	D11, [SP, #168]

    (999) 0x4513c0 LDR	D31, [X10, #152]

    (999) 0x4513c4 FMUL	D7, D7, D31

    (999) 0x4513c8 FCMPE	D7, #0

    (999) 0x4513cc B.MI	451c40

    (999) 0x4513d0 LDR	W30, [X10, #136]

    (999) 0x4513d4 FCVTZS	W27, D7

    (999) 0x4513d8 SUB	W25, W30, #1

    (999) 0x4513dc CMP	W25, W27

    (999) 0x4513e0 B.LT	451dc8

    (999) 0x4513e4 ORR	X19, XZR, #3840

    (999) 0x4513e8 FRINTZ	D16, D7

    (999) 0x4513ec FSUB	D15, D7, S16

    (999) 0x4513f0 FMOV	D12, #0.5000000

    (999) 0x4513f4 SBFM	X9, X27, #0, #31

    (999) 0x4513f8 MOVK	X19, #49093

    (999) 0x4513fc FMOV	D18, #1.5000000

    (999) 0x451400 FMOV	D14, #1.0000000

    (999) 0x451404 FMOV	D8, #-1.0000000

    (999) 0x451408 FMOV	D10, #-2.0000000

    (999) 0x45140c FMOV	D9, X19

    (999) 0x451410 FSUB	D16, D16, S7

    (999) 0x451414 FMOV	D13, #3.0000000

    (999) 0x451418 FMOV	D0, #-0.5000000

    (999) 0x45141c FMADD	D7, D15, D12, D8

    (999) 0x451420 FMADD	D27, D15, D18, D10

    (999) 0x451424 FMSUB	D8, D15, D18, D14

    (999) 0x451428 FMUL	D17, D15, D15

    (999) 0x45142c FMSUB	D11, D15, D12, D12

    (999) 0x451430 FMADD	D10, D15, D13, D10

    (999) 0x451434 FADD	D16, D16, D14

    (999) 0x451438 FMUL	D18, D15, D9

    (999) 0x45143c FMADD	D8, D15, D8, D12

    (999) 0x451440 FMADD	D9, D15, D11, D12

    (999) 0x451444 FMUL	D11, D17, D12

    (999) 0x451448 FMSUB	D14, D15, D13, D14

    (999) 0x45144c FMUL	D13, D15, D7

    (999) 0x451450 FADD	D12, D18, D12

    (999) 0x451454 FNMUL	D18, D18, D17

    (999) 0x451458 FMUL	D17, D15, D27

    (999) 0x45145c LDR	D27, [SP, #208]

    (999) 0x451460 FMADD	D9, D15, D9, D1

    (999) 0x451464 FMADD	D7, D15, D12, D0

    (999) 0x451468 FMADD	D12, D15, D7, D1

    (999) 0x45146c FMADD	D7, D15, D13, D27

    (999) 0x451470 FSUB	D13, D0, S13

    (999) 0x451474 LDR	D0, [SP, #224]

    (999) 0x451478 ADD	X16, SP, #624

    (999) 0x45147c STR	D21, [SP, #504]

    (999) 0x451480 LDRSW	X15, [X10, #232]

    (999) 0x451484 STR	D19, [SP, #568]

    (999) 0x451488 LDR	X5, [X10, #32]

    (999) 0x45148c STP	D2, D3, [SP, #488]

    (999) 0x451490 STR	D0, [SP, #520]

    (999) 0x451494 STR	D20, [SP, #600]

    (999) 0x451498 ADD	X22, X20, X15,LSL #4

    (999) 0x45149c UBFM	X3, X15, #61, #60

    (999) 0x4514a0 STP	D23, D26, [X16]

    (999) 0x4514a4 ADD	X25, X21, X15,LSL #3

    (999) 0x4514a8 STP	D30, D24, [X16, #24]

    (999) 0x4514ac ADD	X23, X22, X15,LSL #4

    (999) 0x4514b0 LDR	D19, [SP, #176]

    (999) 0x4514b4 ADD	X24, X22, X15,LSL #3

    (999) 0x4514b8 STR	D28, [SP, #664]

    (999) 0x4514bc ADD	X27, X23, X15,LSL #3

    (999) 0x4514c0 LDR	D26, [SP, #184]

    (999) 0x4514c4 ADD	X26, X21, X15,LSL #4

    (999) 0x4514c8 ADD	X19, X20, X15,LSL #3

    (999) 0x4514cc LDR	D24, [SP, #216]

    (999) 0x4514d0 LDR	D21, [SP, #232]

    (999) 0x4514d4 STR	D19, [SP, #552]

    (999) 0x4514d8 LDR	D23, [SP, #240]

    (999) 0x4514dc STR	D26, [SP, #560]

    (999) 0x4514e0 LDR	D2, [SP, #248]

    (999) 0x4514e4 STR	D24, [SP, #616]

    (999) 0x4514e8 LDR	D3, [SP, #256]

    (999) 0x4514ec STR	D21, [SP, #528]

    (999) 0x4514f0 STR	D23, [SP, #536]

    (999) 0x4514f4 STR	D2, [SP, #584]

    (999) 0x4514f8 STR	D3, [SP, #592]

    (999) 0x4514fc LDP	X6, X18, [X10, #16]

    (999) 0x451500 CBZ	X2, 451628

    (999) 0x451504 MOVZ	W1, #0

    (999) 0x451508 ORR	X0, XZR, X28

    (999) 0x45150c STP	X2, X10, [SP, #176]

    (999) 0x451510 STR	D22, [SP, #216]

    (999) 0x451514 STR	W8, [SP, #224]

    (999) 0x451518 STR	D25, [SP, #232]

    (999) 0x45151c STR	W7, [SP, #240]

    (999) 0x451520 STR	D31, [SP, #248]

    (999) 0x451524 STR	X6, [SP, #256]

    (999) 0x451528 STP	X18, X5, [SP, #272]

    (999) 0x45152c STR	X3, [SP, #288]

    (999) 0x451530 STR	D29, [SP, #296]

    (999) 0x451534 STR	X9, [SP, #304]

    (999) 0x451538 STP	D7, D18, [SP, #312]

    (999) 0x45153c STP	D17, D16, [SP, #328]

    (999) 0x451540 STP	D4, D5, [SP, #344]

    (999) 0x451544 STR	D6, [SP, #360]

    (999) 0x451548 STR	X4, [SP, #368]

    (999) 0x45154c BL	403e90

    (999) 0x451550 LDR	X2, [SP, #176]

    (999) 0x451554 MOVZ	W1, #0

    (999) 0x451558 ORR	X0, XZR, X21

    (999) 0x45155c BL	403e90

    (999) 0x451560 LDR	X2, [SP, #176]

    (999) 0x451564 MOVZ	W1, #0

    (999) 0x451568 ORR	X0, XZR, X25

    (999) 0x45156c BL	403e90

    (999) 0x451570 LDR	X2, [SP, #176]

    (999) 0x451574 MOVZ	W1, #0

    (999) 0x451578 ORR	X0, XZR, X26

    (999) 0x45157c BL	403e90

    (999) 0x451580 LDR	X2, [SP, #176]

    (999) 0x451584 MOVZ	W1, #0

    (999) 0x451588 ORR	X0, XZR, X20

    (999) 0x45158c BL	403e90

    (999) 0x451590 LDR	X2, [SP, #176]

    (999) 0x451594 MOVZ	W1, #0

    (999) 0x451598 ORR	X0, XZR, X19

    (999) 0x45159c BL	403e90

    (999) 0x4515a0 LDR	X2, [SP, #176]

    (999) 0x4515a4 MOVZ	W1, #0

    (999) 0x4515a8 ORR	X0, XZR, X22

    (999) 0x4515ac BL	403e90

    (999) 0x4515b0 LDR	X2, [SP, #176]

    (999) 0x4515b4 MOVZ	W1, #0

    (999) 0x4515b8 ORR	X0, XZR, X24

    (999) 0x4515bc BL	403e90

    (999) 0x4515c0 LDR	X2, [SP, #176]

    (999) 0x4515c4 MOVZ	W1, #0

    (999) 0x4515c8 ORR	X0, XZR, X23

    (999) 0x4515cc BL	403e90

    (999) 0x4515d0 LDR	X2, [SP, #176]

    (999) 0x4515d4 ORR	X0, XZR, X27

    (999) 0x4515d8 MOVZ	W1, #0

    (999) 0x4515dc BL	403e90

    (999) 0x4515e0 LDR	D22, [SP, #216]

    (999) 0x4515e4 ADRP	X2,

    (999) 0x4515e8 LDP	X18, X5, [SP, #272]

    (999) 0x4515ec LDR	D25, [SP, #232]

    (999) 0x4515f0 LDR	D31, [SP, #248]

    (999) 0x4515f4 LDR	D29, [SP, #296]

    (999) 0x4515f8 LDR	D6, [SP, #360]

    (999) 0x4515fc LDP	D7, D18, [SP, #312]

    (999) 0x451600 LDP	D17, D16, [SP, #328]

    (999) 0x451604 LDP	D4, D5, [SP, #344]

    (999) 0x451608 LDR	X6, [SP, #256]

    (999) 0x45160c LDR	X3, [SP, #288]

    (999) 0x451610 LDR	X9, [SP, #304]

    (999) 0x451614 LDR	X4, [SP, #368]

    (999) 0x451618 LDR	D1, [X2, #3912]

    (999) 0x45161c LDP	X2, X10, [SP, #176]

    (999) 0x451620 LDR	W8, [SP, #224]

    (999) 0x451624 LDR	W7, [SP, #240]

    (999) 0x451628 MADD	X17, X5, X9, XZR

    (999) 0x45162c LDR	W30, [SP, #396]

    (999) 0x451630 LDR	X11, [X10, #8]

    (999) 0x451634 CMP	W30, #0

    (999) 0x451638 B.LE	451e38

    (999) 0x45163c SBFM	X0, X7, #0, #31

    (999) 0x451640 SBFM	X1, X8, #0, #31

    (999) 0x451644 ADD	X12, X5, X5,LSL #1

    (999) 0x451648 STR	D29, [SP, #176]

    (999) 0x45164c LDR	D29, [SP, #264]

    (999) 0x451650 SUB	X10, XZR, X5,LSL #3

    (999) 0x451654 UBFM	X7, X18, #61, #60

    (999) 0x451658 MOVZ	X9, #0

    (999) 0x45165c MADD	X16, X0, X18, XZR

    (999) 0x451660 ADD	X15, SP, #512

    (999) 0x451664 ADD	X14, SP, #576

    (999) 0x451668 STR	X6, [SP, #184]

    (999) 0x45166c MADD	X8, X1, X6, X17

    (999) 0x451670 ADD	X13, SP, #640

    (999) 0x451674 ADD	X18, SP, #608

    (999) 0x451678 STP	D22, D25, [SP, #216]

    (999) 0x45167c ADD	X30, SP, #544

    (999) 0x451680 STR	D31, [SP, #232]

    (999) 0x451684 ADD	X17, X16, X5,LSL #1

    (999) 0x451688 ADD	X0, X12, X16

    (999) 0x45168c ADD	X5, X5, X16

    (999) 0x451690 STP	X3, X4, [SP, #240]

    (999) 0x451694 ADD	X12, X11, X5,LSL #3

    (999) 0x451698 ADD	X17, X11, X17,LSL #3

    (999) 0x45169c ADD	X16, X11, X0,LSL #3

      (1003) 0x4516a0 LDP	D31, D22, [SP, #168]

      (1003) 0x4516a4 FMOV	D25, D29

      (1003) 0x4516a8 ADD	X0, X12, X8,LSL #3

      (1003) 0x4516ac MOVZ	X4, #0

      (1003) 0x4516b0 ADD	X3, X17, X8,LSL #3

      (1003) 0x4516b4 ADD	X1, X16, X8,LSL #3

        (1004) 0x4516b8 FMUL	D19, D5, D22

        (1004) 0x4516bc FMUL	D20, D6, D25

        (1004) 0x4516c0 ADD	X6, X10, X0

        (1004) 0x4516c4 MOVZ	X11, #0

        (1004) 0x4516c8 FMUL	D3, D4, D31

        (1004) 0x4516cc FMUL	D21, D5, D31

        (1004) 0x4516d0 FMUL	D23, D6, D31

        (1004) 0x4516d4 FMUL	D22, D6, D22

        (1004) 0x4516d8 HINT	#0

        (1004) 0x4516dc HINT	#0

          (1002) 0x4516e0 LDR	D27, [X0, X11]

          (1002) 0x4516e4 LDR	D30, [X1, X11]

          (1002) 0x4516e8 LDR	D0, [X6, X11]

          (1002) 0x4516ec LDR	D26, [X3, X11]

          (1002) 0x4516f0 FMUL	D31, D27, D7

          (1002) 0x4516f4 FMUL	D28, D27, D17

          (1002) 0x4516f8 FMUL	D27, D27, D10

          (1002) 0x4516fc FMUL	D2, D30, D18

          (1002) 0x451700 LDR	D25, [X20, X11]

          (1002) 0x451704 FMUL	D24, D30, D11

          (1002) 0x451708 FMUL	D30, D30, D15

          (1002) 0x45170c FMADD	D31, D0, D12, D31

          (1002) 0x451710 FMADD	D28, D0, D13, D28

          (1002) 0x451714 FMADD	D27, D0, D16, D27

          (1002) 0x451718 LDR	D0, [X21, X11]

          (1002) 0x45171c FMADD	D2, D26, D9, D2

          (1002) 0x451720 FMADD	D24, D26, D8, D24

          (1002) 0x451724 FMADD	D30, D26, D14, D30

          (1002) 0x451728 LDR	D26, [X28, X11]

          (1002) 0x45172c FADD	D31, D31, D2

          (1002) 0x451730 FADD	D28, D28, D24

          (1002) 0x451734 FADD	D2, D27, D30

          (1002) 0x451738 FMADD	D25, D3, D31, D25

          (1002) 0x45173c FMADD	D24, D21, D31, D0

          (1002) 0x451740 FMADD	D30, D23, D31, D26

          (1002) 0x451744 STR	D25, [X20, X11]

          (1002) 0x451748 LDR	D27, [X19, X11]

          (1002) 0x45174c STR	D24, [X21, X11]

          (1002) 0x451750 LDR	D0, [X25, X11]

          (1002) 0x451754 STR	D30, [X28, X11]

          (1002) 0x451758 FMADD	D26, D19, D31, D27

          (1002) 0x45175c FMADD	D25, D22, D31, D0

          (1002) 0x451760 STR	D26, [X19, X11]

          (1002) 0x451764 LDR	D24, [X22, X11]

          (1002) 0x451768 STR	D25, [X25, X11]

          (1002) 0x45176c LDR	D30, [X26, X11]

          (1002) 0x451770 FMADD	D27, D21, D28, D24

          (1002) 0x451774 FMADD	D0, D23, D28, D30

          (1002) 0x451778 STR	D27, [X22, X11]

          (1002) 0x45177c LDR	D26, [X24, X11]

          (1002) 0x451780 STR	D0, [X26, X11]

          (1002) 0x451784 FMADD	D31, D20, D31, D26

          (1002) 0x451788 STR	D31, [X24, X11]

          (1002) 0x45178c LDR	D25, [X23, X11]

          (1002) 0x451790 FMADD	D28, D22, D28, D25

          (1002) 0x451794 STR	D28, [X23, X11]

          (1002) 0x451798 LDR	D24, [X27, X11]

          (1002) 0x45179c FMADD	D2, D23, D2, D24

          (1002) 0x4517a0 STR	D2, [X27, X11]

          (1002) 0x4517a4 ADD	X11, X11, #8

          (1002) 0x4517a8 CMP	X2, X11

          (1002) 0x4517ac B.NE	4516e0

        (1004) 0x4517b0 CMP	X4, #24

        (1004) 0x4517b4 B.EQ	4517e4

        (1004) 0x4517b8 ADD	X11, X4, X15

        (1004) 0x4517bc ADD	X6, X4, X14

        (1004) 0x4517c0 ADD	X5, X4, X13

        (1004) 0x4517c4 ADD	X0, X0, X7

        (1004) 0x4517c8 LDR	D22, [X6, #8]

        (1004) 0x4517cc ADD	X3, X3, X7

        (1004) 0x4517d0 ADD	X1, X1, X7

        (1004) 0x4517d4 ADD	X4, X4, #8

        (1004) 0x4517d8 LDR	D25, [X5, #8]

        (1004) 0x4517dc LDR	D31, [X11, #8]

        (1004) 0x4517e0 B	4516b8

      (1003) 0x4517e4 CMP	X9, #24

      (1003) 0x4517e8 B.EQ	451818

      (1003) 0x4517ec LDR	X3, [SP, #184]

      (1003) 0x4517f0 ADD	X0, SP, #0

      (1003) 0x4517f4 ADD	X11, X9, X18

      (1003) 0x4517f8 ADD	X1, X9, X30

      (1003) 0x4517fc ADD	X5, X9, X0

      (1003) 0x451800 LDR	D4, [X11, #8]

      (1003) 0x451804 ADD	X9, X9, #8

      (1003) 0x451808 LDR	D5, [X1, #8]

      (1003) 0x45180c ADD	X8, X8, X3

      (1003) 0x451810 LDR	D6, [X5, #488]

      (1003) 0x451814 B	4516a0

    (999) 0x451818 LDR	D31, [SP, #232]

    (999) 0x45181c LDP	X3, X4, [SP, #240]

    (999) 0x451820 LDP	D22, D25, [SP, #216]

    (999) 0x451824 FMUL	D5, D22, D22

    (999) 0x451828 FMUL	D4, D25, D25

    (999) 0x45182c MOVZ	X8, #0

    (999) 0x451830 FMUL	D6, D31, D31

    (999) 0x451834 FMUL	D20, D22, D25

    (999) 0x451838 FMUL	D3, D22, D31

    (999) 0x45183c FMUL	D21, D25, D31

    (999) 0x451840 TBZ	W2, #3, 4518c0

    (999) 0x451844 LDR	D23, [X20]

    (999) 0x451848 MOVZ	X8, #8

    (999) 0x45184c LDR	D30, [X21]

    (999) 0x451850 FMUL	D19, D23, D5

    (999) 0x451854 FMUL	D27, D30, D22

    (999) 0x451858 STR	D19, [X20]

    (999) 0x45185c LDR	D0, [X22, X3]

    (999) 0x451860 STR	D27, [X21]

    (999) 0x451864 LDR	D12, [X21, X3]

    (999) 0x451868 FMUL	D26, D0, D4

    (999) 0x45186c FMUL	D13, D12, D25

    (999) 0x451870 STR	D26, [X22, X3]

    (999) 0x451874 LDR	D28, [X23, X3]

    (999) 0x451878 STR	D13, [X21, X3]

    (999) 0x45187c LDR	D14, [X25, X3]

    (999) 0x451880 FMUL	D24, D28, D6

    (999) 0x451884 FMUL	D15, D14, D31

    (999) 0x451888 STR	D24, [X23, X3]

    (999) 0x45188c LDR	D2, [X20, X3]

    (999) 0x451890 STR	D15, [X25, X3]

    (999) 0x451894 FMUL	D7, D2, D20

    (999) 0x451898 STR	D7, [X20, X3]

    (999) 0x45189c LDR	D8, [X19, X3]

    (999) 0x4518a0 FMUL	D9, D8, D3

    (999) 0x4518a4 STR	D9, [X19, X3]

    (999) 0x4518a8 LDR	D10, [X24, X3]

    (999) 0x4518ac FMUL	D11, D10, D21

    (999) 0x4518b0 STR	D11, [X24, X3]

    (999) 0x4518b4 CMP	X2, X8

    (999) 0x4518b8 B.EQ	4519a8

    (999) 0x4518bc HINT	#0

      (1001) 0x4518c0 LDR	D16, [X20, X8]

      (1001) 0x4518c4 ADD	X9, X8, #8

      (1001) 0x4518c8 LDR	D17, [X21, X8]

      (1001) 0x4518cc FMUL	D18, D16, D5

      (1001) 0x4518d0 FMUL	D29, D17, D22

      (1001) 0x4518d4 STR	D18, [X20, X8]

      (1001) 0x4518d8 LDR	D23, [X24, X8]

      (1001) 0x4518dc STR	D29, [X21, X8]

      (1001) 0x4518e0 LDR	D19, [X25, X8]

      (1001) 0x4518e4 FMUL	D30, D23, D4

      (1001) 0x4518e8 FMUL	D27, D19, D25

      (1001) 0x4518ec STR	D30, [X24, X8]

      (1001) 0x4518f0 LDR	D0, [X27, X8]

      (1001) 0x4518f4 STR	D27, [X25, X8]

      (1001) 0x4518f8 LDR	D26, [X26, X8]

      (1001) 0x4518fc FMUL	D28, D0, D6

      (1001) 0x451900 FMUL	D24, D26, D31

      (1001) 0x451904 STR	D28, [X27, X8]

      (1001) 0x451908 LDR	D2, [X19, X8]

      (1001) 0x45190c STR	D24, [X26, X8]

      (1001) 0x451910 LDR	D7, [X21, X9]

      (1001) 0x451914 FMUL	D8, D2, D20

      (1001) 0x451918 FMUL	D9, D7, D22

      (1001) 0x45191c STR	D8, [X19, X8]

      (1001) 0x451920 LDR	D10, [X22, X8]

      (1001) 0x451924 STR	D9, [X21, X9]

      (1001) 0x451928 LDR	D11, [X25, X9]

      (1001) 0x45192c FMUL	D12, D10, D3

      (1001) 0x451930 FMUL	D13, D11, D25

      (1001) 0x451934 STR	D12, [X22, X8]

      (1001) 0x451938 LDR	D14, [X23, X8]

      (1001) 0x45193c STR	D13, [X25, X9]

      (1001) 0x451940 LDR	D15, [X26, X9]

      (1001) 0x451944 FMUL	D16, D14, D21

      (1001) 0x451948 FMUL	D17, D15, D31

      (1001) 0x45194c STR	D16, [X23, X8]

      (1001) 0x451950 ADD	X8, X9, #8

      (1001) 0x451954 LDR	D18, [X20, X9]

      (1001) 0x451958 STR	D17, [X26, X9]

      (1001) 0x45195c FMUL	D29, D18, D5

      (1001) 0x451960 STR	D29, [X20, X9]

      (1001) 0x451964 LDR	D23, [X24, X9]

      (1001) 0x451968 FMUL	D19, D23, D4

      (1001) 0x45196c STR	D19, [X24, X9]

      (1001) 0x451970 LDR	D30, [X27, X9]

      (1001) 0x451974 FMUL	D27, D30, D6

      (1001) 0x451978 STR	D27, [X27, X9]

      (1001) 0x45197c LDR	D0, [X19, X9]

      (1001) 0x451980 FMUL	D26, D0, D20

      (1001) 0x451984 STR	D26, [X19, X9]

      (1001) 0x451988 LDR	D28, [X22, X9]

      (1001) 0x45198c FMUL	D24, D28, D3

      (1001) 0x451990 STR	D24, [X22, X9]

      (1001) 0x451994 LDR	D2, [X23, X9]

      (1001) 0x451998 FMUL	D7, D2, D21

      (1001) 0x45199c STR	D7, [X23, X9]

      (1001) 0x4519a0 CMP	X2, X8

      (1001) 0x4519a4 B.NE	4518c0

    (999) 0x4519a8 LDR	X1, [SP, #192]

    (999) 0x4519ac ADD	X4, X4, #8

    (999) 0x4519b0 LDR	X5, [SP, #200]

    (999) 0x4519b4 LDR	X11, [SP, #424]

    (999) 0x4519b8 ADD	X6, X1, #40

    (999) 0x4519bc ADD	X0, X5, #24

    (999) 0x4519c0 STR	X6, [SP, #192]

    (999) 0x4519c4 STR	X0, [SP, #200]

    (999) 0x4519c8 CMP	X11, X4

    (999) 0x4519cc B.NE	4511ec

(1000) 0x4519d0 LDP	D8, D9, [SP, #96]

(1000) 0x4519d4 LDP	X24, X20, [SP, #440]

(1000) 0x4519d8 LDP	X23, X22, [SP, #456]

(1000) 0x4519dc LDP	D10, D11, [SP, #112]

(1000) 0x4519e0 LDP	D12, D13, [SP, #128]

(1000) 0x4519e4 LDP	D14, D15, [SP, #144]

(1000) 0x4519e8 LDR	X21, [SP, #472]

(1000) 0x4519ec ORR	X0, XZR, X24

(1000) 0x4519f0 BL	4beb20

(1000) 0x4519f4 LDR	W24, [X20, #48]

(1000) 0x4519f8 CMP	W24, #0

(1000) 0x4519fc B.LE	451c20

(1000) 0x451a00 LDR	W27, [X20, #64]

(1000) 0x451a04 MOVZ	W7, #24

(1000) 0x451a08 MOVZ	X2, #0

(1000) 0x451a0c MOVZ	X17, #0

(1000) 0x451a10 MOVZ	X16, #0

(1000) 0x451a14 LDR	W19, [X20, #8]

(1000) 0x451a18 UMADDL	X18, W24, W7, XZR

(1000) 0x451a1c UBFM	X28, X24, #61, #31

(1000) 0x451a20 MOVZ	X15, #0

(1000) 0x451a24 MOVZ	W14, #0

(1000) 0x451a28 STR	X2, [SP, #168]

(1000) 0x451a2c ORR	W4, WZR, W27

  (1005) 0x451a30 CMP	W4, W19

  (1005) 0x451a34 CSEL	W10, W4, W19, #13

  (1005) 0x451a38 CMP	W14, W10

  (1005) 0x451a3c B.GE	451bf8

  (1005) 0x451a40 LDR	X13, [X20, #808]

  (1005) 0x451a44 SUB	W25, W10, W14

  (1005) 0x451a48 MOVZ	X0, #0

  (1005) 0x451a4c ANDS	X26, X25, #4160

  (1005) 0x451a50 LDR	X30, [X20, #832]

  (1005) 0x451a54 LDR	X5, [X22, #24]

  (1005) 0x451a58 ADD	X3, X13, X16

  (1005) 0x451a5c LDR	X8, [X3, #24]

  (1005) 0x451a60 ADD	X9, X30, X16

  (1005) 0x451a64 LDR	X6, [X23, #24]

  (1005) 0x451a68 ADD	X1, X5, X17

  (1005) 0x451a6c LDR	X11, [SP, #168]

  (1005) 0x451a70 LDR	X12, [X20, #784]

  (1005) 0x451a74 LDRSW	X7, [X3, #8]

  (1005) 0x451a78 ADD	X13, X6, X11

  (1005) 0x451a7c LDR	X3, [X21, #24]

  (1005) 0x451a80 LDR	X10, [X12, X15]

  (1005) 0x451a84 UBFM	X30, X7, #61, #60

  (1005) 0x451a88 ADD	X12, X8, X7,LSL #3

  (1005) 0x451a8c UBFM	X2, X7, #60, #59

  (1005) 0x451a90 LDR	X9, [X9, #24]

  (1005) 0x451a94 ADD	X7, X8, X7,LSL #4

  (1005) 0x451a98 ADD	X11, X3, X11

  (1005) 0x451a9c B.EQ	451b40

  (1005) 0x451aa0 CMP	X26, #1

  (1005) 0x451aa4 B.EQ	451b0c

  (1005) 0x451aa8 CMP	X26, #2

  (1005) 0x451aac B.EQ	451ae0

  (1005) 0x451ab0 LDR	D1, [X10]

  (1005) 0x451ab4 MOVZ	X0, #1

  (1005) 0x451ab8 ADD	X1, X1, #24

  (1005) 0x451abc LDR	X26, [SP, #168]

  (1005) 0x451ac0 STR	D1, [X6, X26]

  (1005) 0x451ac4 LDR	D31, [X8]

  (1005) 0x451ac8 LDR	D22, [X8, X30]

  (1005) 0x451acc LDR	D25, [X8, X2]

  (1005) 0x451ad0 STR	D31, [X5, X17]

  (1005) 0x451ad4 STP	D22, D25, [X1, #1008]

  (1005) 0x451ad8 LDR	D5, [X9]

  (1005) 0x451adc STR	D5, [X3, X26]

  (1005) 0x451ae0 LDR	D4, [X10, X0,LSL #3]

  (1005) 0x451ae4 ADD	X1, X1, #24

  (1005) 0x451ae8 STR	D4, [X13, X0,LSL #3]

  (1005) 0x451aec LDR	D6, [X8, X0,LSL #3]

  (1005) 0x451af0 LDR	D20, [X12, X0,LSL #3]

  (1005) 0x451af4 LDR	D3, [X7, X0,LSL #3]

  (1005) 0x451af8 STP	D6, D20, [X1, #1000]

  (1005) 0x451afc STUR	D3, [X1, #504]

  (1005) 0x451b00 LDR	D21, [X9, X0,LSL #3]

  (1005) 0x451b04 STR	D21, [X11, X0,LSL #3]

  (1005) 0x451b08 ADD	X0, X0, #1

  (1005) 0x451b0c LDR	D16, [X10, X0,LSL #3]

  (1005) 0x451b10 ADD	X1, X1, #24

  (1005) 0x451b14 STR	D16, [X13, X0,LSL #3]

  (1005) 0x451b18 LDR	D17, [X8, X0,LSL #3]

  (1005) 0x451b1c LDR	D18, [X12, X0,LSL #3]

  (1005) 0x451b20 LDR	D29, [X7, X0,LSL #3]

  (1005) 0x451b24 STP	D17, D18, [X1, #1000]

  (1005) 0x451b28 STUR	D29, [X1, #504]

  (1005) 0x451b2c LDR	D23, [X9, X0,LSL #3]

  (1005) 0x451b30 STR	D23, [X11, X0,LSL #3]

  (1005) 0x451b34 ADD	X0, X0, #1

  (1005) 0x451b38 CMP	X25, X0

  (1005) 0x451b3c B.EQ	451bf8

    (1006) 0x451b40 LDR	D19, [X10, X0,LSL #3]

    (1006) 0x451b44 ADD	X2, X0, #1

    (1006) 0x451b48 ADD	X30, X1, #24

    (1006) 0x451b4c ADD	X5, X0, #2

    (1006) 0x451b50 ADD	X26, X1, #48

    (1006) 0x451b54 ADD	X3, X0, #3

    (1006) 0x451b58 ADD	X6, X1, #72

    (1006) 0x451b5c ADD	X1, X1, #96

    (1006) 0x451b60 STR	D19, [X13, X0,LSL #3]

    (1006) 0x451b64 LDR	D30, [X8, X0,LSL #3]

    (1006) 0x451b68 LDR	D27, [X12, X0,LSL #3]

    (1006) 0x451b6c LDR	D0, [X7, X0,LSL #3]

    (1006) 0x451b70 STP	D30, D27, [X1, #928]

    (1006) 0x451b74 STUR	D0, [X1, #432]

    (1006) 0x451b78 LDR	D26, [X9, X0,LSL #3]

    (1006) 0x451b7c STR	D26, [X11, X0,LSL #3]

    (1006) 0x451b80 ADD	X0, X0, #4

    (1006) 0x451b84 LDR	D28, [X10, X2,LSL #3]

    (1006) 0x451b88 STR	D28, [X13, X2,LSL #3]

    (1006) 0x451b8c LDR	D7, [X8, X2,LSL #3]

    (1006) 0x451b90 LDR	D24, [X12, X2,LSL #3]

    (1006) 0x451b94 LDR	D2, [X7, X2,LSL #3]

    (1006) 0x451b98 STUR	D7, [X1, #440]

    (1006) 0x451b9c STP	D24, D2, [X30, #8]

    (1006) 0x451ba0 LDR	D1, [X9, X2,LSL #3]

    (1006) 0x451ba4 STR	D1, [X11, X2,LSL #3]

    (1006) 0x451ba8 LDR	D22, [X10, X5,LSL #3]

    (1006) 0x451bac STR	D22, [X13, X5,LSL #3]

    (1006) 0x451bb0 LDR	D5, [X8, X5,LSL #3]

    (1006) 0x451bb4 LDR	D25, [X12, X5,LSL #3]

    (1006) 0x451bb8 LDR	D31, [X7, X5,LSL #3]

    (1006) 0x451bbc STUR	D5, [X1, #464]

    (1006) 0x451bc0 STP	D25, D31, [X26, #8]

    (1006) 0x451bc4 LDR	D4, [X9, X5,LSL #3]

    (1006) 0x451bc8 STR	D4, [X11, X5,LSL #3]

    (1006) 0x451bcc LDR	D6, [X10, X3,LSL #3]

    (1006) 0x451bd0 STR	D6, [X13, X3,LSL #3]

    (1006) 0x451bd4 LDR	D20, [X12, X3,LSL #3]

    (1006) 0x451bd8 LDR	D3, [X7, X3,LSL #3]

    (1006) 0x451bdc LDR	D21, [X8, X3,LSL #3]

    (1006) 0x451be0 STUR	D21, [X1, #488]

    (1006) 0x451be4 STP	D20, D3, [X6, #8]

    (1006) 0x451be8 LDR	D16, [X9, X3,LSL #3]

    (1006) 0x451bec STR	D16, [X11, X3,LSL #3]

    (1006) 0x451bf0 CMP	X25, X0

    (1006) 0x451bf4 B.NE	451b40

  (1005) 0x451bf8 LDR	X25, [SP, #168]

  (1005) 0x451bfc ADD	X15, X15, #24

  (1005) 0x451c00 ADD	W4, W4, W27

  (1005) 0x451c04 ADD	W14, W14, W24

  (1005) 0x451c08 ADD	X16, X16, #40

  (1005) 0x451c0c ADD	X17, X17, X18

  (1005) 0x451c10 ADD	X10, X25, X28

  (1005) 0x451c14 STR	X10, [SP, #168]

  (1005) 0x451c18 CMP	X18, X15

  (1005) 0x451c1c B.NE	451a30

(1000) 0x451c20 LDP	X29, X30, [SP]

(1000) 0x451c24 LDP	X19, X20, [SP, #16]

(1000) 0x451c28 LDP	X21, X22, [SP, #32]

(1000) 0x451c2c LDP	X23, X24, [SP, #48]

(1000) 0x451c30 LDP	X25, X26, [SP, #64]

(1000) 0x451c34 LDP	X27, X28, [SP, #80]

(1000) 0x451c38 ADD	SP, SP, #672

(1000) 0x451c3c RET

  (998) 0x451c40 MOVI	D11, #0

  (998) 0x451c44 FMOV	D14, #1.0000000

  (998) 0x451c48 LDR	D7, [SP, #208]

  (998) 0x451c4c MOVZ	X9, #0

  (998) 0x451c50 FMOV	D9, D1

  (998) 0x451c54 FMOV	D10, #-2.0000000

  (998) 0x451c58 FMOV	D12, D1

  (998) 0x451c5c FMOV	D8, #0.5000000

  (998) 0x451c60 FMOV	D13, #-0.5000000

  (998) 0x451c64 FMOV	D16, D14

  (998) 0x451c68 FMOV	D17, D11

  (998) 0x451c6c FMOV	D18, D11

  (998) 0x451c70 FMOV	D15, D11

  (998) 0x451c74 B	451474

    (999) 0x451c78 LDR	D13, [SP, #208]

    (999) 0x451c7c MOVI	D20, #0

    (999) 0x451c80 FMOV	D24, #1.0000000

    (999) 0x451c84 MOVZ	W7, #0

    (999) 0x451c88 FMOV	D17, #0.5000000

    (999) 0x451c8c FMOV	D30, #-2.0000000

    (999) 0x451c90 STR	D1, [SP, #168]

    (999) 0x451c94 FMOV	D29, #-0.5000000

    (999) 0x451c98 FMOV	D28, D20

    (999) 0x451c9c STP	D1, D20, [SP, #232]

    (999) 0x451ca0 STP	D20, D17, [SP, #248]

    (999) 0x451ca4 STR	D13, [SP, #224]

    (999) 0x451ca8 STR	D24, [SP, #264]

    (999) 0x451cac B	4513c0

    (999) 0x451cb0 MOVI	D19, #0

    (999) 0x451cb4 FMOV	D23, #1.0000000

    (999) 0x451cb8 LDR	D2, [SP, #208]

    (999) 0x451cbc MOVZ	W8, #0

    (999) 0x451cc0 FMOV	D14, #-2.0000000

    (999) 0x451cc4 FMOV	D20, #0.5000000

    (999) 0x451cc8 FMOV	D5, #-0.5000000

    (999) 0x451ccc FMOV	D3, D1

    (999) 0x451cd0 FMOV	D6, D1

    (999) 0x451cd4 FMOV	D4, D23

    (999) 0x451cd8 FMOV	D21, D19

    (999) 0x451cdc FMOV	D26, D19

    (999) 0x451ce0 STP	D19, D20, [SP, #176]

    (999) 0x451ce4 STR	D14, [SP, #216]

    (999) 0x451ce8 B	4512f0

    (999) 0x451cec ADRP	X16,

    (999) 0x451cf0 ADRP	X26,

    (999) 0x451cf4 LDR	D15, [SP, #208]

    (999) 0x451cf8 MOVI	D29, #0

    (999) 0x451cfc MOVN	X14, #3

    (999) 0x451d00 MOVN	X15, #7

    (999) 0x451d04 LDR	D12, [X16, #3896]

    (999) 0x451d08 MOVN	X18, #3

    (999) 0x451d0c MOVZ	X23, #3

    (999) 0x451d10 MOVN	X24, #1

    (999) 0x451d14 MOVK	X14, #49151

    (999) 0x451d18 LDR	D14, [X26, #3904]

    (999) 0x451d1c MOVK	X15, #16367

    (999) 0x451d20 MOVZ	X17, #15536

    (999) 0x451d24 MOVK	X18, #16351

    (999) 0x451d28 MOVZ	X22, #15556

    (999) 0x451d2c FMOV	D24, X14

    (999) 0x451d30 MOVK	X23, #49120

    (999) 0x451d34 MOVK	X24, #16367

    (999) 0x451d38 FMOV	D30, X15

    (999) 0x451d3c FMOV	D20, X18

    (999) 0x451d40 FMOV	D28, X24

    (999) 0x451d44 STR	D29, [SP, #168]

    (999) 0x451d48 STR	D14, [SP, #224]

    (999) 0x451d4c STR	D15, [SP, #232]

    (999) 0x451d50 STR	D12, [SP, #240]

    (999) 0x451d54 STP	X23, X22, [SP, #248]

    (999) 0x451d58 STR	X17, [SP, #264]

    (999) 0x451d5c B	4513c0

    (999) 0x451d60 MOVI	D5, #0

    (999) 0x451d64 MOVN	X25, #3

    (999) 0x451d68 MOVN	X19, #7

    (999) 0x451d6c LDR	D3, [SP, #208]

    (999) 0x451d70 MOVN	X5, #3

    (999) 0x451d74 MOVZ	X1, #3

    (999) 0x451d78 MOVN	X7, #1

    (999) 0x451d7c MOVK	X25, #49151

    (999) 0x451d80 MOVK	X19, #16367

    (999) 0x451d84 ADRP	X0,

    (999) 0x451d88 MOVZ	X6, #15536

    (999) 0x451d8c MOVK	X5, #16351

    (999) 0x451d90 FMOV	D23, X25

    (999) 0x451d94 FMOV	D6, D5

    (999) 0x451d98 MOVZ	X3, #15556

    (999) 0x451d9c MOVK	X1, #49120

    (999) 0x451da0 LDR	D21, [X0, #3896]

    (999) 0x451da4 MOVK	X7, #16367

    (999) 0x451da8 ADRP	X9,

    (999) 0x451dac FMOV	D4, X6

    (999) 0x451db0 FMOV	D19, X5

    (999) 0x451db4 FMOV	D26, X7

    (999) 0x451db8 LDR	D2, [X9, #3904]

    (999) 0x451dbc STP	X1, X3, [SP, #176]

    (999) 0x451dc0 STR	X19, [SP, #216]

    (999) 0x451dc4 B	4512f0

    (999) 0x451dc8 MOVI	D13, #0

    (999) 0x451dcc MOVN	X0, #3

    (999) 0x451dd0 MOVN	X6, #7

    (999) 0x451dd4 LDR	D9, [SP, #208]

    (999) 0x451dd8 MOVN	X12, #3

    (999) 0x451ddc MOVZ	X1, #3

    (999) 0x451de0 MOVN	X13, #1

    (999) 0x451de4 MOVK	X0, #49151

    (999) 0x451de8 MOVK	X6, #16367

    (999) 0x451dec ADRP	X5,

    (999) 0x451df0 MOVZ	X11, #15536

    (999) 0x451df4 MOVK	X12, #16351

    (999) 0x451df8 FMOV	D14, X0

    (999) 0x451dfc FMOV	D12, D13

    (999) 0x451e00 MOVZ	X3, #15556

    (999) 0x451e04 MOVK	X1, #49120

    (999) 0x451e08 FMOV	D10, X6

    (999) 0x451e0c MOVK	X13, #16367

    (999) 0x451e10 ADRP	X14,

    (999) 0x451e14 FMOV	D16, X11

    (999) 0x451e18 FMOV	D11, X12

    (999) 0x451e1c SBFM	X9, X25, #0, #31

    (999) 0x451e20 FMOV	D8, X3

    (999) 0x451e24 FMOV	D17, X1

    (999) 0x451e28 FMOV	D15, X13

    (999) 0x451e2c LDR	D18, [X5, #3896]

    (999) 0x451e30 LDR	D7, [X14, #3904]

    (999) 0x451e34 B	451474

    (999) 0x451e38 LDR	X28, [SP, #432]

    (999) 0x451e3c CBZ	X28, 4519a8

    (999) 0x451e40 B	451824

0x451e44 HINT	#0

0x451e48 HINT	#0

0x451e4c HINT	#0

0x451e50 HINT	#0

0x451e54 HINT	#0

0x451e58 HINT	#0

0x451e5c HINT	#0

Coverage (%)	Name	Source Location	Module
►42.21+	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:196	exec
○	main._omp_fn.1	stl_vector.h:1128	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►40.88+	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:196	exec
○	main._omp_fn.1	stl_vector.h:1128	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►7.96+	miniqmcreference::DiracDetermi[...]	OhmmsVector.h:144	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:171	exec
○	main._omp_fn.0	miniqmc.cpp:397	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►7.90+	miniqmcreference::DiracDetermi[...]	OhmmsVector.h:144	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:171	exec
○	main._omp_fn.0	miniqmc.cpp:397	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_4

Source file and lines	einspline_spo_ref.hpp:203-230
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:187-192,199-215,226-262,269-286
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:170-173
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/Tensor.h:213
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h:1131,1263
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h:150-152
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp:203-211,219-230
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:53-66
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:143
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp:68-79
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_algobase.h:238,951-952
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:231,265,271
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:145

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 12.67 to 5.00 cycles (2.53x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 58% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 12.67 to 10.04 cycles (1.26x speedup).

Details

11% of VPU instructions are used in vector version (process two or more data elements in vector registers):

41% of VPU loads are used in vector version.
22% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU multiply instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 12.67 to 0.50 cycles (25.33x speedup).

FMA

Detected 6 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Matching between your function (in the source code) and the binary function

The binary function is composed of 18 FP arithmetical operations:

9: addition or subtraction (6 inside FMA instructions)
9: multiply (6 inside FMA instructions)

The binary function is loading 156 bytes. The binary function is storing 284 bytes.

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	106
loop length	424
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

12.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	1.50	1.50	5.33	5.33	5.33	5.33	5.33	5.33	8.25	8.25	8.25	8.25	12.67	12.67	12.67	8.00	8.00
cycles	1.50	1.50	5.33	5.33	5.33	5.33	5.33	5.33	8.25	8.25	8.25	8.25	12.67	12.67	12.67	8.00	8.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	12.38
Overall L1	12.67

Vectorization ratios

INT

all	17%
load	41%
store	22%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	0%
add-sub	0%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	11%
load	41%
store	22%
mul	0%
add-sub	0%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 12.67 cycles. At this rate:

12% of peak load performance is reached (12.32 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
46% of peak store performance is reached (22.42 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 451060

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
SUB SP, SP, #672	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR W19, WZR, W2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X22, XZR, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X21, XZR, X5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X23, XZR, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X25, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X24, [X0, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4be880 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W0, [X25, #292]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X25, #296	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP W19, W0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4510c0 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEERNS6_INS2_10TinyVectorIdLj3EEESaISB_EEES9_+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X25, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
MOVZ W1, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
SMADDL X3, W19, W1, X2	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
ADD X4, X20, #216	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP D23, D31, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
MOVI D27, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVZ X5, #48304	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDP D29, D30, [X4, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FMOV D28, X5	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDR D25, [X20, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR D26, [X3, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D0, D31, D29	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
LDP D20, D4, [X4, #40]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FMUL D1, D31, D30	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
LDP D19, D21, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
LDP D6, D22, [X4, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FMADD D3, D23, D25, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
FMUL D7, D31, D20	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
LDR W9, [X20, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FMADD D2, D23, D19, D1	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
FMADD D5, D26, D4, D3	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
FRINTM D24, D5	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	3	0.50	scal (50.0%)
FMADD D23, D23, D21, D7	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
FMADD D16, D26, D6, D2	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
FRINTM D17, D16	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	3	0.50	scal (50.0%)
FMADD D31, D26, D22, D23	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
FRINTM D0, D31	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	3	0.50	scal (50.0%)
FCMPE D5, D27	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
FSUB D18, D5, S24	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FSUB D30, D16, S17	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCCMPE D5, D28, #4, #4	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
CSINC W6, WZR, WZR, #13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
CMP W6, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
FCSEL D29, D18, D27, #0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.25	scal (50.0%)
FCMPE D16, D27	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
STR D29, [SP, #416]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
FCCMPE D16, D28, #4, #4	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
CSINC W7, WZR, WZR, #13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
CMP W7, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
FCSEL D1, D30, D27, #0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.25	scal (50.0%)
FCMPE D31, D27	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
FCCMPE D31, D28, #4, #4	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
FSUB D28, D31, S0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
CSINC W8, WZR, WZR, #13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
CMP W8, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
FCSEL D27, D28, D27, #0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.25	scal (50.0%)
STP D27, D1, [SP, #400]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
CMP W9, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 4519ec <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEERNS6_INS2_10TinyVectorIdLj3EEESaISB_EEES9_+0x98c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
ORR X10, XZR, #3840	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ X12, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
MOVK X10, #16325	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X11, XZR, #3840	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
MOVK X11, #16357	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDR X13, [X20, #784]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
FMOV D1, X10	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDR X4, [X20, #760]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X4, W9,UXTW #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
STP X24, X20, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X12, X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X23, X22, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR W15, [X20, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X11, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [X20, #808]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
STR X14, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [X20, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SBFM X16, X15, #61, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (100.0%)
SBFM X18, X15, #0, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (100.0%)
STR W15, [SP, #396]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ORR X2, XZR, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STR X21, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X17, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X18, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X20, [SP, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_4

Source file and lines	einspline_spo_ref.hpp:203-230
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:187-192,199-215,226-262,269-286
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:170-173
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/Tensor.h:213
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h:1131,1263
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h:150-152
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp:203-211,219-230
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:53-66
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:143
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp:68-79
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_algobase.h:238,951-952
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:231,265,271
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:145

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 12.67 to 5.00 cycles (2.53x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

11% of VPU instructions are used in vector version (process two or more data elements in vector registers):

41% of VPU loads are used in vector version.
22% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU multiply instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 12.67 to 0.50 cycles (25.33x speedup).

FMA

Detected 6 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Matching between your function (in the source code) and the binary function

The binary function is composed of 18 FP arithmetical operations:

9: addition or subtraction (6 inside FMA instructions)
9: multiply (6 inside FMA instructions)

The binary function is loading 156 bytes. The binary function is storing 284 bytes.

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	106
loop length	424
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

12.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	1.50	1.50	5.33	5.33	5.33	5.33	5.33	5.33	8.25	8.25	8.25	8.25	12.67	12.67	12.67	8.00	8.00
cycles	1.50	1.50	5.33	5.33	5.33	5.33	5.33	5.33	8.25	8.25	8.25	8.25	12.67	12.67	12.67	8.00	8.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	12.38
Overall L1	12.67

Vectorization ratios

INT

all	17%
load	41%
store	22%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	0%
add-sub	0%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	11%
load	41%
store	22%
mul	0%
add-sub	0%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 12.67 cycles. At this rate:

12% of peak load performance is reached (12.32 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
46% of peak store performance is reached (22.42 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 451060

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
SUB SP, SP, #672	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR W19, WZR, W2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X22, XZR, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X21, XZR, X5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X23, XZR, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X25, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X24, [X0, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4be880 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W0, [X25, #292]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X25, #296	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP W19, W0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4510c0 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEERNS6_INS2_10TinyVectorIdLj3EEESaISB_EEES9_+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X25, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
MOVZ W1, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
SMADDL X3, W19, W1, X2	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
ADD X4, X20, #216	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP D23, D31, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
MOVI D27, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVZ X5, #48304	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDP D29, D30, [X4, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FMOV D28, X5	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDR D25, [X20, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR D26, [X3, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D0, D31, D29	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
LDP D20, D4, [X4, #40]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FMUL D1, D31, D30	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
LDP D19, D21, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
LDP D6, D22, [X4, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FMADD D3, D23, D25, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
FMUL D7, D31, D20	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
LDR W9, [X20, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FMADD D2, D23, D19, D1	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
FMADD D5, D26, D4, D3	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
FRINTM D24, D5	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	3	0.50	scal (50.0%)
FMADD D23, D23, D21, D7	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
FMADD D16, D26, D6, D2	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
FRINTM D17, D16	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	3	0.50	scal (50.0%)
FMADD D31, D26, D22, D23	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
FRINTM D0, D31	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	3	0.50	scal (50.0%)
FCMPE D5, D27	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
FSUB D18, D5, S24	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FSUB D30, D16, S17	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCCMPE D5, D28, #4, #4	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
CSINC W6, WZR, WZR, #13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
CMP W6, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
FCSEL D29, D18, D27, #0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.25	scal (50.0%)
FCMPE D16, D27	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
STR D29, [SP, #416]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
FCCMPE D16, D28, #4, #4	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
CSINC W7, WZR, WZR, #13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
CMP W7, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
FCSEL D1, D30, D27, #0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.25	scal (50.0%)
FCMPE D31, D27	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
FCCMPE D31, D28, #4, #4	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
FSUB D28, D31, S0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
CSINC W8, WZR, WZR, #13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
CMP W8, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
FCSEL D27, D28, D27, #0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.25	scal (50.0%)
STP D27, D1, [SP, #400]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
CMP W9, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 4519ec <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEERNS6_INS2_10TinyVectorIdLj3EEESaISB_EEES9_+0x98c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
ORR X10, XZR, #3840	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ X12, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
MOVK X10, #16325	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X11, XZR, #3840	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
MOVK X11, #16357	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDR X13, [X20, #784]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
FMOV D1, X10	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDR X4, [X20, #760]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X4, W9,UXTW #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
STP X24, X20, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X12, X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X23, X22, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR W15, [X20, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X11, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [X20, #808]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
STR X14, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [X20, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SBFM X16, X15, #61, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (100.0%)
SBFM X18, X15, #0, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (100.0%)
STR W15, [SP, #396]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ORR X2, XZR, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STR X21, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X17, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X18, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X20, [SP, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::einspline_spo_ref::evaluate(qmcplusplus::ParticleSet const&, int, qmcplusplus::Vector >&, qmcplusplus::Vector, std::allocator >...–	10.35	14.28
▼Loop 1000 - stl_algobase.h:238-952 - exec–	0.00	0.01
▼Loop 1005 - einspline_spo_ref.hpp:219-227 - exec–	0.00	0.01
○Loop 1006 - einspline_spo_ref.hpp:223-227 - exec	0.24	0.33
▼Loop 998 - MultiBsplineData.hpp:68-79 - exec–	0.00	0.00
▼Loop 999 - MultiBsplineEvalHelper.hpp:53-66 - exec–	0.01	0.01
○Loop 1001 - MultiBsplineRef.hpp:276-286 - exec	0.42	0.57
▼Loop 1003 - MultiBsplineRef.hpp:226-262 - exec–	0.00	0.01
▼Loop 1004 - MultiBsplineRef.hpp:227-262 - exec–	0.00	0.01
○Loop 1002 - MultiBsplineRef.hpp:242-262 - exec	9.66	13.20

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Expensive FP math instructions/calls

FMA

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Matching between your function (in the source code) and the binary function

Arithmetic intensity

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Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code