OV - exec - Function miniqmcreference::TwoBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::computeU3(qmcplusplus::ParticleSet const&, int, double const*, double*, double*, double*, bool)

	Function: miniqmcreference::TwoBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::computeU3(qmcpl ...	Module: exec	Source: TwoBodyJastrowRef.h:254-279 [...]	Coverage (incl. loops): 0.17% \| (excl. loops): 0.00%

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h: 1147 - 1150

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1147:       operator[](size_type __n) const _GLIBCXX_NOEXCEPT

1148:       {

1149: 	__glibcxx_requires_subscript(__n);

1150: 	return *(this->_M_impl._M_start + __n);

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 223

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223:     return X[i];

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h: 254 - 279

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254: inline void TwoBodyJastrowRef<FT>::computeU3(const ParticleSet& P,

[...]

262:   const int jelmax = triangle ? iat : N;

[...]

268:   const int igt = P.GroupID[iat] * NumGroups;

269:   for (int jg = 0; jg < NumGroups; ++jg)

270:   {

271:     const FuncType& f2(*F[igt + jg]);

[...]

279: }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 313 - 316

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313:   inline int first(int igroup) const { return (*group_offsets_)[igroup]; }

314:

315:   ///return the last index of a group i

316:   inline int last(int igroup) const { return (*group_offsets_)[igroup + 1]; }

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_algobase.h: 238 - 1151

--------------------------------------------------------------------------------

238:       if (__b < __a)

[...]

952: 	*__first = __tmp;

[...]

1146:       if (__n <= 0)

1147: 	return __first;

1148:

1149:       __glibcxx_requires_can_increment(__first, __n);

1150:

1151:       std::__fill_a(__first, __first + __n, __value);

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 276 - 336

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276:   real_type dSquareDeltaRinv = DeltaRInv * DeltaRInv;

277:   constexpr real_type cOne(1);

278:

279:   //    START_MARK_FIRST();

280:

281:   ASSUME_ALIGNED(distIndices);

282:   ASSUME_ALIGNED(distArrayCompressed);

283:   int iCount                 = 0;

284:   int iLimit                 = iEnd - iStart;

[...]

291:   for (int jat = 0; jat < iLimit; jat++)

292:   {

293:     real_type r = distArray[jat];

294:     if (r < cutoff_radius && iStart + jat != iat)

295:     {

296:       distIndices[iCount]         = jat;

297:       distArrayCompressed[iCount] = r;

298:       iCount++;

[...]

305:     real_type r    = distArrayCompressed[j];

306:     int iScatter   = distIndices[j];

307:     real_type rinv = cOne / r;

308:     r *= DeltaRInv;

309:     int iGather   = (int)r;

310:     real_type t   = r - real_type(iGather);

311:     real_type tp0 = t * t * t;

312:     real_type tp1 = t * t;

313:     real_type tp2 = t;

314:

315:     real_type sCoef0 = SplineCoefs[iGather + 0];

316:     real_type sCoef1 = SplineCoefs[iGather + 1];

317:     real_type sCoef2 = SplineCoefs[iGather + 2];

318:     real_type sCoef3 = SplineCoefs[iGather + 3];

319:

320:     // clang-format off

321:     laplArray[iScatter] = dSquareDeltaRinv *

322:       (sCoef0*( d2A[ 2]*tp2 + d2A[ 3])+

323:        sCoef1*( d2A[ 6]*tp2 + d2A[ 7])+

324:        sCoef2*( d2A[10]*tp2 + d2A[11])+

325:        sCoef3*( d2A[14]*tp2 + d2A[15]));

326:

327:     gradArray[iScatter] = DeltaRInv * rinv *

328:       (sCoef0*( dA[ 1]*tp1 + dA[ 2]*tp2 + dA[ 3])+

329:        sCoef1*( dA[ 5]*tp1 + dA[ 6]*tp2 + dA[ 7])+

330:        sCoef2*( dA[ 9]*tp1 + dA[10]*tp2 + dA[11])+

331:        sCoef3*( dA[13]*tp1 + dA[14]*tp2 + dA[15]));

332:

333:     valArray[iScatter] = (sCoef0*(A[ 0]*tp0 + A[ 1]*tp1 + A[ 2]*tp2 + A[ 3])+

334:         sCoef1*(A[ 4]*tp0 + A[ 5]*tp1 + A[ 6]*tp2 + A[ 7])+

335:         sCoef2*(A[ 8]*tp0 + A[ 9]*tp1 + A[10]*tp2 + A[11])+

336:         sCoef3*(A[12]*tp0 + A[13]*tp1 + A[14]*tp2 + A[15]));

0x435240 ADDVL	SP, SP, #62

0x435244 SUB	SP, SP, #1088

0x435248 STP	X29, X30, [SP]

0x43524c ADD	X29, SP, #0

0x435250 STP	X19, X20, [SP, #16]

0x435254 ORR	W19, WZR, W2

0x435258 ORR	W20, WZR, W2

0x43525c STP	X21, X22, [SP, #32]

0x435260 ORR	X21, XZR, X0

0x435264 ORR	X22, XZR, X3

0x435268 STP	X23, X24, [SP, #48]

0x43526c ORR	X24, XZR, X5

0x435270 ORR	X23, XZR, X6

0x435274 STP	X25, X26, [SP, #64]

0x435278 ORR	X26, XZR, X1

0x43527c ORR	X25, XZR, X4

0x435280 STP	X27, X28, [SP, #80]

0x435284 TBNZ	W7, #0, 43528c

0x435288 LDR	W20, [X0, #144]

0x43528c CMP	W20, #0

0x435290 B.LE	4352c8

0x435294 UBFM	X27, X20, #61, #31

0x435298 MOVZ	W1, #0

0x43529c ORR	X2, XZR, X27

0x4352a0 ORR	X0, XZR, X25

0x4352a4 BL	403e90

0x4352a8 ORR	X2, XZR, X27

0x4352ac MOVZ	W1, #0

0x4352b0 ORR	X0, XZR, X24

0x4352b4 BL	403e90

0x4352b8 ORR	X2, XZR, X27

0x4352bc ORR	X0, XZR, X23

0x4352c0 MOVZ	W1, #0

0x4352c4 BL	403e90

0x4352c8 LDR	X0, [X26, #24]

0x4352cc LDR	X16, [X21, #160]

0x4352d0 LDR	W1, [X0, X19,SXTW #2]

0x4352d4 MADD	W3, W1, W16, WZR

0x4352d8 CBZ	X16, 436090

0x4352dc STP	D8, D9, [SP, #96]

0x4352e0 MOVZ	X2, #0

0x4352e4 PTRUE	P7.B, ALL

0x4352e8 STP	D10, D11, [SP, #112]

0x4352ec STP	D12, D13, [SP, #128]

0x4352f0 STP	D14, D15, [SP, #144]

0x4352f4 LDR	X4, [X26, #616]

0x4352f8 LDR	X13, [X21, #464]

0x4352fc LDR	X12, [X21, #488]

0x435300 LDR	X14, [X4, #24]

0x435304 LDR	X5, [X21, #512]

0x435308 ADD	X15, X5, W3,SXTW #3

    (596) 0x43530c LDR	X9, [X15, X2,LSL #3]

    (596) 0x435310 LDR	W10, [X14, X2,LSL #2]

    (596) 0x435314 ADD	X2, X2, #1

    (596) 0x435318 LDR	W6, [X14, X2,LSL #2]

    (596) 0x43531c LDR	D31, [X9, #568]

    (596) 0x435320 CMP	W6, W20

    (596) 0x435324 CSEL	W7, W6, W20, #13

    (596) 0x435328 SUB	W8, W7, W10

    (596) 0x43532c FMUL	D30, D31, D31

    (596) 0x435330 CMP	W8, #0

    (596) 0x435334 B.LE	436078

    (596) 0x435338 SBFM	X17, X10, #61, #31

    (596) 0x43533c ANDS	X18, X8, #4224

    (596) 0x435340 LDR	D29, [X9, #8]

    (596) 0x435344 MOVZ	X0, #0

    (596) 0x435348 MOVZ	W11, #0

    (596) 0x43534c ADD	X28, X22, X17

    (596) 0x435350 SBFM	X30, X8, #0, #31

    (596) 0x435354 B.EQ	435490

    (596) 0x435358 CMP	X18, #1

    (596) 0x43535c B.EQ	435460

    (596) 0x435360 CMP	X18, #2

    (596) 0x435364 B.EQ	435438

    (596) 0x435368 CMP	X18, #3

    (596) 0x43536c B.EQ	435410

    (596) 0x435370 CMP	X18, #4

    (596) 0x435374 B.EQ	4353e8

    (596) 0x435378 CMP	X18, #5

    (596) 0x43537c B.EQ	4353c0

    (596) 0x435380 CMP	X18, #6

    (596) 0x435384 B.EQ	435398

    (596) 0x435388 LDR	D28, [X22, X17]

    (596) 0x43538c FCMPE	D28, D29

    (596) 0x435390 B.MI	4360c8

    (596) 0x435394 MOVZ	X0, #1

    (596) 0x435398 LDR	D0, [X28, X0,LSL #3]

    (596) 0x43539c FCMPE	D0, D29

    (596) 0x4353a0 B.GE	4353bc

    (596) 0x4353a4 ADD	W26, W10, W0

    (596) 0x4353a8 CMP	W19, W26

    (596) 0x4353ac B.EQ	4353bc

    (596) 0x4353b0 STR	W0, [X12, X11,UXTW #2]

    (596) 0x4353b4 STR	D0, [X13, X11,UXTW #3]

    (596) 0x4353b8 ADD	W11, W11, #1

    (596) 0x4353bc ADD	X0, X0, #1

    (596) 0x4353c0 LDR	D1, [X28, X0,LSL #3]

    (596) 0x4353c4 FCMPE	D1, D29

    (596) 0x4353c8 B.GE	4353e4

    (596) 0x4353cc ADD	W27, W10, W0

    (596) 0x4353d0 CMP	W19, W27

    (596) 0x4353d4 B.EQ	4353e4

    (596) 0x4353d8 STR	W0, [X12, X11,UXTW #2]

    (596) 0x4353dc STR	D1, [X13, X11,UXTW #3]

    (596) 0x4353e0 ADD	W11, W11, #1

    (596) 0x4353e4 ADD	X0, X0, #1

    (596) 0x4353e8 LDR	D2, [X28, X0,LSL #3]

    (596) 0x4353ec FCMPE	D2, D29

    (596) 0x4353f0 B.GE	43540c

    (596) 0x4353f4 ADD	W1, W10, W0

    (596) 0x4353f8 CMP	W19, W1

    (596) 0x4353fc B.EQ	43540c

    (596) 0x435400 STR	W0, [X12, X11,UXTW #2]

    (596) 0x435404 STR	D2, [X13, X11,UXTW #3]

    (596) 0x435408 ADD	W11, W11, #1

    (596) 0x43540c ADD	X0, X0, #1

    (596) 0x435410 LDR	D3, [X28, X0,LSL #3]

    (596) 0x435414 FCMPE	D3, D29

    (596) 0x435418 B.GE	435434

    (596) 0x43541c ADD	W3, W10, W0

    (596) 0x435420 CMP	W19, W3

    (596) 0x435424 B.EQ	435434

    (596) 0x435428 STR	W0, [X12, X11,UXTW #2]

    (596) 0x43542c STR	D3, [X13, X11,UXTW #3]

    (596) 0x435430 ADD	W11, W11, #1

    (596) 0x435434 ADD	X0, X0, #1

    (596) 0x435438 LDR	D4, [X28, X0,LSL #3]

    (596) 0x43543c FCMPE	D4, D29

    (596) 0x435440 B.GE	43545c

    (596) 0x435444 ADD	W4, W10, W0

    (596) 0x435448 CMP	W19, W4

    (596) 0x43544c B.EQ	43545c

    (596) 0x435450 STR	W0, [X12, X11,UXTW #2]

    (596) 0x435454 STR	D4, [X13, X11,UXTW #3]

    (596) 0x435458 ADD	W11, W11, #1

    (596) 0x43545c ADD	X0, X0, #1

    (596) 0x435460 LDR	D5, [X28, X0,LSL #3]

    (596) 0x435464 FCMPE	D5, D29

    (596) 0x435468 B.GE	435484

    (596) 0x43546c ADD	W5, W10, W0

    (596) 0x435470 CMP	W19, W5

    (596) 0x435474 B.EQ	435484

    (596) 0x435478 STR	W0, [X12, X11,UXTW #2]

    (596) 0x43547c STR	D5, [X13, X11,UXTW #3]

    (596) 0x435480 ADD	W11, W11, #1

    (596) 0x435484 ADD	X0, X0, #1

    (596) 0x435488 CMP	X30, X0

    (596) 0x43548c B.EQ	4355d8

      (597) 0x435490 LDR	D6, [X28, X0,LSL #3]

      (597) 0x435494 FCMPE	D6, D29

      (597) 0x435498 B.GE	4354b4

      (597) 0x43549c ADD	W6, W10, W0

      (597) 0x4354a0 CMP	W19, W6

      (597) 0x4354a4 B.EQ	4354b4

      (597) 0x4354a8 STR	W0, [X12, X11,UXTW #2]

      (597) 0x4354ac STR	D6, [X13, X11,UXTW #3]

      (597) 0x4354b0 ADD	W11, W11, #1

      (597) 0x4354b4 ADD	X0, X0, #1

      (597) 0x4354b8 LDR	D7, [X28, X0,LSL #3]

      (597) 0x4354bc FCMPE	D7, D29

      (597) 0x4354c0 B.GE	4354dc

      (597) 0x4354c4 ADD	W7, W10, W0

      (597) 0x4354c8 CMP	W19, W7

      (597) 0x4354cc B.EQ	4354dc

      (597) 0x4354d0 STR	W0, [X12, X11,UXTW #2]

      (597) 0x4354d4 STR	D7, [X13, X11,UXTW #3]

      (597) 0x4354d8 ADD	W11, W11, #1

      (597) 0x4354dc ADD	X18, X0, #1

      (597) 0x4354e0 LDR	D8, [X28, X18,LSL #3]

      (597) 0x4354e4 FCMPE	D8, D29

      (597) 0x4354e8 B.GE	435504

      (597) 0x4354ec ADD	W8, W10, W18

      (597) 0x4354f0 CMP	W19, W8

      (597) 0x4354f4 B.EQ	435504

      (597) 0x4354f8 STR	W18, [X12, X11,UXTW #2]

      (597) 0x4354fc STR	D8, [X13, X11,UXTW #3]

      (597) 0x435500 ADD	W11, W11, #1

      (597) 0x435504 ADD	X21, X0, #2

      (597) 0x435508 LDR	D9, [X28, X21,LSL #3]

      (597) 0x43550c FCMPE	D9, D29

      (597) 0x435510 B.GE	43552c

      (597) 0x435514 ADD	W26, W10, W21

      (597) 0x435518 CMP	W19, W26

      (597) 0x43551c B.EQ	43552c

      (597) 0x435520 STR	W21, [X12, X11,UXTW #2]

      (597) 0x435524 STR	D9, [X13, X11,UXTW #3]

      (597) 0x435528 ADD	W11, W11, #1

      (597) 0x43552c ADD	X27, X0, #3

      (597) 0x435530 LDR	D10, [X28, X27,LSL #3]

      (597) 0x435534 FCMPE	D10, D29

      (597) 0x435538 B.GE	435554

      (597) 0x43553c ADD	W1, W10, W27

      (597) 0x435540 CMP	W19, W1

      (597) 0x435544 B.EQ	435554

      (597) 0x435548 STR	W27, [X12, X11,UXTW #2]

      (597) 0x43554c STR	D10, [X13, X11,UXTW #3]

      (597) 0x435550 ADD	W11, W11, #1

      (597) 0x435554 ADD	X3, X0, #4

      (597) 0x435558 LDR	D11, [X28, X3,LSL #3]

      (597) 0x43555c FCMPE	D11, D29

      (597) 0x435560 B.GE	43557c

      (597) 0x435564 ADD	W4, W10, W3

      (597) 0x435568 CMP	W19, W4

      (597) 0x43556c B.EQ	43557c

      (597) 0x435570 STR	W3, [X12, X11,UXTW #2]

      (597) 0x435574 STR	D11, [X13, X11,UXTW #3]

      (597) 0x435578 ADD	W11, W11, #1

      (597) 0x43557c ADD	X5, X0, #5

      (597) 0x435580 LDR	D12, [X28, X5,LSL #3]

      (597) 0x435584 FCMPE	D12, D29

      (597) 0x435588 B.GE	4355a4

      (597) 0x43558c ADD	W6, W10, W5

      (597) 0x435590 CMP	W19, W6

      (597) 0x435594 B.EQ	4355a4

      (597) 0x435598 STR	W5, [X12, X11,UXTW #2]

      (597) 0x43559c STR	D12, [X13, X11,UXTW #3]

      (597) 0x4355a0 ADD	W11, W11, #1

      (597) 0x4355a4 ADD	X7, X0, #6

      (597) 0x4355a8 LDR	D13, [X28, X7,LSL #3]

      (597) 0x4355ac FCMPE	D13, D29

      (597) 0x4355b0 B.GE	4355cc

      (597) 0x4355b4 ADD	W18, W10, W7

      (597) 0x4355b8 CMP	W19, W18

      (597) 0x4355bc B.EQ	4355cc

      (597) 0x4355c0 STR	W7, [X12, X11,UXTW #2]

      (597) 0x4355c4 STR	D13, [X13, X11,UXTW #3]

      (597) 0x4355c8 ADD	W11, W11, #1

      (597) 0x4355cc ADD	X0, X0, #7

      (597) 0x4355d0 CMP	X30, X0

      (597) 0x4355d4 B.NE	435490

    (596) 0x4355d8 CBZ	W11, 436078

    (596) 0x4355dc LDP	X28, X30, [X9, #24]

    (596) 0x4355e0 SUB	W10, W11, #1

    (596) 0x4355e4 LDR	D20, [X9, #176]

    (596) 0x4355e8 STR	X28, [SP, #776]

    (596) 0x4355ec STR	X30, [SP, #784]

    (596) 0x4355f0 LDP	X8, X21, [X9, #40]

    (596) 0x4355f4 LDR	D18, [X9, #208]

    (596) 0x4355f8 STR	X8, [SP, #792]

    (596) 0x4355fc STR	X21, [SP, #800]

    (596) 0x435600 LDP	X26, X27, [X9, #56]

    (596) 0x435604 STR	X26, [SP, #808]

    (596) 0x435608 STR	X27, [SP, #816]

    (596) 0x43560c LDP	X1, X3, [X9, #72]

    (596) 0x435610 STR	X1, [SP, #824]

    (596) 0x435614 STR	X3, [SP, #832]

    (596) 0x435618 LDP	X5, X4, [X9, #88]

    (596) 0x43561c STR	X5, [SP, #840]

    (596) 0x435620 STR	X4, [SP, #848]

    (596) 0x435624 LDP	D28, D15, [X9, #160]

    (596) 0x435628 STR	D20, [SP, #1064]

    (596) 0x43562c STR	D28, [SP, #1056]

    (596) 0x435630 LDP	D17, D19, [X9, #192]

    (596) 0x435634 STR	D17, [SP, #1072]

    (596) 0x435638 LDP	X6, X7, [X9, #224]

    (596) 0x43563c STR	X7, [SP, #752]

    (596) 0x435640 STR	X6, [SP, #744]

    (596) 0x435644 LDR	D14, [X9, #240]

    (596) 0x435648 LDR	D16, [X9, #272]

    (596) 0x43564c STR	D14, [SP, #1080]

    (596) 0x435650 LDP	X18, X0, [X9, #256]

    (596) 0x435654 STR	X18, [SP, #760]

    (596) 0x435658 STR	X0, [SP, #768]

    (596) 0x43565c LDP	X28, X30, [X9, #104]

    (596) 0x435660 LDP	D24, D23, [X9, #296]

    (596) 0x435664 LDP	D29, D27, [X9, #328]

    (596) 0x435668 LDP	D22, D21, [X9, #360]

    (596) 0x43566c LDP	D26, D25, [X9, #392]

    (596) 0x435670 STR	X28, [SP, #856]

    (596) 0x435674 STR	X30, [SP, #864]

    (596) 0x435678 LDP	X8, X21, [X9, #120]

    (596) 0x43567c LDR	X0, [X9, #536]

    (596) 0x435680 STR	X8, [SP, #872]

    (596) 0x435684 STR	X21, [SP, #880]

    (596) 0x435688 LDP	X9, X26, [X9, #136]

    (596) 0x43568c STR	X9, [SP, #888]

    (596) 0x435690 STR	X26, [SP, #896]

    (596) 0x435694 CMP	W10, #2

    (596) 0x435698 B.LS	4360b4

    (596) 0x43569c DUP	V5.2D, V20.D[0]

    (596) 0x4356a0 LDR	D20, [SP, #744]

    (596) 0x4356a4 DUP	V0.2D, V24.D[0]

    (596) 0x4356a8 ADD	X9, X23, X17

    (596) 0x4356ac ADD	X8, X24, X17

    (596) 0x4356b0 DUP	V1.2D, V28.D[0]

    (596) 0x4356b4 DUP	V9.2D, V22.D[0]

    (596) 0x4356b8 ADD	X7, X25, X17

    (596) 0x4356bc ORR	X4, XZR, X12

    (596) 0x4356c0 DUP	V11.2D, V21.D[0]

    (596) 0x4356c4 DUP	V3.2D, V15.D[0]

    (596) 0x4356c8 UBFM	W17, W11, #2, #31

    (596) 0x4356cc ADD	X28, X12, W17,UXTW #4

    (596) 0x4356d0 ORR	X10, XZR, X13

    (596) 0x4356d4 DUP	V13.2D, V26.D[0]

    (596) 0x4356d8 DUP	V2.2D, V23.D[0]

    (596) 0x4356dc STR	Q0, [SP, #160]

    (596) 0x4356e0 DUP	V4.2D, V29.D[0]

    (596) 0x4356e4 DUP	V7.2D, V27.D[0]

    (596) 0x4356e8 LDR	D0, [SP, #752]

    (596) 0x4356ec DUP	V8.2D, V17.D[0]

    (596) 0x4356f0 DUP	V10.2D, V19.D[0]

    (596) 0x4356f4 DUP	V28.2D, V20.D[0]

    (596) 0x4356f8 STR	Q3, [SP, #272]

    (596) 0x4356fc DUP	V12.2D, V18.D[0]

    (596) 0x435700 LDR	D3, [SP, #760]

    (596) 0x435704 DUP	V17.2D, V25.D[0]

    (596) 0x435708 DUP	V14.2D, V14.D[0]

    (596) 0x43570c STR	Q13, [SP, #224]

    (596) 0x435710 DUP	V6.2D, V31.D[0]

    (596) 0x435714 LDR	D13, [SP, #792]

    (596) 0x435718 STR	Q5, [SP, #288]

    (596) 0x43571c LDR	D5, [SP, #768]

    (596) 0x435720 STR	Q28, [SP, #352]

    (596) 0x435724 LDR	D28, [SP, #800]

    (596) 0x435728 STR	Q9, [SP, #544]

    (596) 0x43572c LDR	D9, [SP, #776]

    (596) 0x435730 DUP	V20.2D, V13.D[0]

    (596) 0x435734 STR	Q11, [SP, #560]

    (596) 0x435738 LDR	D11, [SP, #784]

    (596) 0x43573c STR	Q1, [SP, #256]

    (596) 0x435740 DUP	V1.2D, V0.D[0]

    (596) 0x435744 STR	Q2, [SP, #176]

    (596) 0x435748 DUP	V2.2D, V30.D[0]

    (596) 0x43574c STR	Q4, [SP, #192]

    (596) 0x435750 DUP	V4.2D, V3.D[0]

    (596) 0x435754 STR	Q7, [SP, #208]

    (596) 0x435758 DUP	V7.2D, V5.D[0]

    (596) 0x43575c STR	Q8, [SP, #304]

    (596) 0x435760 DUP	V8.2D, V16.D[0]

    (596) 0x435764 STR	Q10, [SP, #320]

    (596) 0x435768 DUP	V10.2D, V9.D[0]

    (596) 0x43576c STR	Q12, [SP, #336]

    (596) 0x435770 DUP	V12.2D, V11.D[0]

    (596) 0x435774 STP	Q17, Q1, [SP, #576]

    (596) 0x435778 DUP	V17.2D, V28.D[0]

    (596) 0x43577c STR	Q2, [SP, #240]

    (596) 0x435780 STR	Q4, [SP, #368]

    (596) 0x435784 STR	Q10, [SP, #384]

    (596) 0x435788 STR	Q12, [SP, #400]

    (596) 0x43578c STR	Q14, [SP, #608]

    (596) 0x435790 STR	Q7, [SP, #624]

    (596) 0x435794 STR	Q8, [SP, #640]

    (596) 0x435798 STR	Q20, [SP, #656]

    (596) 0x43579c STR	Q17, [SP, #672]

    (596) 0x4357a0 STR	X16, [SP, #904]

    (596) 0x4357a4 ADD	X16, SP, #1000

    (596) 0x4357a8 STR	X12, [SP, #920]

    (596) 0x4357ac ADD	X12, SP, #936

    (596) 0x4357b0 STR	W20, [SP, #916]

    (596) 0x4357b4 STR	X13, [SP, #928]

    (596) 0x4357b8 ADD	X13, SP, #968

    (596) 0x4357bc STP	D31, D30, [X12]

    (596) 0x4357c0 STP	D24, D23, [X12, #16]

    (596) 0x4357c4 STP	D29, D27, [X13]

    (596) 0x4357c8 STP	D22, D21, [X13, #16]

    (596) 0x4357cc LDR	D0, [SP, #840]

    (596) 0x4357d0 FMOV	D9, X21

    (596) 0x4357d4 LDR	D31, [SP, #808]

    (596) 0x4357d8 LDR	D24, [SP, #816]

    (596) 0x4357dc LDR	D29, [SP, #824]

    (596) 0x4357e0 DUP	V1.2D, V0.D[0]

    (596) 0x4357e4 LDR	D22, [SP, #832]

    (596) 0x4357e8 DUP	V30.2D, V31.D[0]

    (596) 0x4357ec LDR	D2, [SP, #848]

    (596) 0x4357f0 DUP	V23.2D, V24.D[0]

    (596) 0x4357f4 STR	Q1, [SP, #448]

    (596) 0x4357f8 DUP	V1.2D, V9.D[0]

    (596) 0x4357fc LDR	D3, [SP, #856]

    (596) 0x435800 DUP	V27.2D, V29.D[0]

    (596) 0x435804 STR	Q30, [SP, #416]

    (596) 0x435808 LDR	D7, [SP, #872]

    (596) 0x43580c DUP	V21.2D, V22.D[0]

    (596) 0x435810 STR	Q23, [SP, #432]

    (596) 0x435814 LDR	D10, [SP, #888]

    (596) 0x435818 DUP	V14.2D, V2.D[0]

    (596) 0x43581c STR	Q27, [SP, #688]

    (596) 0x435820 LDR	D5, [SP, #864]

    (596) 0x435824 DUP	V4.2D, V3.D[0]

    (596) 0x435828 STR	Q21, [SP, #704]

    (596) 0x43582c LDR	D12, [SP, #896]

    (596) 0x435830 DUP	V8.2D, V7.D[0]

    (596) 0x435834 STR	Q14, [SP, #720]

    (596) 0x435838 DUP	V11.2D, V10.D[0]

    (596) 0x43583c STR	Q4, [SP, #464]

    (596) 0x435840 DUP	V0.2D, V5.D[0]

    (596) 0x435844 STR	Q8, [SP, #480]

    (596) 0x435848 DUP	V17.2D, V12.D[0]

    (596) 0x43584c STR	Q11, [SP, #496]

    (596) 0x435850 STP	D26, D25, [X16]

    (596) 0x435854 STP	D15, D19, [X16, #16]

    (596) 0x435858 STR	D18, [SP, #1032]

    (596) 0x43585c STR	D16, [SP, #1040]

    (596) 0x435860 STR	X2, [SP, #1048]

      (599) 0x435864 LDP	Q18, Q15, [X10], #32

      (599) 0x435868 MOVI	V20.4S, #2

      (599) 0x43586c MOVI	V28.4S, #3

      (599) 0x435870 MOVI	V24.4S, #1

      (599) 0x435874 LDP	W2, W20, [X4, #4]

      (599) 0x435878 ADD	X4, X4, #16

      (599) 0x43587c SBFM	X1, X2, #61, #31

      (599) 0x435880 SBFM	X5, X20, #61, #31

      (599) 0x435884 ADD	X17, X9, X1

      (599) 0x435888 ADD	X13, X1, X8

      (599) 0x43588c FMUL	V19.2D, V6.2D, V18.2D

      (599) 0x435890 ADD	X3, X1, X7

      (599) 0x435894 FMUL	V31.2D, V6.2D, V15.2D

      (599) 0x435898 FDIV	V23.2D, V6.2D, V15.2D

      (599) 0x43589c LDR	Q15, [SP, #224]

      (599) 0x4358a0 FDIV	V7.2D, V6.2D, V18.2D

      (599) 0x4358a4 FCVTZS	V16.2D, V19.2D

      (599) 0x4358a8 FCVTZS	V25.2D, V31.2D

      (599) 0x4358ac STR	Q23, [SP, #512]

      (599) 0x4358b0 FRINTZ	V26.2D, V19.2D

      (599) 0x4358b4 FRINTZ	V23.2D, V31.2D

      (599) 0x4358b8 UZP1	V13.4S, V16.4S, V25.4S

      (599) 0x4358bc FSUB	V30.2D, V19.2D, V26.2D

      (599) 0x4358c0 LDP	Q19, Q25, [SP, #352]

      (599) 0x4358c4 FSUB	V31.2D, V31.2D, V23.2D

      (599) 0x4358c8 ADD	V29.4S, V13.4S, V20.4S

      (599) 0x4358cc ADD	V22.4S, V13.4S, V28.4S

      (599) 0x4358d0 ADD	V27.4S, V13.4S, V24.4S

      (599) 0x4358d4 SSHLL	V21.2D, V13.2S, #32

      (599) 0x4358d8 SSHLL2	V20.2D, V13.4S, #32

      (599) 0x4358dc SSHLL	V2.2D, V29.2S, #32

      (599) 0x4358e0 SSHLL	V14.2D, V22.2S, #32

      (599) 0x4358e4 FMOV	X6, D21

      (599) 0x4358e8 SSHLL2	V4.2D, V22.4S, #32

      (599) 0x4358ec MOV	X21, V21.D[1]

      (599) 0x4358f0 SSHLL	V5.2D, V27.2S, #32

      (599) 0x4358f4 MOV	X18, V20.D[1]

      (599) 0x4358f8 MOV	X27, V2.D[1]

      (599) 0x4358fc SSHLL2	V3.2D, V29.4S, #32

      (599) 0x435900 FMOV	X2, D14

      (599) 0x435904 SSHLL2	V29.2D, V27.4S, #32

      (599) 0x435908 MOV	X26, V4.D[1]

      (599) 0x43590c FMUL	V23.2D, V31.2D, V31.2D

      (599) 0x435910 MOV	X1, V5.D[1]

      (599) 0x435914 MOV	X12, V14.D[1]

      (599) 0x435918 LDR	Q27, [SP, #640]

      (599) 0x43591c MOV	X30, V3.D[1]

      (599) 0x435920 LDR	D8, [X0, X27,LSL #3]

      (599) 0x435924 FMOV	X27, D4

      (599) 0x435928 LDR	D12, [X0, X2,LSL #3]

      (599) 0x43592c FMOV	X2, D5

      (599) 0x435930 LDP	Q5, Q4, [SP, #576]

      (599) 0x435934 ORR	V26.16B, V27.16B, V27.16B

      (599) 0x435938 FMOV	X16, D2

      (599) 0x43593c LDP	Q21, Q14, [SP, #608]

      (599) 0x435940 MOV	X20, V29.D[1]

      (599) 0x435944 LDR	D9, [X0, X12,LSL #3]

      (599) 0x435948 LDR	D18, [X0, X6,LSL #3]

      (599) 0x43594c FMOV	X6, D3

      (599) 0x435950 LDR	D16, [X0, X1,LSL #3]

      (599) 0x435954 ORR	V24.16B, V5.16B, V5.16B

      (599) 0x435958 MOV	V12.D[1], V9.D[0]

      (599) 0x43595c LDR	D9, [X0, X30,LSL #3]

      (599) 0x435960 FMLA	V26.2D, V30.2D, V14.2D

      (599) 0x435964 FMOV	X30, D20

      (599) 0x435968 ORR	V22.16B, V21.16B, V21.16B

      (599) 0x43596c LDR	D10, [X0, X16,LSL #3]

      (599) 0x435970 FMLA	V24.2D, V30.2D, V15.2D

      (599) 0x435974 LDR	D15, [X0, X2,LSL #3]

      (599) 0x435978 FMOV	X2, D29

      (599) 0x43597c LDR	D13, [X0, X6,LSL #3]

      (599) 0x435980 FMUL	V29.2D, V30.2D, V30.2D

      (599) 0x435984 FMLA	V22.2D, V30.2D, V4.2D

      (599) 0x435988 LDR	D28, [X0, X27,LSL #3]

      (599) 0x43598c MOV	V10.D[1], V8.D[0]

      (599) 0x435990 MOV	V15.D[1], V16.D[0]

      (599) 0x435994 LDR	D16, [X0, X26,LSL #3]

      (599) 0x435998 FMLA	V27.2D, V31.2D, V14.2D

      (599) 0x43599c LDR	D20, [X0, X30,LSL #3]

      (599) 0x4359a0 MOV	V13.D[1], V9.D[0]

      (599) 0x4359a4 FMLA	V26.2D, V29.2D, V25.2D

      (599) 0x4359a8 LDR	Q25, [SP, #368]

      (599) 0x4359ac LDR	Q3, [SP, #352]

      (599) 0x4359b0 MOV	V28.D[1], V16.D[0]

      (599) 0x4359b4 FMLA	V22.2D, V29.2D, V19.2D

      (599) 0x4359b8 LDR	D19, [X0, X2,LSL #3]

      (599) 0x4359bc LDP	Q2, Q8, [SP, #544]

      (599) 0x4359c0 FMLA	V21.2D, V31.2D, V4.2D

      (599) 0x4359c4 LDURSW	X12, [X4, #496]

      (599) 0x4359c8 LDUR	W16, [X4, #508]

      (599) 0x4359cc FMLA	V27.2D, V23.2D, V25.2D

      (599) 0x4359d0 ORR	V25.16B, V5.16B, V5.16B

      (599) 0x4359d4 LDR	D4, [X0, X21,LSL #3]

      (599) 0x4359d8 FMUL	V22.2D, V10.2D, V22.2D

      (599) 0x4359dc UBFM	X6, X12, #61, #60

      (599) 0x4359e0 LDR	Q9, [SP, #224]

      (599) 0x4359e4 FMLA	V21.2D, V23.2D, V3.2D

      (599) 0x4359e8 ORR	V11.16B, V8.16B, V8.16B

      (599) 0x4359ec SBFM	X1, X16, #61, #31

      (599) 0x4359f0 LDP	Q14, Q16, [SP, #320]

      (599) 0x4359f4 ADD	X27, X9, X1

      (599) 0x4359f8 ADD	X12, X1, X8

      (599) 0x4359fc FMUL	V3.2D, V29.2D, V1.2D

      (599) 0x435a00 ADD	X16, X1, X7

      (599) 0x435a04 FMUL	V26.2D, V12.2D, V26.2D

      (599) 0x435a08 LDR	Q5, [SP, #448]

      (599) 0x435a0c FMLA	V11.2D, V30.2D, V2.2D

      (599) 0x435a10 MOV	V18.D[1], V4.D[0]

      (599) 0x435a14 LDR	Q4, [SP, #720]

      (599) 0x435a18 FMLA	V25.2D, V31.2D, V9.2D

      (599) 0x435a1c LDR	D9, [X0, X20,LSL #3]

      (599) 0x435a20 FMLA	V16.2D, V30.2D, V14.2D

      (599) 0x435a24 ORR	V14.16B, V8.16B, V8.16B

      (599) 0x435a28 MOV	V19.D[1], V9.D[0]

      (599) 0x435a2c LDR	Q9, [SP, #304]

      (599) 0x435a30 FMUL	V8.2D, V29.2D, V30.2D

      (599) 0x435a34 FMUL	V11.2D, V10.2D, V11.2D

      (599) 0x435a38 FMLA	V14.2D, V31.2D, V2.2D

      (599) 0x435a3c FMLA	V16.2D, V29.2D, V9.2D

      (599) 0x435a40 STR	Q11, [SP, #528]

      (599) 0x435a44 LDR	Q11, [SP, #256]

      (599) 0x435a48 FMUL	V2.2D, V29.2D, V4.2D

      (599) 0x435a4c FMUL	V4.2D, V23.2D, V4.2D

      (599) 0x435a50 FMLA	V22.2D, V15.2D, V16.2D

      (599) 0x435a54 LDR	Q16, [SP, #480]

      (599) 0x435a58 FMLA	V2.2D, V8.2D, V5.2D

      (599) 0x435a5c LDR	D5, [X0, X18,LSL #3]

      (599) 0x435a60 FMLA	V3.2D, V8.2D, V16.2D

      (599) 0x435a64 LDP	Q9, Q16, [SP, #272]

      (599) 0x435a68 MOV	V20.D[1], V5.D[0]

      (599) 0x435a6c LDR	Q5, [SP, #448]

      (599) 0x435a70 FMUL	V24.2D, V12.2D, V24.2D

      (599) 0x435a74 FMUL	V21.2D, V13.2D, V21.2D

      (599) 0x435a78 FMUL	V14.2D, V13.2D, V14.2D

      (599) 0x435a7c FMUL	V25.2D, V28.2D, V25.2D

      (599) 0x435a80 FMUL	V27.2D, V28.2D, V27.2D

      (599) 0x435a84 FMLA	V16.2D, V30.2D, V9.2D

      (599) 0x435a88 FMUL	V9.2D, V23.2D, V31.2D

      (599) 0x435a8c FMLA	V16.2D, V29.2D, V11.2D

      (599) 0x435a90 FMLA	V4.2D, V9.2D, V5.2D

      (599) 0x435a94 FMLA	V26.2D, V18.2D, V16.2D

      (599) 0x435a98 LDP	Q16, Q11, [SP, #464]

      (599) 0x435a9c FMUL	V5.2D, V23.2D, V1.2D

      (599) 0x435aa0 FADD	V22.2D, V26.2D, V22.2D

      (599) 0x435aa4 FMLA	V5.2D, V9.2D, V11.2D

      (599) 0x435aa8 FMUL	V26.2D, V22.2D, V7.2D

      (599) 0x435aac LDR	Q7, [SP, #432]

      (599) 0x435ab0 ORR	V22.16B, V0.16B, V0.16B

      (599) 0x435ab4 FMLA	V22.2D, V30.2D, V16.2D

      (599) 0x435ab8 FMUL	V16.2D, V29.2D, V7.2D

      (599) 0x435abc LDP	Q11, Q7, [SP, #192]

      (599) 0x435ac0 FADD	V2.2D, V2.2D, V22.2D

      (599) 0x435ac4 FMLA	V7.2D, V30.2D, V11.2D

      (599) 0x435ac8 FMUL	V22.2D, V2.2D, V10.2D

      (599) 0x435acc LDR	Q10, [SP, #400]

      (599) 0x435ad0 LDR	Q2, [SP, #496]

      (599) 0x435ad4 FMUL	V29.2D, V29.2D, V10.2D

      (599) 0x435ad8 LDP	Q11, Q10, [SP, #416]

      (599) 0x435adc FMLA	V16.2D, V8.2D, V11.2D

      (599) 0x435ae0 LDR	Q11, [SP, #384]

      (599) 0x435ae4 FMLA	V29.2D, V8.2D, V11.2D

      (599) 0x435ae8 LDR	Q11, [SP, #528]

      (599) 0x435aec FMLA	V11.2D, V15.2D, V7.2D

      (599) 0x435af0 LDP	Q7, Q8, [SP, #160]

      (599) 0x435af4 FMLA	V8.2D, V30.2D, V7.2D

      (599) 0x435af8 ORR	V7.16B, V0.16B, V0.16B

      (599) 0x435afc FMLA	V24.2D, V18.2D, V8.2D

      (599) 0x435b00 ORR	V8.16B, V17.16B, V17.16B

      (599) 0x435b04 FMLA	V8.2D, V30.2D, V2.2D

      (599) 0x435b08 LDR	Q2, [SP, #464]

      (599) 0x435b0c FADD	V24.2D, V24.2D, V11.2D

      (599) 0x435b10 FMUL	V11.2D, V23.2D, V10.2D

      (599) 0x435b14 FMLA	V7.2D, V31.2D, V2.2D

      (599) 0x435b18 FADD	V3.2D, V3.2D, V8.2D

      (599) 0x435b1c FMUL	V8.2D, V3.2D, V12.2D

      (599) 0x435b20 LDR	Q12, [SP, #240]

      (599) 0x435b24 FADD	V4.2D, V4.2D, V7.2D

      (599) 0x435b28 LDP	Q10, Q7, [SP, #400]

      (599) 0x435b2c FMUL	V24.2D, V24.2D, V12.2D

      (599) 0x435b30 FMLA	V11.2D, V9.2D, V7.2D

      (599) 0x435b34 STR	D24, [X9, X6]

      (599) 0x435b38 LDR	Q12, [SP, #384]

      (599) 0x435b3c FMUL	V7.2D, V13.2D, V4.2D

      (599) 0x435b40 LDR	Q2, [SP, #496]

      (599) 0x435b44 ST1	{V24.D[1]}, [X17]

      (599) 0x435b48 LDP	Q13, Q3, [SP, #192]

      (599) 0x435b4c ORR	V24.16B, V17.16B, V17.16B

      (599) 0x435b50 FMUL	V10.2D, V23.2D, V10.2D

      (599) 0x435b54 FMLA	V24.2D, V31.2D, V2.2D

      (599) 0x435b58 FMLA	V10.2D, V9.2D, V12.2D

      (599) 0x435b5c LDP	Q9, Q12, [SP, #304]

      (599) 0x435b60 FMLA	V3.2D, V31.2D, V13.2D

      (599) 0x435b64 LDP	Q4, Q13, [SP, #160]

      (599) 0x435b68 FADD	V5.2D, V5.2D, V24.2D

      (599) 0x435b6c FMLA	V14.2D, V19.2D, V3.2D

      (599) 0x435b70 LDP	Q3, Q2, [SP, #656]

      (599) 0x435b74 FMUL	V28.2D, V28.2D, V5.2D

      (599) 0x435b78 FMLA	V13.2D, V31.2D, V4.2D

      (599) 0x435b7c FMLA	V25.2D, V20.2D, V13.2D

      (599) 0x435b80 LDR	Q13, [SP, #288]

      (599) 0x435b84 FADD	V14.2D, V25.2D, V14.2D

      (599) 0x435b88 LDR	Q25, [SP, #336]

      (599) 0x435b8c FMLA	V25.2D, V31.2D, V12.2D

      (599) 0x435b90 FMLA	V25.2D, V23.2D, V9.2D

      (599) 0x435b94 LDP	Q12, Q9, [SP, #256]

      (599) 0x435b98 FMLA	V21.2D, V19.2D, V25.2D

      (599) 0x435b9c FMLA	V13.2D, V31.2D, V9.2D

      (599) 0x435ba0 FMLA	V13.2D, V23.2D, V12.2D

      (599) 0x435ba4 ORR	V23.16B, V2.16B, V2.16B

      (599) 0x435ba8 FMLA	V23.2D, V30.2D, V3.2D

      (599) 0x435bac FMLA	V27.2D, V20.2D, V13.2D

      (599) 0x435bb0 FADD	V29.2D, V29.2D, V23.2D

      (599) 0x435bb4 FMLA	V8.2D, V18.2D, V29.2D

      (599) 0x435bb8 FADD	V18.2D, V27.2D, V21.2D

      (599) 0x435bbc LDR	Q21, [SP, #512]

      (599) 0x435bc0 LDP	Q27, Q13, [SP, #688]

      (599) 0x435bc4 ORR	V24.16B, V13.16B, V13.16B

      (599) 0x435bc8 FMLA	V13.2D, V31.2D, V27.2D

      (599) 0x435bcc FMLA	V24.2D, V30.2D, V27.2D

      (599) 0x435bd0 ORR	V30.16B, V2.16B, V2.16B

      (599) 0x435bd4 FMLA	V30.2D, V31.2D, V3.2D

      (599) 0x435bd8 FADD	V31.2D, V11.2D, V13.2D

      (599) 0x435bdc LDR	Q11, [SP, #240]

      (599) 0x435be0 FADD	V16.2D, V16.2D, V24.2D

      (599) 0x435be4 FMLA	V7.2D, V19.2D, V31.2D

      (599) 0x435be8 FMLA	V22.2D, V15.2D, V16.2D

      (599) 0x435bec FADD	V15.2D, V10.2D, V30.2D

      (599) 0x435bf0 FMUL	V19.2D, V18.2D, V21.2D

      (599) 0x435bf4 FMLA	V28.2D, V20.2D, V15.2D

      (599) 0x435bf8 FADD	V20.2D, V8.2D, V22.2D

      (599) 0x435bfc FMUL	V8.2D, V14.2D, V11.2D

      (599) 0x435c00 STR	D8, [X9, X5]

      (599) 0x435c04 FADD	V22.2D, V28.2D, V7.2D

      (599) 0x435c08 ST1	{V8.D[1]}, [X27]

      (599) 0x435c0c STR	D26, [X6, X8]

      (599) 0x435c10 ST1	{V26.D[1]}, [X13]

      (599) 0x435c14 STR	D19, [X5, X8]

      (599) 0x435c18 ST1	{V19.D[1]}, [X12]

      (599) 0x435c1c STR	D20, [X6, X7]

      (599) 0x435c20 ST1	{V20.D[1]}, [X3]

      (599) 0x435c24 STR	D22, [X5, X7]

      (599) 0x435c28 ST1	{V22.D[1]}, [X16]

      (599) 0x435c2c CMP	X4, X28

      (599) 0x435c30 B.NE	435864

    (596) 0x435c34 ADD	X10, SP, #936

    (596) 0x435c38 ADD	X28, SP, #968

    (596) 0x435c3c LDR	X16, [SP, #904]

    (596) 0x435c40 ADD	X17, SP, #1000

    (596) 0x435c44 AND	W27, W11, #1886

    (596) 0x435c48 LDR	X12, [SP, #920]

    (596) 0x435c4c LDR	X13, [SP, #928]

    (596) 0x435c50 LDR	D18, [SP, #1032]

    (596) 0x435c54 LDR	D16, [SP, #1040]

    (596) 0x435c58 LDR	X2, [SP, #1048]

    (596) 0x435c5c LDP	D31, D30, [X10]

    (596) 0x435c60 LDP	D24, D23, [X10, #16]

    (596) 0x435c64 LDP	D29, D27, [X28]

    (596) 0x435c68 LDP	D22, D21, [X28, #16]

    (596) 0x435c6c LDP	D26, D25, [X17]

    (596) 0x435c70 LDP	D15, D19, [X17, #16]

    (596) 0x435c74 LDR	W20, [SP, #916]

    (596) 0x435c78 CMP	W27, W11

    (596) 0x435c7c B.EQ	436078

    (600) 0x435c80 ORR	W3, WZR, W27

    (600) 0x435c84 DUP	Z14.D, Z31.D[0]

    (600) 0x435c88 DUP	Z12.D, Z27.D[0]

    (600) 0x435c8c DUP	Z13.D, Z26.D[0]

    (600) 0x435c90 DUP	Z3.D, Z30.D[0]

    (600) 0x435c94 ADD	X5, X13, X3,LSL #3

    (600) 0x435c98 SUB	W11, W11, W27

    (600) 0x435c9c DUP	Z17.D, Z29.D[0]

    (600) 0x435ca0 WHILELO	P4.S, WZR, W11

    (600) 0x435ca4 DUP	Z29.D, Z24.D[0]

    (600) 0x435ca8 PUNPKLO	P5.H, P4.B

    (600) 0x435cac PUNPKHI	P6.H, P4.B

    (600) 0x435cb0 LD1D	{Z24.D}, P5/Z, [X13, X3,LSL #3]

    (600) 0x435cb4 LD1D	{Z26.D}, P6/Z, [X5, #1, MUL VL]

    (600) 0x435cb8 FMUL	Z2.D, Z24.D, Z14.D

    (600) 0x435cbc FMUL	Z31.D, Z26.D, Z14.D

    (600) 0x435cc0 MOVPRFX	Z6, Z2

    (600) 0x435cc4 FCVTZS	Z6.S, P7/M, Z2.D

    (600) 0x435cc8 MOVPRFX	Z0, Z31

    (600) 0x435ccc FCVTZS	Z0.S, P7/M, Z31.D

    (600) 0x435cd0 UZP1	Z28.S, Z6.S, Z0.S

    (600) 0x435cd4 MOVPRFX	Z1, Z28

    (600) 0x435cd8 ADD	Z1.S, Z1.S, #1

    (600) 0x435cdc MOVPRFX	Z9, Z28

    (600) 0x435ce0 ADD	Z9.S, Z9.S, #3

    (600) 0x435ce4 SUNPKLO	Z27.D, Z1

    (600) 0x435ce8 SUNPKHI	Z30.D, Z9

    (600) 0x435cec LD1D	{Z6.D}, P5/Z, [X0, Z27.D,LSL #3]

    (600) 0x435cf0 DUP	Z5.D, Z23.D[0]

    (600) 0x435cf4 DUP	Z4.D, Z21.D[0]

    (600) 0x435cf8 MOVPRFX	Z11, Z28

    (600) 0x435cfc ADD	Z11.S, Z11.S, #2

    (600) 0x435d00 DUP	Z7.D, Z25.D[0]

    (600) 0x435d04 DUP	Z23.D, Z22.D[0]

    (600) 0x435d08 SUNPKHI	Z21.D, Z1

    (600) 0x435d0c SUNPKHI	Z22.D, Z28

    (600) 0x435d10 LD1D	{Z1.D}, P6/Z, [X0, Z30.D,LSL #3]

    (600) 0x435d14 SUNPKHI	Z8.D, Z11

    (600) 0x435d18 SUNPKLO	Z27.D, Z11

    (600) 0x435d1c SUNPKLO	Z20.D, Z9

    (600) 0x435d20 SUNPKLO	Z28.D, Z28

    (600) 0x435d24 MOVPRFX	Z30, Z2

    (600) 0x435d28 FRINTZ	Z30.D, P7/M, Z2.D

    (600) 0x435d2c FSUB	Z30.D, Z2.D, Z30.D

    (600) 0x435d30 MOVPRFX	Z2, Z7

    (600) 0x435d34 FMLA	Z2.D, P7/M, Z30.D, Z13.D

    (600) 0x435d38 LD1D	{Z0.D}, P6/Z, [X0, Z21.D,LSL #3]

    (600) 0x435d3c LD1D	{Z9.D}, P5/Z, [X0, Z20.D,LSL #3]

    (600) 0x435d40 LD1D	{Z21.D}, P6/Z, [X0, Z8.D,LSL #3]

    (600) 0x435d44 LD1D	{Z20.D}, P5/Z, [X0, Z27.D,LSL #3]

    (600) 0x435d48 LD1D	{Z8.D}, P5/Z, [X0, Z28.D,LSL #3]

    (600) 0x435d4c LD1D	{Z27.D}, P6/Z, [X0, Z22.D,LSL #3]

    (600) 0x435d50 MOVPRFX	Z28, Z12

    (600) 0x435d54 FMLA	Z28.D, P7/M, Z30.D, Z17.D

    (600) 0x435d58 FMUL	Z22.D, Z9.D, Z2.D

    (600) 0x435d5c FMUL	Z2.D, Z6.D, Z28.D

    (600) 0x435d60 LD1W	{Z25.S}, P4/Z, [X12, X3,LSL #2]

    (600) 0x435d64 MOVPRFX	Z11, Z4

    (600) 0x435d68 FMLA	Z11.D, P7/M, Z30.D, Z23.D

    (600) 0x435d6c SUNPKLO	Z10.D, Z25

    (600) 0x435d70 FMAD	Z11.D, P7/M, Z20.D, Z22.D

    (600) 0x435d74 PTRUE	P0.B, ALL

    (600) 0x435d78 MOVPRFX	Z22, Z5

    (600) 0x435d7c FMLA	Z22.D, P7/M, Z30.D, Z29.D

    (600) 0x435d80 FMAD	Z22.D, P7/M, Z8.D, Z2.D

    (600) 0x435d84 MOVPRFX	Z2, Z31

    (600) 0x435d88 FRINTZ	Z2.D, P7/M, Z31.D

    (600) 0x435d8c FADD	Z11.D, Z11.D, Z22.D

    (600) 0x435d90 FSUB	Z31.D, Z31.D, Z2.D

    (600) 0x435d94 FMUL	Z28.D, Z11.D, Z3.D

    (600) 0x435d98 FMLA	Z7.D, P7/M, Z31.D, Z13.D

    (600) 0x435d9c ST1D	{Z28.D}, P5, [X9, Z10.D,LSL #3]

    (600) 0x435da0 FMAD	Z17.D, P7/M, Z31.D, Z12.D

    (600) 0x435da4 FMAD	Z29.D, P7/M, Z31.D, Z5.D

    (600) 0x435da8 FMUL	Z17.D, Z0.D, Z17.D

    (600) 0x435dac FMAD	Z29.D, P7/M, Z27.D, Z17.D

    (600) 0x435db0 FMUL	Z28.D, Z30.D, Z30.D

    (600) 0x435db4 FMUL	Z12.D, Z1.D, Z7.D

    (600) 0x435db8 SUNPKHI	Z25.D, Z25

    (600) 0x435dbc FMAD	Z23.D, P7/M, Z31.D, Z4.D

    (600) 0x435dc0 DUP	Z16.D, Z16.D[0]

    (600) 0x435dc4 FMAD	Z23.D, P7/M, Z21.D, Z12.D

    (600) 0x435dc8 ADD	X0, SP, #768

    (600) 0x435dcc FADD	Z13.D, Z29.D, Z23.D

    (600) 0x435dd0 ADD	X6, SP, #760

    (600) 0x435dd4 FMUL	Z7.D, Z13.D, Z3.D

    (600) 0x435dd8 PTRUE	P1.B, ALL

    (600) 0x435ddc ST1D	{Z7.D}, P6, [X9, Z25.D,LSL #3]

    (600) 0x435de0 PTRUE	P2.B, ALL

    (600) 0x435de4 LD1RD	{Z22.D}, P0/Z, [X0]

    (600) 0x435de8 PTRUE	P0.B, ALL

    (600) 0x435dec MOVPRFX	Z29, Z16

    (600) 0x435df0 FMLA	Z29.D, P7/M, Z30.D, Z22.D

    (600) 0x435df4 LD1RD	{Z11.D}, P0/Z, [X6]

    (600) 0x435df8 FMLA	Z29.D, P7/M, Z28.D, Z11.D

    (600) 0x435dfc FMUL	Z29.D, Z9.D, Z29.D

    (600) 0x435e00 DUP	Z18.D, Z18.D[0]

    (600) 0x435e04 ADD	X9, SP, #1064

    (600) 0x435e08 ADD	X21, SP, #1072

    (600) 0x435e0c LD1RD	{Z13.D}, P1/Z, [X9]

    (600) 0x435e10 LD1RD	{Z17.D}, P2/Z, [X21]

    (600) 0x435e14 DUP	Z19.D, Z19.D[0]

    (600) 0x435e18 ADD	X18, SP, #752

    (600) 0x435e1c MOVPRFX	Z3, Z18

    (600) 0x435e20 FMLA	Z3.D, P7/M, Z30.D, Z19.D

    (600) 0x435e24 ADD	X26, SP, #1080

    (600) 0x435e28 FMLA	Z3.D, P7/M, Z28.D, Z17.D

    (600) 0x435e2c DUP	Z15.D, Z15.D[0]

    (600) 0x435e30 FMUL	Z3.D, Z6.D, Z3.D

    (600) 0x435e34 ADD	X4, SP, #1056

    (600) 0x435e38 ADD	X1, SP, #744

    (600) 0x435e3c PTRUE	P3.B, ALL

    (600) 0x435e40 PTRUE	P4.B, ALL

    (600) 0x435e44 LD1RD	{Z12.D}, P3/Z, [X18]

    (600) 0x435e48 LD1RD	{Z7.D}, P4/Z, [X26]

    (600) 0x435e4c PTRUE	P1.B, ALL

    (600) 0x435e50 MOVPRFX	Z4, Z7

    (600) 0x435e54 FMLA	Z4.D, P7/M, Z30.D, Z12.D

    (600) 0x435e58 LD1RD	{Z23.D}, P1/Z, [X4]

    (600) 0x435e5c PTRUE	P2.B, ALL

    (600) 0x435e60 LD1RD	{Z5.D}, P2/Z, [X1]

    (600) 0x435e64 FMLA	Z4.D, P7/M, Z28.D, Z5.D

    (600) 0x435e68 FMAD	Z4.D, P7/M, Z20.D, Z29.D

    (600) 0x435e6c MOVPRFX	Z29, Z13

    (600) 0x435e70 FMLA	Z29.D, P7/M, Z30.D, Z15.D

    (600) 0x435e74 FMLA	Z29.D, P7/M, Z28.D, Z23.D

    (600) 0x435e78 FMAD	Z29.D, P7/M, Z8.D, Z3.D

    (600) 0x435e7c FMAD	Z19.D, P7/M, Z31.D, Z18.D

    (600) 0x435e80 FMAD	Z15.D, P7/M, Z31.D, Z13.D

    (600) 0x435e84 FDUP	Z2.D, #112

    (600) 0x435e88 FADD	Z4.D, Z29.D, Z4.D

    (600) 0x435e8c FDIVR	Z26.D, P7/M, Z26.D, Z2.D

    (600) 0x435e90 FMUL	Z29.D, Z31.D, Z31.D

    (600) 0x435e94 FMAD	Z22.D, P7/M, Z31.D, Z16.D

    (600) 0x435e98 FDIVR	Z24.D, P7/M, Z24.D, Z2.D

    (600) 0x435e9c FMLA	Z22.D, P7/M, Z29.D, Z11.D

    (600) 0x435ea0 FMUL	Z24.D, Z24.D, Z14.D

    (600) 0x435ea4 PTRUE	P0.B, ALL

    (600) 0x435ea8 FMUL	Z24.D, Z4.D, Z24.D

    (600) 0x435eac ST1D	{Z24.D}, P5, [X8, Z10.D,LSL #3]

    (600) 0x435eb0 FMAD	Z12.D, P7/M, Z31.D, Z7.D

    (600) 0x435eb4 FMAD	Z17.D, P7/M, Z29.D, Z19.D

    (600) 0x435eb8 FMUL	Z14.D, Z26.D, Z14.D

    (600) 0x435ebc FMUL	Z19.D, Z1.D, Z22.D

    (600) 0x435ec0 FMUL	Z26.D, Z0.D, Z17.D

    (600) 0x435ec4 FMAD	Z5.D, P7/M, Z29.D, Z12.D

    (600) 0x435ec8 FMAD	Z23.D, P7/M, Z29.D, Z15.D

    (600) 0x435ecc FMAD	Z5.D, P7/M, Z21.D, Z19.D

    (600) 0x435ed0 FMAD	Z23.D, P7/M, Z27.D, Z26.D

    (600) 0x435ed4 PTRUE	P3.B, ALL

    (600) 0x435ed8 FADD	Z18.D, Z23.D, Z5.D

    (600) 0x435edc PTRUE	P4.B, ALL

    (600) 0x435ee0 FMUL	Z22.D, Z18.D, Z14.D

    (600) 0x435ee4 PTRUE	P1.B, ALL

    (600) 0x435ee8 ST1D	{Z22.D}, P6, [X8, Z25.D,LSL #3]

    (600) 0x435eec PTRUE	P2.B, ALL

    (600) 0x435ef0 ADD	X30, SP, #784

    (600) 0x435ef4 LD1RD	{Z15.D}, P0/Z, [X30]

    (600) 0x435ef8 PTRUE	P0.B, ALL

    (600) 0x435efc ADD	X8, SP, #816

    (600) 0x435f00 ADD	X27, SP, #880

    (600) 0x435f04 LD1RD	{Z12.D}, P3/Z, [X8]

    (600) 0x435f08 LD1RD	{Z13.D}, P4/Z, [X27]

    (600) 0x435f0c PTRUE	P3.B, ALL

    (600) 0x435f10 PTRUE	P4.B, ALL

    (600) 0x435f14 ADD	X10, SP, #808

    (600) 0x435f18 ADD	X28, SP, #824

    (600) 0x435f1c LD1RD	{Z14.D}, P1/Z, [X10]

    (600) 0x435f20 LD1RD	{Z22.D}, P2/Z, [X28]

    (600) 0x435f24 PTRUE	P1.B, ALL

    (600) 0x435f28 PTRUE	P2.B, ALL

    (600) 0x435f2c ADD	X17, SP, #832

    (600) 0x435f30 ADD	X3, SP, #848

    (600) 0x435f34 LD1RD	{Z7.D}, P3/Z, [X17]

    (600) 0x435f38 LD1RD	{Z17.D}, P4/Z, [X3]

    (600) 0x435f3c ADD	X11, SP, #872

    (600) 0x435f40 ADD	X5, SP, #888

    (600) 0x435f44 LD1RD	{Z18.D}, P0/Z, [X11]

    (600) 0x435f48 LD1RD	{Z24.D}, P1/Z, [X5]

    (600) 0x435f4c PTRUE	P0.B, ALL

    (600) 0x435f50 ADD	X0, SP, #896

    (600) 0x435f54 ADD	X18, SP, #800

    (600) 0x435f58 LD1RD	{Z2.D}, P2/Z, [X0]

    (600) 0x435f5c LD1RD	{Z11.D}, P0/Z, [X18]

    (600) 0x435f60 FMUL	Z26.D, Z28.D, Z12.D

    (600) 0x435f64 ADD	X8, SP, #1088

    (600) 0x435f68 PTRUE	P3.B, ALL

    (600) 0x435f6c STR	Z7, [X8, #1, MUL VL]

    (600) 0x435f70 ORR	Z19.D, Z7.D, Z7.D

    (600) 0x435f74 ADD	X9, SP, #776

    (600) 0x435f78 FMUL	Z7.D, Z28.D, Z15.D

    (600) 0x435f7c LD1RD	{Z16.D}, P3/Z, [X9]

    (600) 0x435f80 ADD	X26, SP, #1088

    (600) 0x435f84 STR	Z11, [X26, MUL VL]

    (600) 0x435f88 FMUL	Z11.D, Z30.D, Z28.D

    (600) 0x435f8c FMLA	Z26.D, P7/M, Z11.D, Z14.D

    (600) 0x435f90 FMLA	Z7.D, P7/M, Z11.D, Z16.D

    (600) 0x435f94 FMLA	Z19.D, P7/M, Z30.D, Z22.D

    (600) 0x435f98 ADD	X21, SP, #792

    (600) 0x435f9c FADD	Z19.D, Z19.D, Z26.D

    (600) 0x435fa0 LDR	Z26, [X8, MUL VL]

    (600) 0x435fa4 FMUL	Z6.D, Z19.D, Z6.D

    (600) 0x435fa8 ADD	X6, SP, #840

    (600) 0x435fac ADD	X4, SP, #856

    (600) 0x435fb0 PTRUE	P4.B, ALL

    (600) 0x435fb4 ADD	X1, SP, #864

    (600) 0x435fb8 LD1RD	{Z23.D}, P4/Z, [X21]

    (600) 0x435fbc PTRUE	P1.B, ALL

    (600) 0x435fc0 FMLA	Z26.D, P7/M, Z30.D, Z23.D

    (600) 0x435fc4 LD1RD	{Z3.D}, P1/Z, [X6]

    (600) 0x435fc8 FADD	Z26.D, Z26.D, Z7.D

    (600) 0x435fcc PTRUE	P2.B, ALL

    (600) 0x435fd0 FMUL	Z7.D, Z28.D, Z13.D

    (600) 0x435fd4 LD1RD	{Z5.D}, P2/Z, [X4]

    (600) 0x435fd8 FMAD	Z26.D, P7/M, Z8.D, Z6.D

    (600) 0x435fdc FMLA	Z7.D, P7/M, Z11.D, Z18.D

    (600) 0x435fe0 FMUL	Z8.D, Z28.D, Z17.D

    (600) 0x435fe4 PTRUE	P3.B, ALL

    (600) 0x435fe8 MOVPRFX	Z28, Z2

    (600) 0x435fec FMLA	Z28.D, P7/M, Z30.D, Z24.D

    (600) 0x435ff0 LD1RD	{Z4.D}, P3/Z, [X1]

    (600) 0x435ff4 FMLA	Z8.D, P7/M, Z11.D, Z3.D

    (600) 0x435ff8 FMAD	Z30.D, P7/M, Z5.D, Z4.D

    (600) 0x435ffc FADD	Z11.D, Z7.D, Z28.D

    (600) 0x436000 FADD	Z30.D, Z30.D, Z8.D

    (600) 0x436004 FMUL	Z9.D, Z11.D, Z9.D

    (600) 0x436008 FMAD	Z20.D, P7/M, Z30.D, Z9.D

    (600) 0x43600c FADD	Z20.D, Z26.D, Z20.D

    (600) 0x436010 ST1D	{Z20.D}, P5, [X7, Z10.D,LSL #3]

    (600) 0x436014 LDR	Z10, [X8, #1, MUL VL]

    (600) 0x436018 FMAD	Z22.D, P7/M, Z31.D, Z10.D

    (600) 0x43601c LDR	Z19, [X8, MUL VL]

    (600) 0x436020 FMUL	Z12.D, Z29.D, Z12.D

    (600) 0x436024 FMUL	Z15.D, Z29.D, Z15.D

    (600) 0x436028 FMAD	Z23.D, P7/M, Z31.D, Z19.D

    (600) 0x43602c FMUL	Z13.D, Z29.D, Z13.D

    (600) 0x436030 FMUL	Z17.D, Z29.D, Z17.D

    (600) 0x436034 FMAD	Z24.D, P7/M, Z31.D, Z2.D

    (600) 0x436038 FMUL	Z29.D, Z31.D, Z29.D

    (600) 0x43603c FMAD	Z31.D, P7/M, Z5.D, Z4.D

    (600) 0x436040 FMAD	Z14.D, P7/M, Z29.D, Z12.D

    (600) 0x436044 FMAD	Z18.D, P7/M, Z29.D, Z13.D

    (600) 0x436048 FADD	Z14.D, Z22.D, Z14.D

    (600) 0x43604c FMAD	Z16.D, P7/M, Z29.D, Z15.D

    (600) 0x436050 FMUL	Z0.D, Z0.D, Z14.D

    (600) 0x436054 FADD	Z22.D, Z23.D, Z16.D

    (600) 0x436058 FMAD	Z29.D, P7/M, Z3.D, Z17.D

    (600) 0x43605c FMAD	Z27.D, P7/M, Z22.D, Z0.D

    (600) 0x436060 FADD	Z18.D, Z24.D, Z18.D

    (600) 0x436064 FADD	Z31.D, Z31.D, Z29.D

    (600) 0x436068 FMUL	Z1.D, Z1.D, Z18.D

    (600) 0x43606c FMAD	Z21.D, P7/M, Z31.D, Z1.D

    (600) 0x436070 FADD	Z21.D, Z27.D, Z21.D

    (600) 0x436074 ST1D	{Z21.D}, P6, [X7, Z25.D,LSL #3]

    (596) 0x436078 CMP	X16, X2

    (596) 0x43607c B.NE	43530c

(601) 0x436080 LDP	D8, D9, [SP, #96]

(601) 0x436084 LDP	D10, D11, [SP, #112]

(601) 0x436088 LDP	D12, D13, [SP, #128]

(601) 0x43608c LDP	D14, D15, [SP, #144]

(601) 0x436090 LDP	X29, X30, [SP]

(601) 0x436094 LDP	X19, X20, [SP, #16]

(601) 0x436098 LDP	X21, X22, [SP, #32]

(601) 0x43609c LDP	X23, X24, [SP, #48]

(601) 0x4360a0 LDP	X25, X26, [SP, #64]

(601) 0x4360a4 LDP	X27, X28, [SP, #80]

(601) 0x4360a8 ADDVL	SP, SP, #2

(601) 0x4360ac ADD	SP, SP, #1088

(601) 0x4360b0 RET

  (598) 0x4360b4 MOVZ	W27, #0

  (598) 0x4360b8 ADD	X9, X23, X17

  (598) 0x4360bc ADD	X8, X24, X17

  (598) 0x4360c0 ADD	X7, X25, X17

  (598) 0x4360c4 B	435c80

    (596) 0x4360c8 CMP	W19, W10

    (596) 0x4360cc B.EQ	435394

    (596) 0x4360d0 MOVZ	X21, #0

    (596) 0x4360d4 MOVZ	W11, #1

    (596) 0x4360d8 STR	WZR, [X12, X21]

    (596) 0x4360dc STR	D28, [X13, X21]

    (596) 0x4360e0 B	435394

0x4360e4 HINT	#0

0x4360e8 HINT	#0

0x4360ec HINT	#0

0x4360f0 HINT	#0

0x4360f4 HINT	#0

0x4360f8 HINT	#0

0x4360fc HINT	#0

Coverage (%)	Name	Source Location	Module
►99.02+	miniqmcreference::TwoBodyJastr[...]	TwoBodyJastrowRef.h:315	exec
○	qmcplusplus::WaveFunction::acc[...]	NewTimer.h:249	exec
○	main._omp_fn.1	miniqmc.cpp:451	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_4

Source file and lines	TwoBodyJastrowRef.h:254-279
Module	exec

The function is defined in:

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h:1147-1150
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:254,262,268-271,279
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_algobase.h:238,952,1146-1151
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:276-284,291-298,305-336

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 6.38 to 2.00 cycles (3.19x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 61% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 6.38 to 5.33 cycles (1.20x speedup).

Details

12% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
40% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 6.38 to 1.50 cycles (4.25x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 64 bytes. The binary function is storing 160 bytes.

General properties

nb instructions	58
loop length	232
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

6.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	3.00	3.00	4.83	4.83	4.83	4.83	4.83	4.83	2.00	2.00	0.00	0.00	6.33	6.33	6.33	3.00	3.00
cycles	3.00	3.00	4.83	4.83	4.83	4.83	4.83	4.83	2.00	2.00	0.00	0.00	6.33	6.33	6.33	3.00	3.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.38
Overall L1	6.38

Vectorization ratios

all	12%
load	0%
store	40%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 6.38 cycles. At this rate:

10% of peak load performance is reached (10.04 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
52% of peak store performance is reached (25.10 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 435240

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
ADDVL SP, SP, #62	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
SUB SP, SP, #1088	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR W19, WZR, W2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR W20, WZR, W2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X21, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X22, XZR, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X24, XZR, X5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X23, XZR, X6	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X26, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X25, XZR, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
TBNZ W7, #0, 43528c <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9computeU3ERKNS1_11ParticleSetEiPKdPdSA_SA_b+0x4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W20, [X0, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP W20, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 4352c8 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9computeU3ERKNS1_11ParticleSetEiPKdPdSA_SA_b+0x88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X27, X20, #61, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ W1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
ORR X2, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X0, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 403e90 <@plt_start@+0x1b0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ W1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 403e90 <@plt_start@+0x1b0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X0, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
BL 403e90 <@plt_start@+0x1b0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [X26, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [X21, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR W1, [X0, X19,SXTW #2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
MADD W3, W1, W16, WZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
CBZ X16, 436090 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9computeU3ERKNS1_11ParticleSetEiPKdPdSA_SA_b+0xe50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
MOVZ X2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
PTRUE P7.B, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	scal (100.0%)
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDR X4, [X26, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [X21, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X12, [X21, #488]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X14, [X4, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X5, [X21, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, X5, W3,SXTW #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_4

Source file and lines	TwoBodyJastrowRef.h:254-279
Module	exec

The function is defined in:

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h:1147-1150
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:254,262,268-271,279
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_algobase.h:238,952,1146-1151
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:276-284,291-298,305-336

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 6.38 to 2.00 cycles (3.19x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

12% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
40% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 6.38 to 1.50 cycles (4.25x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 64 bytes. The binary function is storing 160 bytes.

General properties

nb instructions	58
loop length	232
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

6.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	3.00	3.00	4.83	4.83	4.83	4.83	4.83	4.83	2.00	2.00	0.00	0.00	6.33	6.33	6.33	3.00	3.00
cycles	3.00	3.00	4.83	4.83	4.83	4.83	4.83	4.83	2.00	2.00	0.00	0.00	6.33	6.33	6.33	3.00	3.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.38
Overall L1	6.38

Vectorization ratios

all	12%
load	0%
store	40%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 6.38 cycles. At this rate:

10% of peak load performance is reached (10.04 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
52% of peak store performance is reached (25.10 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 435240

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
ADDVL SP, SP, #62	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
SUB SP, SP, #1088	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR W19, WZR, W2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR W20, WZR, W2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X21, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X22, XZR, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X24, XZR, X5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X23, XZR, X6	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X26, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X25, XZR, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
TBNZ W7, #0, 43528c <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9computeU3ERKNS1_11ParticleSetEiPKdPdSA_SA_b+0x4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W20, [X0, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP W20, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 4352c8 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9computeU3ERKNS1_11ParticleSetEiPKdPdSA_SA_b+0x88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X27, X20, #61, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ W1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
ORR X2, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X0, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 403e90 <@plt_start@+0x1b0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ W1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 403e90 <@plt_start@+0x1b0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X0, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
BL 403e90 <@plt_start@+0x1b0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [X26, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [X21, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR W1, [X0, X19,SXTW #2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
MADD W3, W1, W16, WZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
CBZ X16, 436090 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9computeU3ERKNS1_11ParticleSetEiPKdPdSA_SA_b+0xe50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
MOVZ X2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
PTRUE P7.B, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	scal (100.0%)
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDR X4, [X26, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [X21, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X12, [X21, #488]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X14, [X4, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X5, [X21, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, X5, W3,SXTW #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::TwoBodyJastrowRef >::computeU3(qmcplusplus::ParticleSet const&, int, double const, double, double, double, bool)–	0.17	0.23
▼Loop 601 - TwoBodyJastrowRef.h:269-279 - exec–	0.00	0.00
▼Loop 598 - TwoBodyJastrowRef.h:269-271 - exec–	0.00	0.00
▼Loop 596 - TwoBodyJastrowRef.h:269-271 - exec–	0.01	0.01
○Loop 597 - BsplineFunctor.h:291-298 - exec	0.14	0.19
○Loop 599 - BsplineFunctor.h:305-336 - exec	0.01	0.02
○Loop 600 - BsplineFunctor.h:305-336 - exec	0.00	0.01

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code