OV - exec - Function miniqmcreference::OneBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateLog(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib<qmcplusplus::TinyVector<double, 3u>, std::allocator<qmcplusplus::TinyVector<double, 3u> > >&, qmcplusplus::ParticleAttrib<double, std::allocator<double> >&)

	Function: miniqmcreference::OneBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateLog(qmc ...	Module: exec	Source: OneBodyJastrowRef.h:106-237 [...]	Coverage (incl. loops): 0.01% \| (excl. loops): 0.00%

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_numeric.h: 140 - 141

--------------------------------------------------------------------------------

140:       for (; __first != __last; ++__first)

141: 	__init = _GLIBCXX_MOVE_IF_20(__init) + *__first;

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h: 1131 - 1263

--------------------------------------------------------------------------------

1131: 	return *(this->_M_impl._M_start + __n);

[...]

1147:       operator[](size_type __n) const _GLIBCXX_NOEXCEPT

1148:       {

1149: 	__glibcxx_requires_subscript(__n);

1150: 	return *(this->_M_impl._M_start + __n);

[...]

1263:       { return _M_data_ptr(this->_M_impl._M_start); }

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/shared_ptr_base.h: 1667 - 1667

--------------------------------------------------------------------------------

1667:       { return _M_ptr; }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h: 106 - 237

--------------------------------------------------------------------------------

106:   void recompute(ParticleSet& P)

107:   {

108:     const auto& d_ie = P.getDistTableAB(myTableID);

109:     for (int iat = 0; iat < Nelec; ++iat)

110:     {

111:       computeU3(P, iat, d_ie.getDistRow(iat).data());

112:       Vat[iat] = std::accumulate(U.begin(), U.begin() + Nions, valT());

113:       Lap[iat] = accumulateGL(dU.data(), d2U.data(), d_ie.getDisplRow(iat), Grad[iat]);

114:     }

115:   }

116:

117:   RealType evaluateLog(ParticleSet& P,

118:                        ParticleSet::ParticleGradient& G,

119:                        ParticleSet::ParticleLaplacian& L)

120:   {

121:     evaluateGL(P, G, L, true);

122:     return LogValue;

123:   }

[...]

169:     for (size_t iat = 0; iat < Nelec; ++iat)

170:       G[iat] += Grad[iat];

171:     for (size_t iat = 0; iat < Nelec; ++iat)

172:       L[iat] -= Lap[iat];

173:     LogValue = -std::accumulate(Vat.begin(), Vat.begin() + Nelec, valT());

174:   }

[...]

184:     valT lap(0);

185:     constexpr valT lapfac = OHMMS_DIM - RealType(1);

186:     for (int jat = 0; jat < Nions; ++jat)

187:       lap += d2u[jat] + lapfac * du[jat];

188:     for (int idim = 0; idim < OHMMS_DIM; ++idim)

189:     {

190:       const valT* restrict dX = displ.data(idim);

191:       valT s                  = valT();

192:       for (int jat = 0; jat < Nions; ++jat)

193:         s += du[jat] * dX[jat];

194:       grad[idim] = s;

[...]

207:     if (NumGroups > 0)

[...]

214:       for (int jg = 0; jg < NumGroups; ++jg)

215:       {

216:         if (F[jg] == nullptr)

[...]

231:       for (int c = 0; c < Nions; ++c)

232:       {

233:         int gid = Ions.GroupID[c];

234:         if (F[gid] != nullptr)

235:         {

236:           U[c] = F[gid]->evaluate(dist[c], dU[c], d2U[c]);

237:           dU[c] /= dist[c];

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 221 - 249

--------------------------------------------------------------------------------

221:   inline Type_t& operator[](size_t i)

222:   {

223:     return X[i];

[...]

229:     return X[i];

[...]

242:   inline iterator begin() { return X; }

[...]

249:   inline const_pointer data() const { return X; }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 313 - 316

--------------------------------------------------------------------------------

313:   inline int first(int igroup) const { return (*group_offsets_)[igroup]; }

314:

315:   ///return the last index of a group i

316:   inline int last(int igroup) const { return (*group_offsets_)[igroup + 1]; }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 94 - 94

--------------------------------------------------------------------------------

94:     (const_cast<T1&>(a) += b);

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_algobase.h: 952 - 1151

--------------------------------------------------------------------------------

952: 	*__first = __tmp;

[...]

1146:       if (__n <= 0)

1147: 	return __first;

1148:

1149:       __glibcxx_requires_can_increment(__first, __n);

1150:

1151:       std::__fill_a(__first, __first + __n, __value);

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_iterator.h: 1068 - 1139

--------------------------------------------------------------------------------

1068:       : _M_current(__i) { }

[...]

1139:       { return __normal_iterator(_M_current + __n); }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 188 - 336

--------------------------------------------------------------------------------

188:     if (r >= cutoff_radius)

189:     {

190:       dudr = d2udr2 = 0.0;

191:       return 0.0;

[...]

276:   real_type dSquareDeltaRinv = DeltaRInv * DeltaRInv;

277:   constexpr real_type cOne(1);

278:

279:   //    START_MARK_FIRST();

280:

281:   ASSUME_ALIGNED(distIndices);

282:   ASSUME_ALIGNED(distArrayCompressed);

283:   int iCount                 = 0;

284:   int iLimit                 = iEnd - iStart;

[...]

291:   for (int jat = 0; jat < iLimit; jat++)

292:   {

293:     real_type r = distArray[jat];

294:     if (r < cutoff_radius && iStart + jat != iat)

295:     {

296:       distIndices[iCount]         = jat;

297:       distArrayCompressed[iCount] = r;

298:       iCount++;

[...]

305:     real_type r    = distArrayCompressed[j];

306:     int iScatter   = distIndices[j];

307:     real_type rinv = cOne / r;

308:     r *= DeltaRInv;

309:     int iGather   = (int)r;

310:     real_type t   = r - real_type(iGather);

311:     real_type tp0 = t * t * t;

312:     real_type tp1 = t * t;

313:     real_type tp2 = t;

314:

315:     real_type sCoef0 = SplineCoefs[iGather + 0];

316:     real_type sCoef1 = SplineCoefs[iGather + 1];

317:     real_type sCoef2 = SplineCoefs[iGather + 2];

318:     real_type sCoef3 = SplineCoefs[iGather + 3];

319:

320:     // clang-format off

321:     laplArray[iScatter] = dSquareDeltaRinv *

322:       (sCoef0*( d2A[ 2]*tp2 + d2A[ 3])+

323:        sCoef1*( d2A[ 6]*tp2 + d2A[ 7])+

324:        sCoef2*( d2A[10]*tp2 + d2A[11])+

325:        sCoef3*( d2A[14]*tp2 + d2A[15]));

326:

327:     gradArray[iScatter] = DeltaRInv * rinv *

328:       (sCoef0*( dA[ 1]*tp1 + dA[ 2]*tp2 + dA[ 3])+

329:        sCoef1*( dA[ 5]*tp1 + dA[ 6]*tp2 + dA[ 7])+

330:        sCoef2*( dA[ 9]*tp1 + dA[10]*tp2 + dA[11])+

331:        sCoef3*( dA[13]*tp1 + dA[14]*tp2 + dA[15]));

332:

333:     valArray[iScatter] = (sCoef0*(A[ 0]*tp0 + A[ 1]*tp1 + A[ 2]*tp2 + A[ 3])+

334:         sCoef1*(A[ 4]*tp0 + A[ 5]*tp1 + A[ 6]*tp2 + A[ 7])+

335:         sCoef2*(A[ 8]*tp0 + A[ 9]*tp1 + A[10]*tp2 + A[11])+

336:         sCoef3*(A[12]*tp0 + A[13]*tp1 + A[14]*tp2 + A[15]));

0x41e660 ADDVL	SP, SP, #62

0x41e664 ADRP	X4,

0x41e668 SUB	SP, SP, #1216

0x41e66c ADD	X5, X4, #3200

0x41e670 STP	X29, X30, [SP]

0x41e674 ADD	X29, SP, #0

0x41e678 STP	X19, X20, [SP, #16]

0x41e67c ORR	X20, XZR, X0

0x41e680 LDR	X6, [X0]

0x41e684 LDR	X7, [X6, #56]

0x41e688 CMP	X7, X5

0x41e68c B.NE	420134

0x41e690 ORR	X0, XZR, X1

0x41e694 STP	X21, X22, [SP, #32]

0x41e698 ORR	X21, XZR, X2

0x41e69c ORR	X22, XZR, X3

0x41e6a0 LDR	W1, [X20, #168]

0x41e6a4 BL	47e08c

0x41e6a8 LDR	W14, [X20, #148]

0x41e6ac CMP	W14, #0

0x41e6b0 B.LE	41f944

0x41e6b4 STP	X23, X24, [SP, #48]

0x41e6b8 ADD	X2, X20, #376

0x41e6bc ADD	X23, X20, #416

0x41e6c0 STP	X25, X26, [SP, #64]

0x41e6c4 MOVZ	X25, #0

0x41e6c8 STP	X27, X28, [SP, #80]

0x41e6cc ADD	X27, X0, #96

0x41e6d0 ADD	X28, X20, #216

0x41e6d4 STP	D8, D9, [SP, #96]

0x41e6d8 STP	D10, D11, [SP, #112]

0x41e6dc STP	D12, D13, [SP, #128]

0x41e6e0 STP	D14, D15, [SP, #144]

0x41e6e4 LDR	X1, [X0, #72]

0x41e6e8 STR	X22, [SP, #1208]

0x41e6ec ORR	W22, WZR, W14

0x41e6f0 LDR	X19, [X20, #280]

0x41e6f4 STR	X2, [SP, #1192]

0x41e6f8 LDR	X24, [X20, #304]

0x41e6fc ADD	X26, X1, #24

0x41e700 STR	X21, [SP, #1200]

0x41e704 LDR	W3, [X20, #144]

      (333) 0x41e708 MOVZ	W8, #40

      (333) 0x41e70c LDR	W9, [X20, #152]

      (333) 0x41e710 UMADDL	X5, W25, W8, XZR

      (333) 0x41e714 LDR	X21, [X26]

      (333) 0x41e718 CMP	W9, #0

      (333) 0x41e71c B.LE	41fd7c

      (333) 0x41e720 LDR	X22, [X20, #256]

      (333) 0x41e724 CMP	W3, #0

      (333) 0x41e728 B.LE	41e76c

      (333) 0x41e72c UBFM	X2, X3, #61, #31

      (333) 0x41e730 MOVZ	W1, #0

      (333) 0x41e734 STR	W9, [SP, #176]

      (333) 0x41e738 ORR	X0, XZR, X22

      (333) 0x41e73c STP	X2, X5, [SP, #160]

      (333) 0x41e740 BL	403e90

      (333) 0x41e744 LDR	X2, [SP, #160]

      (333) 0x41e748 MOVZ	W1, #0

      (333) 0x41e74c ORR	X0, XZR, X19

      (333) 0x41e750 BL	403e90

      (333) 0x41e754 LDR	X2, [SP, #160]

      (333) 0x41e758 ORR	X0, XZR, X24

      (333) 0x41e75c MOVZ	W1, #0

      (333) 0x41e760 BL	403e90

      (333) 0x41e764 LDR	X5, [SP, #168]

      (333) 0x41e768 LDR	W9, [SP, #176]

      (333) 0x41e76c MOVZ	X4, #0

      (333) 0x41e770 MOVZ	X3, #0

      (333) 0x41e774 LDR	X16, [X20, #456]

      (333) 0x41e778 ORR	X17, XZR, X5

      (333) 0x41e77c HINT	#0

        (332) 0x41e780 LDR	X13, [X16, X3,LSL #3]

        (332) 0x41e784 CBZ	X13, 41f4d4

        (332) 0x41e788 LDR	X11, [X20, #160]

        (332) 0x41e78c LDR	D31, [X13, #568]

        (332) 0x41e790 LDR	X6, [X20, #328]

        (332) 0x41e794 LDR	X12, [X11, #616]

        (332) 0x41e798 LDR	X5, [X20, #352]

        (332) 0x41e79c FMUL	D28, D31, D31

        (332) 0x41e7a0 LDR	X14, [X12, #24]

        (332) 0x41e7a4 ADD	X15, X14, X4

        (332) 0x41e7a8 LDR	W18, [X14, X4]

        (332) 0x41e7ac LDR	W8, [X15, #4]

        (332) 0x41e7b0 SUB	W7, W8, W18

        (332) 0x41e7b4 CMP	W7, #0

        (332) 0x41e7b8 B.LE	41f4d4

        (332) 0x41e7bc SBFM	X30, X18, #61, #31

        (332) 0x41e7c0 ANDS	X2, X7, #4224

        (332) 0x41e7c4 LDR	D27, [X13, #8]

        (332) 0x41e7c8 MOVZ	X0, #0

        (332) 0x41e7cc MOVZ	W1, #0

        (332) 0x41e7d0 ADD	X9, X21, X30

        (332) 0x41e7d4 SBFM	X10, X7, #0, #31

        (332) 0x41e7d8 B.EQ	41e92c

        (332) 0x41e7dc CMP	X2, #1

        (332) 0x41e7e0 B.EQ	41e8fc

        (332) 0x41e7e4 CMP	X2, #2

        (332) 0x41e7e8 B.EQ	41e8d4

        (332) 0x41e7ec CMP	X2, #3

        (332) 0x41e7f0 B.EQ	41e8ac

        (332) 0x41e7f4 CMP	X2, #4

        (332) 0x41e7f8 B.EQ	41e884

        (332) 0x41e7fc CMP	X2, #5

        (332) 0x41e800 B.EQ	41e85c

        (332) 0x41e804 CMP	X2, #6

        (332) 0x41e808 B.EQ	41e834

        (332) 0x41e80c LDR	D29, [X21, X30]

        (332) 0x41e810 FCMPE	D29, D27

        (332) 0x41e814 B.GE	41e830

        (332) 0x41e818 CMN	W18, #1

        (332) 0x41e81c B.EQ	41e830

        (332) 0x41e820 MOVZ	X0, #0

        (332) 0x41e824 MOVZ	W1, #1

        (332) 0x41e828 STR	WZR, [X5, X0]

        (332) 0x41e82c STR	D29, [X6, X0]

        (332) 0x41e830 MOVZ	X0, #1

        (332) 0x41e834 LDR	D0, [X9, X0,LSL #3]

        (332) 0x41e838 FCMPE	D0, D27

        (332) 0x41e83c B.GE	41e858

        (332) 0x41e840 ADD	W11, W18, W0

        (332) 0x41e844 CMN	W11, #1

        (332) 0x41e848 B.EQ	41e858

        (332) 0x41e84c STR	W0, [X5, X1,UXTW #2]

        (332) 0x41e850 STR	D0, [X6, X1,UXTW #3]

        (332) 0x41e854 ADD	W1, W1, #1

        (332) 0x41e858 ADD	X0, X0, #1

        (332) 0x41e85c LDR	D1, [X9, X0,LSL #3]

        (332) 0x41e860 FCMPE	D1, D27

        (332) 0x41e864 B.GE	41e880

        (332) 0x41e868 ADD	W12, W18, W0

        (332) 0x41e86c CMN	W12, #1

        (332) 0x41e870 B.EQ	41e880

        (332) 0x41e874 STR	W0, [X5, X1,UXTW #2]

        (332) 0x41e878 STR	D1, [X6, X1,UXTW #3]

        (332) 0x41e87c ADD	W1, W1, #1

        (332) 0x41e880 ADD	X0, X0, #1

        (332) 0x41e884 LDR	D30, [X9, X0,LSL #3]

        (332) 0x41e888 FCMPE	D30, D27

        (332) 0x41e88c B.GE	41e8a8

        (332) 0x41e890 ADD	W14, W18, W0

        (332) 0x41e894 CMN	W14, #1

        (332) 0x41e898 B.EQ	41e8a8

        (332) 0x41e89c STR	W0, [X5, X1,UXTW #2]

        (332) 0x41e8a0 STR	D30, [X6, X1,UXTW #3]

        (332) 0x41e8a4 ADD	W1, W1, #1

        (332) 0x41e8a8 ADD	X0, X0, #1

        (332) 0x41e8ac LDR	D2, [X9, X0,LSL #3]

        (332) 0x41e8b0 FCMPE	D2, D27

        (332) 0x41e8b4 B.GE	41e8d0

        (332) 0x41e8b8 ADD	W15, W18, W0

        (332) 0x41e8bc CMN	W15, #1

        (332) 0x41e8c0 B.EQ	41e8d0

        (332) 0x41e8c4 STR	W0, [X5, X1,UXTW #2]

        (332) 0x41e8c8 STR	D2, [X6, X1,UXTW #3]

        (332) 0x41e8cc ADD	W1, W1, #1

        (332) 0x41e8d0 ADD	X0, X0, #1

        (332) 0x41e8d4 LDR	D3, [X9, X0,LSL #3]

        (332) 0x41e8d8 FCMPE	D3, D27

        (332) 0x41e8dc B.GE	41e8f8

        (332) 0x41e8e0 ADD	W8, W18, W0

        (332) 0x41e8e4 CMN	W8, #1

        (332) 0x41e8e8 B.EQ	41e8f8

        (332) 0x41e8ec STR	W0, [X5, X1,UXTW #2]

        (332) 0x41e8f0 STR	D3, [X6, X1,UXTW #3]

        (332) 0x41e8f4 ADD	W1, W1, #1

        (332) 0x41e8f8 ADD	X0, X0, #1

        (332) 0x41e8fc LDR	D4, [X9, X0,LSL #3]

        (332) 0x41e900 FCMPE	D4, D27

        (332) 0x41e904 B.GE	41e920

        (332) 0x41e908 ADD	W7, W18, W0

        (332) 0x41e90c CMN	W7, #1

        (332) 0x41e910 B.EQ	41e920

        (332) 0x41e914 STR	W0, [X5, X1,UXTW #2]

        (332) 0x41e918 STR	D4, [X6, X1,UXTW #3]

        (332) 0x41e91c ADD	W1, W1, #1

        (332) 0x41e920 ADD	X0, X0, #1

        (332) 0x41e924 CMP	X10, X0

        (332) 0x41e928 B.EQ	41ea74

          (334) 0x41e92c LDR	D5, [X9, X0,LSL #3]

          (334) 0x41e930 FCMPE	D5, D27

          (334) 0x41e934 B.GE	41e950

          (334) 0x41e938 ADD	W2, W18, W0

          (334) 0x41e93c CMN	W2, #1

          (334) 0x41e940 B.EQ	41e950

          (334) 0x41e944 STR	W0, [X5, X1,UXTW #2]

          (334) 0x41e948 STR	D5, [X6, X1,UXTW #3]

          (334) 0x41e94c ADD	W1, W1, #1

          (334) 0x41e950 ADD	X0, X0, #1

          (334) 0x41e954 LDR	D6, [X9, X0,LSL #3]

          (334) 0x41e958 FCMPE	D6, D27

          (334) 0x41e95c B.GE	41e978

          (334) 0x41e960 ADD	W11, W18, W0

          (334) 0x41e964 CMN	W11, #1

          (334) 0x41e968 B.EQ	41e978

          (334) 0x41e96c STR	W0, [X5, X1,UXTW #2]

          (334) 0x41e970 STR	D6, [X6, X1,UXTW #3]

          (334) 0x41e974 ADD	W1, W1, #1

          (334) 0x41e978 ADD	X14, X0, #1

          (334) 0x41e97c LDR	D7, [X9, X14,LSL #3]

          (334) 0x41e980 FCMPE	D7, D27

          (334) 0x41e984 B.GE	41e9a0

          (334) 0x41e988 ADD	W12, W18, W14

          (334) 0x41e98c CMN	W12, #1

          (334) 0x41e990 B.EQ	41e9a0

          (334) 0x41e994 STR	W14, [X5, X1,UXTW #2]

          (334) 0x41e998 STR	D7, [X6, X1,UXTW #3]

          (334) 0x41e99c ADD	W1, W1, #1

          (334) 0x41e9a0 ADD	X15, X0, #2

          (334) 0x41e9a4 LDR	D8, [X9, X15,LSL #3]

          (334) 0x41e9a8 FCMPE	D8, D27

          (334) 0x41e9ac B.GE	41e9c8

          (334) 0x41e9b0 ADD	W8, W18, W15

          (334) 0x41e9b4 CMN	W8, #1

          (334) 0x41e9b8 B.EQ	41e9c8

          (334) 0x41e9bc STR	W15, [X5, X1,UXTW #2]

          (334) 0x41e9c0 STR	D8, [X6, X1,UXTW #3]

          (334) 0x41e9c4 ADD	W1, W1, #1

          (334) 0x41e9c8 ADD	X7, X0, #3

          (334) 0x41e9cc LDR	D9, [X9, X7,LSL #3]

          (334) 0x41e9d0 FCMPE	D9, D27

          (334) 0x41e9d4 B.GE	41e9f0

          (334) 0x41e9d8 ADD	W2, W18, W7

          (334) 0x41e9dc CMN	W2, #1

          (334) 0x41e9e0 B.EQ	41e9f0

          (334) 0x41e9e4 STR	W7, [X5, X1,UXTW #2]

          (334) 0x41e9e8 STR	D9, [X6, X1,UXTW #3]

          (334) 0x41e9ec ADD	W1, W1, #1

          (334) 0x41e9f0 ADD	X11, X0, #4

          (334) 0x41e9f4 LDR	D10, [X9, X11,LSL #3]

          (334) 0x41e9f8 FCMPE	D10, D27

          (334) 0x41e9fc B.GE	41ea18

          (334) 0x41ea00 ADD	W14, W18, W11

          (334) 0x41ea04 CMN	W14, #1

          (334) 0x41ea08 B.EQ	41ea18

          (334) 0x41ea0c STR	W11, [X5, X1,UXTW #2]

          (334) 0x41ea10 STR	D10, [X6, X1,UXTW #3]

          (334) 0x41ea14 ADD	W1, W1, #1

          (334) 0x41ea18 ADD	X15, X0, #5

          (334) 0x41ea1c LDR	D11, [X9, X15,LSL #3]

          (334) 0x41ea20 FCMPE	D11, D27

          (334) 0x41ea24 B.GE	41ea40

          (334) 0x41ea28 ADD	W12, W18, W15

          (334) 0x41ea2c CMN	W12, #1

          (334) 0x41ea30 B.EQ	41ea40

          (334) 0x41ea34 STR	W15, [X5, X1,UXTW #2]

          (334) 0x41ea38 STR	D11, [X6, X1,UXTW #3]

          (334) 0x41ea3c ADD	W1, W1, #1

          (334) 0x41ea40 ADD	X8, X0, #6

          (334) 0x41ea44 LDR	D12, [X9, X8,LSL #3]

          (334) 0x41ea48 FCMPE	D12, D27

          (334) 0x41ea4c B.GE	41ea68

          (334) 0x41ea50 ADD	W7, W18, W8

          (334) 0x41ea54 CMN	W7, #1

          (334) 0x41ea58 B.EQ	41ea68

          (334) 0x41ea5c STR	W8, [X5, X1,UXTW #2]

          (334) 0x41ea60 STR	D12, [X6, X1,UXTW #3]

          (334) 0x41ea64 ADD	W1, W1, #1

          (334) 0x41ea68 ADD	X0, X0, #7

          (334) 0x41ea6c CMP	X10, X0

          (334) 0x41ea70 B.NE	41e92c

        (332) 0x41ea74 PTRUE	P7.B, ALL

        (332) 0x41ea78 FDUP	Z13.D, #112

        (332) 0x41ea7c CBZ	W1, 41f4d0

        (332) 0x41ea80 LDP	X10, X9, [X13, #24]

        (332) 0x41ea84 SUB	W18, W1, #1

        (332) 0x41ea88 LDR	D26, [X13, #176]

        (332) 0x41ea8c LDR	D25, [X13, #208]

        (332) 0x41ea90 LDR	D24, [X13, #240]

        (332) 0x41ea94 STP	X10, X9, [SP, #192]

        (332) 0x41ea98 LDP	D30, D1, [X13, #40]

        (332) 0x41ea9c STR	D30, [SP, #432]

        (332) 0x41eaa0 LDP	X2, X11, [X13, #56]

        (332) 0x41eaa4 STP	X2, X11, [SP, #208]

        (332) 0x41eaa8 LDP	D29, D0, [X13, #72]

        (332) 0x41eaac STR	D29, [SP, #440]

        (332) 0x41eab0 LDP	X14, X15, [X13, #88]

        (332) 0x41eab4 STP	X14, X15, [SP, #224]

        (332) 0x41eab8 LDP	D27, D14, [X13, #160]

        (332) 0x41eabc STP	D27, D26, [SP, #400]

        (332) 0x41eac0 LDP	X12, X8, [X13, #192]

        (332) 0x41eac4 STR	D25, [SP, #416]

        (332) 0x41eac8 STP	X12, X8, [SP, #160]

        (332) 0x41eacc LDP	D4, D11, [X13, #224]

        (332) 0x41ead0 STR	D24, [SP, #424]

        (332) 0x41ead4 LDP	X7, X0, [X13, #256]

        (332) 0x41ead8 LDR	D15, [X13, #272]

        (332) 0x41eadc STP	X7, X0, [SP, #176]

        (332) 0x41eae0 LDP	D17, D23, [X13, #296]

        (332) 0x41eae4 LDP	X9, X10, [X13, #104]

        (332) 0x41eae8 LDR	X0, [X13, #536]

        (332) 0x41eaec LDP	D21, D2, [X13, #328]

        (332) 0x41eaf0 LDP	D20, D16, [X13, #360]

        (332) 0x41eaf4 LDP	D3, D18, [X13, #392]

        (332) 0x41eaf8 STP	X9, X10, [SP, #240]

        (332) 0x41eafc LDP	X2, X11, [X13, #120]

        (332) 0x41eb00 STP	X2, X11, [SP, #256]

        (332) 0x41eb04 LDP	X13, X14, [X13, #136]

        (332) 0x41eb08 STP	X13, X14, [SP, #272]

        (332) 0x41eb0c CMP	W18, #2

        (332) 0x41eb10 B.LS	420030

        (332) 0x41eb14 DUP	V7.2D, V23.D[0]

        (332) 0x41eb18 DUP	V5.2D, V27.D[0]

        (332) 0x41eb1c ADD	X8, X24, X30

        (332) 0x41eb20 ADD	X7, X19, X30

        (332) 0x41eb24 LDR	D27, [SP, #160]

        (332) 0x41eb28 DUP	V12.2D, V26.D[0]

        (332) 0x41eb2c DUP	V6.2D, V30.D[0]

        (332) 0x41eb30 ADD	X2, X22, X30

        (332) 0x41eb34 ORR	X9, XZR, X5

        (332) 0x41eb38 DUP	V8.2D, V14.D[0]

        (332) 0x41eb3c DUP	V25.2D, V25.D[0]

        (332) 0x41eb40 UBFM	W12, W1, #2, #31

        (332) 0x41eb44 ADD	X15, X5, W12,UXTW #4

        (332) 0x41eb48 LDR	D26, [SP, #208]

        (332) 0x41eb4c DUP	V22.2D, V17.D[0]

        (332) 0x41eb50 DUP	V10.2D, V21.D[0]

        (332) 0x41eb54 STR	Q7, [SP, #384]

        (332) 0x41eb58 DUP	V9.2D, V1.D[0]

        (332) 0x41eb5c DUP	V24.2D, V24.D[0]

        (332) 0x41eb60 LDR	D7, [SP, #168]

        (332) 0x41eb64 DUP	V19.2D, V31.D[0]

        (332) 0x41eb68 DUP	V29.2D, V29.D[0]

        (332) 0x41eb6c STR	Q12, [SP, #592]

        (332) 0x41eb70 DUP	V12.2D, V4.D[0]

        (332) 0x41eb74 STR	Q5, [SP, #560]

        (332) 0x41eb78 DUP	V5.2D, V27.D[0]

        (332) 0x41eb7c LDR	D27, [SP, #176]

        (332) 0x41eb80 STR	Q8, [SP, #576]

        (332) 0x41eb84 DUP	V30.2D, V26.D[0]

        (332) 0x41eb88 DUP	V26.2D, V18.D[0]

        (332) 0x41eb8c STR	Q25, [SP, #640]

        (332) 0x41eb90 LDR	D25, [SP, #192]

        (332) 0x41eb94 DUP	V8.2D, V7.D[0]

        (332) 0x41eb98 STR	Q12, [SP, #656]

        (332) 0x41eb9c LDR	D7, [SP, #184]

        (332) 0x41eba0 STR	Q6, [SP, #944]

        (332) 0x41eba4 DUP	V6.2D, V20.D[0]

        (332) 0x41eba8 LDR	D12, [SP, #200]

        (332) 0x41ebac STR	Q10, [SP, #368]

        (332) 0x41ebb0 DUP	V10.2D, V3.D[0]

        (332) 0x41ebb4 STR	Q22, [SP, #448]

        (332) 0x41ebb8 DUP	V22.2D, V2.D[0]

        (332) 0x41ebbc STR	Q9, [SP, #960]

        (332) 0x41ebc0 DUP	V9.2D, V16.D[0]

        (332) 0x41ebc4 STR	Q6, [SP, #480]

        (332) 0x41ebc8 DUP	V6.2D, V27.D[0]

        (332) 0x41ebcc STR	Q10, [SP, #512]

        (332) 0x41ebd0 DUP	V10.2D, V25.D[0]

        (332) 0x41ebd4 STR	Q22, [SP, #464]

        (332) 0x41ebd8 DUP	V22.2D, V11.D[0]

        (332) 0x41ebdc STR	Q9, [SP, #496]

        (332) 0x41ebe0 DUP	V9.2D, V15.D[0]

        (332) 0x41ebe4 STR	Q26, [SP, #528]

        (332) 0x41ebe8 DUP	V26.2D, V12.D[0]

        (332) 0x41ebec STR	Q5, [SP, #608]

        (332) 0x41ebf0 DUP	V5.2D, V28.D[0]

        (332) 0x41ebf4 STR	Q8, [SP, #624]

        (332) 0x41ebf8 DUP	V8.2D, V7.D[0]

        (332) 0x41ebfc STR	Q6, [SP, #672]

        (332) 0x41ec00 FMOV	D6, X11

        (332) 0x41ec04 STR	Q5, [SP, #544]

        (332) 0x41ec08 STR	Q8, [SP, #688]

        (332) 0x41ec0c STR	Q9, [SP, #704]

        (332) 0x41ec10 STR	Q10, [SP, #720]

        (332) 0x41ec14 STR	Q26, [SP, #736]

        (332) 0x41ec18 STR	Q22, [SP, #912]

        (332) 0x41ec1c STR	Q24, [SP, #928]

        (332) 0x41ec20 STR	Q30, [SP, #976]

        (332) 0x41ec24 LDR	D22, [SP, #248]

        (332) 0x41ec28 DUP	V7.2D, V6.D[0]

        (332) 0x41ec2c STP	D31, D17, [SP, #304]

        (332) 0x41ec30 LDR	D31, [SP, #216]

        (332) 0x41ec34 STP	D23, D21, [SP, #320]

        (332) 0x41ec38 DUP	V23.2D, V0.D[0]

        (332) 0x41ec3c LDR	D21, [SP, #224]

        (332) 0x41ec40 STP	D2, D20, [SP, #336]

        (332) 0x41ec44 LDR	D20, [SP, #232]

        (332) 0x41ec48 DUP	V5.2D, V22.D[0]

        (332) 0x41ec4c STP	D18, D28, [SP, #352]

        (332) 0x41ec50 ORR	V28.16B, V19.16B, V19.16B

        (332) 0x41ec54 LDR	D19, [SP, #240]

        (332) 0x41ec58 DUP	V17.2D, V31.D[0]

        (332) 0x41ec5c STR	Q7, [SP, #832]

        (332) 0x41ec60 LDR	D24, [SP, #256]

        (332) 0x41ec64 DUP	V2.2D, V21.D[0]

        (332) 0x41ec68 STR	Q5, [SP, #816]

        (332) 0x41ec6c LDR	D8, [SP, #272]

        (332) 0x41ec70 DUP	V18.2D, V20.D[0]

        (332) 0x41ec74 STR	Q17, [SP, #752]

        (332) 0x41ec78 LDR	D25, [SP, #280]

        (332) 0x41ec7c DUP	V30.2D, V19.D[0]

        (332) 0x41ec80 STR	Q2, [SP, #768]

        (332) 0x41ec84 DUP	V27.2D, V24.D[0]

        (332) 0x41ec88 STR	Q18, [SP, #784]

        (332) 0x41ec8c STR	Q29, [SP, #992]

        (332) 0x41ec90 DUP	V9.2D, V8.D[0]

        (332) 0x41ec94 STR	Q30, [SP, #800]

        (332) 0x41ec98 STR	Q23, [SP, #1008]

        (332) 0x41ec9c DUP	V10.2D, V25.D[0]

        (332) 0x41eca0 STR	Q27, [SP, #1024]

        (332) 0x41eca4 STR	X6, [SP, #1152]

        (332) 0x41eca8 STR	Q9, [SP, #1040]

        (332) 0x41ecac STR	Q10, [SP, #848]

          (335) 0x41ecb0 LDR	X13, [SP, #1152]

          (335) 0x41ecb4 MOVI	V19.4S, #2

          (335) 0x41ecb8 MOVI	V27.4S, #3

          (335) 0x41ecbc MOVI	V8.4S, #1

          (335) 0x41ecc0 LDP	Q6, Q7, [SP, #912]

          (335) 0x41ecc4 LDR	Q2, [SP, #656]

          (335) 0x41ecc8 LDP	Q12, Q26, [X13], #32

          (335) 0x41eccc LDRSW	X10, [X9]

          (335) 0x41ecd0 ORR	V5.16B, V7.16B, V7.16B

          (335) 0x41ecd4 UBFM	X11, X10, #61, #60

          (335) 0x41ecd8 LDR	W10, [X9, #12]

          (335) 0x41ecdc FMUL	V23.2D, V28.2D, V12.2D

          (335) 0x41ece0 STR	X13, [SP, #1152]

          (335) 0x41ece4 FMUL	V31.2D, V28.2D, V26.2D

          (335) 0x41ece8 LDP	W18, W14, [X9, #4]

          (335) 0x41ecec ADD	X9, X9, #16

          (335) 0x41ecf0 FDIV	V29.2D, V28.2D, V26.2D

          (335) 0x41ecf4 FDIV	V18.2D, V28.2D, V12.2D

          (335) 0x41ecf8 SBFM	X10, X10, #61, #31

          (335) 0x41ecfc FCVTZS	V22.2D, V23.2D

          (335) 0x41ed00 FCVTZS	V20.2D, V31.2D

          (335) 0x41ed04 STR	Q29, [SP, #1104]

          (335) 0x41ed08 SBFM	X12, X18, #61, #31

          (335) 0x41ed0c SBFM	X30, X14, #61, #31

          (335) 0x41ed10 FRINTZ	V21.2D, V23.2D

          (335) 0x41ed14 ADD	X18, X12, X7

          (335) 0x41ed18 ADD	X13, X8, X12

          (335) 0x41ed1c FRINTZ	V17.2D, V31.2D

          (335) 0x41ed20 ADD	X14, X12, X2

          (335) 0x41ed24 ADD	X12, X8, X10

          (335) 0x41ed28 STR	X18, [SP, #1176]

          (335) 0x41ed2c STR	X12, [SP, #1168]

          (335) 0x41ed30 STR	X13, [SP, #1160]

          (335) 0x41ed34 UZP1	V9.4S, V22.4S, V20.4S

          (335) 0x41ed38 STR	X14, [SP, #1184]

          (335) 0x41ed3c FSUB	V30.2D, V23.2D, V21.2D

          (335) 0x41ed40 FSUB	V31.2D, V31.2D, V17.2D

          (335) 0x41ed44 SSHLL2	V29.2D, V9.4S, #32

          (335) 0x41ed48 ADD	V24.4S, V9.4S, V19.4S

          (335) 0x41ed4c ADD	V25.4S, V9.4S, V27.4S

          (335) 0x41ed50 ADD	V10.4S, V9.4S, V8.4S

          (335) 0x41ed54 SSHLL	V17.2D, V9.2S, #32

          (335) 0x41ed58 FMUL	V27.2D, V30.2D, V30.2D

          (335) 0x41ed5c FMOV	X18, D29

          (335) 0x41ed60 FMLA	V5.2D, V30.2D, V6.2D

          (335) 0x41ed64 SSHLL	V12.2D, V24.2S, #32

          (335) 0x41ed68 FMOV	X13, D17

          (335) 0x41ed6c SSHLL	V23.2D, V25.2S, #32

          (335) 0x41ed70 SSHLL2	V25.2D, V25.4S, #32

          (335) 0x41ed74 FMLA	V5.2D, V27.2D, V2.2D

          (335) 0x41ed78 MOV	X14, V12.D[1]

          (335) 0x41ed7c SSHLL2	V24.2D, V24.4S, #32

          (335) 0x41ed80 LDR	D21, [X0, X18,LSL #3]

          (335) 0x41ed84 FMOV	X18, D12

          (335) 0x41ed88 SSHLL	V20.2D, V10.2S, #32

          (335) 0x41ed8c MOV	X12, V23.D[1]

          (335) 0x41ed90 SSHLL2	V8.2D, V10.4S, #32

          (335) 0x41ed94 LDR	D26, [X0, X13,LSL #3]

          (335) 0x41ed98 FMUL	V22.2D, V31.2D, V31.2D

          (335) 0x41ed9c MOV	X13, V24.D[1]

          (335) 0x41eda0 LDR	D10, [X0, X14,LSL #3]

          (335) 0x41eda4 MOV	X14, V17.D[1]

          (335) 0x41eda8 ORR	V2.16B, V5.16B, V5.16B

          (335) 0x41edac LDR	D9, [X0, X18,LSL #3]

          (335) 0x41edb0 ADD	X18, SP, #288

          (335) 0x41edb4 ST1	{V25.D[1]}, [X18]

          (335) 0x41edb8 LDP	Q19, Q5, [SP, #688]

          (335) 0x41edbc FMOV	X18, D23

          (335) 0x41edc0 LDR	D23, [X0, X12,LSL #3]

          (335) 0x41edc4 FMOV	X12, D24

          (335) 0x41edc8 LDR	D12, [X0, X18,LSL #3]

          (335) 0x41edcc FMLA	V5.2D, V30.2D, V19.2D

          (335) 0x41edd0 MOV	X18, V20.D[1]

          (335) 0x41edd4 LDR	Q19, [SP, #672]

          (335) 0x41edd8 LDR	D17, [X0, X12,LSL #3]

          (335) 0x41eddc FMOV	X12, D25

          (335) 0x41ede0 MOV	V12.D[1], V23.D[0]

          (335) 0x41ede4 ORR	V24.16B, V5.16B, V5.16B

          (335) 0x41ede8 LDP	Q25, Q5, [SP, #480]

          (335) 0x41edec LDR	D23, [X0, X12,LSL #3]

          (335) 0x41edf0 ADD	X12, SP, #896

          (335) 0x41edf4 FMLA	V24.2D, V27.2D, V19.2D

          (335) 0x41edf8 STP	D9, D10, [X12]

          (335) 0x41edfc MOV	X12, V29.D[1]

          (335) 0x41ee00 FMLA	V5.2D, V30.2D, V25.2D

          (335) 0x41ee04 STR	Q24, [SP, #880]

          (335) 0x41ee08 LDR	D29, [X0, X13,LSL #3]

          (335) 0x41ee0c FMOV	X13, D20

          (335) 0x41ee10 LDP	Q20, Q24, [SP, #512]

          (335) 0x41ee14 LDR	D19, [X0, X18,LSL #3]

          (335) 0x41ee18 MOV	X18, V8.D[1]

          (335) 0x41ee1c MOV	V17.D[1], V29.D[0]

          (335) 0x41ee20 LDP	Q9, Q29, [SP, #688]

          (335) 0x41ee24 LDR	D10, [X0, X13,LSL #3]

          (335) 0x41ee28 LDR	X13, [SP, #288]

          (335) 0x41ee2c FMLA	V24.2D, V30.2D, V20.2D

          (335) 0x41ee30 ORR	V20.16B, V7.16B, V7.16B

          (335) 0x41ee34 LDR	D7, [X0, X14,LSL #3]

          (335) 0x41ee38 ADD	X14, SP, #864

          (335) 0x41ee3c FMLA	V29.2D, V31.2D, V9.2D

          (335) 0x41ee40 LDR	D25, [X0, X13,LSL #3]

          (335) 0x41ee44 FMOV	D9, D10

          (335) 0x41ee48 FMOV	X13, D8

          (335) 0x41ee4c LDR	Q10, [SP, #656]

          (335) 0x41ee50 STP	D26, D7, [X14]

          (335) 0x41ee54 MOV	V9.D[1], V19.D[0]

          (335) 0x41ee58 LDP	Q19, Q8, [SP, #624]

          (335) 0x41ee5c FMLA	V20.2D, V31.2D, V6.2D

          (335) 0x41ee60 MOV	V23.D[1], V25.D[0]

          (335) 0x41ee64 LDR	D25, [X0, X18,LSL #3]

          (335) 0x41ee68 LDR	D6, [X0, X13,LSL #3]

          (335) 0x41ee6c FMUL	V7.2D, V27.2D, V30.2D

          (335) 0x41ee70 FMUL	V24.2D, V12.2D, V24.2D

          (335) 0x41ee74 FMLA	V20.2D, V22.2D, V10.2D

          (335) 0x41ee78 LDR	Q26, [SP, #896]

          (335) 0x41ee7c FMLA	V8.2D, V30.2D, V19.2D

          (335) 0x41ee80 LDP	Q10, Q19, [SP, #480]

          (335) 0x41ee84 STP	D6, D25, [SP, #288]

          (335) 0x41ee88 LDR	Q6, [SP, #672]

          (335) 0x41ee8c FMUL	V20.2D, V17.2D, V20.2D

          (335) 0x41ee90 FMLA	V19.2D, V31.2D, V10.2D

          (335) 0x41ee94 FMLA	V29.2D, V22.2D, V6.2D

          (335) 0x41ee98 FMUL	V10.2D, V26.2D, V5.2D

          (335) 0x41ee9c LDR	D26, [X0, X12,LSL #3]

          (335) 0x41eea0 ADD	X12, X10, X7

          (335) 0x41eea4 ADD	X10, X10, X2

          (335) 0x41eea8 LDP	Q5, Q25, [SP, #512]

          (335) 0x41eeac FMUL	V6.2D, V17.2D, V19.2D

          (335) 0x41eeb0 LDR	Q19, [SP, #608]

          (335) 0x41eeb4 FMUL	V29.2D, V23.2D, V29.2D

          (335) 0x41eeb8 STR	Q6, [SP, #1136]

          (335) 0x41eebc FMLA	V8.2D, V27.2D, V19.2D

          (335) 0x41eec0 FMOV	D19, D21

          (335) 0x41eec4 LDP	Q6, Q21, [SP, #768]

          (335) 0x41eec8 FMLA	V25.2D, V31.2D, V5.2D

          (335) 0x41eecc LDR	Q5, [SP, #896]

          (335) 0x41eed0 MOV	V19.D[1], V26.D[0]

          (335) 0x41eed4 FMUL	V26.2D, V27.2D, V21.2D

          (335) 0x41eed8 FMUL	V21.2D, V5.2D, V2.2D

          (335) 0x41eedc LDR	Q2, [SP, #832]

          (335) 0x41eee0 FMUL	V25.2D, V23.2D, V25.2D

          (335) 0x41eee4 FMLA	V26.2D, V7.2D, V6.2D

          (335) 0x41eee8 FMLA	V21.2D, V9.2D, V8.2D

          (335) 0x41eeec LDR	Q8, [SP, #880]

          (335) 0x41eef0 FMUL	V6.2D, V27.2D, V2.2D

          (335) 0x41eef4 STR	Q26, [SP, #1072]

          (335) 0x41eef8 FMUL	V26.2D, V12.2D, V8.2D

          (335) 0x41eefc STR	Q9, [SP, #880]

          (335) 0x41ef00 LDR	Q9, [SP, #1024]

          (335) 0x41ef04 LDP	Q8, Q5, [SP, #576]

          (335) 0x41ef08 LDR	Q2, [SP, #784]

          (335) 0x41ef0c FMLA	V6.2D, V7.2D, V9.2D

          (335) 0x41ef10 FMLA	V5.2D, V30.2D, V8.2D

          (335) 0x41ef14 FMUL	V8.2D, V22.2D, V31.2D

          (335) 0x41ef18 STR	Q6, [SP, #1056]

          (335) 0x41ef1c LDR	Q6, [SP, #560]

          (335) 0x41ef20 FMLA	V5.2D, V27.2D, V6.2D

          (335) 0x41ef24 FMUL	V6.2D, V22.2D, V2.2D

          (335) 0x41ef28 LDR	Q2, [SP, #864]

          (335) 0x41ef2c FMLA	V26.2D, V2.2D, V5.2D

          (335) 0x41ef30 LDR	Q5, [SP, #832]

          (335) 0x41ef34 FMUL	V5.2D, V22.2D, V5.2D

          (335) 0x41ef38 FADD	V21.2D, V21.2D, V26.2D

          (335) 0x41ef3c LDR	Q26, [SP, #768]

          (335) 0x41ef40 FMLA	V5.2D, V8.2D, V9.2D

          (335) 0x41ef44 FMLA	V6.2D, V8.2D, V26.2D

          (335) 0x41ef48 LDP	Q2, Q26, [SP, #800]

          (335) 0x41ef4c FMUL	V18.2D, V21.2D, V18.2D

          (335) 0x41ef50 LDP	Q21, Q9, [SP, #736]

          (335) 0x41ef54 STR	Q18, [SP, #1120]

          (335) 0x41ef58 LDR	Q18, [SP, #368]

          (335) 0x41ef5c FMLA	V26.2D, V30.2D, V2.2D

          (335) 0x41ef60 FMUL	V2.2D, V27.2D, V9.2D

          (335) 0x41ef64 LDR	Q9, [SP, #720]

          (335) 0x41ef68 FMUL	V27.2D, V27.2D, V21.2D

          (335) 0x41ef6c LDR	Q21, [SP, #464]

          (335) 0x41ef70 FMLA	V27.2D, V7.2D, V9.2D

          (335) 0x41ef74 LDR	Q9, [SP, #384]

          (335) 0x41ef78 FMLA	V21.2D, V18.2D, V30.2D

          (335) 0x41ef7c LDR	Q18, [SP, #976]

          (335) 0x41ef80 STR	Q27, [SP, #1088]

          (335) 0x41ef84 FMLA	V2.2D, V7.2D, V18.2D

          (335) 0x41ef88 LDR	Q27, [SP, #880]

          (335) 0x41ef8c ORR	V7.16B, V21.16B, V21.16B

          (335) 0x41ef90 LDR	Q21, [SP, #1040]

          (335) 0x41ef94 FMLA	V10.2D, V27.2D, V7.2D

          (335) 0x41ef98 LDR	Q7, [SP, #448]

          (335) 0x41ef9c LDR	Q27, [SP, #1072]

          (335) 0x41efa0 FMLA	V9.2D, V30.2D, V7.2D

          (335) 0x41efa4 LDR	Q7, [SP, #864]

          (335) 0x41efa8 FADD	V26.2D, V26.2D, V27.2D

          (335) 0x41efac LDR	Q27, [SP, #848]

          (335) 0x41efb0 FMLA	V24.2D, V9.2D, V7.2D

          (335) 0x41efb4 FMLA	V27.2D, V30.2D, V21.2D

          (335) 0x41efb8 FADD	V24.2D, V10.2D, V24.2D

          (335) 0x41efbc LDR	Q10, [SP, #1056]

          (335) 0x41efc0 FADD	V7.2D, V27.2D, V10.2D

          (335) 0x41efc4 LDP	Q9, Q27, [SP, #800]

          (335) 0x41efc8 FMUL	V7.2D, V7.2D, V12.2D

          (335) 0x41efcc LDR	Q12, [SP, #752]

          (335) 0x41efd0 FMLA	V27.2D, V31.2D, V9.2D

          (335) 0x41efd4 FMUL	V10.2D, V22.2D, V12.2D

          (335) 0x41efd8 FMLA	V10.2D, V8.2D, V18.2D

          (335) 0x41efdc LDR	Q18, [SP, #896]

          (335) 0x41efe0 FADD	V6.2D, V27.2D, V6.2D

          (335) 0x41efe4 FMUL	V26.2D, V26.2D, V18.2D

          (335) 0x41efe8 FMUL	V27.2D, V17.2D, V6.2D

          (335) 0x41efec LDR	Q17, [SP, #544]

          (335) 0x41eff0 ORR	V9.16B, V10.16B, V10.16B

          (335) 0x41eff4 LDR	Q12, [SP, #736]

          (335) 0x41eff8 LDR	X18, [SP, #1160]

          (335) 0x41effc FMUL	V24.2D, V24.2D, V17.2D

          (335) 0x41f000 LDR	Q17, [SP, #368]

          (335) 0x41f004 LDR	Q18, [SP, #720]

          (335) 0x41f008 FMUL	V10.2D, V22.2D, V12.2D

          (335) 0x41f00c LDR	Q12, [SP, #448]

          (335) 0x41f010 STR	D24, [X8, X11]

          (335) 0x41f014 ST1	{V24.D[1]}, [X18]

          (335) 0x41f018 LDR	Q24, [SP, #464]

          (335) 0x41f01c FMLA	V10.2D, V8.2D, V18.2D

          (335) 0x41f020 LDR	Q6, [SP, #288]

          (335) 0x41f024 LDR	Q8, [SP, #1136]

          (335) 0x41f028 FMLA	V24.2D, V17.2D, V31.2D

          (335) 0x41f02c LDR	Q17, [SP, #384]

          (335) 0x41f030 LDR	X13, [SP, #1168]

          (335) 0x41f034 FMLA	V8.2D, V6.2D, V24.2D

          (335) 0x41f038 LDR	Q24, [SP, #848]

          (335) 0x41f03c FMLA	V17.2D, V31.2D, V12.2D

          (335) 0x41f040 LDP	Q18, Q12, [SP, #624]

          (335) 0x41f044 FMLA	V24.2D, V31.2D, V21.2D

          (335) 0x41f048 FMLA	V25.2D, V17.2D, V19.2D

          (335) 0x41f04c FMLA	V12.2D, V31.2D, V18.2D

          (335) 0x41f050 FADD	V5.2D, V24.2D, V5.2D

          (335) 0x41f054 FADD	V25.2D, V8.2D, V25.2D

          (335) 0x41f058 LDP	Q8, Q17, [SP, #592]

          (335) 0x41f05c FMUL	V23.2D, V23.2D, V5.2D

          (335) 0x41f060 FMLA	V12.2D, V22.2D, V17.2D

          (335) 0x41f064 LDP	Q18, Q17, [SP, #992]

          (335) 0x41f068 FMLA	V20.2D, V6.2D, V12.2D

          (335) 0x41f06c LDP	Q21, Q12, [SP, #560]

          (335) 0x41f070 LDP	Q6, Q5, [SP, #944]

          (335) 0x41f074 FMLA	V8.2D, V31.2D, V12.2D

          (335) 0x41f078 LDR	Q12, [SP, #1120]

          (335) 0x41f07c FMLA	V8.2D, V22.2D, V21.2D

          (335) 0x41f080 ORR	V22.16B, V17.16B, V17.16B

          (335) 0x41f084 ORR	V21.16B, V5.16B, V5.16B

          (335) 0x41f088 FMLA	V17.2D, V31.2D, V18.2D

          (335) 0x41f08c FMLA	V29.2D, V19.2D, V8.2D

          (335) 0x41f090 FMLA	V5.2D, V31.2D, V6.2D

          (335) 0x41f094 FADD	V8.2D, V17.2D, V9.2D

          (335) 0x41f098 FMLA	V22.2D, V30.2D, V18.2D

          (335) 0x41f09c FADD	V20.2D, V20.2D, V29.2D

          (335) 0x41f0a0 LDR	Q29, [SP, #288]

          (335) 0x41f0a4 FMLA	V21.2D, V30.2D, V6.2D

          (335) 0x41f0a8 LDR	Q30, [SP, #544]

          (335) 0x41f0ac FADD	V31.2D, V5.2D, V10.2D

          (335) 0x41f0b0 FMLA	V27.2D, V29.2D, V8.2D

          (335) 0x41f0b4 FADD	V24.2D, V22.2D, V2.2D

          (335) 0x41f0b8 FMLA	V23.2D, V19.2D, V31.2D

          (335) 0x41f0bc LDP	Q2, Q9, [SP, #864]

          (335) 0x41f0c0 FMUL	V25.2D, V25.2D, V30.2D

          (335) 0x41f0c4 STR	D25, [X8, X30]

          (335) 0x41f0c8 FADD	V19.2D, V27.2D, V23.2D

          (335) 0x41f0cc LDR	Q27, [SP, #1088]

          (335) 0x41f0d0 FMLA	V26.2D, V9.2D, V24.2D

          (335) 0x41f0d4 ST1	{V25.D[1]}, [X13]

          (335) 0x41f0d8 FADD	V10.2D, V21.2D, V27.2D

          (335) 0x41f0dc FMLA	V7.2D, V2.2D, V10.2D

          (335) 0x41f0e0 FADD	V7.2D, V26.2D, V7.2D

          (335) 0x41f0e4 LDR	Q26, [SP, #1104]

          (335) 0x41f0e8 STR	D12, [X11, X7]

          (335) 0x41f0ec LDR	X14, [SP, #1176]

          (335) 0x41f0f0 FMUL	V23.2D, V20.2D, V26.2D

          (335) 0x41f0f4 ST1	{V12.D[1]}, [X14]

          (335) 0x41f0f8 STR	D23, [X30, X7]

          (335) 0x41f0fc ST1	{V23.D[1]}, [X12]

          (335) 0x41f100 STR	D7, [X11, X2]

          (335) 0x41f104 LDR	X11, [SP, #1184]

          (335) 0x41f108 ST1	{V7.D[1]}, [X11]

          (335) 0x41f10c STR	D19, [X30, X2]

          (335) 0x41f110 ST1	{V19.D[1]}, [X10]

          (335) 0x41f114 CMP	X15, X9

          (335) 0x41f118 B.NE	41ecb0

        (332) 0x41f11c AND	W15, W1, #1886

        (332) 0x41f120 LDP	D31, D17, [SP, #304]

        (332) 0x41f124 LDP	D23, D21, [SP, #320]

        (332) 0x41f128 LDP	D2, D20, [SP, #336]

        (332) 0x41f12c LDP	D18, D28, [SP, #352]

        (332) 0x41f130 CMP	W15, W1

        (332) 0x41f134 B.EQ	41f4d0

        (332) 0x41f138 ORR	W30, WZR, W15

        (332) 0x41f13c DUP	Z24.D, Z31.D[0]

        (332) 0x41f140 DUP	Z7.D, Z3.D[0]

        (332) 0x41f144 SUB	W1, W1, W15

        (332) 0x41f148 DUP	Z3.D, Z28.D[0]

        (332) 0x41f14c WHILELO	P4.S, WZR, W1

        (332) 0x41f150 ADD	X15, X6, X30,LSL #3

        (332) 0x41f154 PUNPKHI	P6.H, P4.B

        (332) 0x41f158 LD1D	{Z27.D}, P6/Z, [X15, #1, MUL VL]

        (332) 0x41f15c FMUL	Z31.D, Z27.D, Z24.D

        (332) 0x41f160 MOVPRFX	Z28, Z31

        (332) 0x41f164 FCVTZS	Z28.S, P7/M, Z31.D

        (332) 0x41f168 PUNPKLO	P5.H, P4.B

        (332) 0x41f16c DUP	Z12.D, Z2.D[0]

        (332) 0x41f170 LD1D	{Z25.D}, P5/Z, [X6, X30,LSL #3]

        (332) 0x41f174 DUP	Z5.D, Z16.D[0]

        (332) 0x41f178 FMUL	Z2.D, Z25.D, Z24.D

        (332) 0x41f17c MOVPRFX	Z16, Z2

        (332) 0x41f180 FCVTZS	Z16.S, P7/M, Z2.D

        (332) 0x41f184 UZP1	Z30.S, Z16.S, Z28.S

        (332) 0x41f188 MOVPRFX	Z8, Z30

        (332) 0x41f18c ADD	Z8.S, Z8.S, #1

        (332) 0x41f190 MOVPRFX	Z22, Z30

        (332) 0x41f194 ADD	Z22.S, Z22.S, #3

        (332) 0x41f198 SUNPKHI	Z28.D, Z22

        (332) 0x41f19c DUP	Z29.D, Z17.D[0]

        (332) 0x41f1a0 LD1D	{Z16.D}, P6/Z, [X0, Z28.D,LSL #3]

        (332) 0x41f1a4 DUP	Z17.D, Z23.D[0]

        (332) 0x41f1a8 SUNPKHI	Z9.D, Z8

        (332) 0x41f1ac DUP	Z23.D, Z20.D[0]

        (332) 0x41f1b0 SUNPKHI	Z28.D, Z30

        (332) 0x41f1b4 SUNPKLO	Z20.D, Z8

        (332) 0x41f1b8 SUNPKLO	Z8.D, Z22

        (332) 0x41f1bc MOVPRFX	Z22, Z30

        (332) 0x41f1c0 ADD	Z22.S, Z22.S, #2

        (332) 0x41f1c4 LD1D	{Z6.D}, P5/Z, [X0, Z20.D,LSL #3]

        (332) 0x41f1c8 LD1W	{Z26.S}, P4/Z, [X5, X30,LSL #2]

        (332) 0x41f1cc ADD	X6, SP, #1216

        (332) 0x41f1d0 DUP	Z19.D, Z21.D[0]

        (332) 0x41f1d4 SUNPKHI	Z20.D, Z22

        (332) 0x41f1d8 LD1D	{Z21.D}, P6/Z, [X0, Z9.D,LSL #3]

        (332) 0x41f1dc SUNPKLO	Z30.D, Z30

        (332) 0x41f1e0 STR	Z16, [X6, #1, MUL VL]

        (332) 0x41f1e4 SUNPKLO	Z16.D, Z22

        (332) 0x41f1e8 LD1D	{Z9.D}, P5/Z, [X0, Z8.D,LSL #3]

        (332) 0x41f1ec LD1D	{Z8.D}, P6/Z, [X0, Z20.D,LSL #3]

        (332) 0x41f1f0 STR	Z8, [X6, MUL VL]

        (332) 0x41f1f4 LD1D	{Z22.D}, P6/Z, [X0, Z28.D,LSL #3]

        (332) 0x41f1f8 MOVPRFX	Z28, Z2

        (332) 0x41f1fc FRINTZ	Z28.D, P7/M, Z2.D

        (332) 0x41f200 DUP	Z18.D, Z18.D[0]

        (332) 0x41f204 LD1D	{Z8.D}, P5/Z, [X0, Z30.D,LSL #3]

        (332) 0x41f208 FSUB	Z30.D, Z2.D, Z28.D

        (332) 0x41f20c MOVPRFX	Z2, Z18

        (332) 0x41f210 FMLA	Z2.D, P7/M, Z30.D, Z7.D

        (332) 0x41f214 FMUL	Z28.D, Z9.D, Z2.D

        (332) 0x41f218 LD1D	{Z20.D}, P5/Z, [X0, Z16.D,LSL #3]

        (332) 0x41f21c MOVPRFX	Z2, Z12

        (332) 0x41f220 FMLA	Z2.D, P7/M, Z30.D, Z19.D

        (332) 0x41f224 MOVPRFX	Z16, Z5

        (332) 0x41f228 FMLA	Z16.D, P7/M, Z30.D, Z23.D

        (332) 0x41f22c FMUL	Z2.D, Z6.D, Z2.D

        (332) 0x41f230 FMAD	Z16.D, P7/M, Z20.D, Z28.D

        (332) 0x41f234 MOVPRFX	Z28, Z17

        (332) 0x41f238 FMLA	Z28.D, P7/M, Z30.D, Z29.D

        (332) 0x41f23c FMAD	Z28.D, P7/M, Z8.D, Z2.D

        (332) 0x41f240 FADD	Z16.D, Z28.D, Z16.D

        (332) 0x41f244 SUNPKLO	Z10.D, Z26

        (332) 0x41f248 FMUL	Z2.D, Z16.D, Z3.D

        (332) 0x41f24c PTRUE	P1.B, ALL

        (332) 0x41f250 MOVPRFX	Z28, Z31

        (332) 0x41f254 FRINTZ	Z28.D, P7/M, Z31.D

        (332) 0x41f258 FSUB	Z31.D, Z31.D, Z28.D

        (332) 0x41f25c FMLA	Z18.D, P7/M, Z31.D, Z7.D

        (332) 0x41f260 ST1D	{Z2.D}, P5, [X8, Z10.D,LSL #3]

        (332) 0x41f264 FMAD	Z23.D, P7/M, Z31.D, Z5.D

        (332) 0x41f268 FMAD	Z19.D, P7/M, Z31.D, Z12.D

        (332) 0x41f26c FMAD	Z29.D, P7/M, Z31.D, Z17.D

        (332) 0x41f270 LDR	Z12, [X6, #1, MUL VL]

        (332) 0x41f274 FMUL	Z19.D, Z21.D, Z19.D

        (332) 0x41f278 FMUL	Z7.D, Z12.D, Z18.D

        (332) 0x41f27c LDR	Z18, [X6, MUL VL]

        (332) 0x41f280 FMAD	Z29.D, P7/M, Z22.D, Z19.D

        (332) 0x41f284 FMAD	Z23.D, P7/M, Z18.D, Z7.D

        (332) 0x41f288 FADD	Z29.D, Z29.D, Z23.D

        (332) 0x41f28c FMUL	Z17.D, Z29.D, Z3.D

        (332) 0x41f290 FMUL	Z28.D, Z30.D, Z30.D

        (332) 0x41f294 SUNPKHI	Z26.D, Z26

        (332) 0x41f298 DUP	Z15.D, Z15.D[0]

        (332) 0x41f29c ST1D	{Z17.D}, P6, [X8, Z26.D,LSL #3]

        (332) 0x41f2a0 PTRUE	P0.B, ALL

        (332) 0x41f2a4 LD1RD	{Z17.D}, P1/Z, [SP, #52]

        (332) 0x41f2a8 PTRUE	P2.B, ALL

        (332) 0x41f2ac PTRUE	P1.B, ALL

        (332) 0x41f2b0 LD1RD	{Z19.D}, P2/Z, [SP, #23]

        (332) 0x41f2b4 LD1RD	{Z7.D}, P1/Z, [SP, #22]

        (332) 0x41f2b8 MOVPRFX	Z3, Z15

        (332) 0x41f2bc FMLA	Z3.D, P7/M, Z30.D, Z19.D

        (332) 0x41f2c0 FMLA	Z3.D, P7/M, Z28.D, Z7.D

        (332) 0x41f2c4 FMUL	Z3.D, Z9.D, Z3.D

        (332) 0x41f2c8 LD1RD	{Z18.D}, P0/Z, [SP, #21]

        (332) 0x41f2cc DUP	Z14.D, Z14.D[0]

        (332) 0x41f2d0 MOVPRFX	Z2, Z17

        (332) 0x41f2d4 FMLA	Z2.D, P7/M, Z30.D, Z18.D

        (332) 0x41f2d8 PTRUE	P3.B, ALL

        (332) 0x41f2dc PTRUE	P4.B, ALL

        (332) 0x41f2e0 LD1RD	{Z12.D}, P3/Z, [SP, #51]

        (332) 0x41f2e4 LD1RD	{Z16.D}, P4/Z, [SP, #20]

        (332) 0x41f2e8 DUP	Z11.D, Z11.D[0]

        (332) 0x41f2ec FMLA	Z2.D, P7/M, Z28.D, Z16.D

        (332) 0x41f2f0 PTRUE	P0.B, ALL

        (332) 0x41f2f4 FMUL	Z2.D, Z6.D, Z2.D

        (332) 0x41f2f8 LD1RD	{Z5.D}, P0/Z, [SP, #53]

        (332) 0x41f2fc PTRUE	P2.B, ALL

        (332) 0x41f300 MOVPRFX	Z29, Z5

        (332) 0x41f304 FMLA	Z29.D, P7/M, Z30.D, Z11.D

        (332) 0x41f308 LD1RD	{Z23.D}, P2/Z, [SP, #50]

        (332) 0x41f30c DUP	Z4.D, Z4.D[0]

        (332) 0x41f310 FMLA	Z29.D, P7/M, Z28.D, Z4.D

        (332) 0x41f314 FMAD	Z29.D, P7/M, Z20.D, Z3.D

        (332) 0x41f318 MOVPRFX	Z3, Z12

        (332) 0x41f31c FMLA	Z3.D, P7/M, Z30.D, Z14.D

        (332) 0x41f320 FMLA	Z3.D, P7/M, Z28.D, Z23.D

        (332) 0x41f324 FMAD	Z3.D, P7/M, Z8.D, Z2.D

        (332) 0x41f328 FADD	Z29.D, Z29.D, Z3.D

        (332) 0x41f32c FMAD	Z18.D, P7/M, Z31.D, Z17.D

        (332) 0x41f330 FMAD	Z19.D, P7/M, Z31.D, Z15.D

        (332) 0x41f334 FDIVR	Z25.D, P7/M, Z25.D, Z13.D

        (332) 0x41f338 FDIVR	Z27.D, P7/M, Z27.D, Z13.D

        (332) 0x41f33c FMUL	Z25.D, Z25.D, Z24.D

        (332) 0x41f340 FMUL	Z25.D, Z29.D, Z25.D

        (332) 0x41f344 FMUL	Z29.D, Z31.D, Z31.D

        (332) 0x41f348 FMLA	Z19.D, P7/M, Z29.D, Z7.D

        (332) 0x41f34c ST1D	{Z25.D}, P5, [X7, Z10.D,LSL #3]

        (332) 0x41f350 LDR	Z17, [X6, MUL VL]

        (332) 0x41f354 FMUL	Z13.D, Z27.D, Z24.D

        (332) 0x41f358 FMAD	Z11.D, P7/M, Z31.D, Z5.D

        (332) 0x41f35c FMAD	Z14.D, P7/M, Z31.D, Z12.D

        (332) 0x41f360 FMAD	Z16.D, P7/M, Z29.D, Z18.D

        (332) 0x41f364 LDR	Z24, [X6, #1, MUL VL]

        (332) 0x41f368 FMUL	Z27.D, Z21.D, Z16.D

        (332) 0x41f36c FMUL	Z18.D, Z24.D, Z19.D

        (332) 0x41f370 FMAD	Z4.D, P7/M, Z29.D, Z11.D

        (332) 0x41f374 FMAD	Z23.D, P7/M, Z29.D, Z14.D

        (332) 0x41f378 FMAD	Z4.D, P7/M, Z17.D, Z18.D

        (332) 0x41f37c FMAD	Z23.D, P7/M, Z22.D, Z27.D

        (332) 0x41f380 PTRUE	P3.B, ALL

        (332) 0x41f384 FADD	Z19.D, Z23.D, Z4.D

        (332) 0x41f388 PTRUE	P4.B, ALL

        (332) 0x41f38c FMUL	Z15.D, Z19.D, Z13.D

        (332) 0x41f390 PTRUE	P0.B, ALL

        (332) 0x41f394 PTRUE	P1.B, ALL

        (332) 0x41f398 PTRUE	P2.B, ALL

        (332) 0x41f39c FMUL	Z11.D, Z30.D, Z28.D

        (332) 0x41f3a0 ST1D	{Z15.D}, P6, [X7, Z26.D,LSL #3]

        (332) 0x41f3a4 LD1RD	{Z12.D}, P3/Z, [SP, #27]

        (332) 0x41f3a8 LD1RD	{Z15.D}, P0/Z, [SP, #25]

        (332) 0x41f3ac LD1RD	{Z13.D}, P4/Z, [SP, #33]

        (332) 0x41f3b0 FMUL	Z27.D, Z28.D, Z12.D

        (332) 0x41f3b4 LD1RD	{Z14.D}, P1/Z, [SP, #26]

        (332) 0x41f3b8 FMUL	Z7.D, Z28.D, Z15.D

        (332) 0x41f3bc LD1RD	{Z23.D}, P2/Z, [SP, #55]

        (332) 0x41f3c0 FMLA	Z27.D, P7/M, Z11.D, Z14.D

        (332) 0x41f3c4 PTRUE	P3.B, ALL

        (332) 0x41f3c8 PTRUE	P4.B, ALL

        (332) 0x41f3cc PTRUE	P0.B, ALL

        (332) 0x41f3d0 PTRUE	P1.B, ALL

        (332) 0x41f3d4 PTRUE	P2.B, ALL

        (332) 0x41f3d8 LD1RD	{Z16.D}, P2/Z, [SP, #24]

        (332) 0x41f3dc FMLA	Z7.D, P7/M, Z11.D, Z16.D

        (332) 0x41f3e0 LD1RD	{Z17.D}, P3/Z, [SP, #29]

        (332) 0x41f3e4 LD1RD	{Z18.D}, P4/Z, [SP, #32]

        (332) 0x41f3e8 LD1RD	{Z25.D}, P0/Z, [SP, #34]

        (332) 0x41f3ec LD1RD	{Z2.D}, P1/Z, [SP, #35]

        (332) 0x41f3f0 DUP	Z0.D, Z0.D[0]

        (332) 0x41f3f4 DUP	Z1.D, Z1.D[0]

        (332) 0x41f3f8 MOVPRFX	Z19, Z0

        (332) 0x41f3fc FMLA	Z19.D, P7/M, Z30.D, Z23.D

        (332) 0x41f400 PTRUE	P3.B, ALL

        (332) 0x41f404 FMAD	Z23.D, P7/M, Z31.D, Z0.D

        (332) 0x41f408 LD1RD	{Z24.D}, P3/Z, [SP, #54]

        (332) 0x41f40c FADD	Z19.D, Z19.D, Z27.D

        (332) 0x41f410 PTRUE	P4.B, ALL

        (332) 0x41f414 MOVPRFX	Z27, Z1

        (332) 0x41f418 FMLA	Z27.D, P7/M, Z30.D, Z24.D

        (332) 0x41f41c LD1RD	{Z3.D}, P4/Z, [SP, #28]

        (332) 0x41f420 FADD	Z27.D, Z27.D, Z7.D

        (332) 0x41f424 PTRUE	P0.B, ALL

        (332) 0x41f428 FMUL	Z7.D, Z28.D, Z13.D

        (332) 0x41f42c LD1RD	{Z5.D}, P0/Z, [SP, #30]

        (332) 0x41f430 FMLA	Z7.D, P7/M, Z11.D, Z18.D

        (332) 0x41f434 FMUL	Z13.D, Z29.D, Z13.D

        (332) 0x41f438 PTRUE	P1.B, ALL

        (332) 0x41f43c FMUL	Z6.D, Z19.D, Z6.D

        (332) 0x41f440 LD1RD	{Z4.D}, P1/Z, [SP, #31]

        (332) 0x41f444 FMAD	Z27.D, P7/M, Z8.D, Z6.D

        (332) 0x41f448 FMUL	Z8.D, Z28.D, Z17.D

        (332) 0x41f44c MOVPRFX	Z28, Z2

        (332) 0x41f450 FMLA	Z28.D, P7/M, Z30.D, Z25.D

        (332) 0x41f454 FMLA	Z8.D, P7/M, Z11.D, Z3.D

        (332) 0x41f458 FMAD	Z25.D, P7/M, Z31.D, Z2.D

        (332) 0x41f45c FADD	Z11.D, Z7.D, Z28.D

        (332) 0x41f460 FMAD	Z30.D, P7/M, Z5.D, Z4.D

        (332) 0x41f464 FMUL	Z9.D, Z11.D, Z9.D

        (332) 0x41f468 FADD	Z30.D, Z8.D, Z30.D

        (332) 0x41f46c FMAD	Z20.D, P7/M, Z30.D, Z9.D

        (332) 0x41f470 FADD	Z20.D, Z27.D, Z20.D

        (332) 0x41f474 ST1D	{Z20.D}, P5, [X2, Z10.D,LSL #3]

        (332) 0x41f478 FMUL	Z10.D, Z29.D, Z12.D

        (332) 0x41f47c FMUL	Z12.D, Z29.D, Z15.D

        (332) 0x41f480 FMUL	Z15.D, Z29.D, Z17.D

        (332) 0x41f484 FMUL	Z29.D, Z31.D, Z29.D

        (332) 0x41f488 FMAD	Z18.D, P7/M, Z29.D, Z13.D

        (332) 0x41f48c FMAD	Z24.D, P7/M, Z31.D, Z1.D

        (332) 0x41f490 FMAD	Z14.D, P7/M, Z29.D, Z10.D

        (332) 0x41f494 FMAD	Z16.D, P7/M, Z29.D, Z12.D

        (332) 0x41f498 FADD	Z14.D, Z23.D, Z14.D

        (332) 0x41f49c FADD	Z0.D, Z25.D, Z18.D

        (332) 0x41f4a0 LDR	Z25, [X6, MUL VL]

        (332) 0x41f4a4 LDR	Z17, [X6, #1, MUL VL]

        (332) 0x41f4a8 FMUL	Z21.D, Z21.D, Z14.D

        (332) 0x41f4ac FADD	Z23.D, Z24.D, Z16.D

        (332) 0x41f4b0 FMAD	Z29.D, P7/M, Z3.D, Z15.D

        (332) 0x41f4b4 FMAD	Z22.D, P7/M, Z23.D, Z21.D

        (332) 0x41f4b8 FMAD	Z31.D, P7/M, Z5.D, Z4.D

        (332) 0x41f4bc FMUL	Z18.D, Z17.D, Z0.D

        (332) 0x41f4c0 FADD	Z31.D, Z31.D, Z29.D

        (332) 0x41f4c4 FMAD	Z31.D, P7/M, Z25.D, Z18.D

        (332) 0x41f4c8 FADD	Z22.D, Z31.D, Z22.D

        (332) 0x41f4cc ST1D	{Z22.D}, P6, [X2, Z26.D,LSL #3]

        (332) 0x41f4d0 LDR	W9, [X20, #152]

        (332) 0x41f4d4 ADD	X3, X3, #1

        (332) 0x41f4d8 ADD	X4, X4, #4

        (332) 0x41f4dc CMP	W9, W3

        (332) 0x41f4e0 B.GT	41e780

      (333) 0x41f4e4 LDP	W3, W22, [X20, #144]

      (333) 0x41f4e8 ORR	X5, XZR, X17

      (333) 0x41f4ec SBFM	X21, X3, #61, #31

      (333) 0x41f4f0 LDR	X16, [X20, #256]

      (333) 0x41f4f4 ADD	X17, X16, X21

      (333) 0x41f4f8 CMP	X16, X17

      (333) 0x41f4fc B.EQ	420084

      (333) 0x41f500 SUB	X8, X17, X16

      (333) 0x41f504 MOVI	D5, #0

      (333) 0x41f508 ORR	X0, XZR, X16

      (333) 0x41f50c SUB	X7, X8, #8

      (333) 0x41f510 UBFM	X2, X7, #3, #63

      (333) 0x41f514 ADD	X12, X2, #1

      (333) 0x41f518 ANDS	X10, X12, #4224

      (333) 0x41f51c B.EQ	41f590

      (333) 0x41f520 CMP	X10, #1

      (333) 0x41f524 B.EQ	41f580

      (333) 0x41f528 CMP	X10, #2

      (333) 0x41f52c B.EQ	41f578

      (333) 0x41f530 CMP	X10, #3

      (333) 0x41f534 B.EQ	41f570

      (333) 0x41f538 CMP	X10, #4

      (333) 0x41f53c B.EQ	41f568

      (333) 0x41f540 CMP	X10, #5

      (333) 0x41f544 B.EQ	41f560

      (333) 0x41f548 CMP	X10, #6

      (333) 0x41f54c B.EQ	41f558

      (333) 0x41f550 LDR	D5, [X16]

      (333) 0x41f554 ADD	X0, X16, #8

      (333) 0x41f558 LDR	D26, [X0], #8

      (333) 0x41f55c FADD	D5, D5, D26

      (333) 0x41f560 LDR	D2, [X0], #8

      (333) 0x41f564 FADD	D5, D5, D2

      (333) 0x41f568 LDR	D16, [X0], #8

      (333) 0x41f56c FADD	D5, D5, D16

      (333) 0x41f570 LDR	D24, [X0], #8

      (333) 0x41f574 FADD	D5, D5, D24

      (333) 0x41f578 LDR	D1, [X0], #8

      (333) 0x41f57c FADD	D5, D5, D1

      (333) 0x41f580 LDR	D3, [X0], #8

      (333) 0x41f584 FADD	D5, D5, D3

      (333) 0x41f588 CMP	X17, X0

      (333) 0x41f58c B.EQ	41f5d8

        (344) 0x41f590 ORR	X18, XZR, X0

        (344) 0x41f594 LDR	D28, [X0, #8]

        (344) 0x41f598 LDR	D4, [X18], #8

        (344) 0x41f59c LDP	D19, D6, [X0, #24]

        (344) 0x41f5a0 LDP	D7, D8, [X0, #40]

        (344) 0x41f5a4 ADD	X0, X0, #64

        (344) 0x41f5a8 FADD	D27, D5, D4

        (344) 0x41f5ac LDR	D30, [X18, #8]

        (344) 0x41f5b0 LDUR	D9, [X0, #504]

        (344) 0x41f5b4 FADD	D11, D27, D28

        (344) 0x41f5b8 FADD	D20, D11, D30

        (344) 0x41f5bc FADD	D10, D20, D19

        (344) 0x41f5c0 FADD	D12, D10, D6

        (344) 0x41f5c4 FADD	D13, D12, D7

        (344) 0x41f5c8 FADD	D15, D13, D8

        (344) 0x41f5cc FADD	D5, D15, D9

        (344) 0x41f5d0 CMP	X17, X0

        (344) 0x41f5d4 B.NE	41f590

      (333) 0x41f5d8 LDR	X14, [X27]

      (333) 0x41f5dc UBFM	X30, X25, #61, #31

      (333) 0x41f5e0 MOVZ	W13, #24

      (333) 0x41f5e4 LDR	X1, [SP, #1192]

      (333) 0x41f5e8 LDR	X6, [X28, #24]

      (333) 0x41f5ec ADD	X11, X14, X5

      (333) 0x41f5f0 LDR	X15, [X11, #8]

      (333) 0x41f5f4 LDR	X5, [X1, #24]

      (333) 0x41f5f8 STR	D5, [X6, X30]

      (333) 0x41f5fc LDR	X2, [X11, #24]

      (333) 0x41f600 UMADDL	X16, W25, W13, X5

      (333) 0x41f604 CMP	W3, #0

      (333) 0x41f608 B.LE	42007c

      (333) 0x41f60c SUB	X9, X21, #8

      (333) 0x41f610 MOVI	D7, #0

      (333) 0x41f614 FMOV	D29, #2.0000000

      (333) 0x41f618 MOVZ	X7, #0

      (333) 0x41f61c UBFM	X4, X9, #3, #63

      (333) 0x41f620 ADD	X17, X4, #1

      (333) 0x41f624 ANDS	X8, X17, #4224

      (333) 0x41f628 B.EQ	41f6ec

      (333) 0x41f62c CMP	X8, #1

      (333) 0x41f630 B.EQ	41f6d0

      (333) 0x41f634 CMP	X8, #2

      (333) 0x41f638 B.EQ	41f6bc

      (333) 0x41f63c CMP	X8, #3

      (333) 0x41f640 B.EQ	41f6a8

      (333) 0x41f644 CMP	X8, #4

      (333) 0x41f648 B.EQ	41f694

      (333) 0x41f64c CMP	X8, #5

      (333) 0x41f650 B.EQ	41f680

      (333) 0x41f654 CMP	X8, #6

      (333) 0x41f658 B.EQ	41f66c

      (333) 0x41f65c LDR	D14, [X19]

      (333) 0x41f660 MOVZ	X7, #8

      (333) 0x41f664 LDR	D21, [X24]

      (333) 0x41f668 FMADD	D7, D14, D29, D21

      (333) 0x41f66c LDR	D23, [X19, X7]

      (333) 0x41f670 LDR	D0, [X24, X7]

      (333) 0x41f674 ADD	X7, X7, #8

      (333) 0x41f678 FMADD	D17, D23, D29, D0

      (333) 0x41f67c FADD	D7, D7, D17

      (333) 0x41f680 LDR	D18, [X19, X7]

      (333) 0x41f684 LDR	D31, [X24, X7]

      (333) 0x41f688 ADD	X7, X7, #8

      (333) 0x41f68c FMADD	D25, D18, D29, D31

      (333) 0x41f690 FADD	D7, D7, D25

      (333) 0x41f694 LDR	D22, [X19, X7]

      (333) 0x41f698 LDR	D26, [X24, X7]

      (333) 0x41f69c ADD	X7, X7, #8

      (333) 0x41f6a0 FMADD	D2, D22, D29, D26

      (333) 0x41f6a4 FADD	D7, D7, D2

      (333) 0x41f6a8 LDR	D16, [X19, X7]

      (333) 0x41f6ac LDR	D24, [X24, X7]

      (333) 0x41f6b0 ADD	X7, X7, #8

      (333) 0x41f6b4 FMADD	D1, D16, D29, D24

      (333) 0x41f6b8 FADD	D7, D7, D1

      (333) 0x41f6bc LDR	D3, [X19, X7]

      (333) 0x41f6c0 LDR	D5, [X24, X7]

      (333) 0x41f6c4 ADD	X7, X7, #8

      (333) 0x41f6c8 FMADD	D4, D3, D29, D5

      (333) 0x41f6cc FADD	D7, D7, D4

      (333) 0x41f6d0 LDR	D19, [X19, X7]

      (333) 0x41f6d4 LDR	D6, [X24, X7]

      (333) 0x41f6d8 ADD	X7, X7, #8

      (333) 0x41f6dc FMADD	D27, D19, D29, D6

      (333) 0x41f6e0 FADD	D7, D7, D27

      (333) 0x41f6e4 CMP	X21, X7

      (333) 0x41f6e8 B.EQ	41f794

        (343) 0x41f6ec LDR	D8, [X19, X7]

        (343) 0x41f6f0 ADD	X0, X7, #8

        (343) 0x41f6f4 ADD	X18, X7, #16

        (343) 0x41f6f8 ADD	X12, X7, #24

        (343) 0x41f6fc ADD	X13, X7, #32

        (343) 0x41f700 LDR	D11, [X24, X7]

        (343) 0x41f704 ADD	X10, X7, #40

        (343) 0x41f708 ADD	X14, X7, #48

        (343) 0x41f70c ADD	X11, X7, #56

        (343) 0x41f710 ADD	X7, X7, #64

        (343) 0x41f714 LDR	D9, [X19, X0]

        (343) 0x41f718 LDR	D28, [X24, X0]

        (343) 0x41f71c FMADD	D30, D8, D29, D11

        (343) 0x41f720 LDR	D20, [X19, X18]

        (343) 0x41f724 LDR	D10, [X24, X18]

        (343) 0x41f728 FMADD	D12, D9, D29, D28

        (343) 0x41f72c LDR	D13, [X19, X12]

        (343) 0x41f730 LDR	D15, [X24, X12]

        (343) 0x41f734 FMADD	D14, D20, D29, D10

        (343) 0x41f738 LDR	D21, [X19, X13]

        (343) 0x41f73c FADD	D23, D7, D30

        (343) 0x41f740 LDR	D0, [X24, X13]

        (343) 0x41f744 FMADD	D17, D13, D29, D15

        (343) 0x41f748 LDR	D18, [X19, X10]

        (343) 0x41f74c LDR	D31, [X24, X10]

        (343) 0x41f750 FADD	D25, D23, D12

        (343) 0x41f754 FMADD	D22, D21, D29, D0

        (343) 0x41f758 LDR	D26, [X19, X14]

        (343) 0x41f75c LDR	D2, [X24, X14]

        (343) 0x41f760 FMADD	D16, D18, D29, D31

        (343) 0x41f764 LDR	D24, [X19, X11]

        (343) 0x41f768 FADD	D1, D25, D14

        (343) 0x41f76c LDR	D3, [X24, X11]

        (343) 0x41f770 FMADD	D5, D26, D29, D2

        (343) 0x41f774 FADD	D4, D1, D17

        (343) 0x41f778 FMADD	D19, D24, D29, D3

        (343) 0x41f77c FADD	D6, D4, D22

        (343) 0x41f780 FADD	D27, D6, D16

        (343) 0x41f784 FADD	D7, D27, D5

        (343) 0x41f788 FADD	D7, D7, D19

        (343) 0x41f78c CMP	X21, X7

        (343) 0x41f790 B.NE	41f6ec

      (333) 0x41f794 MOVZ	X6, #0

      (333) 0x41f798 UBFM	X15, X15, #61, #60

        (330) 0x41f79c CMP	W3, #0

        (330) 0x41f7a0 B.LE	420000

        (342) 0x41f7a4 SUB	X1, X21, #8

        (342) 0x41f7a8 MOVI	D0, #0

        (342) 0x41f7ac MOVZ	X17, #0

        (342) 0x41f7b0 UBFM	X5, X1, #3, #63

        (342) 0x41f7b4 ADD	X9, X5, #1

        (342) 0x41f7b8 ANDS	X4, X9, #4224

        (342) 0x41f7bc B.EQ	41f868

        (342) 0x41f7c0 CMP	X4, #1

        (342) 0x41f7c4 B.EQ	41f850

        (342) 0x41f7c8 CMP	X4, #2

        (342) 0x41f7cc B.EQ	41f840

        (342) 0x41f7d0 CMP	X4, #3

        (342) 0x41f7d4 B.EQ	41f830

        (342) 0x41f7d8 CMP	X4, #4

        (342) 0x41f7dc B.EQ	41f820

        (342) 0x41f7e0 CMP	X4, #5

        (342) 0x41f7e4 B.EQ	41f810

        (342) 0x41f7e8 CMP	X4, #6

        (342) 0x41f7ec B.EQ	41f800

        (342) 0x41f7f0 LDR	D29, [X2]

        (342) 0x41f7f4 MOVZ	X17, #8

        (342) 0x41f7f8 LDR	D8, [X19]

        (342) 0x41f7fc FMADD	D0, D8, D29, D0

        (342) 0x41f800 LDR	D11, [X19, X17]

        (342) 0x41f804 LDR	D9, [X2, X17]

        (342) 0x41f808 ADD	X17, X17, #8

        (342) 0x41f80c FMADD	D0, D11, D9, D0

        (342) 0x41f810 LDR	D28, [X19, X17]

        (342) 0x41f814 LDR	D30, [X2, X17]

        (342) 0x41f818 ADD	X17, X17, #8

        (342) 0x41f81c FMADD	D0, D28, D30, D0

        (342) 0x41f820 LDR	D20, [X19, X17]

        (342) 0x41f824 LDR	D10, [X2, X17]

        (342) 0x41f828 ADD	X17, X17, #8

        (342) 0x41f82c FMADD	D0, D20, D10, D0

        (342) 0x41f830 LDR	D12, [X19, X17]

        (342) 0x41f834 LDR	D13, [X2, X17]

        (342) 0x41f838 ADD	X17, X17, #8

        (342) 0x41f83c FMADD	D0, D12, D13, D0

        (342) 0x41f840 LDR	D15, [X19, X17]

        (342) 0x41f844 LDR	D14, [X2, X17]

        (342) 0x41f848 ADD	X17, X17, #8

        (342) 0x41f84c FMADD	D0, D15, D14, D0

        (342) 0x41f850 LDR	D21, [X19, X17]

        (342) 0x41f854 LDR	D23, [X2, X17]

        (342) 0x41f858 ADD	X17, X17, #8

        (342) 0x41f85c FMADD	D0, D21, D23, D0

        (342) 0x41f860 CMP	X21, X17

        (342) 0x41f864 B.EQ	41f8f0

          (341) 0x41f868 LDR	D17, [X19, X17]

          (341) 0x41f86c ADD	X8, X17, #8

          (341) 0x41f870 ADD	X0, X17, #16

          (341) 0x41f874 ADD	X7, X17, #24

          (341) 0x41f878 ADD	X12, X17, #32

          (341) 0x41f87c LDR	D18, [X2, X17]

          (341) 0x41f880 ADD	X18, X17, #40

          (341) 0x41f884 ADD	X13, X17, #48

          (341) 0x41f888 ADD	X10, X17, #56

          (341) 0x41f88c ADD	X17, X17, #64

          (341) 0x41f890 LDR	D22, [X19, X8]

          (341) 0x41f894 LDR	D2, [X2, X8]

          (341) 0x41f898 FMADD	D31, D17, D18, D0

          (341) 0x41f89c LDR	D25, [X19, X0]

          (341) 0x41f8a0 LDR	D16, [X2, X0]

          (341) 0x41f8a4 LDR	D26, [X19, X7]

          (341) 0x41f8a8 FMADD	D24, D22, D2, D31

          (341) 0x41f8ac LDR	D1, [X2, X7]

          (341) 0x41f8b0 LDR	D3, [X19, X12]

          (341) 0x41f8b4 FMADD	D5, D25, D16, D24

          (341) 0x41f8b8 LDR	D4, [X2, X12]

          (341) 0x41f8bc LDR	D19, [X19, X18]

          (341) 0x41f8c0 LDR	D6, [X2, X18]

          (341) 0x41f8c4 FMADD	D29, D26, D1, D5

          (341) 0x41f8c8 LDR	D8, [X19, X13]

          (341) 0x41f8cc LDR	D27, [X2, X13]

          (341) 0x41f8d0 FMADD	D11, D3, D4, D29

          (341) 0x41f8d4 LDR	D9, [X19, X10]

          (341) 0x41f8d8 LDR	D28, [X2, X10]

          (341) 0x41f8dc FMADD	D30, D19, D6, D11

          (341) 0x41f8e0 FMADD	D20, D8, D27, D30

          (341) 0x41f8e4 FMADD	D0, D9, D28, D20

          (341) 0x41f8e8 CMP	X21, X17

          (341) 0x41f8ec B.NE	41f868

        (342) 0x41f8f0 STR	D0, [X16, X6,LSL #3]

        (342) 0x41f8f4 ADD	X6, X6, #1

        (342) 0x41f8f8 ADD	X2, X2, X15

        (342) 0x41f8fc CMP	X6, #3

        (342) 0x41f900 B.NE	41f7a4

      (333) 0x41f904 LDR	X21, [X23, #24]

      (333) 0x41f908 ADD	X25, X25, #1

      (333) 0x41f90c ADD	X26, X26, #40

      (333) 0x41f910 STR	D7, [X21, X30]

      (333) 0x41f914 CMP	W22, W25

      (333) 0x41f918 B.GT	41e708

  (340) 0x41f91c LDP	D8, D9, [SP, #96]

  (340) 0x41f920 ORR	W14, WZR, W22

  (340) 0x41f924 LDP	X23, X24, [SP, #48]

  (340) 0x41f928 LDP	X25, X26, [SP, #64]

  (340) 0x41f92c LDP	X27, X28, [SP, #80]

  (340) 0x41f930 LDP	D10, D11, [SP, #112]

  (340) 0x41f934 LDP	D12, D13, [SP, #128]

  (340) 0x41f938 LDP	D14, D15, [SP, #144]

  (340) 0x41f93c LDR	X21, [SP, #1200]

  (340) 0x41f940 LDR	X22, [SP, #1208]

  (340) 0x41f944 SBFM	X19, X14, #0, #31

  (340) 0x41f948 CBZ	W14, 420154

  (340) 0x41f94c LDR	X4, [X21, #24]

  (340) 0x41f950 MOVZ	W30, #24

  (340) 0x41f954 ORR	X3, XZR, #3841

  (340) 0x41f958 MOVK	X3, #43691

  (340) 0x41f95c MOVK	X3, #2730

  (340) 0x41f960 LDR	X1, [X20, #400]

  (340) 0x41f964 SMADDL	X16, W14, W30, X4

  (340) 0x41f968 SUB	X11, X16, X4

  (340) 0x41f96c SUB	X15, X11, #24

  (340) 0x41f970 UBFM	X6, X15, #3, #63

  (340) 0x41f974 MADD	X2, X6, X3, XZR

  (340) 0x41f978 ADD	X5, X2, #1

  (340) 0x41f97c ANDS	X9, X5, #4160

  (340) 0x41f980 B.EQ	41fa38

  (340) 0x41f984 CMP	X9, #1

  (340) 0x41f988 B.EQ	41f9fc

  (340) 0x41f98c CMP	X9, #2

  (340) 0x41f990 B.EQ	41f9c8

  (340) 0x41f994 LDR	D0, [X1]

  (340) 0x41f998 ADD	X1, X1, #24

  (340) 0x41f99c LDP	D7, D21, [X4]

  (340) 0x41f9a0 ADD	X4, X4, #24

  (340) 0x41f9a4 LDUR	D23, [X4, #504]

  (340) 0x41f9a8 FADD	D17, D7, D0

  (340) 0x41f9ac STUR	D17, [X4, #488]

  (340) 0x41f9b0 LDUR	D18, [X1, #496]

  (340) 0x41f9b4 FADD	D22, D21, D18

  (340) 0x41f9b8 STUR	D22, [X4, #496]

  (340) 0x41f9bc LDUR	D2, [X1, #504]

  (340) 0x41f9c0 FADD	D31, D23, D2

  (340) 0x41f9c4 STUR	D31, [X4, #504]

  (340) 0x41f9c8 LDR	D24, [X1]

  (340) 0x41f9cc ADD	X1, X1, #24

  (340) 0x41f9d0 LDP	D25, D16, [X4]

  (340) 0x41f9d4 ADD	X4, X4, #24

  (340) 0x41f9d8 LDUR	D26, [X4, #504]

  (340) 0x41f9dc FADD	D1, D25, D24

  (340) 0x41f9e0 STUR	D1, [X4, #488]

  (340) 0x41f9e4 LDUR	D3, [X1, #496]

  (340) 0x41f9e8 FADD	D5, D16, D3

  (340) 0x41f9ec STUR	D5, [X4, #496]

  (340) 0x41f9f0 LDUR	D4, [X1, #504]

  (340) 0x41f9f4 FADD	D19, D26, D4

  (340) 0x41f9f8 STUR	D19, [X4, #504]

  (340) 0x41f9fc LDR	D6, [X1]

  (340) 0x41fa00 ADD	X1, X1, #24

  (340) 0x41fa04 LDP	D29, D27, [X4]

  (340) 0x41fa08 ADD	X4, X4, #24

  (340) 0x41fa0c LDUR	D28, [X4, #504]

  (340) 0x41fa10 FADD	D30, D29, D6

  (340) 0x41fa14 STUR	D30, [X4, #488]

  (340) 0x41fa18 LDUR	D20, [X1, #496]

  (340) 0x41fa1c FADD	D7, D27, D20

  (340) 0x41fa20 STUR	D7, [X4, #496]

  (340) 0x41fa24 LDUR	D21, [X1, #504]

  (340) 0x41fa28 FADD	D23, D28, D21

  (340) 0x41fa2c STUR	D23, [X4, #504]

  (340) 0x41fa30 CMP	X4, X16

  (340) 0x41fa34 B.EQ	41fb04

    (337) 0x41fa38 LDR	D18, [X1]

    (337) 0x41fa3c ADD	X17, X4, #24

    (337) 0x41fa40 ADD	X8, X4, #48

    (337) 0x41fa44 ADD	X7, X4, #72

    (337) 0x41fa48 ORR	X0, XZR, X1

    (337) 0x41fa4c LDP	D0, D17, [X4]

    (337) 0x41fa50 ADD	X1, X1, #96

    (337) 0x41fa54 LDP	D22, D2, [X4, #16]

    (337) 0x41fa58 ADD	X4, X4, #96

    (337) 0x41fa5c FADD	D31, D0, D18

    (337) 0x41fa60 STUR	D31, [X4, #416]

    (337) 0x41fa64 LDUR	D25, [X1, #424]

    (337) 0x41fa68 FADD	D16, D17, D25

    (337) 0x41fa6c STUR	D16, [X4, #424]

    (337) 0x41fa70 LDUR	D26, [X1, #432]

    (337) 0x41fa74 FADD	D24, D22, D26

    (337) 0x41fa78 STUR	D24, [X4, #432]

    (337) 0x41fa7c LDUR	D1, [X1, #440]

    (337) 0x41fa80 FADD	D3, D2, D1

    (337) 0x41fa84 STUR	D3, [X4, #440]

    (337) 0x41fa88 LDUR	D19, [X1, #448]

    (337) 0x41fa8c LDP	D5, D4, [X17, #8]

    (337) 0x41fa90 FADD	D29, D5, D19

    (337) 0x41fa94 STR	D29, [X17, #8]

    (337) 0x41fa98 LDUR	D27, [X1, #456]

    (337) 0x41fa9c FADD	D28, D4, D27

    (337) 0x41faa0 STR	D28, [X17, #16]

    (337) 0x41faa4 LDUR	D30, [X1, #464]

    (337) 0x41faa8 LDUR	D6, [X4, #464]

    (337) 0x41faac FADD	D20, D6, D30

    (337) 0x41fab0 STUR	D20, [X4, #464]

    (337) 0x41fab4 LDUR	D23, [X1, #472]

    (337) 0x41fab8 LDP	D7, D21, [X8, #8]

    (337) 0x41fabc FADD	D0, D7, D23

    (337) 0x41fac0 STR	D0, [X8, #8]

    (337) 0x41fac4 LDUR	D17, [X1, #480]

    (337) 0x41fac8 FADD	D22, D21, D17

    (337) 0x41facc STR	D22, [X8, #16]

    (337) 0x41fad0 LDUR	D2, [X4, #488]

    (337) 0x41fad4 LDUR	D18, [X1, #488]

    (337) 0x41fad8 FADD	D31, D2, D18

    (337) 0x41fadc STUR	D31, [X4, #488]

    (337) 0x41fae0 LDUR	D25, [X1, #496]

    (337) 0x41fae4 LDP	D16, D26, [X7, #8]

    (337) 0x41fae8 FADD	D24, D16, D25

    (337) 0x41faec STR	D24, [X7, #8]

    (337) 0x41faf0 LDR	D1, [X0, #88]

    (337) 0x41faf4 FADD	D3, D26, D1

    (337) 0x41faf8 STR	D3, [X7, #16]

    (337) 0x41fafc CMP	X4, X16

    (337) 0x41fb00 B.NE	41fa38

  (340) 0x41fb04 ANDS	X12, X19, #4224

  (340) 0x41fb08 LDR	X13, [X22, #24]

  (340) 0x41fb0c MOVZ	X14, #0

  (340) 0x41fb10 LDR	X18, [X20, #440]

  (340) 0x41fb14 B.EQ	41fbdc

  (340) 0x41fb18 CMP	X12, #1

  (340) 0x41fb1c B.EQ	41fbc0

  (340) 0x41fb20 CMP	X12, #2

  (340) 0x41fb24 B.EQ	41fbac

  (340) 0x41fb28 CMP	X12, #3

  (340) 0x41fb2c B.EQ	41fb98

  (340) 0x41fb30 CMP	X12, #4

  (340) 0x41fb34 B.EQ	41fb84

  (340) 0x41fb38 CMP	X12, #5

  (340) 0x41fb3c B.EQ	41fb70

  (340) 0x41fb40 CMP	X12, #6

  (340) 0x41fb44 B.EQ	41fb5c

  (340) 0x41fb48 LDR	D5, [X13]

  (340) 0x41fb4c MOVZ	X14, #1

  (340) 0x41fb50 LDR	D4, [X18]

  (340) 0x41fb54 FSUB	D19, D5, S4

  (340) 0x41fb58 STR	D19, [X13]

  (340) 0x41fb5c LDR	D29, [X13, X14,LSL #3]

  (340) 0x41fb60 LDR	D27, [X18, X14,LSL #3]

  (340) 0x41fb64 FSUB	D28, D29, S27

  (340) 0x41fb68 STR	D28, [X13, X14,LSL #3]

  (340) 0x41fb6c ADD	X14, X14, #1

  (340) 0x41fb70 LDR	D6, [X13, X14,LSL #3]

  (340) 0x41fb74 LDR	D30, [X18, X14,LSL #3]

  (340) 0x41fb78 FSUB	D20, D6, S30

  (340) 0x41fb7c STR	D20, [X13, X14,LSL #3]

  (340) 0x41fb80 ADD	X14, X14, #1

  (340) 0x41fb84 LDR	D7, [X13, X14,LSL #3]

  (340) 0x41fb88 LDR	D21, [X18, X14,LSL #3]

  (340) 0x41fb8c FSUB	D23, D7, S21

  (340) 0x41fb90 STR	D23, [X13, X14,LSL #3]

  (340) 0x41fb94 ADD	X14, X14, #1

  (340) 0x41fb98 LDR	D0, [X13, X14,LSL #3]

  (340) 0x41fb9c LDR	D17, [X18, X14,LSL #3]

  (340) 0x41fba0 FSUB	D22, D0, S17

  (340) 0x41fba4 STR	D22, [X13, X14,LSL #3]

  (340) 0x41fba8 ADD	X14, X14, #1

  (340) 0x41fbac LDR	D2, [X13, X14,LSL #3]

  (340) 0x41fbb0 LDR	D18, [X18, X14,LSL #3]

  (340) 0x41fbb4 FSUB	D31, D2, S18

  (340) 0x41fbb8 STR	D31, [X13, X14,LSL #3]

  (340) 0x41fbbc ADD	X14, X14, #1

  (340) 0x41fbc0 LDR	D25, [X13, X14,LSL #3]

  (340) 0x41fbc4 LDR	D16, [X18, X14,LSL #3]

  (340) 0x41fbc8 FSUB	D26, D25, S16

  (340) 0x41fbcc STR	D26, [X13, X14,LSL #3]

  (340) 0x41fbd0 ADD	X14, X14, #1

  (340) 0x41fbd4 CMP	X19, X14

  (340) 0x41fbd8 B.EQ	41fc84

    (338) 0x41fbdc LDR	D24, [X13, X14,LSL #3]

    (338) 0x41fbe0 ADD	X21, X14, #1

    (338) 0x41fbe4 ADD	X10, X14, #2

    (338) 0x41fbe8 ADD	X22, X14, #3

    (338) 0x41fbec ADD	X30, X14, #4

    (338) 0x41fbf0 LDR	D1, [X18, X14,LSL #3]

    (338) 0x41fbf4 ADD	X3, X14, #5

    (338) 0x41fbf8 ADD	X16, X14, #6

    (338) 0x41fbfc ADD	X11, X14, #7

    (338) 0x41fc00 FSUB	D3, D24, S1

    (338) 0x41fc04 STR	D3, [X13, X14,LSL #3]

    (338) 0x41fc08 ADD	X14, X14, #8

    (338) 0x41fc0c LDR	D5, [X13, X21,LSL #3]

    (338) 0x41fc10 LDR	D4, [X18, X21,LSL #3]

    (338) 0x41fc14 FSUB	D19, D5, S4

    (338) 0x41fc18 STR	D19, [X13, X21,LSL #3]

    (338) 0x41fc1c LDR	D29, [X13, X10,LSL #3]

    (338) 0x41fc20 LDR	D27, [X18, X10,LSL #3]

    (338) 0x41fc24 FSUB	D28, D29, S27

    (338) 0x41fc28 STR	D28, [X13, X10,LSL #3]

    (338) 0x41fc2c LDR	D30, [X13, X22,LSL #3]

    (338) 0x41fc30 LDR	D6, [X18, X22,LSL #3]

    (338) 0x41fc34 FSUB	D20, D30, S6

    (338) 0x41fc38 STR	D20, [X13, X22,LSL #3]

    (338) 0x41fc3c LDR	D7, [X13, X30,LSL #3]

    (338) 0x41fc40 LDR	D21, [X18, X30,LSL #3]

    (338) 0x41fc44 FSUB	D23, D7, S21

    (338) 0x41fc48 STR	D23, [X13, X30,LSL #3]

    (338) 0x41fc4c LDR	D0, [X13, X3,LSL #3]

    (338) 0x41fc50 LDR	D17, [X18, X3,LSL #3]

    (338) 0x41fc54 FSUB	D22, D0, S17

    (338) 0x41fc58 STR	D22, [X13, X3,LSL #3]

    (338) 0x41fc5c LDR	D2, [X13, X16,LSL #3]

    (338) 0x41fc60 LDR	D18, [X18, X16,LSL #3]

    (338) 0x41fc64 FSUB	D31, D2, S18

    (338) 0x41fc68 STR	D31, [X13, X16,LSL #3]

    (338) 0x41fc6c LDR	D25, [X13, X11,LSL #3]

    (338) 0x41fc70 LDR	D16, [X18, X11,LSL #3]

    (338) 0x41fc74 FSUB	D26, D25, S16

    (338) 0x41fc78 STR	D26, [X13, X11,LSL #3]

    (338) 0x41fc7c CMP	X19, X14

    (338) 0x41fc80 B.NE	41fbdc

  (340) 0x41fc84 LDR	X4, [X20, #240]

  (340) 0x41fc88 UBFM	X15, X19, #61, #60

  (340) 0x41fc8c MOVI	D29, #0

  (340) 0x41fc90 SUB	X6, X15, #8

  (340) 0x41fc94 UBFM	X2, X6, #3, #63

  (340) 0x41fc98 ADD	X5, X2, #1

  (340) 0x41fc9c ANDS	X9, X5, #4224

  (340) 0x41fca0 ADD	X19, X4, X19,LSL #3

  (340) 0x41fca4 B.EQ	41fd14

  (340) 0x41fca8 CMP	X9, #1

  (340) 0x41fcac B.EQ	41fd04

  (340) 0x41fcb0 CMP	X9, #2

  (340) 0x41fcb4 B.EQ	41fcfc

  (340) 0x41fcb8 CMP	X9, #3

  (340) 0x41fcbc B.EQ	41fcf4

  (340) 0x41fcc0 CMP	X9, #4

  (340) 0x41fcc4 B.EQ	41fcec

  (340) 0x41fcc8 CMP	X9, #5

  (340) 0x41fccc B.EQ	41fce4

  (340) 0x41fcd0 CMP	X9, #6

  (340) 0x41fcd4 B.EQ	41fcdc

  (340) 0x41fcd8 LDR	D29, [X4], #8

  (340) 0x41fcdc LDR	D24, [X4], #8

  (340) 0x41fce0 FADD	D29, D29, D24

  (340) 0x41fce4 LDR	D1, [X4], #8

  (340) 0x41fce8 FADD	D29, D29, D1

  (340) 0x41fcec LDR	D3, [X4], #8

  (340) 0x41fcf0 FADD	D29, D29, D3

  (340) 0x41fcf4 LDR	D5, [X4], #8

  (340) 0x41fcf8 FADD	D29, D29, D5

  (340) 0x41fcfc LDR	D4, [X4], #8

  (340) 0x41fd00 FADD	D29, D29, D4

  (340) 0x41fd04 LDR	D19, [X4], #8

  (340) 0x41fd08 FADD	D29, D29, D19

  (340) 0x41fd0c CMP	X19, X4

  (340) 0x41fd10 B.EQ	41fd5c

    (339) 0x41fd14 ORR	X1, XZR, X4

    (339) 0x41fd18 LDR	D6, [X4, #8]

    (339) 0x41fd1c LDR	D27, [X1], #8

    (339) 0x41fd20 LDP	D28, D20, [X4, #24]

    (339) 0x41fd24 LDP	D21, D23, [X4, #40]

    (339) 0x41fd28 ADD	X4, X4, #64

    (339) 0x41fd2c FADD	D7, D29, D27

    (339) 0x41fd30 LDR	D17, [X1, #8]

    (339) 0x41fd34 LDUR	D30, [X4, #504]

    (339) 0x41fd38 FADD	D0, D7, D6

    (339) 0x41fd3c FADD	D22, D0, D17

    (339) 0x41fd40 FADD	D2, D22, D28

    (339) 0x41fd44 FADD	D18, D2, D20

    (339) 0x41fd48 FADD	D31, D18, D21

    (339) 0x41fd4c FADD	D25, D31, D23

    (339) 0x41fd50 FADD	D29, D25, D30

    (339) 0x41fd54 CMP	X19, X4

    (339) 0x41fd58 B.NE	41fd14

  (340) 0x41fd5c FNEG	D0, D29

  (340) 0x41fd60 STR	D0, [X20, #16]

  (340) 0x41fd64 LDP	X21, X22, [SP, #32]

  (340) 0x41fd68 LDP	X29, X30, [SP]

  (340) 0x41fd6c LDP	X19, X20, [SP, #16]

  (340) 0x41fd70 ADDVL	SP, SP, #2

  (340) 0x41fd74 ADD	SP, SP, #1216

  (340) 0x41fd78 RET

    (331) 0x41fd7c CMP	W3, #0

    (331) 0x41fd80 B.LE	41f4ec

    (331) 0x41fd84 LDR	X13, [X20, #160]

    (331) 0x41fd88 UBFM	X8, X3, #61, #31

    (331) 0x41fd8c MOVZ	X4, #0

    (331) 0x41fd90 SUB	X9, X8, #8

    (331) 0x41fd94 UBFM	X10, X9, #3, #63

    (331) 0x41fd98 LDR	X7, [X20, #456]

    (331) 0x41fd9c ADD	X11, X10, #1

    (331) 0x41fda0 ANDS	X12, X11, #4160

    (331) 0x41fda4 LDR	X6, [X13, #24]

    (331) 0x41fda8 B.EQ	41fe9c

    (331) 0x41fdac CMP	X12, #1

    (331) 0x41fdb0 B.EQ	41fe4c

    (331) 0x41fdb4 CMP	X12, #2

    (331) 0x41fdb8 B.EQ	41fe04

    (331) 0x41fdbc LDRSW	X14, [X6]

    (331) 0x41fdc0 LDR	X0, [X7, X14,LSL #3]

    (331) 0x41fdc4 CBZ	X0, 41fdfc

    (331) 0x41fdc8 LDR	D0, [X21]

    (331) 0x41fdcc LDR	D31, [X0, #8]

    (331) 0x41fdd0 FCMPE	D0, D31

    (331) 0x41fdd4 B.MI	42010c

    (331) 0x41fdd8 MOVI	D0, #0

    (331) 0x41fddc STR	XZR, [X24]

    (331) 0x41fde0 STR	D0, [X19]

    (331) 0x41fde4 LDR	X15, [X20, #256]

    (331) 0x41fde8 STR	D0, [X15]

    (331) 0x41fdec LDR	D1, [X19]

    (331) 0x41fdf0 LDR	D30, [X21]

    (331) 0x41fdf4 FDIV	D2, D1, D30

    (331) 0x41fdf8 STR	D2, [X19]

    (331) 0x41fdfc ADD	X6, X6, #4

    (331) 0x41fe00 MOVZ	X4, #8

    (331) 0x41fe04 LDRSW	X16, [X6]

    (331) 0x41fe08 LDR	X0, [X7, X16,LSL #3]

    (331) 0x41fe0c CBZ	X0, 41fe44

    (331) 0x41fe10 LDR	D0, [X21, X4]

    (331) 0x41fe14 LDR	D3, [X0, #8]

    (331) 0x41fe18 FCMPE	D0, D3

    (331) 0x41fe1c B.MI	4200dc

    (331) 0x41fe20 MOVI	D0, #0

    (331) 0x41fe24 STR	XZR, [X24, X4]

    (331) 0x41fe28 STR	D0, [X19, X4]

    (331) 0x41fe2c LDR	X17, [X20, #256]

    (331) 0x41fe30 STR	D0, [X17, X4]

    (331) 0x41fe34 LDR	D4, [X21, X4]

    (331) 0x41fe38 LDR	D5, [X19, X4]

    (331) 0x41fe3c FDIV	D6, D5, D4

    (331) 0x41fe40 STR	D6, [X19, X4]

    (331) 0x41fe44 ADD	X6, X6, #4

    (331) 0x41fe48 ADD	X4, X4, #8

    (331) 0x41fe4c LDRSW	X18, [X6]

    (331) 0x41fe50 LDR	X0, [X7, X18,LSL #3]

    (331) 0x41fe54 CBZ	X0, 41fe8c

    (331) 0x41fe58 LDR	D0, [X21, X4]

    (331) 0x41fe5c LDR	D7, [X0, #8]

    (331) 0x41fe60 FCMPE	D0, D7

    (331) 0x41fe64 B.MI	42008c

    (331) 0x41fe68 MOVI	D0, #0

    (331) 0x41fe6c STR	XZR, [X24, X4]

    (331) 0x41fe70 STR	D0, [X19, X4]

    (331) 0x41fe74 LDR	X30, [X20, #256]

    (331) 0x41fe78 STR	D0, [X30, X4]

    (331) 0x41fe7c LDR	D8, [X21, X4]

    (331) 0x41fe80 LDR	D9, [X19, X4]

    (331) 0x41fe84 FDIV	D10, D9, D8

    (331) 0x41fe88 STR	D10, [X19, X4]

    (331) 0x41fe8c ADD	X4, X4, #8

    (331) 0x41fe90 ADD	X6, X6, #4

    (331) 0x41fe94 CMP	X8, X4

    (331) 0x41fe98 B.EQ	41f4ec

    (331) 0x41fe9c STP	X5, X26, [SP, #160]

    (331) 0x41fea0 ORR	X26, XZR, X20

    (331) 0x41fea4 ORR	X20, XZR, X21

    (331) 0x41fea8 ORR	X21, XZR, X4

    (331) 0x41feac STR	X25, [SP, #176]

    (331) 0x41feb0 ORR	X25, XZR, X7

    (331) 0x41feb4 STR	W3, [SP, #184]

    (331) 0x41feb8 STR	W22, [SP, #192]

    (331) 0x41febc ORR	X22, XZR, X6

    (331) 0x41fec0 STP	X23, X27, [SP, #200]

    (331) 0x41fec4 ORR	X23, XZR, X19

    (331) 0x41fec8 ORR	X19, XZR, X8

    (331) 0x41fecc B	41ffd4

      (345) 0x41fed0 MOVI	D0, #0

      (345) 0x41fed4 STR	XZR, [X24, X21]

      (345) 0x41fed8 STR	D0, [X23, X21]

      (345) 0x41fedc LDR	X27, [X26, #256]

      (345) 0x41fee0 STR	D0, [X27, X21]

      (345) 0x41fee4 LDR	D12, [X20, X21]

      (345) 0x41fee8 LDR	D13, [X23, X21]

      (345) 0x41feec FDIV	D14, D13, D12

      (345) 0x41fef0 STR	D14, [X23, X21]

      (345) 0x41fef4 LDRSW	X5, [X22, #4]

      (345) 0x41fef8 ADD	X21, X21, #8

      (345) 0x41fefc ADD	X22, X22, #4

      (345) 0x41ff00 LDR	X0, [X25, X5,LSL #3]

      (345) 0x41ff04 CBZ	X0, 41ff3c

      (345) 0x41ff08 LDR	D0, [X20, X21]

      (345) 0x41ff0c LDR	D15, [X0, #8]

      (345) 0x41ff10 FCMPE	D0, D15

      (345) 0x41ff14 B.MI	42004c

      (345) 0x41ff18 MOVI	D0, #0

      (345) 0x41ff1c STR	XZR, [X24, X21]

      (345) 0x41ff20 STR	D0, [X23, X21]

      (345) 0x41ff24 LDR	X0, [X26, #256]

      (345) 0x41ff28 STR	D0, [X0, X21]

      (345) 0x41ff2c LDR	D16, [X20, X21]

      (345) 0x41ff30 LDR	D17, [X23, X21]

      (345) 0x41ff34 FDIV	D18, D17, D16

      (345) 0x41ff38 STR	D18, [X23, X21]

      (345) 0x41ff3c LDRSW	X1, [X22, #4]

      (345) 0x41ff40 ADD	X27, X21, #8

      (345) 0x41ff44 LDR	X0, [X25, X1,LSL #3]

      (345) 0x41ff48 CBZ	X0, 41ff80

      (345) 0x41ff4c LDR	D0, [X20, X27]

      (345) 0x41ff50 LDR	D19, [X0, #8]

      (345) 0x41ff54 FCMPE	D0, D19

      (345) 0x41ff58 B.MI	42005c

      (345) 0x41ff5c MOVI	D0, #0

      (345) 0x41ff60 STR	XZR, [X24, X27]

      (345) 0x41ff64 STR	D0, [X23, X27]

      (345) 0x41ff68 LDR	X2, [X26, #256]

      (345) 0x41ff6c STR	D0, [X2, X27]

      (345) 0x41ff70 LDR	D20, [X20, X27]

      (345) 0x41ff74 LDR	D21, [X23, X27]

      (345) 0x41ff78 FDIV	D22, D21, D20

      (345) 0x41ff7c STR	D22, [X23, X27]

      (345) 0x41ff80 LDRSW	X9, [X22, #8]

      (345) 0x41ff84 ADD	X27, X21, #16

      (345) 0x41ff88 LDR	X0, [X25, X9,LSL #3]

      (345) 0x41ff8c CBZ	X0, 41ffc4

      (345) 0x41ff90 LDR	D0, [X20, X27]

      (345) 0x41ff94 LDR	D23, [X0, #8]

      (345) 0x41ff98 FCMPE	D0, D23

      (345) 0x41ff9c B.MI	42006c

      (345) 0x41ffa0 MOVI	D0, #0

      (345) 0x41ffa4 STR	XZR, [X24, X27]

      (345) 0x41ffa8 STR	D0, [X23, X27]

      (345) 0x41ffac LDR	X10, [X26, #256]

      (345) 0x41ffb0 STR	D0, [X10, X27]

      (345) 0x41ffb4 LDR	D24, [X20, X27]

      (345) 0x41ffb8 LDR	D25, [X23, X27]

      (345) 0x41ffbc FDIV	D26, D25, D24

      (345) 0x41ffc0 STR	D26, [X23, X27]

      (345) 0x41ffc4 ADD	X21, X21, #24

      (345) 0x41ffc8 ADD	X22, X22, #12

      (345) 0x41ffcc CMP	X19, X21

      (345) 0x41ffd0 B.EQ	4200bc

      (345) 0x41ffd4 LDRSW	X3, [X22]

      (345) 0x41ffd8 LDR	X0, [X25, X3,LSL #3]

      (345) 0x41ffdc CBZ	X0, 41fef4

      (345) 0x41ffe0 LDR	D0, [X20, X21]

      (345) 0x41ffe4 LDR	D11, [X0, #8]

      (345) 0x41ffe8 FCMPE	D0, D11

      (345) 0x41ffec B.GE	41fed0

      (345) 0x41fff0 ADD	X2, X24, X21

      (345) 0x41fff4 ADD	X1, X23, X21

      (345) 0x41fff8 BL	40de80

      (345) 0x41fffc B	41fedc

        (330) 0x420000 STR	XZR, [X16, X6,LSL #3]

        (330) 0x420004 ADD	X6, X6, #1

        (330) 0x420008 ADD	X2, X2, X15

        (330) 0x42000c CMP	X6, #3

        (330) 0x420010 B.NE	41f79c

      (333) 0x420014 LDR	X21, [X23, #24]

      (333) 0x420018 ADD	X25, X25, #1

      (333) 0x42001c ADD	X26, X26, #40

      (333) 0x420020 STR	D7, [X21, X30]

      (333) 0x420024 CMP	W22, W25

      (333) 0x420028 B.GT	41e708

  (340) 0x42002c B	41f91c

        (332) 0x420030 MOVZ	W15, #0

        (332) 0x420034 ADD	X8, X24, X30

        (332) 0x420038 PTRUE	P7.B, ALL

        (332) 0x42003c FDUP	Z13.D, #112

        (332) 0x420040 ADD	X7, X19, X30

        (332) 0x420044 ADD	X2, X22, X30

        (332) 0x420048 B	41f138

      (345) 0x42004c ADD	X2, X24, X21

      (345) 0x420050 ADD	X1, X23, X21

      (345) 0x420054 BL	40de80

      (345) 0x420058 B	41ff24

      (345) 0x42005c ADD	X2, X24, X27

      (345) 0x420060 ADD	X1, X23, X27

      (345) 0x420064 BL	40de80

      (345) 0x420068 B	41ff68

      (345) 0x42006c ADD	X2, X24, X27

      (345) 0x420070 ADD	X1, X23, X27

      (345) 0x420074 BL	40de80

      (345) 0x420078 B	41ffac

      (333) 0x42007c MOVI	D7, #0

      (333) 0x420080 B	41f794

      (333) 0x420084 MOVI	D5, #0

      (333) 0x420088 B	41f5d8

    (331) 0x42008c ADD	X2, X24, X4

    (331) 0x420090 ADD	X1, X19, X4

    (331) 0x420094 STP	X4, X5, [SP, #160]

    (331) 0x420098 STP	X8, X6, [SP, #176]

    (331) 0x42009c STR	X7, [SP, #192]

    (331) 0x4200a0 STR	W3, [SP, #200]

    (331) 0x4200a4 BL	40de80

    (331) 0x4200a8 LDR	X7, [SP, #192]

    (331) 0x4200ac LDP	X4, X5, [SP, #160]

    (331) 0x4200b0 LDP	X8, X6, [SP, #176]

    (331) 0x4200b4 LDR	W3, [SP, #200]

    (331) 0x4200b8 B	41fe74

    (331) 0x4200bc LDR	X25, [SP, #176]

    (331) 0x4200c0 ORR	X19, XZR, X23

    (331) 0x4200c4 ORR	X20, XZR, X26

    (331) 0x4200c8 LDP	X23, X27, [SP, #200]

    (331) 0x4200cc LDP	X5, X26, [SP, #160]

    (331) 0x4200d0 LDR	W3, [SP, #184]

    (331) 0x4200d4 LDR	W22, [SP, #192]

    (331) 0x4200d8 B	41f4ec

    (331) 0x4200dc ADD	X2, X24, X4

    (331) 0x4200e0 ADD	X1, X19, X4

    (331) 0x4200e4 STP	X4, X5, [SP, #160]

    (331) 0x4200e8 STP	X8, X6, [SP, #176]

    (331) 0x4200ec STR	X7, [SP, #192]

    (331) 0x4200f0 STR	W3, [SP, #200]

    (331) 0x4200f4 BL	40de80

    (331) 0x4200f8 LDR	X7, [SP, #192]

    (331) 0x4200fc LDP	X4, X5, [SP, #160]

    (331) 0x420100 LDP	X8, X6, [SP, #176]

    (331) 0x420104 LDR	W3, [SP, #200]

    (331) 0x420108 B	41fe2c

    (331) 0x42010c ORR	X2, XZR, X24

    (331) 0x420110 ORR	X1, XZR, X19

    (331) 0x420114 STP	X5, X8, [SP, #160]

    (331) 0x420118 STP	X6, X7, [SP, #176]

    (331) 0x42011c STR	W3, [SP, #192]

    (331) 0x420120 BL	40de80

    (331) 0x420124 LDR	W3, [SP, #192]

    (331) 0x420128 LDP	X5, X8, [SP, #160]

    (331) 0x42012c LDP	X6, X7, [SP, #176]

    (331) 0x420130 B	41fde4

0x420134 MOVZ	W4, #1

0x420138 BLR	X7

0x42013c LDR	D0, [X20, #16]

0x420140 LDP	X29, X30, [SP]

0x420144 LDP	X19, X20, [SP, #16]

0x420148 ADDVL	SP, SP, #2

0x42014c ADD	SP, SP, #1216

0x420150 RET

(336) 0x420154 MOVI	D0, #0

(336) 0x420158 B	41fd60

0x42015c HINT	#0

Coverage (%)	Name	Source Location	Module
►98.58+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:175	exec
○	main._omp_fn.0	miniqmc.cpp:397	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.42+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:175	exec
○	main._omp_fn.0	miniqmc.cpp:397	exec
○	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	main	stl_vector.h:1128	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	miniqmc.cpp:529	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_4

Source file and lines	OneBodyJastrowRef.h:106-237
Module	exec

The function is defined in:

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_numeric.h:140-141
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h:1131,1147-1150,1263
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/shared_ptr_base.h:1667
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:106-123,169-174,184-194,207,214-216,231-237
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:221-223,229,242,249
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:94
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_algobase.h:952,1146-1151
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_iterator.h:1068,1139
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:188-191,276-284,291-298,305-336

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 8.17 to 2.00 cycles (4.08x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 60% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 8.17 to 6.08 cycles (1.34x speedup).

Details

10% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
30% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 8.17 to 1.00 cycles (8.17x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 92 bytes. The binary function is storing 184 bytes.

General properties

nb instructions	51
loop length	204
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

6.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	2.50	2.50	3.92	3.92	3.83	3.83	3.75	3.75	2.00	2.00	0.00	0.00	8.17	7.83	8.00	4.50	4.50
cycles	2.50	2.50	3.92	3.92	3.83	3.83	3.75	3.75	2.00	2.00	0.00	0.00	8.17	7.83	8.00	4.50	4.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.25
Overall L1	8.17

Vectorization ratios

all	10%
load	0%
store	30%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 8.17 cycles. At this rate:

11% of peak load performance is reached (11.27 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
46% of peak store performance is reached (22.53 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 41e660

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
ADDVL SP, SP, #62	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
ADRP X4, <20041a664>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
SUB SP, SP, #1216	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X5, X4, #3200	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X6, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X6, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
CMP X7, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 420134 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x1ad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X21, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X22, XZR, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR W1, [X20, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
BL 47e08c <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W14, [X20, #148]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP W14, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 41f944 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x12e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X2, X20, #376	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X23, X20, #416	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
MOVZ X25, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X27, X0, #96	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X28, X20, #216	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDR X1, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
STR X22, [SP, #1208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR W22, WZR, W14	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
LDR X19, [X20, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
STR X2, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X24, [X20, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X26, X1, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STR X21, [SP, #1200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR W3, [X20, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
MOVZ W4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
BLR X7	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D0, [X20, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ADDVL SP, SP, #2	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
ADD SP, SP, #1216	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_4

Source file and lines	OneBodyJastrowRef.h:106-237
Module	exec

The function is defined in:

/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_numeric.h:140-141
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_vector.h:1131,1147-1150,1263
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/shared_ptr_base.h:1667
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:106-123,169-174,184-194,207,214-216,231-237
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:221-223,229,242,249
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:94
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_algobase.h:952,1146-1151
/opt/arm/gcc-14.2.0_AmazonLinux-2023/include/c++/14.2.0/bits/stl_iterator.h:1068,1139
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:188-191,276-284,291-298,305-336

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 8.17 to 2.00 cycles (4.08x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

10% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
30% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 8.17 to 1.00 cycles (8.17x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 92 bytes. The binary function is storing 184 bytes.

General properties

nb instructions	51
loop length	204
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

6.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	2.50	2.50	3.92	3.92	3.83	3.83	3.75	3.75	2.00	2.00	0.00	0.00	8.17	7.83	8.00	4.50	4.50
cycles	2.50	2.50	3.92	3.92	3.83	3.83	3.75	3.75	2.00	2.00	0.00	0.00	8.17	7.83	8.00	4.50	4.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.25
Overall L1	8.17

Vectorization ratios

all	10%
load	0%
store	30%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 8.17 cycles. At this rate:

11% of peak load performance is reached (11.27 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
46% of peak store performance is reached (22.53 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 41e660

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
ADDVL SP, SP, #62	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
ADRP X4, <20041a664>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
SUB SP, SP, #1216	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X5, X4, #3200	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X6, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X6, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
CMP X7, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 420134 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x1ad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X21, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X22, XZR, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR W1, [X20, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
BL 47e08c <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W14, [X20, #148]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP W14, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 41f944 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x12e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X2, X20, #376	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X23, X20, #416	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
MOVZ X25, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X27, X0, #96	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X28, X20, #216	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDR X1, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
STR X22, [SP, #1208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR W22, WZR, W14	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
LDR X19, [X20, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
STR X2, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X24, [X20, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X26, X1, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STR X21, [SP, #1200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR W3, [X20, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
MOVZ W4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
BLR X7	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D0, [X20, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ADDVL SP, SP, #2	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
ADD SP, SP, #1216	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::OneBodyJastrowRef >::evaluateLog(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib, std::allocator > >&, qmcplusplus::Particl...–	0.01	0.02
▼Loop 336 - OneBodyJastrowRef.h:109-237 - exec–	0.00	0.00
▼Loop 340 - OneBodyJastrowRef.h:109-237 - exec–	0.00	0.00
▼Loop 331 - stl_numeric.h:140-141 - exec–	0.00	0.00
▼Loop 333 - OneBodyJastrowRef.h:109-216 - exec–	0.00	0.00
○Loop 343 - OneBodyJastrowRef.h:186-187 - exec	0.00	0.01
○Loop 344 - stl_numeric.h:140-141 - exec	0.00	0.01
▼Loop 342 - OneBodyJastrowRef.h:184-194 - exec–	0.00	0.00
○Loop 341 - OneBodyJastrowRef.h:192-193 - exec	0.01	0.01
▼Loop 332 - OneBodyJastrowRef.h:214-216 - exec–	0.00	0.00
○Loop 334 - BsplineFunctor.h:291-298 - exec	0.00	0.01
○Loop 335 - BsplineFunctor.h:305-336 - exec	0.00	0.00
○Loop 330 - OneBodyJastrowRef.h:188-194 - exec	0.00	0.00
○Loop 345 - BsplineFunctor.h:188-336 - exec	0.00	0.00
○Loop 339 - stl_numeric.h:140-141 - exec	0.00	0.00
○Loop 337 - OneBodyJastrowRef.h:169-169 - exec	0.00	0.00
○Loop 338 - OneBodyJastrowRef.h:171-172 - exec	0.00	0.00

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Vectorization

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Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

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Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code