OV - exec - Loop 28

	Loop Id: 28	Module: exec	Source: miniqmc.cpp:412-475 [...]	Coverage: 0.01%

    (33) 0x409508 LDURSW	X9, [X29, #488]

    (33) 0x40950c ADD	X28, X21, #1

    (33) 0x409510 CMP	X21, X9

    (33) 0x409514 B.GE	409400

    (33) 0x409518 LDR	X8, [SP, #48]

    (33) 0x40951c MOVZ	X21, #24

    (33) 0x409520 LDR	X8, [X8]

    (33) 0x409524 LDR	X27, [X8, X28,LSL #3]

    (33) 0x409528 LDR	X8, [X27, #5064]

    (33) 0x40952c STR	X8, [SP, #128]

    (33) 0x409530 LDR	X8, [SP, #120]

    (33) 0x409534 LDRSW	X8, [X8]

    (33) 0x409538 STR	X8, [SP, #64]

    (33) 0x40953c CBZ	W8, 409584

    (33) 0x409540 TBNZ	W8, #31, 409bac

    (33) 0x409544 ADD	X8, X8, X8,LSL #1

    (33) 0x409548 UBFM	X19, X8, #61, #60

    (33) 0x40954c ORR	X0, XZR, X19

    (33) 0x409550 BL	4045c0

    (33) 0x409554 STR	X0, [SP, #96]

    (33) 0x409558 ORR	X9, XZR, #3841

    (33) 0x40955c SUB	X8, X19, #24

    (33) 0x409560 LDR	X0, [SP, #96]

    (33) 0x409564 ORR	W1, WZR, WZR

    (33) 0x409568 MOVK	X9, #43691

    (33) 0x40956c UMULH	X8, X8, X9

    (33) 0x409570 MOVZ	W9, #24

    (33) 0x409574 UBFM	X8, X8, #4, #63

    (33) 0x409578 MADD	X2, X8, X9, X21

    (33) 0x40957c BL	4049f0

    (33) 0x409580 B	409588

    (33) 0x409584 STR	XZR, [SP, #96]

    (33) 0x409588 LDR	X8, [SP, #40]

    (33) 0x40958c LDRSW	X26, [X8]

    (33) 0x409590 ADRP	X8,

    (33) 0x409594 ADD	X8, X8, #3152

    (33) 0x409598 STP	X8, X26, [X29, #928]

    (33) 0x40959c SUB	X8, X29, #96

    (33) 0x4095a0 STP	XZR, XZR, [X8, #16]

    (33) 0x4095a4 CBZ	W26, 4095e8

    (33) 0x4095a8 TBNZ	W26, #31, 409bac

    (33) 0x4095ac ADD	X8, X26, X26,LSL #1

    (33) 0x4095b0 UBFM	X19, X8, #61, #60

    (33) 0x4095b4 ORR	X0, XZR, X19

    (33) 0x4095b8 BL	4045c0

    (33) 0x4095bc ORR	X9, XZR, #3841

    (33) 0x4095c0 SUB	X8, X19, #24

    (33) 0x4095c4 STP	X26, X0, [X29, #944]

    (33) 0x4095c8 STUR	X26, [X29, #424]

    (33) 0x4095cc ORR	W1, WZR, WZR

    (33) 0x4095d0 MOVK	X9, #43691

    (33) 0x4095d4 UMULH	X8, X8, X9

    (33) 0x4095d8 MOVZ	W9, #24

    (33) 0x4095dc UBFM	X8, X8, #4, #63

    (33) 0x4095e0 MADD	X2, X8, X9, X21

    (33) 0x4095e4 BL	4049f0

    (33) 0x4095e8 LDR	X1, [SP, #64]

    (33) 0x4095ec ADRP	X8,

    (33) 0x4095f0 ADD	X8, X8, #3080

    (33) 0x4095f4 STUR	WZR, [X29, #452]

    (33) 0x4095f8 STP	XZR, XZR, [X29, #904]

    (33) 0x4095fc STP	XZR, X8, [X29, #920]

    (33) 0x409600 CBZ	W1, 40962c

    (33) 0x409604 SUB	X0, X29, #120

    (33) 0x409608 BL	40b920

    (33) 0x40960c LDR	X8, [SP, #64]

    (33) 0x409610 STUR	X0, [X29, #392]

    (33) 0x409614 ORR	W1, WZR, WZR

    (33) 0x409618 UBFM	X2, X8, #61, #60

    (33) 0x40961c ADD	X19, X0, X8,LSL #3

    (33) 0x409620 BL	4049f0

    (33) 0x409624 ORR	X8, XZR, X19

    (33) 0x409628 B	409638

    (33) 0x40962c ORR	X19, XZR, XZR

    (33) 0x409630 ORR	X8, XZR, XZR

    (33) 0x409634 STUR	XZR, [X29, #392]

    (33) 0x409638 STP	X8, X19, [X29, #912]

    (33) 0x40963c LDR	X8, [SP, #136]

    (33) 0x409640 LDR	X8, [X8]

    (33) 0x409644 LDR	X0, [X8, #16]

    (33) 0x409648 BL	469040

    (33) 0x40964c LDR	X8, [SP, #88]

    (33) 0x409650 STR	X28, [SP, #56]

    (33) 0x409654 LDR	W8, [X8]

    (33) 0x409658 CMP	W8, #1

    (33) 0x40965c B.LT	409ab0

  (27) 0x409660 ADD	X28, X27, #16

  (27) 0x409664 ADD	X21, X27, #1832

  (27) 0x409668 ORR	W8, WZR, WZR

  (27) 0x40966c STR	W8, [SP, #108]

  (27) 0x409670 LDR	X8, [SP, #120]

  (27) 0x409674 LDR	W14, [X8]

  (27) 0x409678 CMP	W14, #1

  (27) 0x40967c B.LT	409920

  (27) 0x409680 LDR	D0, [X27, #5024]

  (27) 0x409684 LDR	D9, [X27, #5016]

  (27) 0x409688 LDR	X8, [SP, #72]

  (27) 0x40968c ORR	X26, XZR, XZR

  (27) 0x409690 CMP	X8, #1

  (27) 0x409694 LDUR	X15, [X29, #392]

  (27) 0x409698 LDR	X19, [X27, #5008]

  (27) 0x40969c CSINC	X16, X8, XZR, #8

  (27) 0x4096a0 FSUB	D10, D0, S9

    (29) 0x4096a4 MOVI	D0, #0

    (29) 0x4096a8 FMOV	D1, #1.0000000

    (29) 0x4096ac ORR	X8, XZR, X16

    (29) 0x4096b0 B	409714

      (30) 0x4096c0 ORR	X9, XZR, X19

      (30) 0x4096c4 ADD	X19, X19, #1

      (30) 0x4096c8 SUBS	X8, X8, #1

      (30) 0x4096cc STR	X19, [X27, #5008]

      (30) 0x4096d0 LDR	X9, [X28, X9,LSL #3]

      (30) 0x4096d4 UBFM	X10, X9, #11, #42

      (30) 0x4096d8 EOR	X9, X10, X9

      (30) 0x4096dc MOVZ	W10, #22144

      (30) 0x4096e0 MOVK	W10, #40236

      (30) 0x4096e4 AND	X10, X10, X9,LSL #7

      (30) 0x4096e8 EOR	X9, X10, X9

      (30) 0x4096ec MOVZ	W10, #61382

      (30) 0x4096f0 AND	X10, X10, X9,LSL #15

      (30) 0x4096f4 EOR	X9, X10, X9

      (30) 0x4096f8 EOR	X9, X9, X9,LSR #18

      (30) 0x4096fc UCVTF	D2, X9

      (30) 0x409700 MOVZ	X9, #16880

      (30) 0x409704 FMADD	D0, D1, D2, D0

      (30) 0x409708 FMOV	D2, X9

      (30) 0x40970c FMUL	D1, D1, D2

      (30) 0x409710 B.EQ	4098c4

      (30) 0x409714 CMP	X19, #624

      (30) 0x409718 B.CC	4096c0

      (30) 0x40971c LD1R	{V2.2D}, [X28]

      (30) 0x409720 LDUR	Q18, [X29, #352]

      (30) 0x409724 LDP	Q20, Q19, [SP, #144]

      (30) 0x409728 MOVN	X9, #1791

        (31) 0x40972c ADD	X10, X27, X9

        (31) 0x409730 DUP	V17.2D, X20

        (31) 0x409734 ADDS	X9, X9, #32

        (31) 0x409738 ADD	X11, X10, #1816

        (31) 0x40973c ADD	X12, X10, #1832

        (31) 0x409740 LDR	Q3, [X11]

        (31) 0x409744 EXT	V4.16B, V2.16B, V3.16B, #8

        (31) 0x409748 LDR	Q2, [X12]

        (31) 0x40974c AND	V6.16B, V3.16B, V19.16B

        (31) 0x409750 AND	V4.16B, V4.16B, V18.16B

        (31) 0x409754 ORR	V4.16B, V6.16B, V4.16B

        (31) 0x409758 LDR	Q6, [X10, X24]

        (31) 0x40975c EXT	V5.16B, V3.16B, V2.16B, #8

        (31) 0x409760 AND	V7.16B, V2.16B, V19.16B

        (31) 0x409764 AND	V3.16B, V3.16B, V20.16B

        (31) 0x409768 AND	V16.16B, V2.16B, V20.16B

        (31) 0x40976c USHR	V4.2D, V4.2D, #1

        (31) 0x409770 AND	V5.16B, V5.16B, V18.16B

        (31) 0x409774 CMEQ	V3.2D, V3.2D, #0

        (31) 0x409778 CMEQ	V16.2D, V16.2D, #0

        (31) 0x40977c ORR	V5.16B, V7.16B, V5.16B

        (31) 0x409780 LDR	Q7, [X10, X23]

        (31) 0x409784 BIC	V3.16B, V17.16B, V3.16B

        (31) 0x409788 BIC	V16.16B, V17.16B, V16.16B

        (31) 0x40978c EOR	V3.16B, V6.16B, V3.16B

        (31) 0x409790 USHR	V5.2D, V5.2D, #1

        (31) 0x409794 EOR	V3.16B, V4.16B, V3.16B

        (31) 0x409798 EOR	V4.16B, V7.16B, V16.16B

        (31) 0x40979c STR	Q3, [X10, #1808]

        (31) 0x4097a0 EOR	V4.16B, V5.16B, V4.16B

        (31) 0x4097a4 STR	Q4, [X10, #1824]

        (31) 0x4097a8 B.NE	40972c

      (30) 0x4097ac LDR	X10, [X27, #1816]

      (30) 0x4097b0 LDR	X11, [X27, #1824]

      (30) 0x4097b4 MOV	X9, V2.D[1]

      (30) 0x4097b8 AND	X9, X9, #6177

      (30) 0x4097bc AND	X12, X10, #6015

      (30) 0x4097c0 AND	X13, X10, #6177

      (30) 0x4097c4 SBFM	X10, X10, #0, #0

      (30) 0x4097c8 ORR	X9, X12, X9

      (30) 0x4097cc AND	X12, X11, #6015

      (30) 0x4097d0 AND	X10, X10, X20

      (30) 0x4097d4 ORR	X12, X12, X13

      (30) 0x4097d8 LDR	X13, [X27, #4984]

      (30) 0x4097dc EOR	X9, X13, X9,LSR #1

      (30) 0x4097e0 LDR	X13, [X27, #4992]

      (30) 0x4097e4 EOR	X9, X9, X10

      (30) 0x4097e8 SBFM	X10, X11, #0, #0

      (30) 0x4097ec AND	X10, X10, X20

      (30) 0x4097f0 STR	X9, [X27, #1808]

      (30) 0x4097f4 AND	X9, X11, #6177

      (30) 0x4097f8 EOR	X12, X13, X12,LSR #1

      (30) 0x4097fc EOR	X10, X12, X10

      (30) 0x409800 STR	X10, [X27, #1816]

      (30) 0x409804 LDR	X10, [X27, #1832]

      (30) 0x409808 AND	X11, X10, #6015

      (30) 0x40980c DUP	V2.2D, X10

      (30) 0x409810 ORR	X9, X11, X9

      (30) 0x409814 LDR	X11, [X27, #5000]

      (30) 0x409818 EOR	X9, X11, X9,LSR #1

      (30) 0x40981c SBFM	X11, X10, #0, #0

      (30) 0x409820 ORR	X10, XZR, X21

      (30) 0x409824 AND	X11, X11, X20

      (30) 0x409828 EOR	X9, X9, X11

      (30) 0x40982c STR	X9, [X27, #1824]

      (30) 0x409830 MOVZ	W9, #396

      (30) 0x409834 HINT	#0

      (30) 0x409838 HINT	#0

      (30) 0x40983c HINT	#0

        (32) 0x409840 LDUR	Q3, [X10, #8]

        (32) 0x409844 DUP	V4.2D, X22

        (32) 0x409848 SUB	X11, X10, #1816

        (32) 0x40984c SUBS	X9, X9, #2

        (32) 0x409850 EXT	V2.16B, V2.16B, V3.16B, #8

        (32) 0x409854 DUP	V5.2D, X25

        (32) 0x409858 AND	V4.16B, V3.16B, V4.16B

        (32) 0x40985c AND	V5.16B, V3.16B, V5.16B

        (32) 0x409860 DUP	V6.2D, X20

        (32) 0x409864 AND	V2.16B, V2.16B, V18.16B

        (32) 0x409868 CMEQ	V5.2D, V5.2D, #0

        (32) 0x40986c ORR	V2.16B, V4.16B, V2.16B

        (32) 0x409870 LDR	Q4, [X11]

        (32) 0x409874 BIC	V5.16B, V6.16B, V5.16B

        (32) 0x409878 USHR	V2.2D, V2.2D, #1

        (32) 0x40987c EOR	V4.16B, V4.16B, V5.16B

        (32) 0x409880 EOR	V2.16B, V2.16B, V4.16B

        (32) 0x409884 STR	Q2, [X10], #16

        (32) 0x409888 ORR	V2.16B, V3.16B, V3.16B

        (32) 0x40988c B.NE	409840

      (30) 0x409890 LDR	X9, [X27, #5000]

      (30) 0x409894 LDR	X10, [X27, #16]

      (30) 0x409898 ORR	X19, XZR, XZR

      (30) 0x40989c AND	X9, X9, #6177

      (30) 0x4098a0 AND	X11, X10, #6015

      (30) 0x4098a4 SBFM	X10, X10, #0, #0

      (30) 0x4098a8 ORR	X9, X11, X9

      (30) 0x4098ac LDR	X11, [X27, #3184]

      (30) 0x4098b0 AND	X10, X10, X20

      (30) 0x4098b4 EOR	X9, X11, X9,LSR #1

      (30) 0x4098b8 EOR	X9, X9, X10

      (30) 0x4098bc STR	X9, [X27, #5000]

      (30) 0x4098c0 B	4096c0

    (29) 0x4098c4 FDIV	D0, D0, D1

    (29) 0x4098c8 FCMP	D0, D8

    (29) 0x4098cc B.GE	4098e8

    (29) 0x4098d0 FMADD	D0, D0, D10, D9

    (29) 0x4098d4 STR	D0, [X15, X26,LSL #3]

    (29) 0x4098d8 ADD	X26, X26, #1

    (29) 0x4098dc CMP	X26, X14

    (29) 0x4098e0 B.NE	4096a4

  (27) 0x4098e4 B	409920

    (29) 0x4098e8 FMOV	D0, #1.0000000

    (29) 0x4098ec MOVI	D1, #0

    (29) 0x4098f0 STP	X15, X14, [SP, #24]

    (29) 0x4098f4 STR	X16, [SP, #16]

    (29) 0x4098f8 BL	404b20

    (29) 0x4098fc LDP	X16, X15, [SP, #16]

    (29) 0x409900 LDR	X14, [SP, #32]

    (29) 0x409904 FMADD	D0, D0, D10, D9

    (29) 0x409908 STR	D0, [X15, X26,LSL #3]

    (29) 0x40990c ADD	X26, X26, #1

    (29) 0x409910 CMP	X26, X14

    (29) 0x409914 B.NE	4096a4

  (27) 0x409918 HINT	#0

  (27) 0x40991c HINT	#0

  (27) 0x409920 LDR	X8, [SP, #80]

  (27) 0x409924 LDR	W2, [X8]

  (27) 0x409928 LDR	X1, [SP, #96]

  (27) 0x40992c ORR	X0, XZR, X27

  (27) 0x409930 BL	40be60

  (27) 0x409934 LDR	X8, [SP, #120]

  (27) 0x409938 LDR	W8, [X8]

  (27) 0x40993c CMP	W8, #1

  (27) 0x409940 B.LT	409a88

0x409944 LDR	X26, [SP, #96]

0x409948 ORR	X19, XZR, XZR

0x40994c B	409978

0x409960 LDR	X8, [SP, #120]

0x409964 ADD	X19, X19, #1

0x409968 ADD	X26, X26, #24

0x40996c LDRSW	X8, [X8]

0x409970 CMP	X19, X8

0x409974 B.GE	409a88

0x409978 LDR	X8, [SP, #136]

0x40997c LDR	X8, [X8]

0x409980 LDR	X0, [X8, #40]

0x409984 BL	469040

0x409988 LDR	X1, [SP, #128]

0x40998c MOVZ	W8, #5072

0x409990 ORR	W2, WZR, W19

0x409994 ADD	X0, X27, X8

0x409998 BL	40d9d0

0x40999c LDR	X8, [SP, #136]

0x4099a0 LDR	X8, [X8]

0x4099a4 LDR	X0, [X8, #40]

0x4099a8 BL	469160

0x4099ac LDR	X0, [SP, #128]

0x4099b0 MOVZ	W3, #1

0x4099b4 ORR	W1, WZR, W19

0x4099b8 ORR	X2, XZR, X26

0x4099bc BL	447b20

0x4099c0 LDR	X8, [SP, #136]

0x4099c4 LDR	X8, [X8]

0x4099c8 LDR	X0, [X8, #48]

0x4099cc BL	469040

0x4099d0 STP	XZR, XZR, [X29, #880]

0x4099d4 STUR	XZR, [X29, #384]

0x4099d8 LDR	X1, [SP, #128]

0x4099dc MOVZ	W8, #5072

0x4099e0 SUB	X3, X29, #144

0x4099e4 ORR	W2, WZR, W19

0x4099e8 ADD	X0, X27, X8

0x4099ec BL	40daf0

0x4099f0 LDR	X8, [SP, #136]

0x4099f4 LDR	X8, [X8]

0x4099f8 LDR	X0, [X8, #48]

0x4099fc BL	469160

0x409a00 LDUR	X8, [X29, #392]

0x409a04 LDR	D0, [X8, X19,LSL #3]

0x409a08 LDR	X8, [SP, #112]

0x409a0c LDR	D1, [X8]

0x409a10 FCMP	D0, D1

0x409a14 B.GE	409a68

0x409a18 LDR	X8, [SP, #136]

0x409a1c LDR	X8, [X8]

0x409a20 LDR	X0, [X8, #56]

0x409a24 BL	469040

0x409a28 LDR	X1, [SP, #128]

0x409a2c MOVZ	W8, #5072

0x409a30 ORR	W2, WZR, W19

0x409a34 ADD	X0, X27, X8

0x409a38 BL	40dcd0

0x409a3c LDR	X8, [SP, #136]

0x409a40 LDR	X8, [X8]

0x409a44 LDR	X0, [X8, #56]

0x409a48 BL	469160

0x409a4c LDR	X0, [SP, #128]

0x409a50 ORR	W1, WZR, W19

0x409a54 BL	4482f0

0x409a58 LDUR	W8, [X29, #460]

0x409a5c ADD	W8, W8, #1

0x409a60 STUR	W8, [X29, #460]

0x409a64 B	409960

0x409a68 LDR	X0, [SP, #128]

0x409a6c ORR	W1, WZR, W19

0x409a70 BL	448610

0x409a74 MOVZ	W8, #5072

0x409a78 ORR	W1, WZR, W19

0x409a7c ADD	X0, X27, X8

0x409a80 BL	40de10

0x409a84 B	409960

  (27) 0x409a88 MOVZ	W8, #5072

  (27) 0x409a8c ADD	X0, X27, X8

  (27) 0x409a90 BL	40dda0

  (27) 0x409a94 LDR	W9, [SP, #108]

  (27) 0x409a98 LDR	X8, [SP, #88]

  (27) 0x409a9c ADD	W9, W9, #1

  (27) 0x409aa0 LDR	W8, [X8]

  (27) 0x409aa4 CMP	W9, W8

  (27) 0x409aa8 ORR	W8, WZR, W9

  (27) 0x409aac B.LT	40966c

    (33) 0x409ab0 LDR	X0, [SP, #128]

    (33) 0x409ab4 ORR	W1, WZR, WZR

    (33) 0x409ab8 BL	448620

    (33) 0x409abc LDR	X21, [SP, #56]

    (33) 0x409ac0 LDR	X1, [SP, #128]

    (33) 0x409ac4 MOVZ	W8, #5072

    (33) 0x409ac8 ADD	X0, X27, X8

    (33) 0x409acc BL	40de20

    (33) 0x409ad0 LDR	X8, [SP, #136]

    (33) 0x409ad4 LDR	X8, [X8]

    (33) 0x409ad8 LDR	X0, [X8, #16]

    (33) 0x409adc BL	469160

    (33) 0x409ae0 MOVZ	W8, #5184

    (33) 0x409ae4 SUB	X1, X29, #96

    (33) 0x409ae8 ADD	X0, X27, X8

    (33) 0x409aec BL	40a860

    (33) 0x409af0 LDR	X8, [SP, #136]

    (33) 0x409af4 LDR	X8, [X8]

    (33) 0x409af8 LDR	X19, [X8, #24]

    (33) 0x409afc ORR	X0, XZR, X19

    (33) 0x409b00 BL	469040

    (33) 0x409b04 LDR	X1, [SP, #128]

    (33) 0x409b08 MOVZ	W8, #5184

    (33) 0x409b0c ADD	X0, X27, X8

    (33) 0x409b10 MOVZ	W8, #5072

    (33) 0x409b14 ADD	X2, X27, X8

    (33) 0x409b18 BL	40ab20

    (33) 0x409b1c ORR	X0, XZR, X19

    (33) 0x409b20 BL	469160

    (33) 0x409b24 LDUR	X0, [X29, #392]

    (33) 0x409b28 CBZ	X0, 409b3c

    (33) 0x409b2c LDUR	X8, [X29, #408]

    (33) 0x409b30 CMP	X8, X0

    (33) 0x409b34 B.EQ	409bb0

    (33) 0x409b38 BL	404cf0

    (33) 0x409b3c ADRP	X8,

    (33) 0x409b40 ADD	X8, X8, #3152

    (33) 0x409b44 STUR	X8, [X29, #416]

    (33) 0x409b48 LDUR	X8, [X29, #432]

    (33) 0x409b4c CBZ	X8, 409b60

    (33) 0x409b50 LDUR	X0, [X29, #440]

    (33) 0x409b54 ADD	X8, X8, X8,LSL #1

    (33) 0x409b58 UBFM	X1, X8, #61, #60

    (33) 0x409b5c BL	4045a0

    (33) 0x409b60 LDR	X8, [SP, #64]

    (33) 0x409b64 CBZ	W8, 409508

    (33) 0x409b68 LDR	X0, [SP, #96]

    (33) 0x409b6c ADD	X8, X8, X8,LSL #1

    (33) 0x409b70 UBFM	X1, X8, #61, #60

    (33) 0x409b74 BL	4045a0

    (33) 0x409b78 B	409508

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249

--------------------------------------------------------------------------------

242:   ScopeGuard(TIMER& t) : timer(t) { timer.start(); }

[...]

249:   ~ScopeGuard() { timer.stop(); }

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/random.tcc: 404 - 3374

--------------------------------------------------------------------------------

404:       for (size_t __k = 0; __k < (__n - __m); ++__k)

405:         {

406: 	  _UIntType __y = ((_M_x[__k] & __upper_mask)

407: 			   | (_M_x[__k + 1] & __lower_mask));

408: 	  _M_x[__k] = (_M_x[__k + __m] ^ (__y >> 1)

409: 		       ^ ((__y & 0x01) ? __a : 0));

410:         }

411:

412:       for (size_t __k = (__n - __m); __k < (__n - 1); ++__k)

413: 	{

414: 	  _UIntType __y = ((_M_x[__k] & __upper_mask)

415: 			   | (_M_x[__k + 1] & __lower_mask));

416: 	  _M_x[__k] = (_M_x[__k + (__m - __n)] ^ (__y >> 1)

417: 		       ^ ((__y & 0x01) ? __a : 0));

418: 	}

419:

420:       _UIntType __y = ((_M_x[__n - 1] & __upper_mask)

421: 		       | (_M_x[0] & __lower_mask));

422:       _M_x[__n - 1] = (_M_x[__m - 1] ^ (__y >> 1)

423: 		       ^ ((__y & 0x01) ? __a : 0));

[...]

458:       if (_M_p >= state_size)

459: 	_M_gen_rand();

460:

461:       // Calculate o(x(i)).

462:       result_type __z = _M_x[_M_p++];

463:       __z ^= (__z >> __u) & __d;

464:       __z ^= (__z << __s) & __b;

465:       __z ^= (__z << __t) & __c;

466:       __z ^= (__z >> __l);

[...]

3365:       for (size_t __k = __m; __k != 0; --__k)

3366: 	{

3367: 	  __sum += _RealType(__urng() - __urng.min()) * __tmp;

3368: 	  __tmp *= __r;

3369: 	}

3370:       __ret = __sum / __tmp;

3371:       if (__builtin_expect(__ret >= _RealType(1), 0))

3372: 	{

3373: #if _GLIBCXX_USE_C99_MATH_FUNCS

3374: 	  __ret = std::nextafter(_RealType(1), _RealType(0));

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Drivers/miniqmc.cpp: 412 - 475

--------------------------------------------------------------------------------

412:     for (int iw = 0; iw < nmovers; iw++)

413:     {

414:       auto& els          = *mover_list[iw]->els_ptr;

415:       auto& random_th    = mover_list[iw]->rng;

416:       auto& wavefunction = mover_list[iw]->wavefunction;

417:       auto& ecp          = mover_list[iw]->nlpp;

418:

419:       ParticlePos delta(nels);

420:       ParticlePos rOnSphere(nknots);

421:

422:       aligned_vector<RealType> ur(nels);

423:

424:       Timers[Timer_Diffusion].get().start();

425:       for (int l = 0; l < nsubsteps; ++l) // drift-and-diffusion

426:       {

427:         random_th.generate_uniform(ur.data(), nels);

428:         random_th.generate_normal(&delta[0][0], nels3);

429:         for (int iel = 0; iel < nels; ++iel)

430:         {

431:           // Compute gradient at the current position

432:           Timers[Timer_evalGrad].get().start();

433:           PosType grad_now = wavefunction.evalGrad(els, iel);

434:           Timers[Timer_evalGrad].get().stop();

435:

436:           // Construct trial move

437:           els.makeMove(iel, delta[iel]);

438:

439:           // Compute gradient at the trial position

440:           Timers[Timer_ratioGrad].get().start();

441:           PosType grad_new;

442:           wavefunction.ratioGrad(els, iel, grad_new);

443:           Timers[Timer_ratioGrad].get().stop();

444:

445:           // Accept/reject the trial move

446:           if (ur[iel] < accept) // MC

447:           {

448:             // Update position, and update temporary storage

449:             Timers[Timer_Update].get().start();

450:             wavefunction.acceptMove(els, iel);

451:             Timers[Timer_Update].get().stop();

452:             els.acceptMove(iel);

453:             my_accepted++;

454:           }

455:           else

456:           {

457:             els.rejectMove(iel);

458:             wavefunction.restore(iel);

459:           }

460:         } // iel

461:         wavefunction.completeUpdates();

462:       }   // substeps

463:

464:       els.donePbyP();

465:

466:       // evaluate Kinetic Energy

467:       wavefunction.evaluateGL(els);

468:

469:       Timers[Timer_Diffusion].get().stop();

470:

471:       // Compute NLPP energy using integral over spherical points

472:       {

473:         ecp.randomize(rOnSphere); // pick random sphere

474:         ScopedTimer local(Timers[Timer_ECP]);

475:         ecp.evaluate(els, wavefunction);

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_algobase.h: 939 - 940

--------------------------------------------------------------------------------

939:       for (; __first != __last; ++__first)

940: 	*__first = __value;

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/StdRandom.h: 102 - 106

--------------------------------------------------------------------------------

102:     for (int i = 0; i < n; ++i)

103:       d[i] = uniform(myRNG);

104:   }

105:

106:   inline void generate_normal(T* restrict d, int n) { BoxMuller2::generate(*this, d, n); }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 47 - 301

--------------------------------------------------------------------------------

47:   {

48:     if (n)

[...]

144:   virtual ~Vector() { free(); }

[...]

210:     if (nAllocated)

211:     {

212:       mAllocator.deallocate(X, nAllocated);

[...]

289:   T* X = nullptr;

[...]

300:     X          = mAllocator.allocate(n);

301:     nLocal     = n;

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleAttrib.h: 34 - 34

--------------------------------------------------------------------------------

34:   explicit inline ParticleAttrib(size_t n = 0) : __my_base(n), InUnit(0) {}

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/new_allocator.h: 134 - 172

--------------------------------------------------------------------------------

134: 	if (__builtin_expect(__n > this->_M_max_size(), false))

[...]

151: 	return static_cast<_Tp*>(_GLIBCXX_OPERATOR_NEW(__n * sizeof(_Tp)));

[...]

172: 	_GLIBCXX_OPERATOR_DELETE(_GLIBCXX_SIZED_DEALLOC(__p, __n));

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp: 76 - 78

--------------------------------------------------------------------------------

76:     if (n == 0)

77:       throw std::runtime_error("Mallocator::deallocate does not accept size 0 allocations.");

78:     free(p);

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_vector.h: 99 - 1131

--------------------------------------------------------------------------------

99: 	: _M_start(), _M_finish(), _M_end_of_storage()

[...]

368: 	_M_deallocate(_M_impl._M_start,

369: 		      _M_impl._M_end_of_storage - _M_impl._M_start);

[...]

380: 	return __n != 0 ? _Tr::allocate(_M_impl, __n) : pointer();

[...]

388: 	if (__p)

[...]

398: 	this->_M_impl._M_start = this->_M_allocate(__n);

399: 	this->_M_impl._M_finish = this->_M_impl._M_start;

400: 	this->_M_impl._M_end_of_storage = this->_M_impl._M_start + __n;

[...]

1131: 	return *(this->_M_impl._M_start + __n);

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/alloc_traits.h: 277 - 334

--------------------------------------------------------------------------------

277: 	  ::new((void*)__p) _Tp(std::forward<_Args>(__args)...);

[...]

334:       { return __a.allocate(__n); }

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/unique_ptr.h: 193 - 193

--------------------------------------------------------------------------------

193:       pointer    _M_ptr() const noexcept { return std::get<0>(_M_t); }

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/random.h: 2011 - 2011

--------------------------------------------------------------------------------

2011: 	  return (__aurng() * (__p.b() - __p.a())) + __p.a();

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h: 62 - 62

--------------------------------------------------------------------------------

62:       X[d] = T(0);

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/refwrap.h: 351 - 351

--------------------------------------------------------------------------------

351:       { return *_M_data; }

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.31
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.15
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.01
Bottlenecks	P12,
Function	main.omp_outlined.63
Source	miniqmc.cpp:416-416,miniqmc.cpp:429-429,miniqmc.cpp:432-434,miniqmc.cpp:437-437,miniqmc.cpp:440-443,miniqmc.cpp:446-446,miniqmc.cpp:449-454,miniqmc.cpp:457-458,stl_vector.h:1131-1131,TinyVector.h:62-62,refwrap.h:351-351
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	11.83
CQA cycles if no scalar integer	9.00
CQA cycles if FP arith vectorized	11.83
CQA cycles if fully vectorized	10.33
Front-end cycles	9.63
P0 cycles	9.00
P1 cycles	9.00
P2 cycles	6.50
P3 cycles	6.50
P4 cycles	5.83
P5 cycles	5.83
P6 cycles	5.67
P7 cycles	5.67
P8 cycles	1.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	11.83
P13 cycles	11.50
P14 cycles	11.67
P15 cycles	1.50
P16 cycles	1.50
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	77.00
Nb uops	77.00
Nb loads	NA
Nb stores	3.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	23.32
Bytes prefetched	0.00
Bytes loaded	248.00
Bytes stored	28.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	42.05
Vector-efficiency ratio load	50.00
Vector-efficiency ratio store	58.33
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	31.82

Metric	Value
CQA speedup if no scalar integer	1.31
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.15
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.01
Bottlenecks	P12,
Function	main.omp_outlined.63
Source	miniqmc.cpp:416-416,miniqmc.cpp:429-429,miniqmc.cpp:432-434,miniqmc.cpp:437-437,miniqmc.cpp:440-443,miniqmc.cpp:446-446,miniqmc.cpp:449-454,miniqmc.cpp:457-458,stl_vector.h:1131-1131,TinyVector.h:62-62,refwrap.h:351-351
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	11.83
CQA cycles if no scalar integer	9.00
CQA cycles if FP arith vectorized	11.83
CQA cycles if fully vectorized	10.33
Front-end cycles	9.63
P0 cycles	9.00
P1 cycles	9.00
P2 cycles	6.50
P3 cycles	6.50
P4 cycles	5.83
P5 cycles	5.83
P6 cycles	5.67
P7 cycles	5.67
P8 cycles	1.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	11.83
P13 cycles	11.50
P14 cycles	11.67
P15 cycles	1.50
P16 cycles	1.50
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	77.00
Nb uops	77.00
Nb loads	NA
Nb stores	3.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	23.32
Bytes prefetched	0.00
Bytes loaded	248.00
Bytes stored	28.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	42.05
Vector-efficiency ratio load	50.00
Vector-efficiency ratio store	58.33
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	31.82

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	main.omp_outlined.63
Source file and lines	miniqmc.cpp:412-475
Module	exec

The loop is defined in:

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/random.tcc:404-423,458-466,3365-3374
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Drivers/miniqmc.cpp:412-475
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_algobase.h:939-940
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/StdRandom.h:102-106
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:47-48,144,210-212,289,300-301
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleAttrib.h:34
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/new_allocator.h:134,151,172
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:76-78
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_vector.h:99,368-369,380,388,398-400,1131
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/alloc_traits.h:277,334
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/unique_ptr.h:193
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/random.h:2011
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:62
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/refwrap.h:351

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 11.83 to 9.00 cycles (1.31x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. Only 42% of vector register length is used (average across all VPU instructions). By vectorizing your loop, you can lower the cost of an iteration from 11.83 to 10.33 cycles (1.15x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 11.83 to 6.50 cycles (1.82x speedup).

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 248 bytes. The binary loop is storing 28 bytes.

General properties

nb instructions	77
loop length	308
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

9.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	9.00	9.00	6.50	6.50	5.83	5.83	5.67	5.67	1.00	0.00	0.00	0.00	11.83	11.50	11.67	1.50	1.50
cycles	9.00	9.00	6.50	6.50	5.83	5.83	5.67	5.67	1.00	0.00	0.00	0.00	11.83	11.50	11.67	1.50	1.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	9.63
Overall L1	11.83

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 11.83 cycles. At this rate:

21% of peak load performance is reached (20.96 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (2.37 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 409960

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
LDR X26, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ORR X19, XZR, XZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
B 409978 <main.omp_outlined.63+0x618>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X19, X19, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
ADD X26, X26, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDRSW X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X19, X8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 409a88 <main.omp_outlined.63+0x728>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, #40]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 469040 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
MOVZ W8, #5072	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
ORR W2, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADD X0, X27, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
BL 40d9d0 <_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, #40]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 469160 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
ORR X2, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (50.0%)
BL 447b20 <_ZN11qmcplusplus11ParticleSet8makeMoveEiRKNS_10TinyVectorIdLj3EEEb>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, #48]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 469040 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, XZR, [X29, #880]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STUR XZR, [X29, #384]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
MOVZ W8, #5072	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SUB X3, X29, #144	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR W2, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADD X0, X27, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
BL 40daf0 <_ZN11qmcplusplus12WaveFunction9ratioGradERNS_11ParticleSetEiRNS_10TinyVectorIdLj3EEE>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, #48]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 469160 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X8, [X29, #392]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D0, [X8, X19,LSL #3]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR X8, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D1, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GE 409a68 <main.omp_outlined.63+0x708>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, #56]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 469040 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
MOVZ W8, #5072	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
ORR W2, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADD X0, X27, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
BL 40dcd0 <_ZN11qmcplusplus12WaveFunction10acceptMoveERNS_11ParticleSetEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, #56]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 469160 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
BL 4482f0 <_ZN11qmcplusplus11ParticleSet10acceptMoveEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR W8, [X29, #460]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD W8, W8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
STUR W8, [X29, #460]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 409960 <main.omp_outlined.63+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
BL 448610 <_ZN11qmcplusplus11ParticleSet10rejectMoveEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ W8, #5072	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADD X0, X27, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
BL 40de10 <_ZN11qmcplusplus12WaveFunction7restoreEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 409960 <main.omp_outlined.63+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Function	main.omp_outlined.63
Source file and lines	miniqmc.cpp:412-475
Module	exec

The loop is defined in:

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/random.tcc:404-423,458-466,3365-3374
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Drivers/miniqmc.cpp:412-475
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_algobase.h:939-940
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/StdRandom.h:102-106
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:47-48,144,210-212,289,300-301
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleAttrib.h:34
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/new_allocator.h:134,151,172
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:76-78
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_vector.h:99,368-369,380,388,398-400,1131
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/alloc_traits.h:277,334
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/unique_ptr.h:193
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/random.h:2011
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:62
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/refwrap.h:351

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 11.83 to 9.00 cycles (1.31x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 11.83 to 6.50 cycles (1.82x speedup).

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 248 bytes. The binary loop is storing 28 bytes.

General properties

nb instructions	77
loop length	308
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

9.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	9.00	9.00	6.50	6.50	5.83	5.83	5.67	5.67	1.00	0.00	0.00	0.00	11.83	11.50	11.67	1.50	1.50
cycles	9.00	9.00	6.50	6.50	5.83	5.83	5.67	5.67	1.00	0.00	0.00	0.00	11.83	11.50	11.67	1.50	1.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	9.63
Overall L1	11.83

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 11.83 cycles. At this rate:

21% of peak load performance is reached (20.96 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (2.37 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 409960

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
LDR X26, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ORR X19, XZR, XZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
B 409978 <main.omp_outlined.63+0x618>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X19, X19, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
ADD X26, X26, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDRSW X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X19, X8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 409a88 <main.omp_outlined.63+0x728>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, #40]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 469040 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
MOVZ W8, #5072	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
ORR W2, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADD X0, X27, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
BL 40d9d0 <_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, #40]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 469160 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
ORR X2, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (50.0%)
BL 447b20 <_ZN11qmcplusplus11ParticleSet8makeMoveEiRKNS_10TinyVectorIdLj3EEEb>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, #48]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 469040 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, XZR, [X29, #880]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STUR XZR, [X29, #384]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
MOVZ W8, #5072	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SUB X3, X29, #144	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR W2, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADD X0, X27, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
BL 40daf0 <_ZN11qmcplusplus12WaveFunction9ratioGradERNS_11ParticleSetEiRNS_10TinyVectorIdLj3EEE>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, #48]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 469160 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X8, [X29, #392]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D0, [X8, X19,LSL #3]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR X8, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D1, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GE 409a68 <main.omp_outlined.63+0x708>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, #56]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 469040 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
MOVZ W8, #5072	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
ORR W2, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADD X0, X27, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
BL 40dcd0 <_ZN11qmcplusplus12WaveFunction10acceptMoveERNS_11ParticleSetEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, #56]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 469160 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
BL 4482f0 <_ZN11qmcplusplus11ParticleSet10acceptMoveEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR W8, [X29, #460]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD W8, W8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
STUR W8, [X29, #460]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 409960 <main.omp_outlined.63+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
BL 448610 <_ZN11qmcplusplus11ParticleSet10rejectMoveEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ W8, #5072	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADD X0, X27, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
BL 40de10 <_ZN11qmcplusplus12WaveFunction7restoreEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 409960 <main.omp_outlined.63+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code