OV - exec - Function qmcplusplus::WaveFunction::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector<double, std::allocator<double> >&)

	Function: qmcplusplus::WaveFunction::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector<do ...	Module: exec	Source: WaveFunction.cpp:261-276 [...]	Coverage (incl. loops): 0.01% \| (excl. loops): 0.00%

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249

--------------------------------------------------------------------------------

242:   ScopeGuard(TIMER& t) : timer(t) { timer.start(); }

[...]

249:   ~ScopeGuard() { timer.stop(); }

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_algobase.h: 952 - 1146

--------------------------------------------------------------------------------

952: 	*__first = __tmp;

[...]

1146:       if (__n <= 0)

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/new_allocator.h: 151 - 172

--------------------------------------------------------------------------------

151: 	return static_cast<_Tp*>(_GLIBCXX_OPERATOR_NEW(__n * sizeof(_Tp)));

[...]

172: 	_GLIBCXX_OPERATOR_DELETE(_GLIBCXX_SIZED_DEALLOC(__p, __n));

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/WaveFunction.cpp: 261 - 276

--------------------------------------------------------------------------------

261: {

262:   assert(VP.getTotalNum() == ratios.size());

263:   if (VP.refPtcl < nelup)

[...]

269:   for (size_t i = 0; i < Jastrows.size(); i++)

270:   {

271:     ScopedTimer local_timer(jastrow_timers[i]);

272:     Jastrows[i]->evaluateRatios(VP, t);

273:     for (int j = 0; j < ratios.size(); ++j)

274:       ratios[j] *= t[j];

275:   }

276: }

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_vector.h: 368 - 1920

--------------------------------------------------------------------------------

368: 	_M_deallocate(_M_impl._M_start,

369: 		      _M_impl._M_end_of_storage - _M_impl._M_start);

[...]

380: 	return __n != 0 ? _Tr::allocate(_M_impl, __n) : pointer();

[...]

388: 	if (__p)

[...]

398: 	this->_M_impl._M_start = this->_M_allocate(__n);

399: 	this->_M_impl._M_finish = this->_M_impl._M_start;

400: 	this->_M_impl._M_end_of_storage = this->_M_impl._M_start + __n;

[...]

993:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1131: 	return *(this->_M_impl._M_start + __n);

[...]

1719: 	this->_M_impl._M_finish =

[...]

1919: 	if (__n > _S_max_size(_Tp_alloc_type(__a)))

1920: 	  __throw_length_error(

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_construct.h: 119 - 119

--------------------------------------------------------------------------------

119:       ::new((void*)__p) _Tp(std::forward<_Args>(__args)...);

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/refwrap.h: 351 - 351

--------------------------------------------------------------------------------

351:       { return *_M_data; }

0x40dfa0 SUB	SP, SP, #96

0x40dfa4 STP	X29, X30, [SP, #32]

0x40dfa8 STR	X23, [SP, #48]

0x40dfac STP	X22, X21, [SP, #64]

0x40dfb0 STP	X20, X19, [SP, #80]

0x40dfb4 ADD	X29, SP, #32

0x40dfb8 LDR	W8, [X1, #672]

0x40dfbc LDR	W9, [X0, #52]

0x40dfc0 ORR	X21, XZR, X0

0x40dfc4 ORR	X19, XZR, X2

0x40dfc8 ORR	X20, XZR, X1

0x40dfcc CMP	W8, W9

0x40dfd0 CSINC	W8, WZR, WZR, #11

0x40dfd4 LDR	X0, [X0, X8,UXTW #3]

0x40dfd8 LDR	X8, [X0]

0x40dfdc LDR	X8, [X8, #72]

0x40dfe0 BLR	X8

0x40dfe4 LDP	X9, X8, [X19]

0x40dfe8 MOVN	X10, #6

0x40dfec MOVK	X10, #32767

0x40dff0 SUB	X22, X8, X9

0x40dff4 CMP	X22, X10

0x40dff8 B.CS	40e230

0x40dffc CMP	X8, X9

0x40e000 B.EQ	40e078

0x40e004 ORR	X0, XZR, X22

0x40e008 BL	4045c0

0x40e00c ADD	X23, X0, X22

0x40e010 ORR	X8, XZR, X0

0x40e014 STR	XZR, [X8], #8

0x40e018 SUBS	X2, X22, #8

0x40e01c STR	X0, [SP, #8]

0x40e020 STR	X23, [SP, #24]

0x40e024 B.EQ	40e040

0x40e028 ORR	X22, XZR, X0

0x40e02c ORR	X0, XZR, X8

0x40e030 ORR	W1, WZR, WZR

0x40e034 BL	4049f0

0x40e038 ORR	X0, XZR, X22

0x40e03c ORR	X8, XZR, X23

0x40e040 STR	X8, [SP, #16]

0x40e044 LDP	X9, X8, [X21, #16]

0x40e048 CMP	X8, X9

0x40e04c B.NE	40e090

      (116) 0x40e050 CBZ	X0, 40e060

    (117) 0x40e054 LDR	X8, [SP, #24]

    (117) 0x40e058 SUB	X1, X8, X0

    (117) 0x40e05c BL	4045a0

      (116) 0x40e060 LDP	X20, X19, [SP, #80]

      (116) 0x40e064 LDP	X22, X21, [SP, #64]

      (116) 0x40e068 LDR	X23, [SP, #48]

      (116) 0x40e06c LDP	X29, X30, [SP, #32]

      (116) 0x40e070 ADD	SP, SP, #96

      (116) 0x40e074 RET

      (116) 0x40e078 ORR	X0, XZR, XZR

      (116) 0x40e07c STP	XZR, XZR, [SP, #8]

      (116) 0x40e080 STP	XZR, XZR, [SP, #16]

      (116) 0x40e084 LDP	X9, X8, [X21, #16]

      (116) 0x40e088 CMP	X8, X9

      (116) 0x40e08c B.EQ	40e050

  (111) 0x40e090 ORR	X23, XZR, XZR

  (111) 0x40e094 HINT	#0

  (111) 0x40e098 HINT	#0

  (111) 0x40e09c HINT	#0

  (111) 0x40e0a0 LDR	X8, [X21, #88]

  (111) 0x40e0a4 LDR	X22, [X8, X23,LSL #3]

  (111) 0x40e0a8 ORR	X0, XZR, X22

  (111) 0x40e0ac BL	469040

  (111) 0x40e0b0 LDR	X8, [X21, #16]

  (111) 0x40e0b4 LDR	X0, [X8, X23,LSL #3]

  (111) 0x40e0b8 LDR	X8, [X0]

  (111) 0x40e0bc LDR	X8, [X8, #72]

  (111) 0x40e0c0 ADD	X2, SP, #8

  (111) 0x40e0c4 ORR	X1, XZR, X20

  (111) 0x40e0c8 BLR	X8

  (111) 0x40e0cc LDP	X8, X9, [X19]

  (111) 0x40e0d0 SUBS	X9, X9, X8

  (111) 0x40e0d4 B.EQ	40e208

  (111) 0x40e0d8 SBFM	X10, X9, #3, #63

  (111) 0x40e0dc LDR	X9, [SP, #8]

  (111) 0x40e0e0 CMP	X10, #1

  (111) 0x40e0e4 CSINC	X11, X10, XZR, #8

  (111) 0x40e0e8 CMP	X10, #3

  (111) 0x40e0ec B.LS	40e160

  (111) 0x40e0f0 ADD	X13, X9, X11,LSL #3

  (111) 0x40e0f4 ADD	X12, X8, X11,LSL #3

  (111) 0x40e0f8 CMP	X8, X13

  (111) 0x40e0fc CCMP	X9, X12, #2, #3

  (111) 0x40e100 B.CC	40e160

  (111) 0x40e104 AND	X12, X11, #8062

  (111) 0x40e108 ADD	X13, X9, #16

  (111) 0x40e10c ADD	X14, X8, #16

  (111) 0x40e110 ORR	X15, XZR, X12

  (111) 0x40e114 HINT	#0

  (111) 0x40e118 HINT	#0

  (111) 0x40e11c HINT	#0

    (113) 0x40e120 LDP	Q0, Q1, [X13, #2032]

    (113) 0x40e124 LDP	Q2, Q3, [X14, #2032]

    (113) 0x40e128 ADD	X13, X13, #32

    (113) 0x40e12c SUBS	X15, X15, #4

    (113) 0x40e130 FMUL	V1.2D, V3.2D, V1.2D

    (113) 0x40e134 FMUL	V0.2D, V2.2D, V0.2D

    (113) 0x40e138 STP	Q0, Q1, [X14, #2032]

    (113) 0x40e13c ADD	X14, X14, #32

    (113) 0x40e140 B.NE	40e120

  (111) 0x40e144 CMP	X10, X12

  (111) 0x40e148 B.EQ	40e208

  (115) 0x40e14c ANDS	X14, X11, #4160

  (115) 0x40e150 ORR	X13, XZR, X12

  (115) 0x40e154 B.NE	40e170

  (115) 0x40e158 B	40e19c

0x40e15c HINT	#0

(112) 0x40e160 ORR	X12, XZR, XZR

(112) 0x40e164 ANDS	X14, X11, #4160

(112) 0x40e168 ORR	X13, XZR, X12

(112) 0x40e16c B.EQ	40e19c

  (115) 0x40e170 ORR	X13, XZR, X12

  (115) 0x40e174 HINT	#0

  (115) 0x40e178 HINT	#0

  (115) 0x40e17c HINT	#0

    (114) 0x40e180 LDR	D0, [X9, X13,LSL #3]

    (114) 0x40e184 LDR	D1, [X8, X13,LSL #3]

    (114) 0x40e188 SUBS	X14, X14, #1

    (114) 0x40e18c FMUL	D0, D1, D0

    (114) 0x40e190 STR	D0, [X8, X13,LSL #3]

    (114) 0x40e194 ADD	X13, X13, #1

    (114) 0x40e198 B.NE	40e180

  (115) 0x40e19c SUB	X11, X12, X11

  (115) 0x40e1a0 CMN	X11, #4

  (115) 0x40e1a4 B.HI	40e208

(112) 0x40e1a8 ADD	X8, X8, X13,LSL #3

(112) 0x40e1ac ADD	X9, X9, X13,LSL #3

(112) 0x40e1b0 SUB	X10, X10, X13

(112) 0x40e1b4 ADD	X8, X8, #16

(112) 0x40e1b8 ADD	X9, X9, #16

(112) 0x40e1bc HINT	#0

  (118) 0x40e1c0 LDUR	D0, [X9, #496]

  (118) 0x40e1c4 LDP	D1, D2, [X8, #1008]

  (118) 0x40e1c8 SUBS	X10, X10, #4

  (118) 0x40e1cc FMUL	D0, D1, D0

  (118) 0x40e1d0 STUR	D0, [X8, #496]

  (118) 0x40e1d4 LDUR	D0, [X9, #504]

  (118) 0x40e1d8 FMUL	D0, D2, D0

  (118) 0x40e1dc LDP	D1, D2, [X8]

  (118) 0x40e1e0 STUR	D0, [X8, #504]

  (118) 0x40e1e4 LDR	D0, [X9]

  (118) 0x40e1e8 FMUL	D0, D1, D0

  (118) 0x40e1ec STR	D0, [X8]

  (118) 0x40e1f0 LDR	D0, [X9, #8]

  (118) 0x40e1f4 ADD	X9, X9, #32

  (118) 0x40e1f8 FMUL	D0, D2, D0

  (118) 0x40e1fc STR	D0, [X8, #8]

  (118) 0x40e200 ADD	X8, X8, #32

  (118) 0x40e204 B.NE	40e1c0

  (111) 0x40e208 ORR	X0, XZR, X22

  (111) 0x40e20c BL	469160

  (111) 0x40e210 LDP	X9, X8, [X21, #16]

  (111) 0x40e214 ADD	X23, X23, #1

  (111) 0x40e218 SUB	X8, X8, X9

  (111) 0x40e21c CMP	X23, X8,ASR #3

  (111) 0x40e220 B.CC	40e0a0

  (111) 0x40e224 LDR	X0, [SP, #8]

  (111) 0x40e228 CBNZ	X0, 40e054

  (111) 0x40e22c B	40e060

0x40e230 ADRP	X0, 4ae230

0x40e234 ADD	X0, X0, #2156

0x40e238 BL	404910

0x40e23c ORR	X19, XZR, X0

0x40e240 B	40e250

0x40e244 ORR	X19, XZR, X0

0x40e248 ORR	X0, XZR, X22

0x40e24c BL	469160

0x40e250 LDR	X0, [SP, #8]

0x40e254 CBZ	X0, 40e264

0x40e258 LDR	X8, [SP, #24]

0x40e25c SUB	X1, X8, X0

0x40e260 BL	4045a0

0x40e264 ORR	X0, XZR, X19

0x40e268 BL	404970

0x40e26c BL	409d00

0x40e270 BL	409d00

0x40e274 HINT	#0

0x40e278 HINT	#0

0x40e27c HINT	#0

Coverage (%)	Name	Source Location	Module
►100.00+	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:126	exec
○	main.omp_outlined.63	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run armclang_3

Source file and lines	WaveFunction.cpp:261-276
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_algobase.h:952,1146
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/new_allocator.h:151,172
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/WaveFunction.cpp:261-263,269-276
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_vector.h:368-369,380,388,398-400,993,1131,1719,1919-1920
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_construct.h:119
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/refwrap.h:351

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 54% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 7.63 to 7.50 cycles (1.02x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 7.63 to 4.50 cycles (1.69x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 80 bytes. The binary function is storing 88 bytes.

General properties

nb instructions	65
loop length	260
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

7.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	7.50	7.50	6.50	6.50	6.50	6.50	6.50	6.50	0.00	0.00	0.00	0.00	5.67	5.67	5.67	4.00	4.00
cycles	7.50	7.50	6.50	6.50	6.50	6.50	6.50	6.50	0.00	0.00	0.00	0.00	5.67	5.67	5.67	4.00	4.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	7.63
Overall L1	7.63

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 7.63 cycles. At this rate:

10% of peak load performance is reached (10.49 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
24% of peak store performance is reached (11.54 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 40dfa0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
SUB SP, SP, #96	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X29, X30, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X23, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X22, X21, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X20, X19, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR W8, [X1, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR W9, [X0, #52]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X21, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X19, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
CMP W8, W9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CSINC W8, WZR, WZR, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X0, X8,UXTW #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BLR X8	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X9, X8, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
MOVN X10, #6	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVK X10, #32767	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
SUB X22, X8, X9	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
CMP X22, X10	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.CS 40e230 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE+0x290>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X8, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 40e078 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE+0xd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4045c0 <@plt_start@+0xd0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X23, X0, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X8, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X8], #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUBS X2, X22, #8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X0, [SP, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X23, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.EQ 40e040 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE+0xa0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X22, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X0, XZR, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR W1, WZR, WZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4049f0 <@plt_start@+0x500>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X8, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X9, X8, [X21, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CMP X8, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 40e090 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE+0xf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
ADRP X0, 4ae230 <_ZN10InfoStreamC1EPSo+0x70>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #2156	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 404910 <@plt_start@+0x420>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 40e250 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE+0x2b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 469160 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X0, 40e264 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE+0x2c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X1, X8, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4045a0 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 404970 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 409d00 <__clang_call_terminate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 409d00 <__clang_call_terminate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run armclang_3

Source file and lines	WaveFunction.cpp:261-276
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_algobase.h:952,1146
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/new_allocator.h:151,172
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/WaveFunction.cpp:261-263,269-276
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_vector.h:368-369,380,388,398-400,993,1131,1719,1919-1920
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_construct.h:119
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/refwrap.h:351

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 7.63 to 4.50 cycles (1.69x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 80 bytes. The binary function is storing 88 bytes.

General properties

nb instructions	65
loop length	260
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

7.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	7.50	7.50	6.50	6.50	6.50	6.50	6.50	6.50	0.00	0.00	0.00	0.00	5.67	5.67	5.67	4.00	4.00
cycles	7.50	7.50	6.50	6.50	6.50	6.50	6.50	6.50	0.00	0.00	0.00	0.00	5.67	5.67	5.67	4.00	4.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	7.63
Overall L1	7.63

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 7.63 cycles. At this rate:

10% of peak load performance is reached (10.49 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
24% of peak store performance is reached (11.54 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 40dfa0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
SUB SP, SP, #96	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X29, X30, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X23, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X22, X21, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X20, X19, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR W8, [X1, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR W9, [X0, #52]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X21, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X19, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
CMP W8, W9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CSINC W8, WZR, WZR, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X0, X8,UXTW #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X8, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BLR X8	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X9, X8, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
MOVN X10, #6	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVK X10, #32767	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
SUB X22, X8, X9	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
CMP X22, X10	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.CS 40e230 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE+0x290>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X8, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 40e078 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE+0xd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4045c0 <@plt_start@+0xd0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X23, X0, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X8, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X8], #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUBS X2, X22, #8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X0, [SP, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X23, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.EQ 40e040 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE+0xa0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X22, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X0, XZR, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR W1, WZR, WZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4049f0 <@plt_start@+0x500>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X8, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X9, X8, [X21, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CMP X8, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 40e090 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE+0xf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
ADRP X0, 4ae230 <_ZN10InfoStreamC1EPSo+0x70>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #2156	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 404910 <@plt_start@+0x420>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 40e250 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE+0x2b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 469160 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X0, 40e264 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE+0x2c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X1, X8, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4045a0 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 404970 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 409d00 <__clang_call_terminate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 409d00 <__clang_call_terminate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A

Name	Coverage (%)	Time (s)
▼qmcplusplus::WaveFunction::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)–	0.01	0.02
▼Loop 112 - WaveFunction.cpp:269-276 - exec–	0.00	0.00
▼Loop 111 - WaveFunction.cpp:269-276 - exec–	0.01	0.01
○Loop 113 - WaveFunction.cpp:273-274 - exec	0.00	0.00
▼Loop 117 - WaveFunction.cpp:269-276 - exec–	0.00	0.00
○Loop 116 - WaveFunction.cpp:269-276 - exec	0.00	0.00
▼Loop 115 - WaveFunction.cpp:273-274 - exec–	0.00	0.00
○Loop 114 - WaveFunction.cpp:273-274 - exec	0.00	0.00
○Loop 118 - WaveFunction.cpp:273-274 - exec	0.00	0.00

Report Configuration

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code