OV - exec - Loop 340

	Loop Id: 340	Module: exec	Source: TwoBodyJastrowRef.h:388-391	Coverage: 0.02%

0x41a1cc LDP	Q0, Q1, [X2, #2032]    [1]

0x41a1d0 LDP	Q2, Q3, [X4, #2032]    [3]

0x41a1d4 FMOV	V6.2D, #-2.0000000

0x41a1d8 SUBS	X7, X7, #4

0x41a1dc ADD	X2, X2, #32

0x41a1e0 FADD	V1.2D, V3.2D, V1.2D

0x41a1e4 LDP	Q4, Q5, [X3, #2032]    [2]

0x41a1e8 FADD	V0.2D, V2.2D, V0.2D

0x41a1ec LDP	Q2, Q3, [X5, #2032]    [4]

0x41a1f0 ADD	X5, X5, #32

0x41a1f4 STP	Q0, Q1, [X4, #2032]    [3]

0x41a1f8 LDP	Q0, Q1, [X6, #2032]    [5]

0x41a1fc ADD	X4, X4, #32

0x41a200 ADD	X6, X6, #32

0x41a204 FNEG	V1.2D, V1.2D

0x41a208 FNEG	V0.2D, V0.2D

0x41a20c FMLA	V1.2D, V3.2D, V6.2D

0x41a210 FMLA	V0.2D, V2.2D, V6.2D

0x41a214 FADD	V1.2D, V1.2D, V5.2D

0x41a218 FADD	V0.2D, V0.2D, V4.2D

0x41a21c STP	Q0, Q1, [X3, #2032]    [2]

0x41a220 ADD	X3, X3, #32

0x41a224 B.NE	41a1cc

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h: 388 - 391

--------------------------------------------------------------------------------

388:       for (int jat = 0; jat < iat; jat++)

389:       {

390:         Uat[jat] += u[jat];

391:         d2Uat[jat] -= d2u[jat] + lapfac * du[jat];

Coverage (%)	Name	Source Location	Module
►100.00+	miniqmcreference::TwoBodyJastr[...]	TwoBodyJastrowRef.h:421	exec
○	miniqmcreference::TwoBodyJastr[...]	TwoBodyJastrowRef.h:411	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:175	exec
○	main.omp_outlined	miniqmc.cpp:379	exec
○	__kmp_invoke_microtask		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.05
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.02
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.05
Bottlenecks	micro-operation queue,
Function	miniqmcreference::TwoBodyJastrowRef >::recompute(qmcplusplus::ParticleSet&)
Source	TwoBodyJastrowRef.h:388-391
Source loop unroll info	unrolled by 2
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	2
CQA cycles	2.88
CQA cycles if no scalar integer	2.75
CQA cycles if FP arith vectorized	2.88
CQA cycles if fully vectorized	2.81
Front-end cycles	2.88
P0 cycles	0.50
P1 cycles	0.50
P2 cycles	1.08
P3 cycles	1.08
P4 cycles	1.00
P5 cycles	1.00
P6 cycles	0.92
P7 cycles	0.92
P8 cycles	2.75
P9 cycles	2.75
P10 cycles	2.75
P11 cycles	2.75
P12 cycles	2.33
P13 cycles	2.33
P14 cycles	2.33
P15 cycles	0.00
P16 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	1
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	23.00
Nb uops	23.00
Nb loads	NA
Nb stores	2.00
Nb stack references	0.00
FLOP/cycle	5.57
Nb FLOP add-sub	8.00
Nb FLOP mul	0.00
Nb FLOP fma	4.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	77.91
Bytes prefetched	0.00
Bytes loaded	160.00
Bytes stored	64.00
Stride 0	0.00
Stride 1	5.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	0.00
Vectorization ratio all	94.12
Vectorization ratio load	100.00
Vectorization ratio store	100.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	80.00
Vectorization ratio fma	100.00
Vectorization ratio div_sqrt	NA
Vectorization ratio other	100.00
Vector-efficiency ratio all	97.06
Vector-efficiency ratio load	100.00
Vector-efficiency ratio store	100.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	90.00
Vector-efficiency ratio fma	100.00
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	100.00

Metric	Value
CQA speedup if no scalar integer	1.05
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.02
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.05
Bottlenecks	micro-operation queue,
Function	miniqmcreference::TwoBodyJastrowRef >::recompute(qmcplusplus::ParticleSet&)
Source	TwoBodyJastrowRef.h:388-391
Source loop unroll info	unrolled by 2
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	2
CQA cycles	2.88
CQA cycles if no scalar integer	2.75
CQA cycles if FP arith vectorized	2.88
CQA cycles if fully vectorized	2.81
Front-end cycles	2.88
P0 cycles	0.50
P1 cycles	0.50
P2 cycles	1.08
P3 cycles	1.08
P4 cycles	1.00
P5 cycles	1.00
P6 cycles	0.92
P7 cycles	0.92
P8 cycles	2.75
P9 cycles	2.75
P10 cycles	2.75
P11 cycles	2.75
P12 cycles	2.33
P13 cycles	2.33
P14 cycles	2.33
P15 cycles	0.00
P16 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	1
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	23.00
Nb uops	23.00
Nb loads	NA
Nb stores	2.00
Nb stack references	0.00
FLOP/cycle	5.57
Nb FLOP add-sub	8.00
Nb FLOP mul	0.00
Nb FLOP fma	4.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	77.91
Bytes prefetched	0.00
Bytes loaded	160.00
Bytes stored	64.00
Stride 0	0.00
Stride 1	5.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	0.00
Vectorization ratio all	94.12
Vectorization ratio load	100.00
Vectorization ratio store	100.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	80.00
Vectorization ratio fma	100.00
Vectorization ratio div_sqrt	NA
Vectorization ratio other	100.00
Vector-efficiency ratio all	97.06
Vector-efficiency ratio load	100.00
Vector-efficiency ratio store	100.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	90.00
Vector-efficiency ratio fma	100.00
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	100.00

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	miniqmcreference::TwoBodyJastrowRef >::recompute(qmcplusplus::ParticleSet&)
Source file and lines	TwoBodyJastrowRef.h:388-391
Module	exec

The loop is defined in /home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:388-391.

The related source loop is unrolled by 2 (including vectorization).

gain
potential
hint
expert

Vectorization

Your loop is highly vectorized. 97% of vector register length is used (average across all VPU instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 2.88 to 2.81 cycles (1.02x speedup).

Details

94% of VPU instructions are used in vector version (process two or more data elements in vector registers):

80% of VPU addition or subtraction instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

FMA

Detected 4 FMA (fused multiply-add) operations.

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 16 FP arithmetical operations:

12: addition or subtraction (4 inside FMA instructions)
4: multiply (all inside FMA instructions)

The binary loop is loading 160 bytes. The binary loop is storing 64 bytes.

Arithmetic intensity

Arithmetic intensity is 0.07 FP operations per loaded or stored byte.

General properties

nb instructions	23
loop length	92
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

2.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	0.50	0.50	1.08	1.08	1.00	1.00	0.92	0.92	2.75	2.75	2.75	2.75	2.33	2.33	2.33	0.00	0.00
cycles	0.50	0.50	1.08	1.08	1.00	1.00	0.92	0.92	2.75	2.75	2.75	2.75	2.33	2.33	2.33	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	1.00

Cycles summary

Front-end	2.88
Data deps.	1.00
Overall L1	2.88

Vectorization ratios

INT

all	87%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

all	100%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	94%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	80%
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 2.88 cycles. At this rate:

57% of peak load performance is reached (55.65 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
46% of peak store performance is reached (22.26 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 41a1cc

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
LDP Q0, Q1, [X2, #2032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.67	vect (100.0%)
LDP Q2, Q3, [X4, #2032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.67	vect (100.0%)
FMOV V6.2D, #-2.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
SUBS X7, X7, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
ADD X2, X2, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
FADD V1.2D, V3.2D, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
LDP Q4, Q5, [X3, #2032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.67	vect (100.0%)
FADD V0.2D, V2.2D, V0.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
LDP Q2, Q3, [X5, #2032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.67	vect (100.0%)
ADD X5, X5, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STP Q0, Q1, [X4, #2032]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	1	vect (100.0%)
LDP Q0, Q1, [X6, #2032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.67	vect (100.0%)
ADD X4, X4, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
ADD X6, X6, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
FNEG V1.2D, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
FNEG V0.2D, V0.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
FMLA V1.2D, V3.2D, V6.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25	vect (100.0%)
FMLA V0.2D, V2.2D, V6.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25	vect (100.0%)
FADD V1.2D, V1.2D, V5.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
FADD V0.2D, V0.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
STP Q0, Q1, [X3, #2032]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	1	vect (100.0%)
ADD X3, X3, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
B.NE 41a1cc <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9recomputeERNS1_11ParticleSetE+0x72c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Function	miniqmcreference::TwoBodyJastrowRef >::recompute(qmcplusplus::ParticleSet&)
Source file and lines	TwoBodyJastrowRef.h:388-391
Module	exec

gain
potential
hint
expert

Vectorization

Details

94% of VPU instructions are used in vector version (process two or more data elements in vector registers):

80% of VPU addition or subtraction instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

FMA

Detected 4 FMA (fused multiply-add) operations.

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 16 FP arithmetical operations:

12: addition or subtraction (4 inside FMA instructions)
4: multiply (all inside FMA instructions)

The binary loop is loading 160 bytes. The binary loop is storing 64 bytes.

Arithmetic intensity

Arithmetic intensity is 0.07 FP operations per loaded or stored byte.

General properties

nb instructions	23
loop length	92
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

2.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	0.50	0.50	1.08	1.08	1.00	1.00	0.92	0.92	2.75	2.75	2.75	2.75	2.33	2.33	2.33	0.00	0.00
cycles	0.50	0.50	1.08	1.08	1.00	1.00	0.92	0.92	2.75	2.75	2.75	2.75	2.33	2.33	2.33	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	1.00

Cycles summary

Front-end	2.88
Data deps.	1.00
Overall L1	2.88

Vectorization ratios

INT

all	87%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

all	100%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	94%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	80%
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 2.88 cycles. At this rate:

57% of peak load performance is reached (55.65 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
46% of peak store performance is reached (22.26 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 41a1cc

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
LDP Q0, Q1, [X2, #2032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.67	vect (100.0%)
LDP Q2, Q3, [X4, #2032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.67	vect (100.0%)
FMOV V6.2D, #-2.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
SUBS X7, X7, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
ADD X2, X2, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
FADD V1.2D, V3.2D, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
LDP Q4, Q5, [X3, #2032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.67	vect (100.0%)
FADD V0.2D, V2.2D, V0.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
LDP Q2, Q3, [X5, #2032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.67	vect (100.0%)
ADD X5, X5, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STP Q0, Q1, [X4, #2032]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	1	vect (100.0%)
LDP Q0, Q1, [X6, #2032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.67	vect (100.0%)
ADD X4, X4, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
ADD X6, X6, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
FNEG V1.2D, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
FNEG V0.2D, V0.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
FMLA V1.2D, V3.2D, V6.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25	vect (100.0%)
FMLA V0.2D, V2.2D, V6.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25	vect (100.0%)
FADD V1.2D, V1.2D, V5.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
FADD V0.2D, V0.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
STP Q0, Q1, [X3, #2032]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	1	vect (100.0%)
ADD X3, X3, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
B.NE 41a1cc <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9recomputeERNS1_11ParticleSetE+0x72c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Report Configuration

Vectorization

Details

FMA

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

FMA

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code