OV - exec - Loop 317

	Loop Id: 317	Module: exec	Source: BsplineFunctor.h:233-260 [...]	Coverage: 2.06%

      (314) 0x4197a0 MOVI	D0, #0

      (314) 0x4197a4 FSUB	D0, D8, S0

      (314) 0x4197a8 BL	4048c0

      (314) 0x4197ac LDP	X8, X9, [X19]

      (314) 0x4197b0 STR	D0, [X8, X22,LSL #3]

      (314) 0x4197b4 ADD	X22, X22, #1

      (314) 0x4197b8 SUB	X8, X9, X8

      (314) 0x4197bc CMP	X22, X8,ASR #3

      (314) 0x4197c0 B.CS	4199e4

      (314) 0x4197c4 LDRB	W8, [X20, #664]

      (314) 0x4197c8 TBZ	W8, #0, 419a00

      (314) 0x4197cc LDRSW	X24, [X20, #672]

      (314) 0x4197d0 LDR	X8, [X21, #216]

      (314) 0x4197d4 LDR	W1, [X21, #584]

      (314) 0x4197d8 ORR	X0, XZR, X20

      (314) 0x4197dc LDR	X25, [X20, #656]

      (314) 0x4197e0 LDR	D8, [X8, X24,LSL #3]

      (314) 0x4197e4 BL	447230

      (314) 0x4197e8 LDR	X8, [X21, #160]

      (314) 0x4197ec CBZ	X8, 4197a0

    (315) 0x4197f0 LDR	X11, [X25, #24]

    (315) 0x4197f4 LDR	X12, [X21, #512]

    (315) 0x4197f8 LDR	X10, [X0, #72]

    (315) 0x4197fc MOVI	D0, #0

    (315) 0x419800 ORR	X9, XZR, XZR

    (315) 0x419804 MADD	X10, X22, X23, X10

    (315) 0x419808 LDR	W11, [X11, X24,LSL #2]

    (315) 0x41980c LDR	X13, [X21, #464]

    (315) 0x419810 LDR	X10, [X10, #24]

    (315) 0x419814 MADD	W11, W11, W8, WZR

    (315) 0x419818 ADD	X11, X12, W11,SXTW #3

    (315) 0x41981c LDR	X12, [X25, #616]

    (315) 0x419820 ADD	X14, X10, #8

    (315) 0x419824 LDR	X12, [X12, #24]

    (315) 0x419828 B	41983c

    (315) 0x41982c FADD	D0, D18, D0

    (315) 0x419830 ADD	X9, X9, #1

    (315) 0x419834 CMP	X9, X8

    (315) 0x419838 B.EQ	4197a4

    (315) 0x41983c ADD	X15, X12, X9,LSL #2

    (315) 0x419840 MOVI	D18, #0

    (315) 0x419844 LDP	W17, W15, [X15]

    (315) 0x419848 SBFM	X17, X17, #0, #31

    (315) 0x41984c SUB	W18, W15, W17

    (315) 0x419850 CMP	W18, #1

    (315) 0x419854 B.LT	41982c

  (318) 0x419858 LDR	X15, [X11, X9,LSL #3]

  (318) 0x41985c LDR	D1, [X15, #8]

  (318) 0x419860 CMP	W18, #1

  (318) 0x419864 B.NE	419960

  (318) 0x419868 ORR	X0, XZR, XZR

  (318) 0x41986c ORR	W16, WZR, WZR

  (318) 0x419870 TBZ	W18, #0, 419894

  (318) 0x419874 ADD	X18, X10, X17,LSL #3

  (318) 0x419878 ADD	W17, W17, W0

  (318) 0x41987c LDR	D2, [X18, X0,LSL #3]

  (318) 0x419880 FCMP	D2, D1

  (318) 0x419884 CCMP	W17, W24, #4, #11

  (318) 0x419888 B.EQ	419894

  (318) 0x41988c STR	D2, [X13, X16,SXTW #3]

  (318) 0x419890 ADD	W16, W16, #1

  (318) 0x419894 MOVI	D18, #0

  (318) 0x419898 CMP	W16, #1

  (318) 0x41989c B.LT	41982c

  (318) 0x4198a0 LDP	D2, D3, [X15, #24]

  (318) 0x4198a4 LDP	D4, D5, [X15, #40]

  (318) 0x4198a8 LDP	D6, D7, [X15, #88]

  (318) 0x4198ac ADD	X18, X15, #56

  (318) 0x4198b0 ADD	X0, X15, #64

  (318) 0x4198b4 ADD	X1, X15, #72

  (318) 0x4198b8 ADD	X2, X15, #80

  (318) 0x4198bc ADD	X3, X15, #120

  (318) 0x4198c0 ADD	X4, X15, #128

  (318) 0x4198c4 ADD	X5, X15, #136

  (318) 0x4198c8 LDP	D16, D17, [X15, #104]

  (318) 0x4198cc ADD	X6, X15, #144

  (318) 0x4198d0 LDR	D1, [X15, #568]

  (318) 0x4198d4 LDR	X17, [X15, #536]

  (318) 0x4198d8 ORR	W15, WZR, W16

  (318) 0x4198dc ORR	X16, XZR, X13

  (318) 0x4198e0 LD1	{V17.D[1]}, [X6]

  (318) 0x4198e4 LD1	{V5.D[1]}, [X2]

  (318) 0x4198e8 LD1	{V7.D[1]}, [X4]

  (318) 0x4198ec LD1	{V3.D[1]}, [X0]

  (318) 0x4198f0 LD1	{V16.D[1]}, [X5]

  (318) 0x4198f4 LD1	{V4.D[1]}, [X1]

  (318) 0x4198f8 LD1	{V6.D[1]}, [X3]

  (318) 0x4198fc LD1	{V2.D[1]}, [X18]

    (319) 0x419900 LDR	D19, [X16], #8

    (319) 0x419904 ORR	V25.16B, V17.16B, V17.16B

    (319) 0x419908 ORR	V24.16B, V5.16B, V5.16B

    (319) 0x41990c SUBS	X15, X15, #1

    (319) 0x419910 FMUL	D19, D19, D1

    (319) 0x419914 FRINTZ	D20, D19

    (319) 0x419918 FCVTZS	W18, D19

    (319) 0x41991c FSUB	D19, D19, S20

    (319) 0x419920 ADD	X18, X17, W18,SXTW #3

    (319) 0x419924 FMUL	D20, D19, D19

    (319) 0x419928 FMLA	V25.2D, V16.2D, V19.D[0]

    (319) 0x41992c FMLA	V24.2D, V4.2D, V19.D[0]

    (319) 0x419930 FMUL	D21, D20, D19

    (319) 0x419934 FMLA	V25.2D, V7.2D, V20.D[0]

    (319) 0x419938 LDP	Q22, Q23, [X18]

    (319) 0x41993c FMLA	V24.2D, V3.2D, V20.D[0]

    (319) 0x419940 FMLA	V25.2D, V6.2D, V21.D[0]

    (319) 0x419944 FMLA	V24.2D, V2.2D, V21.D[0]

    (319) 0x419948 FMUL	V19.2D, V25.2D, V23.2D

    (319) 0x41994c FMLA	V19.2D, V24.2D, V22.2D

    (319) 0x419950 FADDP	D19, V19.2D

    (319) 0x419954 FADD	D18, D18, D19

    (319) 0x419958 B.NE	419900

  (318) 0x41995c B	41982c

0x419960 AND	X1, X18, #6015

0x419964 SUB	W2, W24, W17

0x419968 ADD	X3, X14, X17,LSL #3

0x41996c ORR	X0, XZR, XZR

0x419970 ORR	W16, WZR, WZR

0x419974 B	419994

0x419980 ADD	X0, X0, #2

0x419984 SUB	X1, X1, #2

0x419988 SUB	W2, W2, #2

0x41998c ADD	X3, X3, #16

0x419990 CBZ	X1, 419870

0x419994 LDUR	D2, [X3, #504]

0x419998 FCMP	D2, D1

0x41999c CCMP	W2, #0, #4, #11

0x4199a0 B.NE	4199c0

0x4199a4 LDR	D2, [X3]

0x4199a8 FCMP	D2, D1

0x4199ac CCMP	W2, #1, #4, #11

0x4199b0 B.EQ	419980

0x4199b4 B	4199d8

0x4199d8 STR	D2, [X13, X16,SXTW #3]

0x4199dc ADD	W16, W16, #1

0x4199e0 B	419980

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 229

--------------------------------------------------------------------------------

223:     return X[i];

[...]

229:     return X[i];

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h: 107 - 132

--------------------------------------------------------------------------------

107:     for (int k = 0; k < ratios.size(); ++k)

108:       ratios[k] = std::exp(Uat[VP.refPtcl] - computeU(VP.getRefPS(), VP.refPtcl, VP.getDistTableAB(myTableID).getDistRow(k).data()));

[...]

126:     const int igt = P.GroupID[iat] * NumGroups;

127:     for (int jg = 0; jg < NumGroups; ++jg)

128:     {

129:       const FuncType& f2(*F[igt + jg]);

130:       int iStart = P.first(jg);

131:       int iEnd   = P.last(jg);

132:       curUat += f2.evaluateV(iat, iStart, iEnd, dist, DistCompressed.data());

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 313 - 313

--------------------------------------------------------------------------------

313:   inline int first(int igroup) const { return (*group_offsets_)[igroup]; }

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/optional: 469 - 991

--------------------------------------------------------------------------------

469:       { return static_cast<const _Dp*>(this)->_M_payload._M_engaged; }

[...]

991: 	if (this->_M_is_engaged())

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_vector.h: 993 - 1150

--------------------------------------------------------------------------------

993:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1131: 	return *(this->_M_impl._M_start + __n);

[...]

1150: 	return *(this->_M_impl._M_start + __n);

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/refwrap.h: 351 - 351

--------------------------------------------------------------------------------

351:       { return *_M_data; }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 233 - 260

--------------------------------------------------------------------------------

233:   const int iLimit = iEnd - iStart;

234:

235: #pragma vector always

236:   for (int jat = 0; jat < iLimit; jat++)

237:   {

238:     real_type r = distArray[jat];

239:     // pick the distances smaller than the cutoff and avoid the reference atom

240:     if (r < cutoff_radius && iStart + jat != iat)

241:       distArrayCompressed[iCount++] = distArray[jat];

242:   }

243:

244:   real_type d = 0.0;

245:   //#pragma omp simd reduction(+:d)

246:   for (int jat = 0; jat < iCount; jat++)

247:   {

248:     real_type r = distArrayCompressed[jat];

249:     r *= DeltaRInv;

250:     int i         = (int)r;

251:     real_type t   = r - real_type(i);

252:     real_type tp0 = t * t * t;

253:     real_type tp1 = t * t;

254:     real_type tp2 = t;

255:

256:     real_type d1 = SplineCoefs[i + 0] * (A[0] * tp0 + A[1] * tp1 + A[2] * tp2 + A[3]);

257:     real_type d2 = SplineCoefs[i + 1] * (A[4] * tp0 + A[5] * tp1 + A[6] * tp2 + A[7]);

258:     real_type d3 = SplineCoefs[i + 2] * (A[8] * tp0 + A[9] * tp1 + A[10] * tp2 + A[11]);

259:     real_type d4 = SplineCoefs[i + 3] * (A[12] * tp0 + A[13] * tp1 + A[14] * tp2 + A[15]);

260:     d += (d1 + d2 + d3 + d4);

Coverage (%)	Name	Source Location	Module
►100.00+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:272	exec
○	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:126	exec
○	main.omp_outlined.63	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	2.57
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	3.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.04
Bottlenecks	P0, P1,
Function	miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source	BsplineFunctor.h:236-241
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	3.00
CQA cycles if no scalar integer	1.17
CQA cycles if FP arith vectorized	3.00
CQA cycles if fully vectorized	1.00
Front-end cycles	2.88
P0 cycles	3.00
P1 cycles	3.00
P2 cycles	2.00
P3 cycles	2.00
P4 cycles	2.00
P5 cycles	2.00
P6 cycles	2.00
P7 cycles	2.00
P8 cycles	2.00
P9 cycles	1.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	1.17
P13 cycles	0.83
P14 cycles	1.00
P15 cycles	0.00
P16 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	23.00
Nb uops	23.00
Nb loads	NA
Nb stores	1.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	8.00
Bytes prefetched	0.00
Bytes loaded	16.00
Bytes stored	8.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	42.31
Vector-efficiency ratio load	50.00
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	37.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	41.67

Metric	Value
CQA speedup if no scalar integer	2.57
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	3.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.04
Bottlenecks	P0, P1,
Function	miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source	BsplineFunctor.h:236-241
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	3.00
CQA cycles if no scalar integer	1.17
CQA cycles if FP arith vectorized	3.00
CQA cycles if fully vectorized	1.00
Front-end cycles	2.88
P0 cycles	3.00
P1 cycles	3.00
P2 cycles	2.00
P3 cycles	2.00
P4 cycles	2.00
P5 cycles	2.00
P6 cycles	2.00
P7 cycles	2.00
P8 cycles	2.00
P9 cycles	1.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	1.17
P13 cycles	0.83
P14 cycles	1.00
P15 cycles	0.00
P16 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	23.00
Nb uops	23.00
Nb loads	NA
Nb stores	1.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	8.00
Bytes prefetched	0.00
Bytes loaded	16.00
Bytes stored	8.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	42.31
Vector-efficiency ratio load	50.00
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	37.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	41.67

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source file and lines	BsplineFunctor.h:233-260
Module	exec

The loop is defined in:

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:107-108,126-132
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/optional:469,991
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_vector.h:993,1131,1150
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/refwrap.h:351
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:233-260

Analyzed code is defined in /home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:236-241.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 3.00 to 1.17 cycles (2.57x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. Only 42% of vector register length is used (average across all VPU instructions). By vectorizing your loop, you can lower the cost of an iteration from 3.00 to 1.00 cycles (3.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 16 bytes. The binary loop is storing 8 bytes.

General properties

nb instructions	23
loop length	92
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

2.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	3.00	3.00	2.00	2.00	2.00	2.00	2.00	2.00	2.00	1.00	0.00	0.00	1.17	0.83	1.00	0.00	0.00
cycles	3.00	3.00	2.00	2.00	2.00	2.00	2.00	2.00	2.00	1.00	0.00	0.00	1.17	0.83	1.00	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	2.88
Overall L1	3.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 3.00 cycles. At this rate:

5% of peak load performance is reached (5.33 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (2.67 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 419980

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P12	P13	P14	Latency	Recip. throughput	Vectorization
AND X1, X18, #6015	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
SUB W2, W24, W17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
ADD X3, X14, X17,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, XZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ORR W16, WZR, WZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
B 419994 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x234>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X0, X0, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
SUB X1, X1, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
SUB W2, W2, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
ADD X3, X3, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CBZ X1, 419870 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x110>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR D2, [X3, #504]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
FCMP D2, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	2	1	scal (50.0%)
CCMP W2, #0, #4, #11	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	1	scal (25.0%)
B.NE 4199c0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x260>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D2, [X3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
FCMP D2, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	2	1	scal (50.0%)
CCMP W2, #1, #4, #11	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	1	scal (25.0%)
B.EQ 419980 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x220>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4199d8 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x278>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR D2, [X13, X16,SXTW #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50	scal (50.0%)
ADD W16, W16, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
B 419980 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x220>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Function	miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)
Source file and lines	BsplineFunctor.h:233-260
Module	exec

The loop is defined in:

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:107-108,126-132
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/optional:469,991
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_vector.h:993,1131,1150
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/refwrap.h:351
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:233-260

Analyzed code is defined in /home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:236-241.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 3.00 to 1.17 cycles (2.57x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 16 bytes. The binary loop is storing 8 bytes.

General properties

nb instructions	23
loop length	92
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

2.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	3.00	3.00	2.00	2.00	2.00	2.00	2.00	2.00	2.00	1.00	0.00	0.00	1.17	0.83	1.00	0.00	0.00
cycles	3.00	3.00	2.00	2.00	2.00	2.00	2.00	2.00	2.00	1.00	0.00	0.00	1.17	0.83	1.00	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	2.88
Overall L1	3.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 3.00 cycles. At this rate:

5% of peak load performance is reached (5.33 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (2.67 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 419980

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P12	P13	P14	Latency	Recip. throughput	Vectorization
AND X1, X18, #6015	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
SUB W2, W24, W17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
ADD X3, X14, X17,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, XZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ORR W16, WZR, WZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
B 419994 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x234>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X0, X0, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
SUB X1, X1, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
SUB W2, W2, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
ADD X3, X3, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CBZ X1, 419870 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x110>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR D2, [X3, #504]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
FCMP D2, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	2	1	scal (50.0%)
CCMP W2, #0, #4, #11	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	1	scal (25.0%)
B.NE 4199c0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x260>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D2, [X3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
FCMP D2, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	2	1	scal (50.0%)
CCMP W2, #1, #4, #11	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	1	scal (25.0%)
B.EQ 419980 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x220>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4199d8 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x278>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR D2, [X13, X16,SXTW #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50	scal (50.0%)
ADD W16, W16, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
B 419980 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x220>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code