OV - exec - Function qmcplusplus::TimerType<std::chrono::_V2::system

	Function: qmcplusplus::TimerType<std::chrono::_V2::system_clock>::start()	Module: exec	Source: NewTimer.cpp:39-81 [...]	Coverage (incl. loops): 0.03% \| (excl. loops): 0.03%

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 90 - 97

--------------------------------------------------------------------------------

90:     short_buckets[level] = c1;

91:     if (level >= max_level - 1)

92:     {

93:       timer_max_level_exceeded = true;

94:     }

95:     else

96:     {

97:       level++;

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp: 39 - 81

--------------------------------------------------------------------------------

39:   if (active)

[...]

53:     for (int level = omp_get_level(); level > 0; level--)

54:       if (omp_get_ancestor_thread_num(level) != 0)

55:         is_true_master = false;

56:     if (is_true_master)

57:     {

58:       if (manager)

59:       {

60:         // compute current_stack_key

61:         TimerType* parent = manager->current_timer();

62:         if (parent)

63:         {

64:           current_stack_key = parent->get_stack_key();

65:           current_stack_key.add_id(timer_id);

66:         }

67:         else

68:         {

69:           current_stack_key = StackKey();

70:           current_stack_key.add_id(timer_id);

71:         }

72:

73:         manager->push_timer(this);

74:       }

75:       start_time = CLOCK::now();

[...]

81: }

/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_vector.h: 993 - 993

--------------------------------------------------------------------------------

993:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h: 92 - 93

--------------------------------------------------------------------------------

92:     if (CurrentTimerStack.size() > 0)

93:       current = CurrentTimerStack.back();

0x468a00 LDRB	W8, [X0, #56]

0x468a04 CMP	W8, #1

0x468a08 B.NE	468b00

0x468a0c STP	X29, X30, [SP, #976]!

0x468a10 STR	X21, [SP, #16]

0x468a14 STP	X20, X19, [SP, #32]

0x468a18 ADD	X29, SP, #0

0x468a1c ORR	X19, XZR, X0

0x468a20 BL	404820

0x468a24 CMP	W0, #1

0x468a28 B.LT	468a60

0x468a2c MOVZ	W21, #1

0x468a30 ORR	W20, WZR, W0

0x468a34 HINT	#0

0x468a38 HINT	#0

0x468a3c HINT	#0

(1537) 0x468a40 ORR	W0, WZR, W20

(1537) 0x468a44 BL	404850

(1537) 0x468a48 CMP	W0, #0

(1537) 0x468a4c CSINC	W8, WZR, WZR, #1

(1537) 0x468a50 SUBS	W20, W20, #1

(1537) 0x468a54 AND	W21, W8, W21

(1537) 0x468a58 B.HI	468a40

0x468a5c TBZ	W21, #0, 468af4

0x468a60 LDR	X9, [X19, #72]

0x468a64 CBZ	X9, 468aec

0x468a68 LDP	X9, X8, [X9, #72]

0x468a6c CMP	X8, X9

0x468a70 B.EQ	468aac

0x468a74 LDUR	X8, [X8, #504]

0x468a78 CBZ	X8, 468aac

0x468a7c LDR	Q0, [X8, #80]

0x468a80 LDRSW	X10, [X8, #96]

0x468a84 LDRB	W8, [X19, #64]

0x468a88 ADD	X9, X19, #80

0x468a8c STR	W10, [X19, #96]

0x468a90 STR	Q0, [X19, #80]

0x468a94 STRB	W8, [X9, X10]

0x468a98 LDR	W8, [X19, #96]

0x468a9c CMP	W8, #15

0x468aa0 B.GE	468ac8

0x468aa4 ADD	W8, W8, #1

0x468aa8 B	468adc

0x468aac LDRB	W9, [X19, #64]

0x468ab0 ORR	W8, WZR, WZR

0x468ab4 STP	XZR, XZR, [X19, #80]

0x468ab8 STR	WZR, [X19, #96]

0x468abc STRB	W9, [X19, #80]

0x468ac0 CMP	W8, #15

0x468ac4 B.LT	468ad8

0x468ac8 ADRP	X8,

0x468acc MOVZ	W9, #1

0x468ad0 STRB	W9, [X8, #1336]

0x468ad4 B	468ae0

0x468ad8 MOVZ	W8, #1

0x468adc STR	W8, [X19, #96]

0x468ae0 LDR	X0, [X19, #72]

0x468ae4 ORR	X1, XZR, X19

0x468ae8 BL	46e320

0x468aec BL	4048e0

0x468af0 STR	X0, [X19]

0x468af4 LDP	X20, X19, [SP, #32]

0x468af8 LDR	X21, [SP, #16]

0x468afc LDP	X29, X30, [SP], #48

0x468b00 RET

0x468b04 HINT	#0

0x468b08 HINT	#0

0x468b0c HINT	#0

Coverage (%)	Name	Source Location	Module
►12.50+	qmcplusplus::ParticleSet::acce[...]	stl_vector.h:993	exec
○	main.omp_outlined.63	miniqmc.cpp:453	exec
○	__kmp_invoke_microtask		libomp.so
►11.99+	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:126	exec
○	main.omp_outlined.63	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libomp.so
►10.35+	qmcplusplus::ParticleSet::upda[...]	stl_vector.h:993	exec
○	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:135	exec
○	main.omp_outlined.63	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libomp.so
►9.34+	main.omp_outlined.63	miniqmc.cpp:453	exec
○	__kmp_invoke_microtask		libomp.so
►9.22+	qmcplusplus::WaveFunction::rat[...]	stl_vector.h:993	exec
○	main.omp_outlined.63	miniqmc.cpp:442	exec
○	__kmp_invoke_microtask		libomp.so
►6.31+	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:135	exec
○	main.omp_outlined.63	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libomp.so
►5.18+	main.omp_outlined.63	miniqmc.cpp:437	exec
○	__kmp_invoke_microtask		libomp.so
►5.18+	qmcplusplus::ParticleSet::comp[...]	stl_vector.h:993	exec
○	main.omp_outlined.63	miniqmc.cpp:437	exec
○	__kmp_invoke_microtask		libomp.so
►4.92+	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:993	exec
○	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:126	exec
○	main.omp_outlined.63	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libomp.so
►4.55+	main.omp_outlined.63	miniqmc.cpp:442	exec
○	__kmp_invoke_microtask		libomp.so
►3.91+	main.omp_outlined.63	miniqmc.cpp:433	exec
○	__kmp_invoke_microtask		libomp.so
►3.79+	qmcplusplus::WaveFunction::acc[...]	stl_vector.h:993	exec
○	main.omp_outlined.63	miniqmc.cpp:450	exec
○	__kmp_invoke_microtask		libomp.so
○3.79	__kmp_invoke_microtask		libomp.so
►3.41+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:219	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	stl_vector.h:993	exec
○	main.omp_outlined.63	miniqmc.cpp:442	exec
○	__kmp_invoke_microtask		libomp.so
►2.15+	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:993	exec
○	main.omp_outlined.63	miniqmc.cpp:433	exec
○	__kmp_invoke_microtask		libomp.so
►1.64+	main.omp_outlined.63	miniqmc.cpp:450	exec
○	__kmp_invoke_microtask		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.03% of application time for run orig_0

Source file and lines	NewTimer.cpp:39-81
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:90-97
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:39,53-75,81
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_vector.h:993
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h:92-93

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 8.33 to 1.50 cycles (5.56x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 47% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 8.33 to 7.00 cycles (1.19x speedup).

Details

8% of VPU instructions are used in vector version (process two or more data elements in vector registers):

33% of VPU loads are used in vector version.
8% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 8.33 to 1.50 cycles (5.56x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 107 bytes. The binary function is storing 95 bytes.

General properties

nb instructions	61
loop length	244
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

6.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	7.00	7.00	3.42	3.42	3.33	3.33	3.25	3.25	0.50	0.50	0.00	0.00	8.33	8.33	8.33	5.50	5.50
cycles	7.00	7.00	3.42	3.42	3.33	3.33	3.25	3.25	0.50	0.50	0.00	0.00	8.33	8.33	8.33	5.50	5.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.88
Overall L1	8.33

Vectorization ratios

all	8%
load	33%
store	8%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 8.33 cycles. At this rate:

13% of peak load performance is reached (12.84 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.40 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 468a00

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
LDRB W8, [X0, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP W8, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 468b00 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x100>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X29, X30, [SP, #976]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X21, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X20, X19, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 404820 <@plt_start@+0x400>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 468a60 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ W21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
ORR W20, WZR, W0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
TBZ W21, #0, 468af4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xf4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X19, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X9, 468aec <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X9, X8, [X9, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CMP X8, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 468aac <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X8, [X8, #504]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X8, 468aac <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR Q0, [X8, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
LDRSW X10, [X8, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDRB W8, [X19, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, X19, #80	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR W10, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR Q0, [X19, #80]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STRB W8, [X9, X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (6.3%)
LDR W8, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP W8, #15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 468ac8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD W8, W8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 468adc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xdc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDRB W9, [X19, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR W8, WZR, WZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP XZR, XZR, [X19, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR WZR, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STRB W9, [X19, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (6.3%)
CMP W8, #15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 468ad8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X8, <4f0ac8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STRB W9, [X8, #1336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (6.3%)
B 468ae0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xe0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ W8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR W8, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X0, [X19, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
BL 46e320 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4048e0 <@plt_start@+0x4c0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X0, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X20, X19, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDR X21, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDP X29, X30, [SP], #48	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A

The code analyzed by CQA in that panel excludes loops and represents 0.03% of application time for run orig_0

Source file and lines	NewTimer.cpp:39-81
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:90-97
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:39,53-75,81
/opt/arm/gcc-14.2.0_AmazonLinux-2023/lib/gcc/aarch64-linux-gnu/14.2.0/../../../../include/c++/14.2.0/bits/stl_vector.h:993
/home/hbollore/qaas/qaas-runs/174-135-6342/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h:92-93

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 8.33 to 1.50 cycles (5.56x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

8% of VPU instructions are used in vector version (process two or more data elements in vector registers):

33% of VPU loads are used in vector version.
8% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 8.33 to 1.50 cycles (5.56x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 107 bytes. The binary function is storing 95 bytes.

General properties

nb instructions	61
loop length	244
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

6.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	7.00	7.00	3.42	3.42	3.33	3.33	3.25	3.25	0.50	0.50	0.00	0.00	8.33	8.33	8.33	5.50	5.50
cycles	7.00	7.00	3.42	3.42	3.33	3.33	3.25	3.25	0.50	0.50	0.00	0.00	8.33	8.33	8.33	5.50	5.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.88
Overall L1	8.33

Vectorization ratios

all	8%
load	33%
store	8%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 8.33 cycles. At this rate:

13% of peak load performance is reached (12.84 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.40 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 468a00

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
LDRB W8, [X0, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP W8, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 468b00 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x100>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X29, X30, [SP, #976]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X21, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X20, X19, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 404820 <@plt_start@+0x400>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 468a60 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ W21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
ORR W20, WZR, W0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
TBZ W21, #0, 468af4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xf4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X19, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X9, 468aec <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X9, X8, [X9, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CMP X8, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 468aac <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X8, [X8, #504]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X8, 468aac <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR Q0, [X8, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
LDRSW X10, [X8, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDRB W8, [X19, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, X19, #80	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR W10, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR Q0, [X19, #80]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STRB W8, [X9, X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (6.3%)
LDR W8, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP W8, #15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 468ac8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD W8, W8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 468adc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xdc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDRB W9, [X19, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR W8, WZR, WZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP XZR, XZR, [X19, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR WZR, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STRB W9, [X19, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (6.3%)
CMP W8, #15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 468ad8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X8, <4f0ac8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STRB W9, [X8, #1336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (6.3%)
B 468ae0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xe0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ W8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR W8, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X0, [X19, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
BL 46e320 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4048e0 <@plt_start@+0x4c0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X0, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X20, X19, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDR X21, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDP X29, X30, [SP], #48	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A

Name	Coverage (%)	Time (s)
▼qmcplusplus::TimerType::start()–	0.03	0.04
○Loop 1537 - NewTimer.cpp:53-54 - exec	0.00	0.00

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code