OV - exec - Loop 729

	Loop Id: 729	Module: exec	Source: BsplineFunctor.h:236-241	Coverage: 0.06%

0x43c0d8 LDR	D16, [X16]    [10]

0x43c0dc FCMPE	D0, D16

0x43c0e0 B.LS	43c0f4

0x43c0e4 CMP	W1, W15

0x43c0e8 B.EQ	43c0f4

0x43c0ec STR	D16, [X5, X8,SXTW #3]    [8]

0x43c0f0 ADD	W8, W8, #1

0x43c0f4 LDR	D17, [X16, #8]    [10]

0x43c0f8 ADD	W6, W15, #1

0x43c0fc ADD	X4, X16, #8

0x43c100 FCMPE	D0, D17

0x43c104 B.LS	43c118

0x43c108 CMP	W1, W6

0x43c10c B.EQ	43c118

0x43c110 STR	D17, [X5, X8,SXTW #3]    [7]

0x43c114 ADD	W8, W8, #1

0x43c118 LDR	D18, [X4, #8]    [9]

0x43c11c ADD	W2, W6, #1

0x43c120 FCMPE	D0, D18

0x43c124 B.LS	43c138

0x43c128 CMP	W1, W2

0x43c12c B.EQ	43c138

0x43c130 STR	D18, [X5, X8,SXTW #3]    [6]

0x43c134 ADD	W8, W8, #1

0x43c138 LDR	D19, [X4, #16]    [9]

0x43c13c ADD	W10, W6, #2

0x43c140 FCMPE	D0, D19

0x43c144 B.LS	43c158

0x43c148 CMP	W1, W10

0x43c14c B.EQ	43c158

0x43c150 STR	D19, [X5, X8,SXTW #3]    [5]

0x43c154 ADD	W8, W8, #1

0x43c158 LDR	D20, [X4, #24]    [9]

0x43c15c ADD	W11, W6, #3

0x43c160 FCMPE	D0, D20

0x43c164 B.LS	43c178

0x43c168 CMP	W1, W11

0x43c16c B.EQ	43c178

0x43c170 STR	D20, [X5, X8,SXTW #3]    [4]

0x43c174 ADD	W8, W8, #1

0x43c178 LDR	D21, [X4, #32]    [9]

0x43c17c ADD	W12, W6, #4

0x43c180 FCMPE	D0, D21

0x43c184 B.LS	43c198

0x43c188 CMP	W1, W12

0x43c18c B.EQ	43c198

0x43c190 STR	D21, [X5, X8,SXTW #3]    [3]

0x43c194 ADD	W8, W8, #1

0x43c198 LDR	D22, [X4, #40]    [9]

0x43c19c ADD	W13, W6, #5

0x43c1a0 FCMPE	D0, D22

0x43c1a4 B.LS	43c1b8

0x43c1a8 CMP	W1, W13

0x43c1ac B.EQ	43c1b8

0x43c1b0 STR	D22, [X5, X8,SXTW #3]    [2]

0x43c1b4 ADD	W8, W8, #1

0x43c1b8 LDR	D23, [X4, #48]    [9]

0x43c1bc ADD	W14, W6, #6

0x43c1c0 FCMPE	D0, D23

0x43c1c4 B.LS	43c1d8

0x43c1c8 CMP	W1, W14

0x43c1cc B.EQ	43c1d8

0x43c1d0 STR	D23, [X5, X8,SXTW #3]    [1]

0x43c1d4 ADD	W8, W8, #1

0x43c1d8 ADD	W15, W6, #7

0x43c1dc ADD	X16, X4, #56

0x43c1e0 CMP	W3, W15

0x43c1e4 B.NE	43c0d8

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 236 - 241

--------------------------------------------------------------------------------

236:   for (int jat = 0; jat < iLimit; jat++)

237:   {

238:     real_type r = distArray[jat];

239:     // pick the distances smaller than the cutoff and avoid the reference atom

240:     if (r < cutoff_radius && iStart + jat != iat)

241:       distArrayCompressed[iCount++] = distArray[jat];

Coverage (%)	Name	Source Location	Module
►37.50+	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:219	exec
○	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►37.50+	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:219	exec
○	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►12.50+	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:219	exec
○	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►12.50+	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:219	exec
○	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Metric	Value
CQA speedup if no scalar integer	1.59
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	5.67
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.06
Bottlenecks	micro-operation queue, P0, P1,
Function	qmcplusplus::BsplineFunctor::evaluateV(int, int, int, double const, double) const
Source	BsplineFunctor.h:236-241
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	8.50
CQA cycles if no scalar integer	5.33
CQA cycles if FP arith vectorized	8.50
CQA cycles if fully vectorized	1.50
Front-end cycles	8.50
DIV/SQRT cycles	8.50
P0 cycles	8.50
P1 cycles	6.75
P2 cycles	6.75
P3 cycles	6.75
P4 cycles	6.75
P5 cycles	8.00
P6 cycles	8.00
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	5.33
P10 cycles	5.33
P11 cycles	5.33
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	68.00
Nb uops	68.00
Nb loads	NA
Nb stores	8.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	15.06
Bytes prefetched	0.00
Bytes loaded	64.00
Bytes stored	64.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	18.95
Vector-efficiency ratio load	25.00
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Metric	Value
CQA speedup if no scalar integer	1.59
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	5.67
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.06
Bottlenecks	micro-operation queue, P0, P1,
Function	qmcplusplus::BsplineFunctor::evaluateV(int, int, int, double const, double) const
Source	BsplineFunctor.h:236-241
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	8.50
CQA cycles if no scalar integer	5.33
CQA cycles if FP arith vectorized	8.50
CQA cycles if fully vectorized	1.50
Front-end cycles	8.50
DIV/SQRT cycles	8.50
P0 cycles	8.50
P1 cycles	6.75
P2 cycles	6.75
P3 cycles	6.75
P4 cycles	6.75
P5 cycles	8.00
P6 cycles	8.00
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	5.33
P10 cycles	5.33
P11 cycles	5.33
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	68.00
Nb uops	68.00
Nb loads	NA
Nb stores	8.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	15.06
Bytes prefetched	0.00
Bytes loaded	64.00
Bytes stored	64.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	18.95
Vector-efficiency ratio load	25.00
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	qmcplusplus::BsplineFunctor::evaluateV(int, int, int, double const, double) const
Source file and lines	BsplineFunctor.h:236-241
Module	exec

The loop is defined in /home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:236-241.

The related source loop is not unrolled or unrolled with no peel/tail loop.
Warnings:

Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 6561 paths individually, rerun with max-paths=6561
RecMII not computed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 6561 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 8.50 to 5.33 cycles (1.59x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. Only 18% of vector register length is used (average across all VPU instructions). By vectorizing your loop, you can lower the cost of an iteration from 8.50 to 1.50 cycles (5.67x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization (including FP reductions).
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 64 bytes. The binary loop is storing 64 bytes.

General properties

nb instructions	68
loop length	272
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

8.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	8.50	8.50	6.75	6.75	6.75	6.75	8.00	8.00	0.00	0.00	5.33	5.33	5.33	0.00	0.00
cycles	8.50	8.50	6.75	6.75	6.75	6.75	8.00	8.00	0.00	0.00	5.33	5.33	5.33	0.00	0.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	8.50
Overall L1	8.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 8.50 cycles. At this rate:

7% of peak load performance is reached (7.53 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
15% of peak store performance is reached (7.53 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 43c0d8

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P10	P11	P12	Latency	Recip. throughput
LDR D16, [X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FCMPE D0, D16	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c0f4 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x154>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c0f4 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x154>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D16, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D17, [X16, #8]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W6, W15, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X4, X16, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D17	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c118 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x178>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c118 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x178>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D17, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D18, [X4, #8]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W2, W6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D18	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c138 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x198>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c138 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x198>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D18, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D19, [X4, #16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W10, W6, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D19	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c158 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c158 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D19, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D20, [X4, #24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W11, W6, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D20	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c178 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x1d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c178 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x1d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D20, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D21, [X4, #32]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W12, W6, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D21	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c198 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x1f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c198 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x1f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D21, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D22, [X4, #40]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W13, W6, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D22	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c1b8 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x218>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c1b8 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x218>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D22, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D23, [X4, #48]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W14, W6, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D23	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c1d8 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x238>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c1d8 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x238>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D23, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD W15, W6, #7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X16, X4, #56	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP W3, W15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.NE 43c0d8 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x138>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50

Function	qmcplusplus::BsplineFunctor::evaluateV(int, int, int, double const, double) const
Source file and lines	BsplineFunctor.h:236-241
Module	exec

Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 6561 paths individually, rerun with max-paths=6561
RecMII not computed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 8.50 to 5.33 cycles (1.59x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization (including FP reductions).
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 64 bytes. The binary loop is storing 64 bytes.

General properties

nb instructions	68
loop length	272
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

8.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	8.50	8.50	6.75	6.75	6.75	6.75	8.00	8.00	0.00	0.00	5.33	5.33	5.33	0.00	0.00
cycles	8.50	8.50	6.75	6.75	6.75	6.75	8.00	8.00	0.00	0.00	5.33	5.33	5.33	0.00	0.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	8.50
Overall L1	8.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 8.50 cycles. At this rate:

7% of peak load performance is reached (7.53 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
15% of peak store performance is reached (7.53 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 43c0d8

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P10	P11	P12	Latency	Recip. throughput
LDR D16, [X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FCMPE D0, D16	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c0f4 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x154>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c0f4 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x154>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D16, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D17, [X16, #8]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W6, W15, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X4, X16, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D17	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c118 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x178>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c118 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x178>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D17, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D18, [X4, #8]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W2, W6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D18	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c138 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x198>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c138 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x198>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D18, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D19, [X4, #16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W10, W6, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D19	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c158 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c158 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D19, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D20, [X4, #24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W11, W6, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D20	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c178 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x1d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c178 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x1d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D20, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D21, [X4, #32]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W12, W6, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D21	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c198 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x1f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c198 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x1f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D21, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D22, [X4, #40]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W13, W6, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D22	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c1b8 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x218>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c1b8 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x218>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D22, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D23, [X4, #48]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD W14, W6, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
FCMPE D0, D23	1	0	0	0	0	0	0	1	0	0	0	0	2	1
B.LS 43c1d8 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x238>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CMP W1, W14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 43c1d8 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x238>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
STR D23, [X5, X8,SXTW #3]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD W15, W6, #7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X16, X4, #56	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP W3, W15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.NE 43c0d8 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x138>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code