OV - exec - Loop 716

0x43afac LDR	D26, [X19, X23,LSL #3]    [16]

0x43afb0 ADD	X18, X23, #1

0x43afb4 ADD	X17, X23, #2

0x43afb8 ADD	X16, X23, #3

0x43afbc ADD	X15, X23, #4

0x43afc0 LDR	D27, [X21, X23,LSL #3]    [10]

0x43afc4 ADD	X14, X23, #5

0x43afc8 ADD	X8, X23, #6

0x43afcc ADD	X7, X23, #7

0x43afd0 ADD	X23, X23, #8

0x43afd4 LDR	D28, [X19, X18,LSL #3]    [7]

0x43afd8 LDR	D29, [X21, X18,LSL #3]    [15]

0x43afdc FMADD	D30, D26, D27, D0

0x43afe0 LDR	D31, [X19, X17,LSL #3]    [11]

0x43afe4 LDR	D6, [X21, X17,LSL #3]    [3]

0x43afe8 LDR	D5, [X19, X16,LSL #3]    [2]

0x43afec FMADD	D2, D28, D29, D30

0x43aff0 LDR	D4, [X21, X16,LSL #3]    [13]

0x43aff4 LDR	D3, [X19, X15,LSL #3]    [6]

0x43aff8 FMADD	D17, D31, D6, D2

0x43affc LDR	D16, [X21, X15,LSL #3]    [14]

0x43b000 LDR	D7, [X19, X14,LSL #3]    [1]

0x43b004 LDR	D18, [X21, X14,LSL #3]    [12]

0x43b008 FMADD	D19, D5, D4, D17

0x43b00c LDR	D20, [X19, X8,LSL #3]    [9]

0x43b010 LDR	D21, [X21, X8,LSL #3]    [5]

0x43b014 FMADD	D22, D3, D16, D19

0x43b018 LDR	D23, [X19, X7,LSL #3]    [8]

0x43b01c LDR	D24, [X21, X7,LSL #3]    [4]

0x43b020 FMADD	D25, D7, D18, D22

0x43b024 FMADD	D0, D20, D21, D25

0x43b028 FMADD	D0, D23, D24, D0

0x43b02c CMP	W28, W23

0x43b030 B.GT	43afac

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h: 196 - 197

--------------------------------------------------------------------------------

196:       for (int jat = 0; jat < Nions; ++jat)

197:         s += du[jat] * dX[jat];

Coverage (%)	Name	Source Location	Module
►100.00+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:181	exec
○	main._omp_fn.0	miniqmc.cpp:390	exec
○	GOMP_parallel		libomp.so
○	main	stl_vector.h:1043	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	3.00
Bottlenecks
Function	miniqmcreference::OneBodyJastrowRef >::evaluateLog(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib, std::allocator > >&, qmcplusplus::ParticleAttrib >&)
Source	OneBodyJastrowRef.h:196-197
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	16.00
CQA cycles if no scalar integer	16.00
CQA cycles if FP arith vectorized	16.00
CQA cycles if fully vectorized	4.00
Front-end cycles	4.25
DIV/SQRT cycles	0.50
P0 cycles	0.50
P1 cycles	2.25
P2 cycles	2.25
P3 cycles	2.25
P4 cycles	2.25
P5 cycles	2.00
P6 cycles	2.00
P7 cycles	2.00
P8 cycles	2.00
P9 cycles	5.33
P10 cycles	5.33
P11 cycles	5.33
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	0.00
Inter-iter dependencies cycles	16
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	34.00
Nb uops	34.00
Nb loads	NA
Nb stores	0.00
Nb stack references	0.00
FLOP/cycle	1.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	8.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	8.00
Bytes prefetched	0.00
Bytes loaded	128.00
Bytes stored	0.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	NA
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	NA
Vector-efficiency ratio all	25.00
Vector-efficiency ratio load	25.00
Vector-efficiency ratio store	NA
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	NA

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	3.00
Bottlenecks
Function	miniqmcreference::OneBodyJastrowRef >::evaluateLog(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib, std::allocator > >&, qmcplusplus::ParticleAttrib >&)
Source	OneBodyJastrowRef.h:196-197
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	16.00
CQA cycles if no scalar integer	16.00
CQA cycles if FP arith vectorized	16.00
CQA cycles if fully vectorized	4.00
Front-end cycles	4.25
DIV/SQRT cycles	0.50
P0 cycles	0.50
P1 cycles	2.25
P2 cycles	2.25
P3 cycles	2.25
P4 cycles	2.25
P5 cycles	2.00
P6 cycles	2.00
P7 cycles	2.00
P8 cycles	2.00
P9 cycles	5.33
P10 cycles	5.33
P11 cycles	5.33
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	0.00
Inter-iter dependencies cycles	16
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	34.00
Nb uops	34.00
Nb loads	NA
Nb stores	0.00
Nb stack references	0.00
FLOP/cycle	1.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	8.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	8.00
Bytes prefetched	0.00
Bytes loaded	128.00
Bytes stored	0.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	NA
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	NA
Vector-efficiency ratio all	25.00
Vector-efficiency ratio load	25.00
Vector-efficiency ratio store	NA
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	NA

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	miniqmcreference::OneBodyJastrowRef >::evaluateLog(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib, std::allocator > >&, qmcplusplus::ParticleAttrib >&)
Source file and lines	OneBodyJastrowRef.h:196-197
Module	exec

The loop is defined in /home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:196-197.

The related source loop is not unrolled or unrolled with no peel/tail loop.

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 4 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 16.00 to 4.00 cycles (4.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization (including FP reductions).
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

FMA

Detected 8 FMA (fused multiply-add) operations.

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 16 FP arithmetical operations:

8: addition or subtraction (all inside FMA instructions)
8: multiply (all inside FMA instructions)

The binary loop is loading 128 bytes.

Arithmetic intensity

Arithmetic intensity is 0.12 FP operations per loaded or stored byte.

General properties

nb instructions	34
loop length	136
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

4.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	0.50	0.50	2.25	2.25	2.25	2.25	2.00	2.00	2.00	2.00	5.33	5.33	5.33	0.00	0.00
cycles	0.50	0.50	2.25	2.25	2.25	2.25	2.00	2.00	2.00	2.00	5.33	5.33	5.33	0.00	0.00

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	16.00

Cycles summary

Front-end	4.25
Data deps.	16.00
Overall L1	16.00

Vectorization ratios

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 16.00 cycles. At this rate:

8% of peak load performance is reached (8.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 43afac

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	Latency	Recip. throughput
LDR D26, [X19, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD X18, X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X17, X23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X16, X23, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X15, X23, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
LDR D27, [X21, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD X14, X23, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X8, X23, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X7, X23, #7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X23, X23, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
LDR D28, [X19, X18,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D29, [X21, X18,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D30, D26, D27, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D31, [X19, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D6, [X21, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D5, [X19, X16,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D2, D28, D29, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D4, [X21, X16,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D3, [X19, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D17, D31, D6, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D16, [X21, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D7, [X19, X14,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D18, [X21, X14,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D19, D5, D4, D17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D20, [X19, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D21, [X21, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D22, D3, D16, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D23, [X19, X7,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D24, [X21, X7,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D25, D7, D18, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D0, D20, D21, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D0, D23, D24, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
CMP W28, W23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.33
B.GT 43afac <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x4cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Function	miniqmcreference::OneBodyJastrowRef >::evaluateLog(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib, std::allocator > >&, qmcplusplus::ParticleAttrib >&)
Source file and lines	OneBodyJastrowRef.h:196-197
Module	exec

The loop is defined in /home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:196-197.

The related source loop is not unrolled or unrolled with no peel/tail loop.

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 4 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 16.00 to 4.00 cycles (4.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization (including FP reductions).
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

FMA

Detected 8 FMA (fused multiply-add) operations.

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 16 FP arithmetical operations:

8: addition or subtraction (all inside FMA instructions)
8: multiply (all inside FMA instructions)

The binary loop is loading 128 bytes.

Arithmetic intensity

Arithmetic intensity is 0.12 FP operations per loaded or stored byte.

General properties

nb instructions	34
loop length	136
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

4.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	0.50	0.50	2.25	2.25	2.25	2.25	2.00	2.00	2.00	2.00	5.33	5.33	5.33	0.00	0.00
cycles	0.50	0.50	2.25	2.25	2.25	2.25	2.00	2.00	2.00	2.00	5.33	5.33	5.33	0.00	0.00

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	16.00

Cycles summary

Front-end	4.25
Data deps.	16.00
Overall L1	16.00

Vectorization ratios

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 16.00 cycles. At this rate:

8% of peak load performance is reached (8.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 43afac

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	Latency	Recip. throughput
LDR D26, [X19, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD X18, X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X17, X23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X16, X23, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X15, X23, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
LDR D27, [X21, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD X14, X23, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X8, X23, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X7, X23, #7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X23, X23, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
LDR D28, [X19, X18,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D29, [X21, X18,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D30, D26, D27, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D31, [X19, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D6, [X21, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D5, [X19, X16,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D2, D28, D29, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D4, [X21, X16,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D3, [X19, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D17, D31, D6, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D16, [X21, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D7, [X19, X14,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D18, [X21, X14,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D19, D5, D4, D17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D20, [X19, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D21, [X21, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D22, D3, D16, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D23, [X19, X7,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D24, [X21, X7,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D25, D7, D18, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D0, D20, D21, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D0, D23, D24, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
CMP W28, W23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.33
B.GT 43afac <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x4cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Report Configuration

Vectorization

Details

Workaround

FMA

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

FMA

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code