OV - exec - Loop 644

0x435cc0 ORR	X10, XZR, X11

0x435cc4 LDR	D18, [X11, #8]    [3]

0x435cc8 LDR	D7, [X10], #8    [2]

0x435ccc LDP	D19, D20, [X11, #24]    [3]

0x435cd0 LDP	D21, D22, [X11, #40]    [3]

0x435cd4 ADD	X11, X11, #64

0x435cd8 FADD	D16, D0, D7

0x435cdc LDR	D17, [X10, #8]    [2]

0x435ce0 LDUR	D29, [X11, #504]    [1]

0x435ce4 FADD	D23, D16, D18

0x435ce8 FADD	D24, D23, D17

0x435cec FADD	D25, D24, D19

0x435cf0 FADD	D26, D25, D20

0x435cf4 FADD	D27, D26, D21

0x435cf8 FADD	D28, D27, D22

0x435cfc FADD	D0, D28, D29

0x435d00 CMP	X11, X1

0x435d04 B.NE	435cc0

/usr/include/c++/11/bits/stl_numeric.h: 140 - 141

--------------------------------------------------------------------------------

140:       for (; __first != __last; ++__first)

141: 	__init = _GLIBCXX_MOVE_IF_20(__init) + *__first;

Coverage (%)	Name	Source Location	Module
►42.42+	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:207	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►24.24+	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:207	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►18.18+	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:207	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►15.15+	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:207	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	3.60
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	7.11
Bottlenecks
Function	miniqmcreference::TwoBodyJastrowRef >::ratioGrad(qmcplusplus::ParticleSet&, int, qmcplusplus::TinyVector&)
Source	stl_numeric.h:140-141
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	16.00
CQA cycles if no scalar integer	16.00
CQA cycles if FP arith vectorized	16.00
CQA cycles if fully vectorized	4.44
Front-end cycles	2.25
DIV/SQRT cycles	0.50
P0 cycles	0.50
P1 cycles	1.00
P2 cycles	1.00
P3 cycles	1.00
P4 cycles	1.00
P5 cycles	2.00
P6 cycles	2.00
P7 cycles	2.00
P8 cycles	2.00
P9 cycles	2.00
P10 cycles	2.00
P11 cycles	2.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	0.00
Inter-iter dependencies cycles	16
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	18.00
Nb uops	18.00
Nb loads	NA
Nb stores	0.00
Nb stack references	0.00
FLOP/cycle	0.50
Nb FLOP add-sub	8.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	4.00
Bytes prefetched	0.00
Bytes loaded	64.00
Bytes stored	0.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	33.33
Vectorization ratio load	33.33
Vectorization ratio store	NA
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	NA
Vector-efficiency ratio all	33.33
Vector-efficiency ratio load	33.33
Vector-efficiency ratio store	NA
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	NA

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	3.60
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	7.11
Bottlenecks
Function	miniqmcreference::TwoBodyJastrowRef >::ratioGrad(qmcplusplus::ParticleSet&, int, qmcplusplus::TinyVector&)
Source	stl_numeric.h:140-141
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	16.00
CQA cycles if no scalar integer	16.00
CQA cycles if FP arith vectorized	16.00
CQA cycles if fully vectorized	4.44
Front-end cycles	2.25
DIV/SQRT cycles	0.50
P0 cycles	0.50
P1 cycles	1.00
P2 cycles	1.00
P3 cycles	1.00
P4 cycles	1.00
P5 cycles	2.00
P6 cycles	2.00
P7 cycles	2.00
P8 cycles	2.00
P9 cycles	2.00
P10 cycles	2.00
P11 cycles	2.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	0.00
Inter-iter dependencies cycles	16
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	18.00
Nb uops	18.00
Nb loads	NA
Nb stores	0.00
Nb stack references	0.00
FLOP/cycle	0.50
Nb FLOP add-sub	8.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	4.00
Bytes prefetched	0.00
Bytes loaded	64.00
Bytes stored	0.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	33.33
Vectorization ratio load	33.33
Vectorization ratio store	NA
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	NA
Vector-efficiency ratio all	33.33
Vector-efficiency ratio load	33.33
Vector-efficiency ratio store	NA
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	NA

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	miniqmcreference::TwoBodyJastrowRef >::ratioGrad(qmcplusplus::ParticleSet&, int, qmcplusplus::TinyVector&)
Source file and lines	stl_numeric.h:140-141
Module	exec

The loop is defined in /usr/include/c++/11/bits/stl_numeric.h:140-141.

The related source loop is not unrolled or unrolled with no peel/tail loop.

gain
potential
hint
expert

Vectorization

Your loop is poorly vectorized. Only 33% of vector register length is used (average across all VPU instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 16.00 to 4.44 cycles (3.60x speedup).

Details

33% of VPU instructions are used in vector version (process two or more data elements in vector registers):

33% of VPU loads are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization (including FP reductions).
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 8 FP arithmetical operations:

8: addition or subtraction

The binary loop is loading 64 bytes.

Arithmetic intensity

Arithmetic intensity is 0.12 FP operations per loaded or stored byte.

General properties

nb instructions	18
loop length	72
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

2.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	0.50	0.50	1.00	1.00	1.00	1.00	2.00	2.00	2.00	2.00	2.00	2.00	2.00	0.00	0.00
cycles	0.50	0.50	1.00	1.00	1.00	1.00	2.00	2.00	2.00	2.00	2.00	2.00	2.00	0.00	0.00

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	16.00

Cycles summary

Front-end	2.25
Data deps.	16.00
Overall L1	16.00

Vectorization ratios

all	33%
load	33%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 16.00 cycles. At this rate:

4% of peak load performance is reached (4.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 435cc0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	Latency	Recip. throughput
ORR X10, XZR, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
LDR D18, [X11, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D7, [X10], #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.33	0.33	0.33	6	0.33
LDP D19, D20, [X11, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDP D21, D22, [X11, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD X11, X11, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FADD D16, D0, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDR D17, [X10, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDUR D29, [X11, #504]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D23, D16, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D24, D23, D17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D25, D24, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D26, D25, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D27, D26, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D28, D27, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D0, D28, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
CMP X11, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.33
B.NE 435cc0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9ratioGradERNS1_11ParticleSetEiRNS1_10TinyVectorIdLj3EEE+0x100>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Function	miniqmcreference::TwoBodyJastrowRef >::ratioGrad(qmcplusplus::ParticleSet&, int, qmcplusplus::TinyVector&)
Source file and lines	stl_numeric.h:140-141
Module	exec

The loop is defined in /usr/include/c++/11/bits/stl_numeric.h:140-141.

The related source loop is not unrolled or unrolled with no peel/tail loop.

gain
potential
hint
expert

Vectorization

Your loop is poorly vectorized. Only 33% of vector register length is used (average across all VPU instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 16.00 to 4.44 cycles (3.60x speedup).

Details

33% of VPU instructions are used in vector version (process two or more data elements in vector registers):

33% of VPU loads are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization (including FP reductions).
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 8 FP arithmetical operations:

8: addition or subtraction

The binary loop is loading 64 bytes.

Arithmetic intensity

Arithmetic intensity is 0.12 FP operations per loaded or stored byte.

General properties

nb instructions	18
loop length	72
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

2.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	0.50	0.50	1.00	1.00	1.00	1.00	2.00	2.00	2.00	2.00	2.00	2.00	2.00	0.00	0.00
cycles	0.50	0.50	1.00	1.00	1.00	1.00	2.00	2.00	2.00	2.00	2.00	2.00	2.00	0.00	0.00

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	16.00

Cycles summary

Front-end	2.25
Data deps.	16.00
Overall L1	16.00

Vectorization ratios

all	33%
load	33%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 16.00 cycles. At this rate:

4% of peak load performance is reached (4.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 435cc0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	Latency	Recip. throughput
ORR X10, XZR, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
LDR D18, [X11, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDR D7, [X10], #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.33	0.33	0.33	6	0.33
LDP D19, D20, [X11, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDP D21, D22, [X11, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
ADD X11, X11, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FADD D16, D0, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDR D17, [X10, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDUR D29, [X11, #504]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D23, D16, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D24, D23, D17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D25, D24, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D26, D25, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D27, D26, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D28, D27, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D0, D28, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
CMP X11, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.33
B.NE 435cc0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9ratioGradERNS1_11ParticleSetEiRNS1_10TinyVectorIdLj3EEE+0x100>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Report Configuration

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code