OV - exec - Loop 1207

	Loop Id: 1207	Module: exec	Source: ParticleBConds.h:188-217	Coverage: 1.19%

0x46c840 LDR	D21, [X14, X2,LSL #3]    [4]

0x46c844 CMP	W7, W2

0x46c848 LDR	D20, [X15, X2,LSL #3]    [10]

0x46c84c FCSEL	D19, D17, D16, #12

0x46c850 LDR	D0, [X13, X2,LSL #3]    [7]

0x46c854 FSUB	D1, D21, S6

0x46c858 LDP	D27, D8, [X0, #32]    [2]

0x46c85c FSUB	D2, D20, S7

0x46c860 LDP	D26, D11, [X0, #16]    [2]

0x46c864 FSUB	D3, D0, S5

0x46c868 LDP	D9, D4, [X0]    [2]

0x46c86c FMUL	D22, D1, D19

0x46c870 LDP	D10, D23, [X0, #96]    [2]

0x46c874 FMUL	D24, D2, D19

0x46c878 LDR	D28, [X0, #80]    [2]

0x46c87c FMUL	D25, D3, D19

0x46c880 FMUL	D29, D22, D27

0x46c884 FMUL	D30, D22, D4

0x46c888 FMADD	D31, D24, D11, D29

0x46c88c FMADD	D21, D24, D9, D30

0x46c890 LDR	D9, [X0, #72]    [2]

0x46c894 FMADD	D20, D25, D8, D31

0x46c898 LDP	D8, D11, [X0, #120]    [2]

0x46c89c FRINTM	D0, D20

0x46c8a0 FNMUL	D2, D0, D23

0x46c8a4 FNMUL	D1, D0, D28

0x46c8a8 LDP	D27, D28, [X0, #48]    [2]

0x46c8ac FMADD	D3, D25, D26, D21

0x46c8b0 FRINTM	D4, D3

0x46c8b4 LDR	D21, [X0, #64]    [2]

0x46c8b8 FMSUB	D26, D4, D10, D2

0x46c8bc FNMUL	D10, D0, D11

0x46c8c0 LDR	D2, [X0, #112]    [2]

0x46c8c4 FMSUB	D23, D4, D9, D1

0x46c8c8 FMUL	D29, D22, D28

0x46c8cc LDR	D20, [X0, #88]    [2]

0x46c8d0 LDP	D9, D11, [X4, #8]    [8]

0x46c8d4 FMSUB	D30, D4, D8, D10

0x46c8d8 LDR	D4, [X0, #136]    [2]

0x46c8dc FMADD	D31, D24, D27, D29

0x46c8e0 LDP	D10, D8, [X4, #24]    [8]

0x46c8e4 FADD	D22, D22, D26

0x46c8e8 LDP	D26, D28, [X3, #8]    [6]

0x46c8ec FADD	D24, D24, D23

0x46c8f0 FMADD	D0, D25, D21, D31

0x46c8f4 FRINTM	D3, D0

0x46c8f8 LDR	D27, [X3, #24]    [6]

0x46c8fc FADD	D25, D25, D30

0x46c900 FMSUB	D21, D3, D2, D22

0x46c904 FMSUB	D1, D3, D20, D24

0x46c908 FMSUB	D0, D3, D4, D25

0x46c90c FADD	D31, D21, D11

0x46c910 FADD	D30, D21, D9

0x46c914 FADD	D22, D21, D10

0x46c918 FADD	D24, D21, D8

0x46c91c FMUL	D9, D21, D21

0x46c920 FADD	D23, D0, D26

0x46c924 FADD	D4, D0, D28

0x46c928 LDP	D26, D28, [X5, #8]    [9]

0x46c92c FADD	D29, D0, D27

0x46c930 FMUL	D3, D31, D31

0x46c934 LDP	D27, D8, [X5, #24]    [9]

0x46c938 FMUL	D20, D30, D30

0x46c93c FMUL	D2, D22, D22

0x46c940 FMUL	D25, D24, D24

0x46c944 FMADD	D24, D1, D1, D9

0x46c948 FADD	D31, D1, D26

0x46c94c FADD	D11, D1, D28

0x46c950 FADD	D10, D1, D27

0x46c954 FADD	D30, D1, D8

0x46c958 FMADD	D26, D0, D0, D24

0x46c95c FMADD	D22, D31, D31, D20

0x46c960 LDP	D8, D31, [X3, #32]    [6]

0x46c964 FMADD	D3, D11, D11, D3

0x46c968 FMADD	D2, D10, D10, D2

0x46c96c FMADD	D28, D30, D30, D25

0x46c970 LDR	D9, [X3, #48]    [6]

0x46c974 FADD	D11, D0, D8

0x46c978 FMADD	D23, D23, D23, D22

0x46c97c LDP	D24, D22, [X4, #40]    [8]

0x46c980 FMADD	D4, D4, D4, D3

0x46c984 FMADD	D29, D29, D29, D2

0x46c988 FMINNM	D20, D26, D23

0x46c98c FMINNM	D25, D4, D20

0x46c990 FMINNM	D27, D29, D25

0x46c994 FADD	D3, D0, D9

0x46c998 LDR	D2, [X4, #56]    [8]

0x46c99c FMADD	D10, D11, D11, D28

0x46c9a0 FMINNM	D30, D10, D27

0x46c9a4 FADD	D28, D21, D24

0x46c9a8 FCMPE	D26, D23

0x46c9ac CSINC	W1, WZR, WZR, #13

0x46c9b0 FADD	D26, D0, D31

0x46c9b4 FCMPE	D4, D20

0x46c9b8 CSEL	W1, W1, W20, #10

0x46c9bc FADD	D23, D21, D22

0x46c9c0 FCMPE	D29, D25

0x46c9c4 CSEL	W1, W1, W19, #10

0x46c9c8 FMUL	D4, D28, D28

0x46c9cc LDR	D31, [X5, #56]    [9]

0x46c9d0 FADD	D20, D21, D2

0x46c9d4 FCMPE	D10, D27

0x46c9d8 LDP	D27, D8, [X5, #40]    [9]

0x46c9dc CSEL	W1, W1, W30, #10

0x46c9e0 FMUL	D25, D23, D23

0x46c9e4 FADD	D10, D1, D31

0x46c9e8 FMUL	D29, D20, D20

0x46c9ec FADD	D9, D1, D27

0x46c9f0 FADD	D11, D1, D8

0x46c9f4 FMADD	D28, D10, D10, D29

0x46c9f8 FMADD	D24, D9, D9, D4

0x46c9fc FMADD	D22, D11, D11, D25

0x46ca00 FMADD	D26, D26, D26, D24

0x46ca04 FMINNM	D2, D26, D30

0x46ca08 FMADD	D3, D3, D3, D22

0x46ca0c FMINNM	D23, D3, D2

0x46ca10 FCMPE	D26, D30

0x46ca14 LDR	D30, [X3, #56]    [6]

0x46ca18 CSEL	W1, W1, W18, #10

0x46ca1c FCMPE	D3, D2

0x46ca20 CSEL	W1, W1, W17, #10

0x46ca24 FADD	D20, D0, D30

0x46ca28 FMADD	D4, D20, D20, D28

0x46ca2c FMINNM	D25, D4, D23

0x46ca30 FSQRT	D29, D25

0x46ca34 FCMPE	D4, D23

0x46ca38 CSEL	W1, W1, W16, #10

0x46ca3c ADD	X1, X11, W1,SXTW #3

0x46ca40 LDR	D27, [X1, #384]    [3]

0x46ca44 STR	D29, [X8, X2,LSL #3]    [1]

0x46ca48 FADD	D1, D1, D27

0x46ca4c FMUL	D8, D1, D19

0x46ca50 STR	D8, [X10, X2,LSL #3]    [12]

0x46ca54 LDR	D31, [X1, #448]    [3]

0x46ca58 FADD	D21, D21, D31

0x46ca5c FMUL	D9, D21, D19

0x46ca60 STR	D9, [X9, X2,LSL #3]    [5]

0x46ca64 LDR	D11, [X1, #512]    [3]

0x46ca68 FADD	D0, D0, D11

0x46ca6c FMUL	D19, D0, D19

0x46ca70 STR	D19, [X6, X2,LSL #3]    [11]

0x46ca74 ADD	X2, X2, #1

0x46ca78 CMP	W12, W2

0x46ca7c B.GT	46c840

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds.h: 188 - 217

--------------------------------------------------------------------------------

188:       const T flip    = iat < flip_ind ? one : minusone;

189:       const T displ_0 = (px[iat] - x0) * flip;

190:       const T displ_1 = (py[iat] - y0) * flip;

191:       const T displ_2 = (pz[iat] - z0) * flip;

192:

193:       const T ar_0 = -std::floor(displ_0 * g00 + displ_1 * g10 + displ_2 * g20);

194:       const T ar_1 = -std::floor(displ_0 * g01 + displ_1 * g11 + displ_2 * g21);

195:       const T ar_2 = -std::floor(displ_0 * g02 + displ_1 * g12 + displ_2 * g22);

196:

197:       const T delx = displ_0 + ar_0 * r00 + ar_1 * r10 + ar_2 * r20;

198:       const T dely = displ_1 + ar_0 * r01 + ar_1 * r11 + ar_2 * r21;

199:       const T delz = displ_2 + ar_0 * r02 + ar_1 * r12 + ar_2 * r22;

200:

201:       T rmin = delx * delx + dely * dely + delz * delz;

202:       int ic = 0;

203: #pragma unroll(7)

204:       for (int c = 1; c < 8; ++c)

205:       {

206:         const T x  = delx + cellx[c];

207:         const T y  = dely + celly[c];

208:         const T z  = delz + cellz[c];

209:         const T r2 = x * x + y * y + z * z;

210:         ic         = (r2 < rmin) ? c : ic;

211:         rmin       = (r2 < rmin) ? r2 : rmin;

212:       }

213:

214:       temp_r[iat] = std::sqrt(rmin);

215:       dx[iat]     = flip * (delx + cellx[ic]);

216:       dy[iat]     = flip * (dely + celly[ic]);

217:       dz[iat]     = flip * (delz + cellz[ic]);

Coverage (%)	Name	Source Location	Module
►100.00+	qmcplusplus::ParticleSet::upda[...]	ParticleSet.cpp:250	exec
○	main._omp_fn.0	miniqmc.cpp:390	exec
○	GOMP_parallel		libomp.so
○	main	stl_vector.h:1043	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Metric	Value
CQA speedup if no scalar integer	2.16
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	6.18
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.40
Bottlenecks	P6, P7, P8, P9,
Function	qmcplusplus::DistanceTableAA::evaluate(qmcplusplus::ParticleSet&)
Source	ParticleBConds.h:188-217
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	25.25
CQA cycles if no scalar integer	11.67
CQA cycles if FP arith vectorized	25.25
CQA cycles if fully vectorized	4.08
Front-end cycles	18.00
DIV/SQRT cycles	0.50
P0 cycles	0.50
P1 cycles	2.75
P2 cycles	2.75
P3 cycles	2.75
P4 cycles	2.75
P5 cycles	25.25
P6 cycles	25.25
P7 cycles	25.25
P8 cycles	25.25
P9 cycles	11.67
P10 cycles	11.67
P11 cycles	11.67
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	1.00 - 0.50
Inter-iter dependencies cycles	0
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	144.00
Nb uops	144.00
Nb loads	NA
Nb stores	4.00
Nb stack references	0.00
FLOP/cycle	4.12
Nb FLOP add-sub	30.00
Nb FLOP mul	17.00
Nb FLOP fma	28.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	1.00
Nb FLOP rsqrt	0.00
Bytes/cycle	15.52
Bytes prefetched	0.00
Bytes loaded	360.00
Bytes stored	32.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	38.89
Vectorization ratio load	45.16
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	34.38
Vector-efficiency ratio load	36.29
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Metric	Value
CQA speedup if no scalar integer	2.16
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	6.18
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.40
Bottlenecks	P6, P7, P8, P9,
Function	qmcplusplus::DistanceTableAA::evaluate(qmcplusplus::ParticleSet&)
Source	ParticleBConds.h:188-217
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	25.25
CQA cycles if no scalar integer	11.67
CQA cycles if FP arith vectorized	25.25
CQA cycles if fully vectorized	4.08
Front-end cycles	18.00
DIV/SQRT cycles	0.50
P0 cycles	0.50
P1 cycles	2.75
P2 cycles	2.75
P3 cycles	2.75
P4 cycles	2.75
P5 cycles	25.25
P6 cycles	25.25
P7 cycles	25.25
P8 cycles	25.25
P9 cycles	11.67
P10 cycles	11.67
P11 cycles	11.67
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	1.00 - 0.50
Inter-iter dependencies cycles	0
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	144.00
Nb uops	144.00
Nb loads	NA
Nb stores	4.00
Nb stack references	0.00
FLOP/cycle	4.12
Nb FLOP add-sub	30.00
Nb FLOP mul	17.00
Nb FLOP fma	28.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	1.00
Nb FLOP rsqrt	0.00
Bytes/cycle	15.52
Bytes prefetched	0.00
Bytes loaded	360.00
Bytes stored	32.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	38.89
Vectorization ratio load	45.16
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	34.38
Vector-efficiency ratio load	36.29
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	qmcplusplus::DistanceTableAA::evaluate(qmcplusplus::ParticleSet&)
Source file and lines	ParticleBConds.h:188-217
Module	exec

The loop is defined in /home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds.h:188-217.

The related source loop is not unrolled or unrolled with no peel/tail loop.

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.25 to 11.67 cycles (2.16x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is poorly vectorized. Only 34% of vector register length is used (average across all VPU instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 25.25 to 4.08 cycles (6.18x speedup).

Details

38% of VPU instructions are used in vector version (process two or more data elements in vector registers):

45% of VPU loads are used in vector version.
0% of VPU stores are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization (including FP reductions).
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

FMA

Detected 28 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 104 FP arithmetical operations:

58: addition or subtraction (28 inside FMA instructions)
45: multiply (28 inside FMA instructions)
1: square root

The binary loop is loading 360 bytes. The binary loop is storing 32 bytes.

Arithmetic intensity

Arithmetic intensity is 0.27 FP operations per loaded or stored byte.

General properties

nb instructions	144
loop length	576
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

18.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	0.50	0.50	2.75	2.75	2.75	2.75	25.25	25.25	25.25	25.25	11.67	11.67	11.67	0.00	0.00
cycles	0.50	0.50	2.75	2.75	2.75	2.75	25.25	25.25	25.25	25.25	11.67	11.67	11.67	0.00	0.00

Cycles executing div or sqrt instructions	1.00-0.50
Longest recurrence chain latency (RecMII)	0.00

Cycles summary

Front-end	18.00
Data deps.	0.00
Overall L1	25.25

Vectorization ratios

all	38%
load	45%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 25.25 cycles. At this rate:

14% of peak load performance is reached (14.26 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.27 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 46c840

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	Latency	Recip. throughput
LDR D21, [X14, X2,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
CMP W7, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.33
LDR D20, [X15, X2,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FCSEL D19, D17, D16, #12	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	2	0.50
LDR D0, [X13, X2,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FSUB D1, D21, S6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D27, D8, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FSUB D2, D20, S7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D26, D11, [X0, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FSUB D3, D0, S5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D9, D4, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D22, D1, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDP D10, D23, [X0, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D24, D2, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D28, [X0, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D25, D3, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D29, D22, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D30, D22, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMADD D31, D24, D11, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D21, D24, D9, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D9, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D20, D25, D8, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDP D8, D11, [X0, #120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FRINTM D0, D20	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	3	0.50
FNMUL D2, D0, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FNMUL D1, D0, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDP D27, D28, [X0, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D3, D25, D26, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FRINTM D4, D3	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	3	0.50
LDR D21, [X0, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D26, D4, D10, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FNMUL D10, D0, D11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D2, [X0, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D23, D4, D9, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMUL D29, D22, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D20, [X0, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDP D9, D11, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D30, D4, D8, D10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D4, [X0, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D31, D24, D27, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDP D10, D8, [X4, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D22, D22, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D26, D28, [X3, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D24, D24, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D0, D25, D21, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FRINTM D3, D0	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	3	0.50
LDR D27, [X3, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D25, D25, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMSUB D21, D3, D2, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMSUB D1, D3, D20, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMSUB D0, D3, D4, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FADD D31, D21, D11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D30, D21, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D22, D21, D10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D24, D21, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D9, D21, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FADD D23, D0, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D4, D0, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D26, D28, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D29, D0, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D3, D31, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDP D27, D8, [X5, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D20, D30, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D2, D22, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D25, D24, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMADD D24, D1, D1, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FADD D31, D1, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D11, D1, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D10, D1, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D30, D1, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D26, D0, D0, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D22, D31, D31, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDP D8, D31, [X3, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D3, D11, D11, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D2, D10, D10, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D28, D30, D30, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D9, [X3, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D11, D0, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D23, D23, D23, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDP D24, D22, [X4, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D4, D4, D4, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D29, D29, D29, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D20, D26, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMINNM D25, D4, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMINNM D27, D29, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D3, D0, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDR D2, [X4, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D10, D11, D11, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D30, D10, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D28, D21, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D26, D23	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSINC W1, WZR, WZR, #13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FADD D26, D0, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D4, D20	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W1, W1, W20, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FADD D23, D21, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D29, D25	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W1, W1, W19, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FMUL D4, D28, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D31, [X5, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D20, D21, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D10, D27	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
LDP D27, D8, [X5, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
CSEL W1, W1, W30, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FMUL D25, D23, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FADD D10, D1, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D29, D20, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FADD D9, D1, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D11, D1, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D28, D10, D10, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D24, D9, D9, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D22, D11, D11, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D26, D26, D26, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D2, D26, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D3, D3, D3, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D23, D3, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D26, D30	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
LDR D30, [X3, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
CSEL W1, W1, W18, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FCMPE D3, D2	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W1, W1, W17, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FADD D20, D0, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D4, D20, D20, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D25, D4, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FSQRT D29, D25	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	7-16	1-0.50
FCMPE D4, D23	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W1, W1, W16, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X1, X11, W1,SXTW #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
LDR D27, [X1, #384]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
STR D29, [X8, X2,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
FADD D1, D1, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D8, D1, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
STR D8, [X10, X2,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
LDR D31, [X1, #448]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D21, D21, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D9, D21, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
STR D9, [X9, X2,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
LDR D11, [X1, #512]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D0, D0, D11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D19, D0, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
STR D19, [X6, X2,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
ADD X2, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
CMP W12, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.33
B.GT 46c840 <_ZN11qmcplusplus15DistanceTableAAIdLj3ELi39EE8evaluateERNS_11ParticleSetE+0xc0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Function	qmcplusplus::DistanceTableAA::evaluate(qmcplusplus::ParticleSet&)
Source file and lines	ParticleBConds.h:188-217
Module	exec

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

38% of VPU instructions are used in vector version (process two or more data elements in vector registers):

45% of VPU loads are used in vector version.
0% of VPU stores are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization (including FP reductions).
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

FMA

Detected 28 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 104 FP arithmetical operations:

58: addition or subtraction (28 inside FMA instructions)
45: multiply (28 inside FMA instructions)
1: square root

The binary loop is loading 360 bytes. The binary loop is storing 32 bytes.

Arithmetic intensity

Arithmetic intensity is 0.27 FP operations per loaded or stored byte.

General properties

nb instructions	144
loop length	576
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

18.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	0.50	0.50	2.75	2.75	2.75	2.75	25.25	25.25	25.25	25.25	11.67	11.67	11.67	0.00	0.00
cycles	0.50	0.50	2.75	2.75	2.75	2.75	25.25	25.25	25.25	25.25	11.67	11.67	11.67	0.00	0.00

Cycles executing div or sqrt instructions	1.00-0.50
Longest recurrence chain latency (RecMII)	0.00

Cycles summary

Front-end	18.00
Data deps.	0.00
Overall L1	25.25

Vectorization ratios

all	38%
load	45%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 25.25 cycles. At this rate:

14% of peak load performance is reached (14.26 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.27 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 46c840

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	Latency	Recip. throughput
LDR D21, [X14, X2,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
CMP W7, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.33
LDR D20, [X15, X2,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FCSEL D19, D17, D16, #12	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	2	0.50
LDR D0, [X13, X2,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FSUB D1, D21, S6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D27, D8, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FSUB D2, D20, S7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D26, D11, [X0, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FSUB D3, D0, S5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D9, D4, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D22, D1, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDP D10, D23, [X0, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D24, D2, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D28, [X0, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D25, D3, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D29, D22, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D30, D22, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMADD D31, D24, D11, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D21, D24, D9, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D9, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D20, D25, D8, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDP D8, D11, [X0, #120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FRINTM D0, D20	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	3	0.50
FNMUL D2, D0, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FNMUL D1, D0, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDP D27, D28, [X0, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D3, D25, D26, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FRINTM D4, D3	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	3	0.50
LDR D21, [X0, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D26, D4, D10, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FNMUL D10, D0, D11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D2, [X0, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D23, D4, D9, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMUL D29, D22, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D20, [X0, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDP D9, D11, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D30, D4, D8, D10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D4, [X0, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D31, D24, D27, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDP D10, D8, [X4, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D22, D22, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D26, D28, [X3, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D24, D24, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D0, D25, D21, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FRINTM D3, D0	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	3	0.50
LDR D27, [X3, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D25, D25, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMSUB D21, D3, D2, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMSUB D1, D3, D20, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMSUB D0, D3, D4, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FADD D31, D21, D11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D30, D21, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D22, D21, D10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D24, D21, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D9, D21, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FADD D23, D0, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D4, D0, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D26, D28, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D29, D0, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D3, D31, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDP D27, D8, [X5, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D20, D30, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D2, D22, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D25, D24, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMADD D24, D1, D1, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FADD D31, D1, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D11, D1, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D10, D1, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D30, D1, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D26, D0, D0, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D22, D31, D31, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDP D8, D31, [X3, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D3, D11, D11, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D2, D10, D10, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D28, D30, D30, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D9, [X3, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D11, D0, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D23, D23, D23, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDP D24, D22, [X4, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D4, D4, D4, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D29, D29, D29, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D20, D26, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMINNM D25, D4, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMINNM D27, D29, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D3, D0, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDR D2, [X4, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D10, D11, D11, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D30, D10, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D28, D21, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D26, D23	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSINC W1, WZR, WZR, #13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FADD D26, D0, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D4, D20	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W1, W1, W20, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FADD D23, D21, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D29, D25	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W1, W1, W19, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FMUL D4, D28, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D31, [X5, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D20, D21, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D10, D27	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
LDP D27, D8, [X5, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
CSEL W1, W1, W30, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FMUL D25, D23, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FADD D10, D1, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D29, D20, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FADD D9, D1, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D11, D1, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D28, D10, D10, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D24, D9, D9, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D22, D11, D11, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D26, D26, D26, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D2, D26, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D3, D3, D3, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D23, D3, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D26, D30	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
LDR D30, [X3, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
CSEL W1, W1, W18, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FCMPE D3, D2	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W1, W1, W17, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FADD D20, D0, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D4, D20, D20, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D25, D4, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FSQRT D29, D25	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	7-16	1-0.50
FCMPE D4, D23	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W1, W1, W16, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X1, X11, W1,SXTW #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
LDR D27, [X1, #384]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
STR D29, [X8, X2,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
FADD D1, D1, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D8, D1, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
STR D8, [X10, X2,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
LDR D31, [X1, #448]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D21, D21, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D9, D21, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
STR D9, [X9, X2,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
LDR D11, [X1, #512]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D0, D0, D11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D19, D0, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
STR D19, [X6, X2,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
ADD X2, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
CMP W12, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.33
B.GT 46c840 <_ZN11qmcplusplus15DistanceTableAAIdLj3ELi39EE8evaluateERNS_11ParticleSetE+0xc0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

FMA

Workaround

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

FMA

Workaround

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code