OV - exec - Loop 1205

	Loop Id: 1205	Module: exec	Source: ParticleBConds.h:188-217	Coverage: 6.28%

0x46c3c0 LDR	D20, [X12, X4,LSL #3]    [1]

0x46c3c4 CMP	W2, W4

0x46c3c8 LDR	D5, [X11, X4,LSL #3]    [12]

0x46c3cc FCSEL	D19, D18, D17, #13

0x46c3d0 LDR	D0, [X8, X4,LSL #3]    [10]

0x46c3d4 FSUB	D1, D20, S7

0x46c3d8 LDP	D28, D8, [X1, #32]    [4]

0x46c3dc FSUB	D2, D5, S6

0x46c3e0 LDP	D9, D4, [X1]    [4]

0x46c3e4 FSUB	D3, D0, S16

0x46c3e8 LDP	D27, D21, [X1, #16]    [4]

0x46c3ec FMUL	D24, D1, D19

0x46c3f0 LDP	D10, D22, [X1, #96]    [4]

0x46c3f4 FMUL	D25, D2, D19

0x46c3f8 LDR	D29, [X1, #80]    [4]

0x46c3fc FMUL	D26, D3, D19

0x46c400 LDR	D23, [X1, #64]    [4]

0x46c404 FMUL	D30, D24, D28

0x46c408 FMUL	D31, D24, D4

0x46c40c LDR	D28, [X1, #56]    [4]

0x46c410 FMADD	D20, D25, D21, D30

0x46c414 FMADD	D5, D25, D9, D31

0x46c418 LDR	D21, [X1, #128]    [4]

0x46c41c FMUL	D31, D24, D28

0x46c420 FMADD	D0, D26, D8, D20

0x46c424 FRINTM	D2, D0

0x46c428 FNMUL	D3, D2, D22

0x46c42c FMADD	D9, D26, D27, D5

0x46c430 FRINTM	D4, D9

0x46c434 FNMUL	D22, D2, D21

0x46c438 LDR	D20, [X1, #48]    [4]

0x46c43c FNMUL	D1, D2, D29

0x46c440 LDR	D29, [X1, #72]    [4]

0x46c444 FMSUB	D27, D4, D10, D3

0x46c448 LDP	D10, D8, [X1, #112]    [4]

0x46c44c FMADD	D3, D25, D20, D31

0x46c450 LDR	D9, [X1, #136]    [4]

0x46c454 FMSUB	D30, D4, D29, D1

0x46c458 LDR	D2, [X1, #88]    [4]

0x46c45c FMSUB	D0, D4, D8, D22

0x46c460 FMADD	D23, D26, D23, D3

0x46c464 FRINTM	D5, D23

0x46c468 FADD	D24, D24, D27

0x46c46c FADD	D25, D25, D30

0x46c470 LDP	D21, D30, [X6, #8]    [3]

0x46c474 FMSUB	D20, D5, D10, D24

0x46c478 FADD	D26, D26, D0

0x46c47c LDP	D29, D10, [X5, #8]    [7]

0x46c480 LDP	D24, D8, [X6, #24]    [3]

0x46c484 FMSUB	D1, D5, D2, D25

0x46c488 FMSUB	D0, D5, D9, D26

0x46c48c FADD	D25, D20, D21

0x46c490 FMUL	D4, D20, D20

0x46c494 FADD	D3, D20, D30

0x46c498 FADD	D2, D20, D24

0x46c49c FADD	D23, D20, D8

0x46c4a0 LDP	D8, D30, [X7, #24]    [8]

0x46c4a4 FMUL	D5, D25, D25

0x46c4a8 FMADD	D27, D1, D1, D4

0x46c4ac LDR	D4, [X5, #24]    [7]

0x46c4b0 FADD	D22, D0, D10

0x46c4b4 FADD	D31, D0, D29

0x46c4b8 LDP	D10, D21, [X7, #8]    [8]

0x46c4bc FMUL	D26, D3, D3

0x46c4c0 FMUL	D9, D2, D2

0x46c4c4 FADD	D3, D1, D8

0x46c4c8 FADD	D2, D1, D30

0x46c4cc FMADD	D28, D0, D0, D27

0x46c4d0 FMUL	D27, D23, D23

0x46c4d4 FADD	D29, D0, D4

0x46c4d8 FADD	D25, D1, D10

0x46c4dc FADD	D24, D1, D21

0x46c4e0 FMADD	D23, D25, D25, D5

0x46c4e4 FMADD	D5, D24, D24, D26

0x46c4e8 FMADD	D26, D3, D3, D9

0x46c4ec FMADD	D9, D2, D2, D27

0x46c4f0 FMADD	D27, D31, D31, D23

0x46c4f4 FMINNM	D4, D28, D27

0x46c4f8 FMADD	D22, D22, D22, D5

0x46c4fc FMINNM	D31, D22, D4

0x46c500 FMADD	D10, D29, D29, D26

0x46c504 FMINNM	D29, D10, D31

0x46c508 FCMPE	D28, D27

0x46c50c LDP	D28, D21, [X5, #32]    [7]

0x46c510 CSINC	W3, WZR, WZR, #13

0x46c514 FCMPE	D22, D4

0x46c518 CSEL	W3, W3, W20, #10

0x46c51c LDR	D8, [X5, #48]    [7]

0x46c520 FCMPE	D10, D31

0x46c524 CSEL	W3, W3, W19, #10

0x46c528 LDP	D24, D2, [X6, #40]    [3]

0x46c52c FADD	D30, D0, D28

0x46c530 FADD	D5, D0, D21

0x46c534 LDR	D26, [X6, #56]    [3]

0x46c538 FADD	D3, D0, D8

0x46c53c LDP	D21, D8, [X7, #40]    [8]

0x46c540 FADD	D4, D20, D2

0x46c544 FMADD	D25, D30, D30, D9

0x46c548 FADD	D9, D20, D24

0x46c54c FMINNM	D23, D25, D29

0x46c550 FADD	D27, D20, D26

0x46c554 FADD	D30, D1, D21

0x46c558 FMUL	D10, D4, D4

0x46c55c FMUL	D22, D9, D9

0x46c560 FMUL	D31, D27, D27

0x46c564 FCMPE	D25, D29

0x46c568 CSEL	W3, W3, W30, #10

0x46c56c FADD	D25, D1, D8

0x46c570 FMADD	D24, D30, D30, D22

0x46c574 LDR	D29, [X5, #56]    [7]

0x46c578 FMADD	D5, D5, D5, D24

0x46c57c FMINNM	D26, D5, D23

0x46c580 FMADD	D2, D25, D25, D10

0x46c584 FADD	D28, D0, D29

0x46c588 FMADD	D3, D3, D3, D2

0x46c58c FMINNM	D9, D3, D26

0x46c590 FCMPE	D5, D23

0x46c594 LDR	D23, [X7, #56]    [8]

0x46c598 CSEL	W3, W3, W18, #10

0x46c59c FCMPE	D3, D26

0x46c5a0 CSEL	W3, W3, W17, #10

0x46c5a4 FADD	D4, D1, D23

0x46c5a8 FMADD	D27, D4, D4, D31

0x46c5ac FMADD	D22, D28, D28, D27

0x46c5b0 FMINNM	D10, D22, D9

0x46c5b4 FSQRT	D31, D10

0x46c5b8 FCMPE	D22, D9

0x46c5bc CSEL	W3, W3, W16, #10

0x46c5c0 ADD	X3, X0, W3,SXTW #3

0x46c5c4 LDR	D29, [X3, #384]    [6]

0x46c5c8 STR	D31, [X15, X4,LSL #3]    [11]

0x46c5cc FADD	D1, D1, D29

0x46c5d0 FMUL	D28, D1, D19

0x46c5d4 STR	D28, [X13, X4,LSL #3]    [2]

0x46c5d8 LDR	D21, [X3, #448]    [6]

0x46c5dc FADD	D20, D20, D21

0x46c5e0 FMUL	D8, D20, D19

0x46c5e4 STR	D8, [X14, X4,LSL #3]    [9]

0x46c5e8 LDR	D30, [X3, #512]    [6]

0x46c5ec FADD	D0, D0, D30

0x46c5f0 FMUL	D19, D0, D19

0x46c5f4 STR	D19, [X9, X4,LSL #3]    [5]

0x46c5f8 ADD	X4, X4, #1

0x46c5fc CMP	W10, W4

0x46c600 B.GT	46c3c0

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds.h: 188 - 217

--------------------------------------------------------------------------------

188:       const T flip    = iat < flip_ind ? one : minusone;

189:       const T displ_0 = (px[iat] - x0) * flip;

190:       const T displ_1 = (py[iat] - y0) * flip;

191:       const T displ_2 = (pz[iat] - z0) * flip;

192:

193:       const T ar_0 = -std::floor(displ_0 * g00 + displ_1 * g10 + displ_2 * g20);

194:       const T ar_1 = -std::floor(displ_0 * g01 + displ_1 * g11 + displ_2 * g21);

195:       const T ar_2 = -std::floor(displ_0 * g02 + displ_1 * g12 + displ_2 * g22);

196:

197:       const T delx = displ_0 + ar_0 * r00 + ar_1 * r10 + ar_2 * r20;

198:       const T dely = displ_1 + ar_0 * r01 + ar_1 * r11 + ar_2 * r21;

199:       const T delz = displ_2 + ar_0 * r02 + ar_1 * r12 + ar_2 * r22;

200:

201:       T rmin = delx * delx + dely * dely + delz * delz;

202:       int ic = 0;

203: #pragma unroll(7)

204:       for (int c = 1; c < 8; ++c)

205:       {

206:         const T x  = delx + cellx[c];

207:         const T y  = dely + celly[c];

208:         const T z  = delz + cellz[c];

209:         const T r2 = x * x + y * y + z * z;

210:         ic         = (r2 < rmin) ? c : ic;

211:         rmin       = (r2 < rmin) ? r2 : rmin;

212:       }

213:

214:       temp_r[iat] = std::sqrt(rmin);

215:       dx[iat]     = flip * (delx + cellx[ic]);

216:       dy[iat]     = flip * (dely + celly[ic]);

217:       dz[iat]     = flip * (delz + cellz[ic]);

Coverage (%)	Name	Source Location	Module
►40.08+	qmcplusplus::ParticleSet::setA[...]	stl_vector.h:919	exec
○	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►20.99+	qmcplusplus::ParticleSet::setA[...]	stl_vector.h:919	exec
○	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►19.85+	qmcplusplus::ParticleSet::setA[...]	stl_vector.h:919	exec
○	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►19.09+	qmcplusplus::ParticleSet::setA[...]	stl_vector.h:919	exec
○	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Metric	Value
CQA speedup if no scalar integer	2.10
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	6.18
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.39
Bottlenecks	P6, P7, P8, P9,
Function	qmcplusplus::DistanceTableAA::evaluate(qmcplusplus::ParticleSet&, int)
Source	ParticleBConds.h:188-217
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	25.25
CQA cycles if no scalar integer	12.00
CQA cycles if FP arith vectorized	25.25
CQA cycles if fully vectorized	4.08
Front-end cycles	18.13
DIV/SQRT cycles	0.50
P0 cycles	0.50
P1 cycles	2.75
P2 cycles	2.75
P3 cycles	2.75
P4 cycles	2.75
P5 cycles	25.25
P6 cycles	25.25
P7 cycles	25.25
P8 cycles	25.25
P9 cycles	12.00
P10 cycles	12.00
P11 cycles	12.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	1.00 - 0.50
Inter-iter dependencies cycles	0
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	145.00
Nb uops	145.00
Nb loads	NA
Nb stores	4.00
Nb stack references	0.00
FLOP/cycle	4.12
Nb FLOP add-sub	30.00
Nb FLOP mul	17.00
Nb FLOP fma	28.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	1.00
Nb FLOP rsqrt	0.00
Bytes/cycle	15.52
Bytes prefetched	0.00
Bytes loaded	360.00
Bytes stored	32.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	35.14
Vectorization ratio load	40.63
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	33.45
Vector-efficiency ratio load	35.16
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Metric	Value
CQA speedup if no scalar integer	2.10
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	6.18
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.39
Bottlenecks	P6, P7, P8, P9,
Function	qmcplusplus::DistanceTableAA::evaluate(qmcplusplus::ParticleSet&, int)
Source	ParticleBConds.h:188-217
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	25.25
CQA cycles if no scalar integer	12.00
CQA cycles if FP arith vectorized	25.25
CQA cycles if fully vectorized	4.08
Front-end cycles	18.13
DIV/SQRT cycles	0.50
P0 cycles	0.50
P1 cycles	2.75
P2 cycles	2.75
P3 cycles	2.75
P4 cycles	2.75
P5 cycles	25.25
P6 cycles	25.25
P7 cycles	25.25
P8 cycles	25.25
P9 cycles	12.00
P10 cycles	12.00
P11 cycles	12.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	1.00 - 0.50
Inter-iter dependencies cycles	0
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	145.00
Nb uops	145.00
Nb loads	NA
Nb stores	4.00
Nb stack references	0.00
FLOP/cycle	4.12
Nb FLOP add-sub	30.00
Nb FLOP mul	17.00
Nb FLOP fma	28.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	1.00
Nb FLOP rsqrt	0.00
Bytes/cycle	15.52
Bytes prefetched	0.00
Bytes loaded	360.00
Bytes stored	32.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	35.14
Vectorization ratio load	40.63
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	33.45
Vector-efficiency ratio load	35.16
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	qmcplusplus::DistanceTableAA::evaluate(qmcplusplus::ParticleSet&, int)
Source file and lines	ParticleBConds.h:188-217
Module	exec

The loop is defined in /home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds.h:188-217.

The related source loop is not unrolled or unrolled with no peel/tail loop.

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.25 to 12.00 cycles (2.10x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is poorly vectorized. Only 33% of vector register length is used (average across all VPU instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 25.25 to 4.08 cycles (6.18x speedup).

Details

35% of VPU instructions are used in vector version (process two or more data elements in vector registers):

40% of VPU loads are used in vector version.
0% of VPU stores are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization (including FP reductions).
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

FMA

Detected 28 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 104 FP arithmetical operations:

58: addition or subtraction (28 inside FMA instructions)
45: multiply (28 inside FMA instructions)
1: square root

The binary loop is loading 360 bytes. The binary loop is storing 32 bytes.

Arithmetic intensity

Arithmetic intensity is 0.27 FP operations per loaded or stored byte.

General properties

nb instructions	145
loop length	580
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

18.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	0.50	0.50	2.75	2.75	2.75	2.75	25.25	25.25	25.25	25.25	12.00	12.00	12.00	0.00	0.00
cycles	0.50	0.50	2.75	2.75	2.75	2.75	25.25	25.25	25.25	25.25	12.00	12.00	12.00	0.00	0.00

Cycles executing div or sqrt instructions	1.00-0.50
Longest recurrence chain latency (RecMII)	0.00

Cycles summary

Front-end	18.13
Data deps.	0.00
Overall L1	25.25

Vectorization ratios

all	35%
load	40%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 25.25 cycles. At this rate:

14% of peak load performance is reached (14.26 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.27 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 46c3c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	Latency	Recip. throughput
LDR D20, [X12, X4,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
CMP W2, W4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.33
LDR D5, [X11, X4,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FCSEL D19, D18, D17, #13	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	2	0.50
LDR D0, [X8, X4,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FSUB D1, D20, S7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D28, D8, [X1, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FSUB D2, D5, S6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D9, D4, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FSUB D3, D0, S16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D27, D21, [X1, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D24, D1, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDP D10, D22, [X1, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D25, D2, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D29, [X1, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D26, D3, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D23, [X1, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D30, D24, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D31, D24, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D28, [X1, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D20, D25, D21, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D5, D25, D9, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D21, [X1, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D31, D24, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMADD D0, D26, D8, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FRINTM D2, D0	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	3	0.50
FNMUL D3, D2, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMADD D9, D26, D27, D5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FRINTM D4, D9	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	3	0.50
FNMUL D22, D2, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D20, [X1, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FNMUL D1, D2, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D29, [X1, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D27, D4, D10, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDP D10, D8, [X1, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D3, D25, D20, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D9, [X1, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D30, D4, D29, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D2, [X1, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D0, D4, D8, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D23, D26, D23, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FRINTM D5, D23	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	3	0.50
FADD D24, D24, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D25, D25, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D21, D30, [X6, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D20, D5, D10, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FADD D26, D26, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D29, D10, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDP D24, D8, [X6, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D1, D5, D2, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMSUB D0, D5, D9, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FADD D25, D20, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D4, D20, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FADD D3, D20, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D2, D20, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D23, D20, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D8, D30, [X7, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D5, D25, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMADD D27, D1, D1, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D4, [X5, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D22, D0, D10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D31, D0, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D10, D21, [X7, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D26, D3, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D9, D2, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FADD D3, D1, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D2, D1, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D28, D0, D0, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMUL D27, D23, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FADD D29, D0, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D25, D1, D10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D24, D1, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D23, D25, D25, D5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D5, D24, D24, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D26, D3, D3, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D9, D2, D2, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D27, D31, D31, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D4, D28, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D22, D22, D22, D5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D31, D22, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D10, D29, D29, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D29, D10, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D28, D27	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
LDP D28, D21, [X5, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
CSINC W3, WZR, WZR, #13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FCMPE D22, D4	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W3, W3, W20, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
LDR D8, [X5, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FCMPE D10, D31	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W3, W3, W19, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
LDP D24, D2, [X6, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D30, D0, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D5, D0, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDR D26, [X6, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D3, D0, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D21, D8, [X7, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D4, D20, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D25, D30, D30, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FADD D9, D20, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMINNM D23, D25, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D27, D20, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D30, D1, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D10, D4, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D22, D9, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D31, D27, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FCMPE D25, D29	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W3, W3, W30, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FADD D25, D1, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D24, D30, D30, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D29, [X5, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D5, D5, D5, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D26, D5, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D2, D25, D25, D10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FADD D28, D0, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D3, D3, D3, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D9, D3, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D5, D23	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
LDR D23, [X7, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
CSEL W3, W3, W18, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FCMPE D3, D26	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W3, W3, W17, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FADD D4, D1, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D27, D4, D4, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D22, D28, D28, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D10, D22, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FSQRT D31, D10	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	7-16	1-0.50
FCMPE D22, D9	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W3, W3, W16, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X3, X0, W3,SXTW #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
LDR D29, [X3, #384]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
STR D31, [X15, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
FADD D1, D1, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D28, D1, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
STR D28, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
LDR D21, [X3, #448]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D20, D20, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D8, D20, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
STR D8, [X14, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
LDR D30, [X3, #512]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D0, D0, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D19, D0, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
STR D19, [X9, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
CMP W10, W4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.33
B.GT 46c3c0 <_ZN11qmcplusplus15DistanceTableAAIdLj3ELi39EE8evaluateERNS_11ParticleSetEi+0xc0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Function	qmcplusplus::DistanceTableAA::evaluate(qmcplusplus::ParticleSet&, int)
Source file and lines	ParticleBConds.h:188-217
Module	exec

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

35% of VPU instructions are used in vector version (process two or more data elements in vector registers):

40% of VPU loads are used in vector version.
0% of VPU stores are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization (including FP reductions).
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

FMA

Detected 28 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 104 FP arithmetical operations:

58: addition or subtraction (28 inside FMA instructions)
45: multiply (28 inside FMA instructions)
1: square root

The binary loop is loading 360 bytes. The binary loop is storing 32 bytes.

Arithmetic intensity

Arithmetic intensity is 0.27 FP operations per loaded or stored byte.

General properties

nb instructions	145
loop length	580
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

18.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	0.50	0.50	2.75	2.75	2.75	2.75	25.25	25.25	25.25	25.25	12.00	12.00	12.00	0.00	0.00
cycles	0.50	0.50	2.75	2.75	2.75	2.75	25.25	25.25	25.25	25.25	12.00	12.00	12.00	0.00	0.00

Cycles executing div or sqrt instructions	1.00-0.50
Longest recurrence chain latency (RecMII)	0.00

Cycles summary

Front-end	18.13
Data deps.	0.00
Overall L1	25.25

Vectorization ratios

all	35%
load	40%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 25.25 cycles. At this rate:

14% of peak load performance is reached (14.26 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.27 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 46c3c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	Latency	Recip. throughput
LDR D20, [X12, X4,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
CMP W2, W4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.33
LDR D5, [X11, X4,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FCSEL D19, D18, D17, #13	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	2	0.50
LDR D0, [X8, X4,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FSUB D1, D20, S7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D28, D8, [X1, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FSUB D2, D5, S6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D9, D4, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FSUB D3, D0, S16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D27, D21, [X1, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D24, D1, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDP D10, D22, [X1, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D25, D2, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D29, [X1, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D26, D3, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D23, [X1, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D30, D24, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D31, D24, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D28, [X1, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D20, D25, D21, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D5, D25, D9, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D21, [X1, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D31, D24, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMADD D0, D26, D8, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FRINTM D2, D0	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	3	0.50
FNMUL D3, D2, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMADD D9, D26, D27, D5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FRINTM D4, D9	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	3	0.50
FNMUL D22, D2, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D20, [X1, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FNMUL D1, D2, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
LDR D29, [X1, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D27, D4, D10, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDP D10, D8, [X1, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D3, D25, D20, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D9, [X1, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D30, D4, D29, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D2, [X1, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D0, D4, D8, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D23, D26, D23, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FRINTM D5, D23	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	3	0.50
FADD D24, D24, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D25, D25, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D21, D30, [X6, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D20, D5, D10, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FADD D26, D26, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D29, D10, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
LDP D24, D8, [X6, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMSUB D1, D5, D2, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMSUB D0, D5, D9, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FADD D25, D20, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D4, D20, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FADD D3, D20, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D2, D20, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D23, D20, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D8, D30, [X7, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D5, D25, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMADD D27, D1, D1, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D4, [X5, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D22, D0, D10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D31, D0, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D10, D21, [X7, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMUL D26, D3, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D9, D2, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FADD D3, D1, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D2, D1, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D28, D0, D0, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMUL D27, D23, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FADD D29, D0, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D25, D1, D10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D24, D1, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D23, D25, D25, D5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D5, D24, D24, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D26, D3, D3, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D9, D2, D2, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D27, D31, D31, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D4, D28, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D22, D22, D22, D5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D31, D22, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D10, D29, D29, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D29, D10, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D28, D27	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
LDP D28, D21, [X5, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
CSINC W3, WZR, WZR, #13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FCMPE D22, D4	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W3, W3, W20, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
LDR D8, [X5, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FCMPE D10, D31	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W3, W3, W19, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
LDP D24, D2, [X6, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D30, D0, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D5, D0, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDR D26, [X6, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D3, D0, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
LDP D21, D8, [X7, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D4, D20, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D25, D30, D30, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FADD D9, D20, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMINNM D23, D25, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D27, D20, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FADD D30, D1, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D10, D4, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D22, D9, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FMUL D31, D27, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
FCMPE D25, D29	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W3, W3, W30, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FADD D25, D1, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D24, D30, D30, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
LDR D29, [X5, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FMADD D5, D5, D5, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D26, D5, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D2, D25, D25, D10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FADD D28, D0, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D3, D3, D3, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D9, D3, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FCMPE D5, D23	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
LDR D23, [X7, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
CSEL W3, W3, W18, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FCMPE D3, D26	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W3, W3, W17, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
FADD D4, D1, D23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMADD D27, D4, D4, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMADD D22, D28, D28, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	4	0.25
FMINNM D10, D22, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FSQRT D31, D10	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	7-16	1-0.50
FCMPE D22, D9	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1
CSEL W3, W3, W16, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
ADD X3, X0, W3,SXTW #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
LDR D29, [X3, #384]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
STR D31, [X15, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
FADD D1, D1, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D28, D1, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
STR D28, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
LDR D21, [X3, #448]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D20, D20, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D8, D20, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
STR D8, [X14, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
LDR D30, [X3, #512]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
FADD D0, D0, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25
FMUL D19, D0, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	3	0.25
STR D19, [X9, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.25
CMP W10, W4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	0.33
B.GT 46c3c0 <_ZN11qmcplusplus15DistanceTableAAIdLj3ELi39EE8evaluateERNS_11ParticleSetEi+0xc0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

FMA

Workaround

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

FMA

Workaround

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code