OV - exec - Function qmcplusplus::WaveFunction::evalGrad(qmcplusplus::ParticleSet&, int)

	Function: qmcplusplus::WaveFunction::evalGrad(qmcplusplus::ParticleSet&, int)	Module: exec	Source: WaveFunction.cpp:188-197 [...]	Coverage: 0.02%

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 94 - 94

--------------------------------------------------------------------------------

94:     (const_cast<T1&>(a) += b);

/usr/include/c++/11/bits/refwrap.h: 338 - 338

--------------------------------------------------------------------------------

338:       { return *_M_data; }

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/WaveFunction.cpp: 188 - 197

--------------------------------------------------------------------------------

188: {

189:   posT grad_iat = (iat < nelup ? Det_up->evalGrad(P, iat) : Det_dn->evalGrad(P, iat));

190:

191:   for (size_t i = 0; i < Jastrows.size(); i++)

192:   {

193:     ScopedTimer local_timer(jastrow_timers[i]);

194:     grad_iat += Jastrows[i]->evalGrad(P, iat);

195:   }

196:   return grad_iat;

197: }

/usr/include/c++/11/bits/stl_vector.h: 919 - 919

--------------------------------------------------------------------------------

919:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249

--------------------------------------------------------------------------------

242:   ScopeGuard(TIMER& t) : timer(t) { timer.start(); }

[...]

249:   ~ScopeGuard() { timer.stop(); }

0x40d520 STP	X29, X30, [SP, #912]!

0x40d524 ADRP	X3,

0x40d528 ADD	X29, SP, #0

0x40d52c STP	X23, X24, [SP, #48]

0x40d530 ORR	X23, XZR, X0

0x40d534 ORR	W24, WZR, W2

0x40d538 LDR	X0, [X3, #4016]

0x40d53c STP	X19, X20, [SP, #16]

0x40d540 ORR	X19, XZR, X8

0x40d544 STP	X21, X22, [SP, #32]

0x40d548 STP	X25, X26, [SP, #64]

0x40d54c LDR	X4, [X0]

0x40d550 STR	X4, [SP, #104]

0x40d554 MOVZ	X4, #0

0x40d558 ORR	X25, XZR, X1

0x40d55c LDR	W4, [X23, #52]

0x40d560 CMP	W4, W2

0x40d564 B.LE	40d648

0x40d568 LDR	X0, [X23]

0x40d56c LDR	X7, [X0]

0x40d570 LDR	X9, [X7, #24]

0x40d574 BLR	X9

(134) 0x40d578 LDR	X1, [X23, #16]

(134) 0x40d57c ADD	X21, X23, #16

(134) 0x40d580 MOVZ	X20, #0

(134) 0x40d584 ADD	X26, SP, #80

(134) 0x40d588 ADD	X23, X23, #88

(134) 0x40d58c LDR	X2, [X21, #8]

(134) 0x40d590 CMP	X1, X2

(134) 0x40d594 B.EQ	40d610

(134) 0x40d598 HINT	#0

(134) 0x40d59c HINT	#0

  (135) 0x40d5a0 LDR	X8, [X23]

  (135) 0x40d5a4 LDR	X22, [X8, X20,LSL #3]

  (135) 0x40d5a8 ORR	X0, XZR, X22

  (135) 0x40d5ac BL	479f20

  (135) 0x40d5b0 LDR	X10, [X21]

  (135) 0x40d5b4 ORR	X8, XZR, X26

  (135) 0x40d5b8 ORR	W2, WZR, W24

  (135) 0x40d5bc ORR	X1, XZR, X25

  (135) 0x40d5c0 LDR	X0, [X10, X20,LSL #3]

  (135) 0x40d5c4 LDR	X11, [X0]

  (135) 0x40d5c8 LDR	X12, [X11, #24]

  (135) 0x40d5cc BLR	X12

  (135) 0x40d5d0 LDP	D2, D1, [X19]

  (135) 0x40d5d4 ORR	X0, XZR, X22

  (135) 0x40d5d8 ADD	X20, X20, #1

  (135) 0x40d5dc LDR	D0, [X19, #16]

  (135) 0x40d5e0 LDP	D5, D4, [SP, #80]

  (135) 0x40d5e4 LDR	D3, [SP, #96]

  (135) 0x40d5e8 FADD	D6, D2, D5

  (135) 0x40d5ec FADD	D7, D1, D4

  (135) 0x40d5f0 FADD	D16, D0, D3

  (135) 0x40d5f4 STP	D6, D7, [X19]

  (135) 0x40d5f8 STR	D16, [X19, #16]

  (135) 0x40d5fc BL	47a180

  (135) 0x40d600 LDP	X13, X14, [X21]

  (135) 0x40d604 SUB	X15, X14, X13

  (135) 0x40d608 CMP	X20, X15,ASR #3

  (135) 0x40d60c B.CC	40d5a0

(134) 0x40d610 ADRP	X16,

(134) 0x40d614 LDR	X17, [X16, #4016]

(134) 0x40d618 LDR	X2, [SP, #104]

(134) 0x40d61c LDR	X1, [X17]

(134) 0x40d620 SUBS	X2, X2, X1

(134) 0x40d624 MOVZ	X1, #0

(134) 0x40d628 B.NE	40d65c

(134) 0x40d62c ORR	X0, XZR, X19

(134) 0x40d630 LDP	X19, X20, [SP, #16]

(134) 0x40d634 LDP	X21, X22, [SP, #32]

(134) 0x40d638 LDP	X23, X24, [SP, #48]

(134) 0x40d63c LDP	X25, X26, [SP, #64]

(134) 0x40d640 LDP	X29, X30, [SP], #112

(134) 0x40d644 RET

(134) 0x40d648 LDR	X0, [X23, #8]

(134) 0x40d64c LDR	X5, [X0]

(134) 0x40d650 LDR	X6, [X5, #24]

(134) 0x40d654 BLR	X6

(134) 0x40d658 B	40d578

0x40d65c BL	403d80

0x40d660 ORR	X24, XZR, X0

0x40d664 ORR	X0, XZR, X22

0x40d668 BL	47a180

0x40d66c ORR	X0, XZR, X24

0x40d670 BL	403aa0

0x40d674 HINT	#0

0x40d678 HINT	#0

0x40d67c HINT	#0

Coverage (%)	Name	Source Location	Module
►100.00+	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	WaveFunction.cpp:188-197
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:94
/usr/include/c++/11/bits/refwrap.h:338
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/WaveFunction.cpp:188-197
/usr/include/c++/11/bits/stl_vector.h:919
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 22% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 4.00 to 0.62 cycles (6.40x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 4.00 to 2.00 cycles (2.00x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 44 bytes. The binary function is storing 88 bytes.

General properties

nb instructions	31
loop length	124
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

3.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	2.50	2.50	4.00	4.00	4.00	4.00	0.00	0.00	0.00	0.00	4.00	4.00	4.00	3.00	3.00
cycles	2.50	2.50	4.00	4.00	4.00	4.00	0.00	0.00	0.00	0.00	4.00	4.00	4.00	3.00	3.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	3.50
Overall L1	4.00

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 4.00 cycles. At this rate:

11% of peak load performance is reached (11.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
45% of peak store performance is reached (22.00 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 40d520

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #912]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADRP X3, <4c1524>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X23, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W24, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X3, #4016]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X19, XZR, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X4, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X4, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X25, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W4, [X23, #52]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W4, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 40d648 <_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi+0x128>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X0, [X23]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X7, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X7, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BLR X9	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 403d80 <@plt_start@+0x700>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X24, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 47a180 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403aa0 <@plt_start@+0x420>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0

Source file and lines	WaveFunction.cpp:188-197
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:94
/usr/include/c++/11/bits/refwrap.h:338
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/WaveFunction.cpp:188-197
/usr/include/c++/11/bits/stl_vector.h:919
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 4.00 to 2.00 cycles (2.00x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 44 bytes. The binary function is storing 88 bytes.

General properties

nb instructions	31
loop length	124
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

3.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	2.50	2.50	4.00	4.00	4.00	4.00	0.00	0.00	0.00	0.00	4.00	4.00	4.00	3.00	3.00
cycles	2.50	2.50	4.00	4.00	4.00	4.00	0.00	0.00	0.00	0.00	4.00	4.00	4.00	3.00	3.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	3.50
Overall L1	4.00

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 4.00 cycles. At this rate:

11% of peak load performance is reached (11.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
45% of peak store performance is reached (22.00 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 40d520

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #912]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADRP X3, <4c1524>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X23, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W24, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X3, #4016]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X19, XZR, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X4, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X4, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X25, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W4, [X23, #52]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W4, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 40d648 <_ZN11qmcplusplus12WaveFunction8evalGradERNS_11ParticleSetEi+0x128>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X0, [X23]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X7, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X7, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BLR X9	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 403d80 <@plt_start@+0x700>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X24, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 47a180 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403aa0 <@plt_start@+0x420>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼qmcplusplus::WaveFunction::evalGrad(qmcplusplus::ParticleSet&, int)–	0.02	0.01
▼Loop 134 - WaveFunction.cpp:189-197 - exec–	0.01	0
○Loop 135 - WaveFunction.cpp:191-194 - exec	0.01	0

Report Configuration

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code