OV - exec - Function miniqmcreference::einspline_spo_ref<double>::set(int, int, int, int, int, bool)

	Function: miniqmcreference::einspline_spo_ref<double>::set(int, int, int, int, int, bool)	Module: exec	Source: einspline_spo_ref.hpp:135-167 [...]	Coverage: 0.01%

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/aligned_allocator.hpp: 46 - 46

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46:   return ((n + ND - 1) / ND) * ND;

/usr/include/c++/11/bits/stl_uninitialized.h: 687 - 1011

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687: 	  for (; __n > 0; --__n, (void) ++__cur)

[...]

1009:       ptrdiff_t __count = __last - __first;

1010:       if (__count > 0)

1011: 	__builtin_memmove(__result, __first, __count * sizeof(_Tp));

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/BsplineAllocator.hpp: 90 - 171

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90:   SplineType* restrict spline = new SplineType;

91:   spline->xBC                 = xBC;

92:   spline->yBC                 = yBC;

93:   spline->zBC                 = zBC;

94:   spline->num_splines         = num_splines;

[...]

106:   x_grid.delta     = (x_grid.end - x_grid.start) / (double)(Nx - 3);

107:   x_grid.delta_inv = 1.0 / x_grid.delta;

108:   spline->x_grid   = x_grid;

[...]

114:   y_grid.delta     = (y_grid.end - y_grid.start) / (double)(Ny - 3);

115:   y_grid.delta_inv = 1.0 / y_grid.delta;

116:   spline->y_grid   = y_grid;

[...]

122:   z_grid.delta     = (z_grid.end - z_grid.start) / (double)(Nz - 3);

123:   z_grid.delta_inv = 1.0 / z_grid.delta;

124:   spline->z_grid   = z_grid;

125:

126:   const int N = getAlignedSize<real_type, ALIGN>(num_splines);

127:

128:   spline->x_stride = (size_t)Ny * (size_t)Nz * (size_t)N;

129:   spline->y_stride = Nz * N;

130:   spline->z_stride = N;

131:

132:   spline->coefs_size = (size_t)Nx * spline->x_stride;

133:   spline->coefs      = mAllocator.allocate(spline->coefs_size);

[...]

168:   for (int ind = first; ind < last; ind++)

169:     prefactor[ind] = std::cos(2 * M_PI * ind / size);

170:

171: #pragma omp parallel for collapse(3)

/usr/include/c++/11/bits/random.tcc: 327 - 3369

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327:       _M_x[0] = __detail::__mod<_UIntType,

328: 	__detail::_Shift<_UIntType, __w>::__value>(__sd);

329:

330:       for (size_t __i = 1; __i < state_size; ++__i)

331: 	{

332: 	  _UIntType __x = _M_x[__i - 1];

333: 	  __x ^= __x >> (__w - 2);

334: 	  __x *= __f;

335: 	  __x += __detail::__mod<_UIntType, __n>(__i);

336: 	  _M_x[__i] = __detail::__mod<_UIntType,

337: 	    __detail::_Shift<_UIntType, __w>::__value>(__x);

338: 	}

339:       _M_p = state_size;

[...]

401:       for (size_t __k = 0; __k < (__n - __m); ++__k)

402:         {

403: 	  _UIntType __y = ((_M_x[__k] & __upper_mask)

404: 			   | (_M_x[__k + 1] & __lower_mask));

405: 	  _M_x[__k] = (_M_x[__k + __m] ^ (__y >> 1)

406: 		       ^ ((__y & 0x01) ? __a : 0));

407:         }

408:

409:       for (size_t __k = (__n - __m); __k < (__n - 1); ++__k)

410: 	{

411: 	  _UIntType __y = ((_M_x[__k] & __upper_mask)

412: 			   | (_M_x[__k + 1] & __lower_mask));

413: 	  _M_x[__k] = (_M_x[__k + (__m - __n)] ^ (__y >> 1)

414: 		       ^ ((__y & 0x01) ? __a : 0));

415: 	}

416:

417:       _UIntType __y = ((_M_x[__n - 1] & __upper_mask)

418: 		       | (_M_x[0] & __lower_mask));

419:       _M_x[__n - 1] = (_M_x[__m - 1] ^ (__y >> 1)

420: 		       ^ ((__y & 0x01) ? __a : 0));

421:       _M_p = 0;

422:     }

[...]

450:     mersenne_twister_engine<_UIntType, __w, __n, __m, __r, __a, __u, __d,

451: 			    __s, __b, __t, __c, __l, __f>::

452:     operator()()

453:     {

454:       // Reload the vector - cost is O(n) amortized over n calls.

455:       if (_M_p >= state_size)

456: 	_M_gen_rand();

457:

458:       // Calculate o(x(i)).

459:       result_type __z = _M_x[_M_p++];

460:       __z ^= (__z >> __u) & __d;

461:       __z ^= (__z << __s) & __b;

462:       __z ^= (__z << __t) & __c;

463:       __z ^= (__z >> __l);

[...]

3358:       _RealType __sum = _RealType(0);

3359:       _RealType __tmp = _RealType(1);

3360:       for (size_t __k = __m; __k != 0; --__k)

3361: 	{

3362: 	  __sum += _RealType(__urng() - __urng.min()) * __tmp;

3363: 	  __tmp *= __r;

3364: 	}

3365:       __ret = __sum / __tmp;

3366:       if (__builtin_expect(__ret >= _RealType(1), 0))

3367: 	{

3368: #if _GLIBCXX_USE_C99_MATH_TR1

3369: 	  __ret = std::nextafter(_RealType(1), _RealType(0));

/usr/include/c++/11/bits/stl_algobase.h: 923 - 1115

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923:       for (; __first != __last; ++__first)

924: 	*__first = __tmp;

[...]

1115:       if (__n <= 0)

/usr/include/c++/11/bits/stl_iterator.h: 1008 - 1008

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1008:       : _M_current(__i) { }

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Utilities/StdRandom.h: 101 - 102

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101:     for (int i = 0; i < n; ++i)

102:       d[i] = uniform(myRNG);

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp: 135 - 167

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135:   void set(int nx, int ny, int nz, int num_splines, int nblocks, bool init_random = true)

136:   {

137:     // setting OrbitalSetSize to num_splines made artificial only in miniQMC

138:     OrbitalSetSize = num_splines;

139:

140:     nSplines         = num_splines;

141:     nBlocks          = nblocks;

142:     nSplinesPerBlock = num_splines / nblocks;

143:     firstBlock       = 0;

144:     lastBlock        = nBlocks;

145:     if (einsplines.empty())

146:     {

147:       Owner = true;

148:       TinyVector<int, 3> ng(nx, ny, nz);

149:       PosType start(0);

150:       PosType end(1);

151:       einsplines.resize(nBlocks);

152:       RandomGenerator<T> myrandom(11);

153:       Array<T, 3> coef_data(nx + 3, ny + 3, nz + 3);

154:       for (int i = 0; i < nBlocks; ++i)

155:       {

156:         einsplines[i] = myAllocator.createMultiBspline(T(0), start, end, ng, PERIODIC, nSplinesPerBlock);

157:         if (init_random)

158:         {

159:           // Generate a orbital fully with fully randomized coefficients

160:           myrandom.generate_uniform(coef_data.data(), coef_data.size());

[...]

166:     resize();

167:   }

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsArray.h: 197 - 202

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197: void Array<T, D>::resize(size_t l, size_t m, size_t n)

198: {

199:   Length[0] = l;

200:   Length[1] = m;

201:   Length[2] = n;

202:   X.resize(l * m * n); //,T());

/usr/include/c++/11/bits/alloc_traits.h: 492 - 492

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492:       { __a.deallocate(__p, __n); }

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp: 47 - 78

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47:     if (n == 0)

48:       throw std::runtime_error("Mallocator::allocate does not accept size 0 allocations.");

49:     void* pt(nullptr);

50:     std::size_t asize = n * sizeof(T);

51:     std::size_t amod  = asize % ALIGN;

52:     if (amod != 0)

53:       asize += ALIGN - amod;

[...]

61:     pt = aligned_alloc(ALIGN, asize);

[...]

68:     if (pt == nullptr)

69:       throw std::runtime_error("Allocation failed in Mallocator, requested size in bytes = " +

[...]

76:     if (n == 0)

77:       throw std::runtime_error("Mallocator::deallocate does not accept size 0 allocations.");

78:     free(p);

/usr/include/c++/11/bits/random.h: 141 - 141

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141: 	    __res %= __m;

/usr/include/c++/11/bits/stl_vector.h: 98 - 1770

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98: 	: _M_start(), _M_finish(), _M_end_of_storage()

[...]

335: 	_M_deallocate(_M_impl._M_start,

336: 		      _M_impl._M_end_of_storage - _M_impl._M_start);

[...]

346: 	return __n != 0 ? _Tr::allocate(_M_impl, __n) : pointer();

347:       }

348:

349:       void

350:       _M_deallocate(pointer __p, size_t __n)

351:       {

352: 	typedef __gnu_cxx::__alloc_traits<_Tp_alloc_type> _Tr;

353: 	if (__p)

[...]

361: 	this->_M_impl._M_start = this->_M_allocate(__n);

362: 	this->_M_impl._M_finish = this->_M_impl._M_start;

363: 	this->_M_impl._M_end_of_storage = this->_M_impl._M_start + __n;

[...]

683:       }

[...]

919:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

937:       resize(size_type __new_size)

938:       {

939: 	if (__new_size > size())

[...]

1605: 	this->_M_impl._M_finish =

[...]

1758: 	if (max_size() - size() < __n)

1759: 	  __throw_length_error(__N(__s));

[...]

1769: 	if (__n > _S_max_size(_Tp_alloc_type(__a)))

1770: 	  __throw_length_error(

/usr/include/c++/11/ext/new_allocator.h: 89 - 139

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89:       ~new_allocator() _GLIBCXX_USE_NOEXCEPT { }

[...]

121: 	return static_cast<_Tp*>(::operator new(__n * sizeof(_Tp)));

[...]

139: 	::operator delete(__p

/usr/include/c++/11/bits/basic_string.h: 658 - 658

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658:       { _M_dispose(); }

/usr/include/c++/11/bits/vector.tcc: 617 - 680

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617: 	  size_type __navail = size_type(this->_M_impl._M_end_of_storage

618: 					 - this->_M_impl._M_finish);

619:

620: 	  if (__size > max_size() || __navail > max_size() - __size)

621: 	    __builtin_unreachable();

622:

623: 	  if (__navail >= __n)

624: 	    {

625: 	      _GLIBCXX_ASAN_ANNOTATE_GROW(__n);

626: 	      this->_M_impl._M_finish =

[...]

676: 			    this->_M_impl._M_end_of_storage

677: 			    - this->_M_impl._M_start);

678: 	      this->_M_impl._M_start = __new_start;

679: 	      this->_M_impl._M_finish = __new_start + __size + __n;

680: 	      this->_M_impl._M_end_of_storage = __new_start + __len;

0x442fe0 ORR	W7, WZR, W4

0x442fe4 ORR	W4, WZR, W5

0x442fe8 MOVZ	X12, #5456

0x442fec ADRP	X5,

0x442ff0 SDIV	W8, W7, W4

0x442ff4 SUB	SP, SP, X12,UXTX

0x442ff8 STP	X29, X30, [SP]

0x442ffc ADD	X29, SP, #0

0x443000 STP	X21, X22, [SP, #32]

0x443004 ORR	X22, XZR, X0

0x443008 LDR	X0, [X5, #4016]

0x44300c STP	X23, X24, [SP, #48]

0x443010 LDR	X9, [X22, #744]

0x443014 STR	W1, [SP, #164]

0x443018 AND	W1, W6, #448

0x44301c LDR	X23, [X22, #752]

0x443020 STR	W1, [SP, #188]

0x443024 LDR	X1, [X0]

0x443028 STR	X1, [SP, #5448]

0x44302c MOVZ	X1, #0

0x443030 STR	W7, [X22, #8]

0x443034 STP	W4, WZR, [X22, #48]

0x443038 STP	W4, W7, [X22, #56]

0x44303c STR	W8, [X22, #64]

0x443040 CMP	X23, X9

0x443044 B.EQ	443080

0x443048 ADRP	X1,

0x44304c LDR	X15, [X1, #4016]

0x443050 LDR	X2, [SP, #5448]

0x443054 LDR	X1, [X15]

0x443058 SUBS	X2, X2, X1

0x44305c MOVZ	X1, #0

0x443060 B.NE	443ba8

0x443064 MOVZ	X2, #5456

0x443068 ORR	X0, XZR, X22

0x44306c LDP	X29, X30, [SP]

0x443070 LDP	X21, X22, [SP, #32]

0x443074 LDP	X23, X24, [SP, #48]

0x443078 ADD	SP, SP, X2,UXTX

0x44307c B	440e40

0x443080 STP	X25, X26, [SP, #64]

0x443084 ORR	W26, WZR, W2

0x443088 MOVZ	W2, #1

0x44308c STP	X19, X20, [SP, #16]

0x443090 STP	X27, X28, [SP, #80]

0x443094 ORR	W27, WZR, W3

0x443098 SBFM	X3, X4, #0, #31

0x44309c STP	D8, D9, [SP, #96]

0x4430a0 STP	D10, D11, [SP, #112]

0x4430a4 STP	D12, D13, [SP, #128]

0x4430a8 STP	D14, D15, [SP, #144]

0x4430ac STRB	W2, [X22, #68]

0x4430b0 CBNZ	W4, 443a78

0x4430b4 MOVZ	X8, #61078

0x4430b8 ADD	X20, SP, #384

0x4430bc MOVK	X8, #19864

0x4430c0 MOVZ	X5, #5489

0x4430c4 MOVZ	X23, #35173

0x4430c8 ORR	X18, XZR, X8

0x4430cc STR	X8, [X20, #24]

0x4430d0 MOVK	X23, #27655

0x4430d4 MOVZ	X0, #2

0x4430d8 MOVZ	X4, #16

0x4430dc STR	X5, [SP, #400]

0x4430e0 B	4431b0

(800) 0x4430e4 ADD	X24, X20, X1,LSL #3

(800) 0x4430e8 ADD	X30, X1, #1

(800) 0x4430ec ADD	X17, X0, #3

(800) 0x4430f0 ADD	X19, X20, X30,LSL #3

(800) 0x4430f4 ADD	X21, X0, #4

(800) 0x4430f8 ADD	X25, X0, #5

(800) 0x4430fc LDR	X3, [X24, #8]

(800) 0x443100 ADD	X28, X20, X17,LSL #3

(800) 0x443104 ADD	X15, X0, #6

(800) 0x443108 ADD	X16, X20, X21,LSL #3

(800) 0x44310c ADD	X14, X0, #7

(800) 0x443110 ADD	X2, X0, #8

(800) 0x443114 ADD	X12, X20, X25,LSL #3

(800) 0x443118 ADD	X0, X0, #9

(800) 0x44311c ADD	X10, X20, X15,LSL #3

(800) 0x443120 UBFM	X4, X0, #61, #60

(800) 0x443124 ADD	X9, X20, X14,LSL #3

(800) 0x443128 ADD	X18, X20, X4

(800) 0x44312c EOR	X11, X3, X3,LSR #30

(800) 0x443130 ADD	X8, X20, X2,LSL #3

(800) 0x443134 MADD	W1, W11, W23, W1

(800) 0x443138 STR	X1, [X24, #16]

(800) 0x44313c LDR	X7, [X19, #8]

(800) 0x443140 EOR	X13, X7, X7,LSR #30

(800) 0x443144 MADD	W6, W13, W23, W30

(800) 0x443148 STR	X6, [X19, #16]

(800) 0x44314c LDR	X5, [X28, #8]

(800) 0x443150 EOR	X24, X5, X5,LSR #30

(800) 0x443154 MADD	W30, W24, W23, W17

(800) 0x443158 STR	X30, [X28, #16]

(800) 0x44315c LDR	X17, [X16, #8]

(800) 0x443160 EOR	X19, X17, X17,LSR #30

(800) 0x443164 MADD	W21, W19, W23, W21

(800) 0x443168 STR	X21, [X16, #16]

(800) 0x44316c LDR	X28, [X12, #8]

(800) 0x443170 EOR	X16, X28, X28,LSR #30

(800) 0x443174 MADD	W25, W16, W23, W25

(800) 0x443178 STR	X25, [X12, #16]

(800) 0x44317c LDR	X12, [X10, #8]

(800) 0x443180 EOR	X3, X12, X12,LSR #30

(800) 0x443184 MADD	W15, W3, W23, W15

(800) 0x443188 STR	X15, [X10, #16]

(800) 0x44318c LDR	X10, [X9, #8]

(800) 0x443190 EOR	X11, X10, X10,LSR #30

(800) 0x443194 MADD	W14, W11, W23, W14

(800) 0x443198 STR	X14, [X9, #16]

(800) 0x44319c LDR	X9, [X8, #8]

(800) 0x4431a0 EOR	X1, X9, X9,LSR #30

(800) 0x4431a4 MADD	W2, W1, W23, W2

(800) 0x4431a8 STR	X2, [X8, #16]

(800) 0x4431ac LDR	X18, [X18, #8]

(800) 0x4431b0 EOR	X9, X18, X18,LSR #30

(800) 0x4431b4 ADD	X4, X20, X4

(800) 0x4431b8 ADD	X1, X0, #1

(800) 0x4431bc MADD	W2, W9, W23, W0

(800) 0x4431c0 STR	X2, [X4, #16]

(800) 0x4431c4 CMP	X0, #623

(800) 0x4431c8 B.NE	4430e4

0x4431cc MOVZ	X6, #59224

0x4431d0 MOVZ	X10, #11

0x4431d4 STR	X1, [SP, #5392]

0x4431d8 MOVK	X6, #42066

0x4431dc MOVZ	X24, #35173

0x4431e0 STR	X10, [SP, #400]

0x4431e4 ORR	X5, XZR, X6

0x4431e8 MOVZ	X0, #2

0x4431ec MOVZ	X3, #16

0x4431f0 MOVK	X24, #27655

0x4431f4 STR	X6, [X20, #24]

0x4431f8 B	4432c8

(801) 0x4431fc ADD	X21, X20, X13,LSL #3

(801) 0x443200 ADD	X23, X0, #2

(801) 0x443204 ADD	X25, X0, #3

(801) 0x443208 ADD	X28, X20, X23,LSL #3

(801) 0x44320c ADD	X15, X0, #4

(801) 0x443210 ADD	X12, X0, #5

(801) 0x443214 LDR	X2, [X21, #8]

(801) 0x443218 ADD	X16, X20, X25,LSL #3

(801) 0x44321c ADD	X10, X0, #6

(801) 0x443220 ADD	X14, X20, X15,LSL #3

(801) 0x443224 ADD	X8, X0, #7

(801) 0x443228 ADD	X6, X0, #8

(801) 0x44322c ADD	X11, X20, X12,LSL #3

(801) 0x443230 ADD	X0, X0, #9

(801) 0x443234 ADD	X9, X20, X10,LSL #3

(801) 0x443238 UBFM	X3, X0, #61, #60

(801) 0x44323c ADD	X7, X20, X8,LSL #3

(801) 0x443240 ADD	X5, X20, X3

(801) 0x443244 EOR	X18, X2, X2,LSR #30

(801) 0x443248 ADD	X4, X20, X6,LSL #3

(801) 0x44324c MADD	W13, W18, W24, W13

(801) 0x443250 STR	X13, [X21, #16]

(801) 0x443254 LDR	X30, [X28, #8]

(801) 0x443258 EOR	X17, X30, X30,LSR #30

(801) 0x44325c MADD	W1, W17, W24, W23

(801) 0x443260 STR	X1, [X28, #16]

(801) 0x443264 LDR	X19, [X16, #8]

(801) 0x443268 EOR	X21, X19, X19,LSR #30

(801) 0x44326c MADD	W23, W21, W24, W25

(801) 0x443270 STR	X23, [X16, #16]

(801) 0x443274 LDR	X25, [X14, #8]

(801) 0x443278 EOR	X28, X25, X25,LSR #30

(801) 0x44327c MADD	W15, W28, W24, W15

(801) 0x443280 STR	X15, [X14, #16]

(801) 0x443284 LDR	X16, [X11, #8]

(801) 0x443288 EOR	X14, X16, X16,LSR #30

(801) 0x44328c MADD	W12, W14, W24, W12

(801) 0x443290 STR	X12, [X11, #16]

(801) 0x443294 LDR	X11, [X9, #8]

(801) 0x443298 EOR	X2, X11, X11,LSR #30

(801) 0x44329c MADD	W10, W2, W24, W10

(801) 0x4432a0 STR	X10, [X9, #16]

(801) 0x4432a4 LDR	X9, [X7, #8]

(801) 0x4432a8 EOR	X18, X9, X9,LSR #30

(801) 0x4432ac MADD	W8, W18, W24, W8

(801) 0x4432b0 STR	X8, [X7, #16]

(801) 0x4432b4 LDR	X7, [X4, #8]

(801) 0x4432b8 EOR	X13, X7, X7,LSR #30

(801) 0x4432bc MADD	W6, W13, W24, W6

(801) 0x4432c0 STR	X6, [X4, #16]

(801) 0x4432c4 LDR	X5, [X5, #8]

(801) 0x4432c8 EOR	X19, X5, X5,LSR #30

(801) 0x4432cc ADD	X3, X20, X3

(801) 0x4432d0 ADD	X13, X0, #1

(801) 0x4432d4 MADD	W11, W19, W24, W0

(801) 0x4432d8 STR	X11, [X3, #16]

(801) 0x4432dc CMP	X0, #623

(801) 0x4432e0 B.NE	4431fc

0x4432e4 LDR	W17, [SP, #164]

0x4432e8 ADD	W14, W27, #3

0x4432ec ADD	W0, W26, #3

0x4432f0 SBFM	X15, X0, #0, #31

0x4432f4 SBFM	X16, X14, #0, #31

0x4432f8 STP	XZR, XZR, [SP, #368]

0x4432fc SMADDL	X18, W0, W14, XZR

0x443300 STR	W14, [SP, #184]

0x443304 ADD	W25, W17, #3

0x443308 STP	X16, XZR, [SP, #352]

0x44330c SBFM	X28, X25, #0, #31

0x443310 MADD	X23, X28, X18, XZR

0x443314 STP	X28, X18, [SP, #168]

0x443318 STP	X28, X15, [SP, #336]

0x44331c CBNZ	X23, 443aac

0x443320 LDR	W12, [X22, #48]

0x443324 CMP	W12, #0

0x443328 B.LE	443a24

0x44332c LDR	W4, [SP, #164]

0x443330 SCVTF	D10, W26

0x443334 SCVTF	D11, W27

0x443338 FMOV	D8, #1.0000000

0x44333c ADRP	X1,

0x443340 MOVZ	X19, #45279

0x443344 MOVZ	X24, #0

0x443348 MOVK	X19, #39176

0x44334c LDR	D14, [X1, #2664]

0x443350 SCVTF	D9, W4

0x443354 FDIV	D13, D8, D10

0x443358 FDIV	D12, D8, D9

0x44335c FDIV	D8, D8, D11

0x443360 B	443374

0x443364 LDR	W21, [X22, #48]

0x443368 ADD	X24, X24, #1

0x44336c CMP	W21, W24

0x443370 B.LE	443a10

0x443374 MOVZ	X0, #248

0x443378 LDR	W23, [X22, #64]

0x44337c BL	403b10

0x443380 ORR	X21, XZR, X0

0x443384 SBFM	X25, X23, #0, #31

0x443388 STR	XZR, [X0, #40]

0x44338c STR	XZR, [X0, #80]

0x443390 ADD	X2, X25, #3

0x443394 FMOV	D15, #1.0000000

0x443398 STR	XZR, [X0, #120]

0x44339c AND	X6, X2, #8062

0x4433a0 LDR	X0, [SP, #176]

0x4433a4 SBFM	X10, X6, #0, #31

0x4433a8 STP	D12, D9, [X21, #64]

0x4433ac LDR	W3, [SP, #184]

0x4433b0 STR	X10, [X21, #32]

0x4433b4 LDR	X18, [SP, #168]

0x4433b8 MADD	X14, X10, X0, XZR

0x4433bc STR	D15, [X21, #48]

0x4433c0 LDR	W15, [SP, #164]

0x4433c4 MADD	W13, W3, W6, WZR

0x4433c8 STR	D15, [X21, #88]

0x4433cc STR	W26, [X21, #96]

0x4433d0 MADD	X16, X18, X14, XZR

0x4433d4 STP	D13, D10, [X21, #104]

0x4433d8 SBFM	X11, X13, #0, #31

0x4433dc STR	D15, [X21, #128]

0x4433e0 STR	W15, [X21, #56]

0x4433e4 STP	X14, X11, [X21, #16]

0x4433e8 STR	W27, [X21, #136]

0x4433ec STP	D8, D11, [X21, #144]

0x4433f0 STR	XZR, [X21, #160]

0x4433f4 STR	XZR, [X21, #184]

0x4433f8 STR	XZR, [X21, #208]

0x4433fc STR	W23, [X21, #232]

0x443400 STR	X16, [X21, #240]

0x443404 CBZ	X16, 443cd8

0x443408 UBFM	X28, X16, #61, #60

0x44340c MOVZ	X0, #32

0x443410 ORR	X1, XZR, X28

0x443414 BL	403860

0x443418 CBZ	X0, 443d18

0x44341c LDR	X17, [X22, #744]

0x443420 STR	X0, [X21, #8]

0x443424 LDR	W12, [SP, #188]

0x443428 STR	X21, [X17, X24,LSL #3]

0x44342c CBZ	W12, 443364

0x443430 LDP	X10, X30, [SP, #360]

0x443434 SUB	X7, X30, X10

0x443438 SBFM	X8, X7, #3, #63

0x44343c ORR	W11, WZR, W8

0x443440 CMP	W8, #0

0x443444 B.LE	4437ac

0x443448 MOVZ	X5, #16880

0x44344c MOVN	X1, #49168

0x443450 LDR	X18, [SP, #5392]

0x443454 MOVZ	X7, #22144

0x443458 MOVZ	X4, #0

0x44345c FMOV	D28, X5

0x443460 ADD	X8, SP, #2216

0x443464 ADD	X3, X20, #3184

0x443468 FMOV	D29, X1

0x44346c ADD	X9, SP, #400

0x443470 MOVK	X7, #40236

0x443474 MOVZ	X6, #61382

0x443478 B	443498

(803) 0x44347c FDIV	D5, D1, D2

(803) 0x443480 FCMPE	D5, D15

(803) 0x443484 FCSEL	D6, D5, D29, #4

(803) 0x443488 STR	D6, [X10, X4,LSL #3]

(803) 0x44348c ADD	X4, X4, #1

(803) 0x443490 CMP	W11, W4

(803) 0x443494 B.LE	4437a8

(803) 0x443498 MOVI	D1, #0

(803) 0x44349c FMOV	D2, #1.0000000

(803) 0x4434a0 MOVZ	W5, #2

(803) 0x4434a4 CMP	X18, #623

(803) 0x4434a8 B.HI	4434fc

  (804) 0x4434ac LDR	X17, [X9, X18,LSL #3]

  (804) 0x4434b0 ADD	X18, X18, #1

  (804) 0x4434b4 HINT	#0

  (804) 0x4434b8 HINT	#0

  (804) 0x4434bc HINT	#0

  (804) 0x4434c0 UBFM	X16, X17, #11, #42

  (804) 0x4434c4 EOR	X12, X16, X17

  (804) 0x4434c8 AND	X14, X7, X12,LSL #7

  (804) 0x4434cc EOR	X30, X12, X14

  (804) 0x4434d0 AND	X13, X6, X30,LSL #15

  (804) 0x4434d4 EOR	X17, X30, X13

  (804) 0x4434d8 EOR	X0, X17, X17,LSR #18

  (804) 0x4434dc UCVTF	D0, X0

  (804) 0x4434e0 FMADD	D1, D2, D0, D1

  (804) 0x4434e4 FMUL	D2, D2, D28

  (804) 0x4434e8 CMP	W5, #1

  (804) 0x4434ec B.EQ	44347c

  (804) 0x4434f0 MOVZ	W5, #1

  (804) 0x4434f4 CMP	X18, #623

  (804) 0x4434f8 B.LS	4434ac

  (805) 0x4434fc ADD	X0, X20, #16

  (805) 0x443500 SUB	X2, X8, X0

  (805) 0x443504 ORR	X28, XZR, X0

  (805) 0x443508 SUB	X13, X2, #8

  (805) 0x44350c UBFM	X14, X13, #3, #63

  (805) 0x443510 ADD	X15, X14, #1

  (805) 0x443514 ANDS	X18, X15, #4160

  (805) 0x443518 B.EQ	443710

(803) 0x44351c CMP	X18, #1

(803) 0x443520 B.EQ	443574

(803) 0x443524 CMP	X18, #2

(803) 0x443528 B.EQ	443554

(803) 0x44352c LDR	X16, [X0, #8]

(803) 0x443530 ADD	X28, X20, #24

(803) 0x443534 LDR	X12, [X20, #16]

(803) 0x443538 LDR	X17, [X0, #3176]

(803) 0x44353c BFM	X12, X16, #0, #30

(803) 0x443540 EOR	X30, X17, X12,LSR #1

(803) 0x443544 ANDS	XZR, X12, #4096

(803) 0x443548 EOR	X1, X30, X19

(803) 0x44354c CSEL	X2, X1, X30, #1

(803) 0x443550 STR	X2, [X20, #16]

(803) 0x443554 LDP	X14, X13, [X28]

(803) 0x443558 LDR	X15, [X28, #3176]

(803) 0x44355c BFM	X14, X13, #0, #30

(803) 0x443560 ANDS	XZR, X14, #4096

(803) 0x443564 EOR	X18, X15, X14,LSR #1

(803) 0x443568 EOR	X16, X18, X19

(803) 0x44356c CSEL	X17, X16, X18, #1

(803) 0x443570 STR	X17, [X28], #8

(803) 0x443574 LDP	X12, X30, [X28]

(803) 0x443578 LDR	X1, [X28, #3176]

(803) 0x44357c BFM	X12, X30, #0, #30

(803) 0x443580 ANDS	XZR, X12, #4096

(803) 0x443584 EOR	X2, X1, X12,LSR #1

(803) 0x443588 EOR	X14, X2, X19

(803) 0x44358c CSEL	X13, X14, X2, #1

(803) 0x443590 STR	X13, [X28], #8

(803) 0x443594 CMP	X28, X8

(803) 0x443598 B.NE	443710

(803) 0x44359c SUB	X28, X3, X0

(803) 0x4435a0 SUB	X12, X28, #8

(803) 0x4435a4 UBFM	X15, X12, #3, #63

(803) 0x4435a8 ADD	X2, X15, #1

(803) 0x4435ac ANDS	X14, X2, #4160

(803) 0x4435b0 B.EQ	443670

(803) 0x4435b4 CMP	X14, #1

(803) 0x4435b8 B.EQ	443614

(803) 0x4435bc CMP	X14, #2

(803) 0x4435c0 B.EQ	4435ec

(803) 0x4435c4 LDR	X18, [X0, #1816]

(803) 0x4435c8 ADD	X0, X0, #8

(803) 0x4435cc LDR	X16, [X0, #1816]

(803) 0x4435d0 LDR	X13, [X20, #16]

(803) 0x4435d4 BFM	X18, X16, #0, #30

(803) 0x4435d8 EOR	X17, X13, X18,LSR #1

(803) 0x4435dc ANDS	XZR, X18, #4096

(803) 0x4435e0 EOR	X30, X17, X19

(803) 0x4435e4 CSEL	X1, X30, X17, #1

(803) 0x4435e8 STR	X1, [X0, #1808]

(803) 0x4435ec LDR	X15, [X0, #1816]

(803) 0x4435f0 ADD	X0, X0, #8

(803) 0x4435f4 LDR	X12, [X0, #1816]

(803) 0x4435f8 LDUR	X28, [X0, #504]

(803) 0x4435fc BFM	X15, X12, #0, #30

(803) 0x443600 EOR	X14, X28, X15,LSR #1

(803) 0x443604 ANDS	XZR, X15, #4096

(803) 0x443608 EOR	X2, X14, X19

(803) 0x44360c CSEL	X18, X2, X14, #1

(803) 0x443610 STR	X18, [X0, #1808]

(803) 0x443614 LDR	X13, [X0, #1816]

(803) 0x443618 ADD	X0, X0, #8

(803) 0x44361c LDR	X17, [X0, #1816]

(803) 0x443620 LDUR	X16, [X0, #504]

(803) 0x443624 BFM	X13, X17, #0, #30

(803) 0x443628 EOR	X30, X16, X13,LSR #1

(803) 0x44362c ANDS	XZR, X13, #4096

(803) 0x443630 EOR	X1, X30, X19

(803) 0x443634 CSEL	X28, X1, X30, #1

(803) 0x443638 STR	X28, [X0, #1808]

(803) 0x44363c CMP	X3, X0

(803) 0x443640 B.NE	443670

(803) 0x443644 LDR	X17, [SP, #400]

(803) 0x443648 MOVZ	X18, #1

(803) 0x44364c LDR	X1, [SP, #5384]

(803) 0x443650 LDR	X0, [SP, #3568]

(803) 0x443654 BFM	X1, X17, #0, #30

(803) 0x443658 EOR	X28, X0, X1,LSR #1

(803) 0x44365c ANDS	XZR, X1, #4096

(803) 0x443660 EOR	X2, X28, X19

(803) 0x443664 CSEL	X15, X2, X28, #1

(803) 0x443668 STR	X15, [SP, #5384]

(803) 0x44366c B	4434c0

  (806) 0x443670 ADD	X16, X0, #1816

  (806) 0x443674 LDR	X2, [X0]

  (806) 0x443678 ADD	X15, X0, #16

  (806) 0x44367c LDP	X14, X12, [X16]

  (806) 0x443680 ADD	X18, X0, #24

  (806) 0x443684 ADD	X0, X0, #32

  (806) 0x443688 LDP	X13, X17, [X16, #16]

  (806) 0x44368c BFM	X14, X12, #0, #30

  (806) 0x443690 LDR	X16, [X0, #1792]

  (806) 0x443694 EOR	X30, X2, X14,LSR #1

  (806) 0x443698 ANDS	XZR, X14, #4096

  (806) 0x44369c LDUR	X2, [X0, #488]

  (806) 0x4436a0 EOR	X1, X30, X19

  (806) 0x4436a4 CSEL	X28, X1, X30, #1

  (806) 0x4436a8 STR	X28, [X0, #1784]

  (806) 0x4436ac BFM	X16, X13, #0, #30

  (806) 0x4436b0 BFM	X13, X17, #0, #30

  (806) 0x4436b4 LDUR	X17, [X0, #496]

  (806) 0x4436b8 EOR	X12, X2, X16,LSR #1

  (806) 0x4436bc ANDS	XZR, X16, #4096

  (806) 0x4436c0 EOR	X14, X12, X19

  (806) 0x4436c4 CSEL	X30, X14, X12, #1

  (806) 0x4436c8 STR	X30, [X0, #1792]

  (806) 0x4436cc ANDS	XZR, X13, #4096

  (806) 0x4436d0 EOR	X1, X17, X13,LSR #1

  (806) 0x4436d4 EOR	X28, X1, X19

  (806) 0x4436d8 CSEL	X2, X28, X1, #1

  (806) 0x4436dc STR	X2, [X15, #1816]

  (806) 0x4436e0 LDR	X16, [X0, #1808]

  (806) 0x4436e4 LDR	X12, [X0, #1816]

  (806) 0x4436e8 LDUR	X15, [X0, #504]

  (806) 0x4436ec BFM	X16, X12, #0, #30

  (806) 0x4436f0 EOR	X14, X15, X16,LSR #1

  (806) 0x4436f4 ANDS	XZR, X16, #4096

  (806) 0x4436f8 EOR	X30, X14, X19

  (806) 0x4436fc CSEL	X13, X30, X14, #1

  (806) 0x443700 STR	X13, [X18, #1816]

  (806) 0x443704 CMP	X3, X0

  (806) 0x443708 B.EQ	443644

  (806) 0x44370c B	443670

  (807) 0x443710 LDP	X16, X15, [X28]

  (807) 0x443714 ORR	X18, XZR, X28

  (807) 0x443718 LDR	X17, [X28, #3176]

  (807) 0x44371c BFM	X16, X15, #0, #30

  (807) 0x443720 ANDS	XZR, X16, #4096

  (807) 0x443724 EOR	X12, X17, X16,LSR #1

  (807) 0x443728 EOR	X30, X12, X19

  (807) 0x44372c CSEL	X1, X30, X12, #1

  (807) 0x443730 STR	X1, [X18], #8

  (807) 0x443734 LDR	X2, [X18, #8]

  (807) 0x443738 LDR	X14, [X18, #3176]

  (807) 0x44373c BFM	X15, X2, #0, #30

  (807) 0x443740 ORR	X30, XZR, X2

  (807) 0x443744 EOR	X16, X14, X15,LSR #1

  (807) 0x443748 ANDS	XZR, X15, #4096

  (807) 0x44374c EOR	X13, X16, X19

  (807) 0x443750 CSEL	X17, X13, X16, #1

  (807) 0x443754 STR	X17, [X28, #8]

  (807) 0x443758 LDR	X1, [X18, #16]

  (807) 0x44375c LDR	X12, [X18, #3184]

  (807) 0x443760 BFM	X30, X1, #0, #30

  (807) 0x443764 EOR	X15, X12, X30,LSR #1

  (807) 0x443768 ANDS	XZR, X30, #4096

  (807) 0x44376c EOR	X2, X15, X19

  (807) 0x443770 CSEL	X14, X2, X15, #1

  (807) 0x443774 STR	X14, [X18, #8]

  (807) 0x443778 LDP	X18, X16, [X28, #24]

  (807) 0x44377c ADD	X28, X28, #32

  (807) 0x443780 LDR	X13, [X28, #3168]

  (807) 0x443784 BFM	X18, X16, #0, #30

  (807) 0x443788 ANDS	XZR, X18, #4096

  (807) 0x44378c EOR	X17, X13, X18,LSR #1

  (807) 0x443790 EOR	X30, X17, X19

  (807) 0x443794 CSEL	X1, X30, X17, #1

  (807) 0x443798 STUR	X1, [X28, #504]

  (807) 0x44379c CMP	X28, X8

  (807) 0x4437a0 B.EQ	44359c

  (807) 0x4437a4 B	443710

0x4437a8 STR	X18, [SP, #5392]

0x4437ac MOVN	X9, #61440

0x4437b0 CMP	X25, X9

0x4437b4 B.HI	443bc8

0x4437b8 STP	XZR, XZR, [SP, #216]

0x4437bc UBFM	X28, X25, #61, #60

0x4437c0 STR	XZR, [SP, #232]

0x4437c4 CBZ	X25, 443a44

0x4437c8 ORR	X0, XZR, X28

0x4437cc BL	403b10

0x4437d0 ORR	X10, XZR, X0

0x4437d4 ADD	X6, X0, X28

0x4437d8 STR	XZR, [X0], #8

0x4437dc STR	X10, [SP, #216]

0x4437e0 STR	X6, [SP, #232]

0x4437e4 CMP	X25, #1

0x4437e8 B.EQ	443a70

0x4437ec CMP	X6, X0

0x4437f0 B.EQ	443808

0x4437f4 SUB	X2, X28, #8

0x4437f8 MOVZ	W1, #0

0x4437fc STP	X6, X10, [SP, #192]

0x443800 BL	403890

0x443804 LDP	X6, X10, [SP, #192]

0x443808 STR	X6, [SP, #224]

0x44380c CMP	W23, #0

0x443810 B.LE	4439bc

0x443814 SCVTF	D15, W23

0x443818 SUB	W3, W23, #1

0x44381c FMOV	D18, #1.0000000

0x443820 ANDS	W11, W3, #128

0x443824 SUB	X25, X10, #8

0x443828 MOVZ	X28, #1

0x44382c FDIV	D15, D14, D15

0x443830 B.EQ	443a50

0x443834 STR	D18, [X25, #8]

0x443838 STR	W11, [SP, #192]

0x44383c CMP	W23, #1

0x443840 B.LE	4439bc

0x443844 FMOV	D0, D15

0x443848 MOVZ	X28, #2

0x44384c BL	403990

0x443850 LDR	W7, [SP, #192]

0x443854 FMOV	D18, D0

0x443858 CMP	W7, #1

0x44385c B.EQ	443a50

0x443860 CMP	W7, #2

0x443864 B.EQ	4438e8

0x443868 CMP	W7, #3

0x44386c B.EQ	4438d0

0x443870 CMP	W7, #4

0x443874 B.EQ	4438b8

0x443878 CMP	W7, #5

0x44387c B.EQ	4438a0

0x443880 CMP	W7, #6

0x443884 B.NE	443a58

0x443888 SCVTF	D3, W28

0x44388c STR	D18, [X25, X28,LSL #3]

0x443890 ADD	X28, X28, #1

0x443894 FMUL	D0, D3, D15

0x443898 BL	403990

0x44389c FMOV	D18, D0

0x4438a0 SCVTF	D4, W28

0x4438a4 STR	D18, [X25, X28,LSL #3]

0x4438a8 ADD	X28, X28, #1

0x4438ac FMUL	D0, D4, D15

0x4438b0 BL	403990

0x4438b4 FMOV	D18, D0

0x4438b8 SCVTF	D7, W28

0x4438bc STR	D18, [X25, X28,LSL #3]

0x4438c0 ADD	X28, X28, #1

0x4438c4 FMUL	D0, D7, D15

0x4438c8 BL	403990

0x4438cc FMOV	D18, D0

0x4438d0 SCVTF	D16, W28

0x4438d4 STR	D18, [X25, X28,LSL #3]

0x4438d8 ADD	X28, X28, #1

0x4438dc FMUL	D0, D16, D15

0x4438e0 BL	403990

0x4438e4 FMOV	D18, D0

0x4438e8 SCVTF	D17, W28

0x4438ec STR	D18, [X25, X28,LSL #3]

0x4438f0 ADD	X28, X28, #1

0x4438f4 FMUL	D0, D17, D15

0x4438f8 BL	403990

0x4438fc FMOV	D18, D0

0x443900 STR	X20, [SP, #192]

0x443904 B	4439ac

(802) 0x443908 SCVTF	D19, W28

(802) 0x44390c ADD	X20, X28, #1

(802) 0x443910 FMUL	D0, D19, D15

(802) 0x443914 BL	403990

(802) 0x443918 SCVTF	D21, W20

(802) 0x44391c FMOV	D20, D0

(802) 0x443920 STR	D20, [X25, X20,LSL #3]

(802) 0x443924 FMUL	D0, D21, D15

(802) 0x443928 BL	403990

(802) 0x44392c ADD	X12, X28, #2

(802) 0x443930 SCVTF	D22, W12

(802) 0x443934 STR	D0, [X25, X12,LSL #3]

(802) 0x443938 FMUL	D0, D22, D15

(802) 0x44393c BL	403990

(802) 0x443940 ADD	X14, X28, #3

(802) 0x443944 SCVTF	D23, W14

(802) 0x443948 STR	D0, [X25, X14,LSL #3]

(802) 0x44394c FMUL	D0, D23, D15

(802) 0x443950 BL	403990

(802) 0x443954 ADD	X13, X28, #4

(802) 0x443958 SCVTF	D24, W13

(802) 0x44395c STR	D0, [X25, X13,LSL #3]

(802) 0x443960 FMUL	D0, D24, D15

(802) 0x443964 BL	403990

(802) 0x443968 ADD	X0, X28, #5

(802) 0x44396c SCVTF	D25, W0

(802) 0x443970 STR	D0, [X25, X0,LSL #3]

(802) 0x443974 FMUL	D0, D25, D15

(802) 0x443978 BL	403990

(802) 0x44397c ADD	X4, X28, #6

(802) 0x443980 SCVTF	D26, W4

(802) 0x443984 STR	D0, [X25, X4,LSL #3]

(802) 0x443988 FMUL	D0, D26, D15

(802) 0x44398c BL	403990

(802) 0x443990 ADD	X9, X28, #7

(802) 0x443994 ADD	X28, X28, #8

(802) 0x443998 SCVTF	D27, W9

(802) 0x44399c STR	D0, [X25, X9,LSL #3]

(802) 0x4439a0 FMUL	D0, D27, D15

(802) 0x4439a4 BL	403990

(802) 0x4439a8 FMOV	D18, D0

(802) 0x4439ac STR	D18, [X25, X28,LSL #3]

(802) 0x4439b0 CMP	W23, W28

(802) 0x4439b4 B.GT	443908

0x4439b8 LDR	X20, [SP, #192]

0x4439bc ADD	X8, SP, #336

0x4439c0 ADD	X5, SP, #216

0x4439c4 STR	WZR, [SP, #264]

0x4439c8 ADRP	X18,

0x4439cc MOVZ	W3, #0

0x4439d0 STR	W23, [SP, #268]

0x4439d4 ADD	X0, X18, #704

0x4439d8 MOVZ	W2, #0

0x4439dc STP	X8, X21, [SP, #240]

0x4439e0 ADD	X1, SP, #240

0x4439e4 STR	X5, [SP, #256]

0x4439e8 BL	403a00

0x4439ec LDR	X0, [SP, #216]

0x4439f0 CBZ	X0, 443364

0x4439f4 LDR	X23, [SP, #232]

0x4439f8 ADD	X24, X24, #1

0x4439fc SUB	X1, X23, X0

0x443a00 BL	4039f0

0x443a04 LDR	W21, [X22, #48]

0x443a08 CMP	W21, W24

0x443a0c B.GT	443374

0x443a10 LDR	X0, [SP, #360]

0x443a14 CBZ	X0, 443a24

0x443a18 LDR	X26, [SP, #376]

0x443a1c SUB	X1, X26, X0

0x443a20 BL	4039f0

0x443a24 LDP	X19, X20, [SP, #16]

0x443a28 LDP	X25, X26, [SP, #64]

0x443a2c LDP	X27, X28, [SP, #80]

0x443a30 LDP	D8, D9, [SP, #96]

0x443a34 LDP	D10, D11, [SP, #112]

0x443a38 LDP	D12, D13, [SP, #128]

0x443a3c LDP	D14, D15, [SP, #144]

0x443a40 B	443048

0x443a44 STP	XZR, XZR, [SP, #216]

0x443a48 STR	XZR, [SP, #232]

0x443a4c B	4439bc

0x443a50 STR	X20, [SP, #192]

0x443a54 B	4439ac

0x443a58 FADD	D0, D15, D15

0x443a5c STR	D18, [X25, X28,LSL #3]

0x443a60 MOVZ	X28, #3

0x443a64 BL	403990

0x443a68 FMOV	D18, D0

0x443a6c B	443888

0x443a70 STR	X0, [SP, #224]

0x443a74 B	443814

0x443a78 LDR	X21, [X22, #760]

0x443a7c ADD	X20, X22, #744

0x443a80 SUB	X6, X21, X23

0x443a84 CMP	X3, X6,ASR #3

0x443a88 B.HI	443b1c

0x443a8c UBFM	X21, X3, #61, #60

0x443a90 MOVZ	W1, #0

0x443a94 ORR	X2, XZR, X21

0x443a98 ORR	X0, XZR, X23

0x443a9c BL	403890

0x443aa0 ADD	X7, X23, X21

0x443aa4 STR	X7, [X20, #8]

0x443aa8 B	4430b4

0x443aac MOVN	X30, #61440

0x443ab0 CMP	X23, X30

0x443ab4 B.HI	443b9c

0x443ab8 UBFM	X21, X23, #61, #60

0x443abc ORR	X0, XZR, X21

0x443ac0 BL	403b10

0x443ac4 SUBS	X7, X23, #1

0x443ac8 STR	XZR, [X0]

0x443acc ORR	X25, XZR, X0

0x443ad0 B.EQ	443ae4

0x443ad4 UBFM	X2, X7, #61, #60

0x443ad8 MOVZ	W1, #0

0x443adc ADD	X0, X0, #8

0x443ae0 BL	403890

0x443ae4 LDP	X19, X8, [SP, #360]

0x443ae8 LDR	X24, [SP, #376]

0x443aec SUB	X2, X8, X19

0x443af0 CMP	X2, #0

0x443af4 B.GT	443b80

0x443af8 CBNZ	X19, 443b8c

0x443afc LDR	W9, [X22, #48]

0x443b00 ADD	X5, X25, X21

0x443b04 STP	X25, X5, [SP, #360]

0x443b08 STR	X5, [SP, #376]

0x443b0c CMP	W9, #0

0x443b10 B.GT	44332c

0x443b14 ORR	X0, XZR, X25

0x443b18 B	443a18

0x443b1c MOVN	X10, #61440

0x443b20 CMP	X3, X10

0x443b24 B.HI	443bd4

0x443b28 UBFM	X19, X3, #61, #60

0x443b2c UBFM	X11, X3, #61, #1

0x443b30 ADD	X13, X19, #32

0x443b34 CMP	X11, #0

0x443b38 SUB	X14, X13, X11

0x443b3c MOVZ	X0, #32

0x443b40 CSEL	X1, X14, X19, #1

0x443b44 BL	403860

0x443b48 ORR	X24, XZR, X0

0x443b4c CBZ	X0, 443c10

0x443b50 ORR	X2, XZR, X19

0x443b54 MOVZ	W1, #0

0x443b58 BL	403890

0x443b5c CBZ	X23, 443b70

0x443b60 CMP	X23, X21

0x443b64 B.EQ	443be0

0x443b68 ORR	X0, XZR, X23

0x443b6c BL	403db0

0x443b70 ADD	X15, X24, X19

0x443b74 STR	X24, [X22, #744]

0x443b78 STP	X15, X15, [X20, #8]

0x443b7c B	4430b4

0x443b80 ORR	X1, XZR, X19

0x443b84 ORR	X0, XZR, X25

0x443b88 BL	4036e0

0x443b8c SUB	X1, X24, X19

0x443b90 ORR	X0, XZR, X19

0x443b94 BL	4039f0

0x443b98 B	443afc

0x443b9c ADRP	X1,

0x443ba0 ADD	X0, X1, #3272

0x443ba4 BL	403b50

0x443ba8 STP	X19, X20, [SP, #16]

0x443bac STP	X25, X26, [SP, #64]

0x443bb0 STP	X27, X28, [SP, #80]

0x443bb4 STP	D8, D9, [SP, #96]

0x443bb8 STP	D10, D11, [SP, #112]

0x443bbc STP	D12, D13, [SP, #128]

0x443bc0 STP	D14, D15, [SP, #144]

0x443bc4 BL	403d80

0x443bc8 ADRP	X22,

0x443bcc ADD	X0, X22, #656

0x443bd0 BL	403b50

0x443bd4 ADRP	X30,

0x443bd8 ADD	X0, X30, #3272

0x443bdc BL	403b50

0x443be0 MOVZ	X0, #16

0x443be4 BL	403cb0

0x443be8 ADRP	X18,

0x443bec ORR	X19, XZR, X0

0x443bf0 ADD	X1, X18, #776

0x443bf4 BL	4038c0

0x443bf8 ADRP	X17,

0x443bfc ADRP	X25,

0x443c00 LDR	X2, [X17, #3840]

0x443c04 ORR	X0, XZR, X19

0x443c08 LDR	X1, [X25, #3920]

0x443c0c BL	403d20

0x443c10 MOVZ	X0, #16

0x443c14 ADD	X21, SP, #384

0x443c18 BL	403cb0

0x443c1c ORR	X20, XZR, X0

0x443c20 ORR	X8, XZR, X21

0x443c24 ORR	X0, XZR, X19

0x443c28 BL	409ec0

0x443c2c ADRP	X27,

0x443c30 ADD	X22, SP, #336

0x443c34 ADD	X0, X27, #712

0x443c38 ORR	X8, XZR, X22

0x443c3c ORR	X1, XZR, X21

0x443c40 BL	40a5c0

0x443c44 ORR	X1, XZR, X22

0x443c48 ORR	X0, XZR, X20

0x443c4c BL	4036c0

0x443c50 ORR	X0, XZR, X22

0x443c54 ADRP	X28,

0x443c58 BL	403730

0x443c5c ORR	X0, XZR, X21

0x443c60 BL	403730

0x443c64 ADRP	X12,

0x443c68 LDR	X2, [X28, #3840]

0x443c6c ORR	X0, XZR, X20

0x443c70 LDR	X1, [X12, #3920]

0x443c74 BL	403d20

0x443c78 ORR	X16, XZR, X0

0x443c7c ORR	X0, XZR, X19

0x443c80 ORR	X22, XZR, X16

0x443c84 BL	403c60

0x443c88 ORR	X0, XZR, X22

0x443c8c BL	403aa0

0x443c90 ORR	X26, XZR, X0

0x443c94 ORR	X0, XZR, X22

0x443c98 BL	403730

(799) 0x443c9c ORR	X0, XZR, X21

(799) 0x443ca0 BL	403730

(799) 0x443ca4 ORR	X0, XZR, X20

(799) 0x443ca8 BL	403c60

(799) 0x443cac ORR	X0, XZR, X26

(799) 0x443cb0 BL	403aa0

(799) 0x443cb4 ORR	X26, XZR, X0

(799) 0x443cb8 B	443c9c

0x443cbc ORR	X26, XZR, X0

0x443cc0 B	443ca4

0x443cc4 ORR	X19, XZR, X0

(798) 0x443cc8 ADD	X0, SP, #360

(798) 0x443ccc BL	41c7c0

(798) 0x443cd0 ORR	X0, XZR, X19

(798) 0x443cd4 BL	403aa0

(798) 0x443cd8 MOVZ	X0, #16

(798) 0x443cdc ADRP	X24,

(798) 0x443ce0 BL	403cb0

(798) 0x443ce4 ADD	X1, X24, #2768

(798) 0x443ce8 ORR	X20, XZR, X0

(798) 0x443cec BL	4038c0

(798) 0x443cf0 ADRP	X30,

(798) 0x443cf4 ADRP	X17,

(798) 0x443cf8 LDR	X2, [X30, #3840]

(798) 0x443cfc ORR	X0, XZR, X20

(798) 0x443d00 LDR	X1, [X17, #3920]

(798) 0x443d04 BL	403d20

(798) 0x443d08 ORR	X19, XZR, X0

(798) 0x443d0c ORR	X0, XZR, X20

(798) 0x443d10 BL	403c60

(798) 0x443d14 B	443cc8

0x443d18 MOVZ	X0, #16

0x443d1c ADD	X21, SP, #304

0x443d20 BL	403cb0

0x443d24 ORR	X20, XZR, X0

0x443d28 ORR	X8, XZR, X21

0x443d2c ORR	X0, XZR, X28

0x443d30 BL	409ec0

0x443d34 ADRP	X16,

0x443d38 ADD	X22, SP, #272

0x443d3c ADD	X0, X16, #712

0x443d40 ORR	X8, XZR, X22

0x443d44 ORR	X1, XZR, X21

0x443d48 BL	40a5c0

0x443d4c ORR	X1, XZR, X22

0x443d50 ORR	X0, XZR, X20

0x443d54 BL	4036c0

0x443d58 ORR	X0, XZR, X22

0x443d5c ADRP	X28,

0x443d60 BL	403730

0x443d64 ORR	X0, XZR, X21

0x443d68 BL	403730

0x443d6c ADRP	X18,

0x443d70 LDR	X2, [X28, #3840]

0x443d74 ORR	X0, XZR, X20

0x443d78 LDR	X1, [X18, #3920]

0x443d7c BL	403d20

0x443d80 ORR	X19, XZR, X0

0x443d84 B	443cc8

0x443d88 ORR	X19, XZR, X0

0x443d8c ORR	X0, XZR, X22

0x443d90 BL	403730

0x443d94 ORR	X0, XZR, X21

0x443d98 BL	403730

0x443d9c B	443d0c

0x443da0 ORR	X19, XZR, X0

0x443da4 B	443d94

0x443da8 ORR	X19, XZR, X0

0x443dac B	443d0c

0x443db0 HINT	#0

0x443db4 HINT	#0

0x443db8 HINT	#0

0x443dbc HINT	#0

Coverage (%)	Name	Source Location	Module
►100.00+	qmcplusplus::build_SPOSet(bool[...]	OperatorTags.h:183	exec
○	main	unique_ptr.h:371	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	einspline_spo_ref.hpp:135-167
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/aligned_allocator.hpp:46
/usr/include/c++/11/bits/stl_uninitialized.h:687,1009-1011
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/BsplineAllocator.hpp:90-94,106-108,114-116,122-133,168-171
/usr/include/c++/11/bits/random.tcc:327-339,401-422,450-463,3358-3369
/usr/include/c++/11/bits/stl_algobase.h:923-924,1115
/usr/include/c++/11/bits/stl_iterator.h:1008
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Utilities/StdRandom.h:101-102
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp:135-160,166-167
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsArray.h:197-202
/usr/include/c++/11/bits/alloc_traits.h:492
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:47-53,61,68-69,76-78
/usr/include/c++/11/bits/random.h:141
/usr/include/c++/11/bits/stl_vector.h:98,335-336,346-353,361-363,683,919,937-939,1605,1758-1759,1769-1770
/usr/include/c++/11/ext/new_allocator.h:89,121,139
/usr/include/c++/11/bits/basic_string.h:658
/usr/include/c++/11/bits/vector.tcc:617-626,676-680

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 69.50 to 10.50 cycles (6.62x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 24% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 69.50 to 10.22 cycles (6.80x speedup).

Details

11% of VPU instructions are used in vector version (process two or more data elements in vector registers):

80% of VPU loads are used in vector version.
52% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
0% of VPU divide and square root instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 69.50 to 24.00 cycles (2.90x speedup).

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Conversion instructions

Detected expensive conversion instructions.

Details

SCVTF: 9 occurrences

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Matching between your function (in the source code) and the binary function

The binary function is composed of 10 FP arithmetical operations:

1: addition or subtraction
5: multiply
4: divide

The binary function is loading 452 bytes. The binary function is storing 889 bytes.

Arithmetic intensity

Arithmetic intensity is 0.01 FP operations per loaded or stored byte.

General properties

nb instructions	497
loop length	1988
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

61.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	52.00	52.00	69.50	69.50	69.50	69.50	11.00	11.00	11.00	11.00	45.50	45.17	45.33	33.00	33.00
cycles	52.00	52.00	69.50	69.50	69.50	69.50	11.00	11.00	11.00	11.00	45.50	45.17	45.33	33.00	33.00

Cycles executing div or sqrt instructions

5.00-2.50

Cycles summary

Front-end	61.63
Overall L1	69.50

Vectorization ratios

all	11%
load	80%
store	52%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
div/sqrt	0%
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 69.50 cycles. At this rate:

6% of peak load performance is reached (6.50 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
26% of peak store performance is reached (12.79 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 442fe0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
ORR W7, WZR, W4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W4, WZR, W5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X12, #5456	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X5, <4c1fec>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SDIV W8, W7, W4	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-12	1-0.50
SUB SP, SP, X12,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X22, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X5, #4016]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X22, #744]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR W1, [SP, #164]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
AND W1, W6, #448	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [X22, #752]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR W1, [SP, #188]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X1, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X1, [SP, #5448]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W7, [X22, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP W4, WZR, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP W4, W7, [X22, #56]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W8, [X22, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP X23, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 443080 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X1, <4c1048>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X15, [X1, #4016]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X2, [SP, #5448]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X1, [X15]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUBS X2, X2, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.NE 443ba8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xbc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X2, #5456	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
ADD SP, SP, X2,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
B 440e40 <_ZN16miniqmcreference17einspline_spo_refIdE6resizeEv>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR W26, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR W27, WZR, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SBFM X3, X4, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STRB W2, [X22, #68]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ W4, 443a78 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X8, #61078	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X20, SP, #384	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X8, #19864	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X5, #5489	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X23, #35173	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X18, XZR, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X8, [X20, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVK X23, #27655	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X0, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X4, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X5, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4431b0 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x1d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X6, #59224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X10, #11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X1, [SP, #5392]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVK X6, #42066	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X24, #35173	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X10, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X5, XZR, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X0, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X3, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X24, #27655	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X6, [X20, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4432c8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x2e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W17, [SP, #164]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD W14, W27, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD W0, W26, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SBFM X15, X0, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SBFM X16, X14, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP XZR, XZR, [SP, #368]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SMADDL X18, W0, W14, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR W14, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD W25, W17, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X16, XZR, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SBFM X28, X25, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X23, X28, X18, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP X28, X18, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X28, X15, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X23, 443aac <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xacc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W12, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W12, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 443a24 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa44>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W4, [SP, #164]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SCVTF D10, W26	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
SCVTF D11, W27	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
FMOV D8, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADRP X1, <49e33c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X19, #45279	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X24, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X19, #39176	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR D14, [X1, #2664]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
SCVTF D9, W4	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
FDIV D13, D8, D10	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FDIV D12, D8, D9	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FDIV D8, D8, D11	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
B 443374 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x394>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W21, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X24, X24, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W21, W24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 443a10 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa30>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X0, #248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W23, [X22, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403b10 <@plt_start@+0x490>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X21, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SBFM X25, X23, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR XZR, [X0, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X2, X25, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D15, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR XZR, [X0, #120]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
AND X6, X2, #8062	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SBFM X10, X6, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D12, D9, [X21, #64]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR W3, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X10, [X21, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X18, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X14, X10, X0, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR D15, [X21, #48]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR W15, [SP, #164]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD W13, W3, W6, WZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR D15, [X21, #88]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR W26, [X21, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MADD X16, X18, X14, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP D13, D10, [X21, #104]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
SBFM X11, X13, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR D15, [X21, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR W15, [X21, #56]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X14, X11, [X21, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [X21, #136]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D8, D11, [X21, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [X21, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR XZR, [X21, #184]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR XZR, [X21, #208]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W23, [X21, #232]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X16, [X21, #240]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBZ X16, 443cd8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xcf8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X28, X16, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X1, XZR, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403860 <@plt_start@+0x1e0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X0, 443d18 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xd38>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [X22, #744]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X0, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W12, [SP, #188]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X21, [X17, X24,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBZ W12, 443364 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X10, X30, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
SUB X7, X30, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SBFM X8, X7, #3, #63	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W11, WZR, W8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W8, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 4437ac <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x7cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X5, #16880	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVN X1, #49168	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X18, [SP, #5392]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ X7, #22144	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D28, X5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X8, SP, #2216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X20, #3184	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D29, X1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X9, SP, #400	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X7, #40236	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X6, #61382	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 443498 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x4b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X18, [SP, #5392]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVN X9, #61440	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X25, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.HI 443bc8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xbe8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP XZR, XZR, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
UBFM X28, X25, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBZ X25, 443a44 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b10 <@plt_start@+0x490>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X10, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X6, X0, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X0], #8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X10, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X6, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP X25, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 443a70 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa90>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X6, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 443808 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x828>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB X2, X28, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X6, X10, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X6, X10, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
STR X6, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP W23, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 4439bc <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x9dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SCVTF D15, W23	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
SUB W3, W23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D18, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ANDS W11, W3, #128	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
SUB X25, X10, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FDIV D15, D14, D15	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
B.EQ 443a50 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR D18, [X25, #8]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR W11, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP W23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 4439bc <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x9dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D0, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVZ X28, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W7, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
CMP W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 443a50 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP W7, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4438e8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x908>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP W7, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4438d0 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x8f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP W7, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4438b8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x8d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP W7, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4438a0 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x8c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP W7, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 443a58 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SCVTF D3, W28	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
STR D18, [X25, X28,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X28, X28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMUL D0, D3, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
SCVTF D4, W28	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
STR D18, [X25, X28,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X28, X28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMUL D0, D4, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
SCVTF D7, W28	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
STR D18, [X25, X28,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X28, X28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMUL D0, D7, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
SCVTF D16, W28	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
STR D18, [X25, X28,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X28, X28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMUL D0, D16, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
SCVTF D17, W28	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
STR D18, [X25, X28,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X28, X28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMUL D0, D17, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR X20, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4439ac <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x9cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X20, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, SP, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, SP, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR WZR, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADRP X18, <20043e9c8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W23, [SP, #268]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X0, X18, #704	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X8, X21, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X1, SP, #240	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X5, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403a00 <@plt_start@+0x380>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X0, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X0, 443364 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X23, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X24, X24, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X1, X23, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4039f0 <@plt_start@+0x370>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W21, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W21, W24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 443374 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x394>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X0, 443a24 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa44>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X26, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X1, X26, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4039f0 <@plt_start@+0x370>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
B 443048 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x68>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP XZR, XZR, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR XZR, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4439bc <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x9dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X20, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4439ac <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x9cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D0, D15, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR D18, [X25, X28,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVZ X28, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 443888 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x8a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X0, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 443814 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x834>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X21, [X22, #760]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X20, X22, #744	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X6, X21, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X3, X6,ASR #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
B.HI 443b1c <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xb3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X21, X3, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X2, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X23, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X7, [X20, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4430b4 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xd4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVN X30, #61440	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X23, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.HI 443b9c <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xbbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X21, X23, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b10 <@plt_start@+0x490>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUBS X7, X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
STR XZR, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X25, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.EQ 443ae4 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xb04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X2, X7, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X0, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X19, X8, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X24, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X2, X8, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X2, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 443b80 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xba0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CBNZ X19, 443b8c <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xbac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W9, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X25, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X5, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X5, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP W9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 44332c <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x34c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 443a18 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa38>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVN X10, #61440	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X3, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.HI 443bd4 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xbf4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X19, X3, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X11, X3, #61, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X13, X19, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X11, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
SUB X14, X13, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CSEL X1, X14, X19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403860 <@plt_start@+0x1e0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X24, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CBZ X0, 443c10 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xc30>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X23, 443b70 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xb90>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 443be0 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xc00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403db0 <@plt_start@+0x730>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X15, X24, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X24, [X22, #744]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X15, X15, [X20, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4430b4 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xd4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X1, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4036e0 <@plt_start@+0x60>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB X1, X24, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4039f0 <@plt_start@+0x370>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 443afc <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xb1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X1, <49eb9c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X1, #3272	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b50 <@plt_start@+0x4d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
BL 403d80 <@plt_start@+0x700>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X22, <49ebc8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X22, #656	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b50 <@plt_start@+0x4d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X30, <49ebd4>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X30, #3272	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b50 <@plt_start@+0x4d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X0, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403cb0 <@plt_start@+0x630>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X18, <49ebe8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X18, #776	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4038c0 <@plt_start@+0x240>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X17, <4c1bf8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X25, <4c1bfc>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [X17, #3840]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X1, [X25, #3920]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403d20 <@plt_start@+0x6a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X0, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X21, SP, #384	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403cb0 <@plt_start@+0x630>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X20, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X8, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 409ec0 <_ZNSt7__cxx119to_stringEm>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X27, <49ec2c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X22, SP, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X27, #712	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X8, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X1, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 40a5c0 <_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_OS8_>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X1, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4036c0 <@plt_start@+0x40>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X28, <4c1c54>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X12, <4c1c64>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [X28, #3840]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X1, [X12, #3920]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403d20 <@plt_start@+0x6a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X16, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X22, XZR, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403c60 <@plt_start@+0x5e0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403aa0 <@plt_start@+0x420>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X26, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X26, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 443ca4 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xcc4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X0, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X21, SP, #304	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403cb0 <@plt_start@+0x630>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X20, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X8, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 409ec0 <_ZNSt7__cxx119to_stringEm>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X16, <49ed34>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X22, SP, #272	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X16, #712	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X8, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X1, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 40a5c0 <_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_OS8_>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X1, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4036c0 <@plt_start@+0x40>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X28, <4c1d5c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X18, <4c1d6c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [X28, #3840]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X1, [X18, #3920]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403d20 <@plt_start@+0x6a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 443cc8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xce8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 443d0c <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xd2c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 443d94 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xdb4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 443d0c <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xd2c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0

Source file and lines	einspline_spo_ref.hpp:135-167
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/aligned_allocator.hpp:46
/usr/include/c++/11/bits/stl_uninitialized.h:687,1009-1011
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/BsplineAllocator.hpp:90-94,106-108,114-116,122-133,168-171
/usr/include/c++/11/bits/random.tcc:327-339,401-422,450-463,3358-3369
/usr/include/c++/11/bits/stl_algobase.h:923-924,1115
/usr/include/c++/11/bits/stl_iterator.h:1008
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Utilities/StdRandom.h:101-102
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp:135-160,166-167
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsArray.h:197-202
/usr/include/c++/11/bits/alloc_traits.h:492
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:47-53,61,68-69,76-78
/usr/include/c++/11/bits/random.h:141
/usr/include/c++/11/bits/stl_vector.h:98,335-336,346-353,361-363,683,919,937-939,1605,1758-1759,1769-1770
/usr/include/c++/11/ext/new_allocator.h:89,121,139
/usr/include/c++/11/bits/basic_string.h:658
/usr/include/c++/11/bits/vector.tcc:617-626,676-680

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

11% of VPU instructions are used in vector version (process two or more data elements in vector registers):

80% of VPU loads are used in vector version.
52% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
0% of VPU divide and square root instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 69.50 to 24.00 cycles (2.90x speedup).

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Conversion instructions

Detected expensive conversion instructions.

Details

SCVTF: 9 occurrences

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Matching between your function (in the source code) and the binary function

The binary function is composed of 10 FP arithmetical operations:

1: addition or subtraction
5: multiply
4: divide

The binary function is loading 452 bytes. The binary function is storing 889 bytes.

Arithmetic intensity

Arithmetic intensity is 0.01 FP operations per loaded or stored byte.

General properties

nb instructions	497
loop length	1988
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

61.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	52.00	52.00	69.50	69.50	69.50	69.50	11.00	11.00	11.00	11.00	45.50	45.17	45.33	33.00	33.00
cycles	52.00	52.00	69.50	69.50	69.50	69.50	11.00	11.00	11.00	11.00	45.50	45.17	45.33	33.00	33.00

Cycles executing div or sqrt instructions

5.00-2.50

Cycles summary

Front-end	61.63
Overall L1	69.50

Vectorization ratios

all	11%
load	80%
store	52%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
div/sqrt	0%
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 69.50 cycles. At this rate:

6% of peak load performance is reached (6.50 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
26% of peak store performance is reached (12.79 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 442fe0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
ORR W7, WZR, W4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W4, WZR, W5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X12, #5456	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X5, <4c1fec>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SDIV W8, W7, W4	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-12	1-0.50
SUB SP, SP, X12,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X22, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X5, #4016]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X22, #744]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR W1, [SP, #164]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
AND W1, W6, #448	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [X22, #752]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR W1, [SP, #188]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X1, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X1, [SP, #5448]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W7, [X22, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP W4, WZR, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP W4, W7, [X22, #56]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W8, [X22, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP X23, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 443080 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X1, <4c1048>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X15, [X1, #4016]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X2, [SP, #5448]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X1, [X15]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUBS X2, X2, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.NE 443ba8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xbc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X2, #5456	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
ADD SP, SP, X2,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
B 440e40 <_ZN16miniqmcreference17einspline_spo_refIdE6resizeEv>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR W26, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR W27, WZR, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SBFM X3, X4, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STRB W2, [X22, #68]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ W4, 443a78 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X8, #61078	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X20, SP, #384	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X8, #19864	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X5, #5489	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X23, #35173	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X18, XZR, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X8, [X20, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVK X23, #27655	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X0, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X4, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X5, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4431b0 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x1d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X6, #59224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X10, #11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X1, [SP, #5392]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVK X6, #42066	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X24, #35173	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X10, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X5, XZR, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X0, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X3, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X24, #27655	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X6, [X20, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4432c8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x2e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W17, [SP, #164]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD W14, W27, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD W0, W26, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SBFM X15, X0, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SBFM X16, X14, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP XZR, XZR, [SP, #368]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SMADDL X18, W0, W14, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR W14, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD W25, W17, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X16, XZR, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SBFM X28, X25, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X23, X28, X18, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP X28, X18, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X28, X15, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X23, 443aac <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xacc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W12, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W12, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 443a24 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa44>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W4, [SP, #164]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SCVTF D10, W26	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
SCVTF D11, W27	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
FMOV D8, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADRP X1, <49e33c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X19, #45279	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X24, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X19, #39176	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR D14, [X1, #2664]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
SCVTF D9, W4	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
FDIV D13, D8, D10	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FDIV D12, D8, D9	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FDIV D8, D8, D11	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
B 443374 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x394>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W21, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X24, X24, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W21, W24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 443a10 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa30>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X0, #248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W23, [X22, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403b10 <@plt_start@+0x490>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X21, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SBFM X25, X23, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR XZR, [X0, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X2, X25, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D15, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR XZR, [X0, #120]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
AND X6, X2, #8062	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SBFM X10, X6, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D12, D9, [X21, #64]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR W3, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X10, [X21, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X18, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X14, X10, X0, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR D15, [X21, #48]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR W15, [SP, #164]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD W13, W3, W6, WZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR D15, [X21, #88]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR W26, [X21, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MADD X16, X18, X14, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP D13, D10, [X21, #104]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
SBFM X11, X13, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR D15, [X21, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR W15, [X21, #56]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X14, X11, [X21, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [X21, #136]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D8, D11, [X21, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [X21, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR XZR, [X21, #184]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR XZR, [X21, #208]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W23, [X21, #232]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X16, [X21, #240]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBZ X16, 443cd8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xcf8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X28, X16, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X1, XZR, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403860 <@plt_start@+0x1e0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X0, 443d18 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xd38>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [X22, #744]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X0, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W12, [SP, #188]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X21, [X17, X24,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBZ W12, 443364 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X10, X30, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
SUB X7, X30, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SBFM X8, X7, #3, #63	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W11, WZR, W8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W8, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 4437ac <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x7cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X5, #16880	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVN X1, #49168	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X18, [SP, #5392]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ X7, #22144	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D28, X5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X8, SP, #2216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X20, #3184	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D29, X1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X9, SP, #400	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X7, #40236	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X6, #61382	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 443498 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x4b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X18, [SP, #5392]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVN X9, #61440	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X25, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.HI 443bc8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xbe8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP XZR, XZR, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
UBFM X28, X25, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBZ X25, 443a44 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b10 <@plt_start@+0x490>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X10, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X6, X0, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X0], #8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X10, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X6, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP X25, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 443a70 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa90>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X6, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 443808 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x828>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB X2, X28, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X6, X10, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X6, X10, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
STR X6, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP W23, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 4439bc <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x9dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SCVTF D15, W23	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
SUB W3, W23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D18, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ANDS W11, W3, #128	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
SUB X25, X10, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FDIV D15, D14, D15	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
B.EQ 443a50 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR D18, [X25, #8]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR W11, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP W23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 4439bc <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x9dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D0, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVZ X28, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W7, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
CMP W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 443a50 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP W7, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4438e8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x908>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP W7, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4438d0 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x8f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP W7, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4438b8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x8d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP W7, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4438a0 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x8c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP W7, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 443a58 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SCVTF D3, W28	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
STR D18, [X25, X28,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X28, X28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMUL D0, D3, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
SCVTF D4, W28	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
STR D18, [X25, X28,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X28, X28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMUL D0, D4, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
SCVTF D7, W28	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
STR D18, [X25, X28,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X28, X28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMUL D0, D7, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
SCVTF D16, W28	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
STR D18, [X25, X28,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X28, X28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMUL D0, D16, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
SCVTF D17, W28	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
STR D18, [X25, X28,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X28, X28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMUL D0, D17, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR X20, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4439ac <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x9cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X20, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, SP, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, SP, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR WZR, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADRP X18, <20043e9c8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W23, [SP, #268]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X0, X18, #704	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X8, X21, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X1, SP, #240	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X5, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403a00 <@plt_start@+0x380>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X0, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X0, 443364 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X23, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X24, X24, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X1, X23, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4039f0 <@plt_start@+0x370>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W21, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W21, W24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 443374 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x394>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X0, 443a24 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa44>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X26, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X1, X26, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4039f0 <@plt_start@+0x370>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
B 443048 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x68>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP XZR, XZR, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR XZR, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4439bc <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x9dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X20, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4439ac <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x9cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D0, D15, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR D18, [X25, X28,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVZ X28, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403990 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 443888 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x8a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X0, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 443814 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x834>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X21, [X22, #760]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X20, X22, #744	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X6, X21, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X3, X6,ASR #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
B.HI 443b1c <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xb3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X21, X3, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X2, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X23, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X7, [X20, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4430b4 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xd4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVN X30, #61440	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X23, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.HI 443b9c <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xbbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X21, X23, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b10 <@plt_start@+0x490>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUBS X7, X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
STR XZR, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X25, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.EQ 443ae4 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xb04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X2, X7, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X0, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X19, X8, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X24, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X2, X8, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X2, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 443b80 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xba0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CBNZ X19, 443b8c <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xbac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W9, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X25, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X5, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X5, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP W9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 44332c <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0x34c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 443a18 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xa38>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVN X10, #61440	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X3, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.HI 443bd4 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xbf4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X19, X3, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X11, X3, #61, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X13, X19, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X11, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
SUB X14, X13, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CSEL X1, X14, X19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403860 <@plt_start@+0x1e0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X24, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CBZ X0, 443c10 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xc30>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X23, 443b70 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xb90>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 443be0 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xc00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403db0 <@plt_start@+0x730>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X15, X24, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X24, [X22, #744]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X15, X15, [X20, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4430b4 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xd4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X1, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4036e0 <@plt_start@+0x60>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB X1, X24, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4039f0 <@plt_start@+0x370>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 443afc <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xb1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X1, <49eb9c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X1, #3272	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b50 <@plt_start@+0x4d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
BL 403d80 <@plt_start@+0x700>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X22, <49ebc8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X22, #656	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b50 <@plt_start@+0x4d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X30, <49ebd4>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X30, #3272	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b50 <@plt_start@+0x4d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X0, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403cb0 <@plt_start@+0x630>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X18, <49ebe8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X18, #776	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4038c0 <@plt_start@+0x240>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X17, <4c1bf8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X25, <4c1bfc>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [X17, #3840]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X1, [X25, #3920]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403d20 <@plt_start@+0x6a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X0, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X21, SP, #384	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403cb0 <@plt_start@+0x630>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X20, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X8, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 409ec0 <_ZNSt7__cxx119to_stringEm>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X27, <49ec2c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X22, SP, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X27, #712	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X8, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X1, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 40a5c0 <_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_OS8_>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X1, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4036c0 <@plt_start@+0x40>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X28, <4c1c54>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X12, <4c1c64>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [X28, #3840]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X1, [X12, #3920]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403d20 <@plt_start@+0x6a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X16, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X22, XZR, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403c60 <@plt_start@+0x5e0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403aa0 <@plt_start@+0x420>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X26, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X26, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 443ca4 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xcc4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X0, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X21, SP, #304	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403cb0 <@plt_start@+0x630>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X20, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X8, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 409ec0 <_ZNSt7__cxx119to_stringEm>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X16, <49ed34>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X22, SP, #272	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X16, #712	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X8, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X1, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 40a5c0 <_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_OS8_>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X1, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4036c0 <@plt_start@+0x40>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X28, <4c1d5c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X18, <4c1d6c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [X28, #3840]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X1, [X18, #3920]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403d20 <@plt_start@+0x6a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 443cc8 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xce8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403730 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 443d0c <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xd2c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 443d94 <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xdb4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 443d0c <_ZN16miniqmcreference17einspline_spo_refIdE3setEiiiiib+0xd2c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼miniqmcreference::einspline_spo_ref::set(int, int, int, int, int, bool)–	0.01	0
○Loop 798 - Mallocator.hpp:48-69 - exec	0	0
▼Loop 803 - random.tcc:401-3369 - exec–	0	0
○Loop 804 - random.tcc:455-3363 - exec	0.01	0
○Loop 805 - random.tcc:455-455 - exec	0	0
○Loop 806 - random.tcc:409-414 - exec	0	0
○Loop 807 - random.tcc:401-406 - exec	0	0
○Loop 802 - BsplineAllocator.hpp:168-169 - exec	0	0
○Loop 799 - basic_string.h:658-658 - exec	0	0
○Loop 801 - random.tcc:330-336 - exec	0	0
○Loop 800 - random.tcc:330-336 - exec	0	0

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Expensive FP math instructions/calls

FMA

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Conversion instructions

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Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

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Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

FMA

Workaround

Conversion instructions

Details

Workaround

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code