OV - exec - Function miniqmcreference::TwoBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::recompute(qmcplusplus::ParticleSet&)

	Function: miniqmcreference::TwoBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::recompute(qmcpl ...	Module: exec	Source: TwoBodyJastrowRef.h:265-400 [...]	Coverage: 0.25%

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h: 214 - 214

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214:   inline const Type_t* operator[](size_type i) const { return X.data() + i * D2; }

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 183 - 183

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183:     return (const_cast<T1&>(a) = b);

/usr/include/c++/11/bits/stl_algobase.h: 924 - 1115

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924: 	*__first = __tmp;

[...]

1109:     __fill_n_a(_OutputIterator __first, _Size __n, const _Tp& __value,

[...]

1115:       if (__n <= 0)

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 276 - 336

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276:   real_type dSquareDeltaRinv = DeltaRInv * DeltaRInv;

277:   constexpr real_type cOne(1);

278:

279:   //    START_MARK_FIRST();

280:

281:   ASSUME_ALIGNED(distIndices);

282:   ASSUME_ALIGNED(distArrayCompressed);

283:   int iCount                 = 0;

284:   int iLimit                 = iEnd - iStart;

285:   const real_type* distArray = _distArray + iStart;

[...]

291:   for (int jat = 0; jat < iLimit; jat++)

292:   {

293:     real_type r = distArray[jat];

294:     if (r < cutoff_radius && iStart + jat != iat)

295:     {

296:       distIndices[iCount]         = jat;

297:       distArrayCompressed[iCount] = r;

298:       iCount++;

[...]

305:     real_type r    = distArrayCompressed[j];

306:     int iScatter   = distIndices[j];

307:     real_type rinv = cOne / r;

308:     r *= DeltaRInv;

309:     int iGather   = (int)r;

310:     real_type t   = r - real_type(iGather);

311:     real_type tp0 = t * t * t;

312:     real_type tp1 = t * t;

313:     real_type tp2 = t;

314:

315:     real_type sCoef0 = SplineCoefs[iGather + 0];

316:     real_type sCoef1 = SplineCoefs[iGather + 1];

317:     real_type sCoef2 = SplineCoefs[iGather + 2];

318:     real_type sCoef3 = SplineCoefs[iGather + 3];

319:

320:     // clang-format off

321:     laplArray[iScatter] = dSquareDeltaRinv *

322:       (sCoef0*( d2A[ 2]*tp2 + d2A[ 3])+

323:        sCoef1*( d2A[ 6]*tp2 + d2A[ 7])+

324:        sCoef2*( d2A[10]*tp2 + d2A[11])+

325:        sCoef3*( d2A[14]*tp2 + d2A[15]));

326:

327:     gradArray[iScatter] = DeltaRInv * rinv *

328:       (sCoef0*( dA[ 1]*tp1 + dA[ 2]*tp2 + dA[ 3])+

329:        sCoef1*( dA[ 5]*tp1 + dA[ 6]*tp2 + dA[ 7])+

330:        sCoef2*( dA[ 9]*tp1 + dA[10]*tp2 + dA[11])+

331:        sCoef3*( dA[13]*tp1 + dA[14]*tp2 + dA[15]));

332:

333:     valArray[iScatter] = (sCoef0*(A[ 0]*tp0 + A[ 1]*tp1 + A[ 2]*tp2 + A[ 3])+

334:         sCoef1*(A[ 4]*tp0 + A[ 5]*tp1 + A[ 6]*tp2 + A[ 7])+

335:         sCoef2*(A[ 8]*tp0 + A[ 9]*tp1 + A[10]*tp2 + A[11])+

336:         sCoef3*(A[12]*tp0 + A[13]*tp1 + A[14]*tp2 + A[15]));

/usr/include/c++/11/bits/stl_numeric.h: 140 - 141

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140:       for (; __first != __last; ++__first)

141: 	__init = _GLIBCXX_MOVE_IF_20(__init) + *__first;

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 249

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223:     return X[i];

[...]

229:     return X[i];

[...]

249:   inline const_pointer data() const { return X; }

/usr/include/c++/11/bits/stl_vector.h: 1061 - 1169

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1061:       operator[](size_type __n) const _GLIBCXX_NOEXCEPT

[...]

1169:       { return _M_data_ptr(this->_M_impl._M_start); }

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h: 265 - 400

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265:   const int igt = P.GroupID[iat] * NumGroups;

266:   for (int jg = 0; jg < NumGroups; ++jg)

267:   {

268:     const FuncType& f2(*F[igt + jg]);

[...]

356: void TwoBodyJastrowRef<FT>::recompute(ParticleSet& P)

357: {

358:   const DistanceTableData* d_table = P.DistTables[0];

359:   for (int ig = 0; ig < NumGroups; ++ig)

360:   {

361:     const int igt = ig * NumGroups;

362:     for (int iat = P.first(ig), last = P.last(ig); iat < last; ++iat)

363:     {

364:       computeU3(P, iat, d_table->Distances[iat], cur_u.data(), cur_du.data(), cur_d2u.data(), true);

365:       Uat[iat] = std::accumulate(cur_u.begin(), cur_u.begin() + iat, valT());

366:       posT grad;

367:       valT lap(0);

[...]

373:       for (int jat = 0; jat < iat; ++jat)

374:         lap += d2u[jat] + lapfac * du[jat];

375:       for (int idim = 0; idim < OHMMS_DIM; ++idim)

376:       {

377:         const valT* restrict dX = displ.data(idim);

378:         valT s                  = valT();

379:         for (int jat = 0; jat < iat; ++jat)

380:           s += du[jat] * dX[jat];

381:         grad[idim] = s;

382:       }

383:       dUat(iat)  = grad;

384:       d2Uat[iat] = -lap;

385:       // add the contribution from the upper triangle

386:       for (int jat = 0; jat < iat; jat++)

387:       {

388:         Uat[jat] += u[jat];

389:         d2Uat[jat] -= d2u[jat] + lapfac * du[jat];

390:       }

391:       for (int idim = 0; idim < OHMMS_DIM; ++idim)

392:       {

393:         valT* restrict save_g   = dUat.data(idim);

394:         const valT* restrict dX = displ.data(idim);

395:         for (int jat = 0; jat < iat; jat++)

396:           save_g[jat] -= du[jat] * dX[jat];

397:       }

398:     }

399:   }

400: }

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h: 216 - 243

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216:         *(_base + M * i) = rhs[i];

[...]

235:   Accessor operator()(size_t i) { return Accessor(myData + i, nGhosts); }

[...]

243:   const T* restrict data(size_t i) const { return myData + i * nGhosts; }

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 302 - 305

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302:   inline int first(int igroup) const { return SubPtcl[igroup]; }

303:

304:   /// return the last index of a group i

305:   inline int last(int igroup) const { return SubPtcl[igroup + 1]; }

0x435f40 CNTD	X12, ALL, MUL #13

0x435f44 ADD	X11, SP, #0

0x435f48 UBFM	X2, X12, #60, #59

0x435f4c ADD	X3, X2, #368

(657) 0x435f50 CMP	X3, #15

(657) 0x435f54 B.LT	435f68

(657) 0x435f58 SUB	SP, SP, #15

(657) 0x435f5c STR	XZR, [SP]

(657) 0x435f60 SUB	X3, X3, #15

(657) 0x435f64 B	435f50

0x435f68 SUB	SP, SP, X3,UXTX

0x435f6c STP	X29, X30, [SP]

0x435f70 ADRP	X4,

0x435f74 ADD	X29, SP, #0

0x435f78 ADDVL	X8, SP, #26

0x435f7c ORR	X6, XZR, X1

0x435f80 LDR	X5, [X4, #4016]

0x435f84 STP	X0, X1, [SP, #320]

0x435f88 LDR	X11, [X0, #160]

0x435f8c LDR	X0, [X1, #2576]

0x435f90 LDR	X1, [X5]

0x435f94 STR	X1, [X8, #360]

0x435f98 MOVZ	X1, #0

0x435f9c LDR	X1, [X0]

0x435fa0 STR	X1, [SP, #312]

0x435fa4 CBZ	X11, 437228

0x435fa8 STP	X27, X28, [SP, #80]

0x435fac LDR	X28, [X6, #2712]

0x435fb0 STP	X19, X20, [SP, #16]

0x435fb4 STP	X21, X22, [SP, #32]

0x435fb8 STP	X23, X24, [SP, #48]

0x435fbc STP	X25, X26, [SP, #64]

0x435fc0 STP	D8, D9, [SP, #96]

0x435fc4 STP	D10, D11, [SP, #112]

0x435fc8 STP	D12, D13, [SP, #128]

0x435fcc STP	D14, D15, [SP, #144]

0x435fd0 STR	XZR, [SP, #304]

  (650) 0x435fd4 LDR	X9, [SP, #304]

  (650) 0x435fd8 ADD	X13, X9, #1

  (650) 0x435fdc LDR	W10, [X28, X9,LSL #2]

  (650) 0x435fe0 LDR	W14, [X28, X13,LSL #2]

  (650) 0x435fe4 STR	X13, [SP, #304]

  (650) 0x435fe8 STR	W14, [SP, #264]

  (650) 0x435fec CMP	W10, W14

  (650) 0x435ff0 B.GE	4371f8

(646) 0x435ff4 LDP	X18, X19, [SP, #312]

(646) 0x435ff8 MOVZ	W15, #40

(646) 0x435ffc MOVZ	X16, #8

(646) 0x436000 SBFM	X20, X10, #0, #31

(646) 0x436004 SBFM	X2, X10, #61, #31

(646) 0x436008 SMADDL	X17, W10, W15, X16

(646) 0x43600c ADDVL	X0, SP, #26

(646) 0x436010 CNTW	X21, ALL

(646) 0x436014 ADD	X0, X0, #336

(646) 0x436018 STR	W11, [SP, #268]

(646) 0x43601c LDR	X27, [SP, #328]

(646) 0x436020 ADD	X23, X19, #488

(646) 0x436024 ORR	X22, XZR, X19

(646) 0x436028 STR	X0, [SP, #272]

(646) 0x43602c LDR	X24, [X19, #240]

(646) 0x436030 ADD	X3, X19, #464

(646) 0x436034 ADD	X4, X19, #512

(646) 0x436038 STR	X23, [SP, #288]

(646) 0x43603c LDR	X25, [X18, #24]

(646) 0x436040 STR	X3, [SP, #280]

(646) 0x436044 LDR	X26, [X18, #80]

(646) 0x436048 UBFM	X12, X24, #61, #60

(646) 0x43604c STR	X4, [SP, #296]

(646) 0x436050 LDR	X30, [X27, #1472]

(646) 0x436054 MADD	X7, X20, X25, XZR

(646) 0x436058 LDR	X5, [X19, #256]

(646) 0x43605c ADD	X10, X26, X17

(646) 0x436060 LDR	X24, [X19, #320]

(646) 0x436064 STP	X25, X30, [SP, #248]

(646) 0x436068 ADD	X1, X5, X12

(646) 0x43606c LDR	X8, [X18, #64]

(646) 0x436070 ADD	X13, X1, X12

(646) 0x436074 ADD	X9, X24, X2

(646) 0x436078 STR	X5, [SP, #168]

(646) 0x43607c LDR	X26, [X19, #216]

(646) 0x436080 STR	X1, [SP, #232]

(646) 0x436084 LDR	X25, [X19, #296]

(646) 0x436088 STR	X13, [SP, #240]

(646) 0x43608c LDR	X19, [X19, #344]

(646) 0x436090 LDR	X23, [X22, #368]

(646) 0x436094 HINT	#0

(646) 0x436098 HINT	#0

(646) 0x43609c HINT	#0

(646) 0x4360a0 ORR	W27, WZR, W20

(646) 0x4360a4 ORR	W22, WZR, W20

(646) 0x4360a8 CMP	W20, #0

(646) 0x4360ac B.LE	4360f8

(646) 0x4360b0 MOVZ	W1, #0

(646) 0x4360b4 ORR	X0, XZR, X24

(646) 0x4360b8 STP	X2, X12, [SP, #176]

(646) 0x4360bc STP	X10, X9, [SP, #192]

(646) 0x4360c0 STP	X7, X11, [SP, #208]

(646) 0x4360c4 STR	X8, [SP, #224]

(646) 0x4360c8 BL	403890

(646) 0x4360cc MOVZ	W1, #0

(646) 0x4360d0 ORR	X0, XZR, X19

(646) 0x4360d4 LDR	X2, [SP, #176]

(646) 0x4360d8 BL	403890

(646) 0x4360dc MOVZ	W1, #0

(646) 0x4360e0 ORR	X0, XZR, X23

(646) 0x4360e4 LDR	X2, [SP, #176]

(646) 0x4360e8 BL	403890

(646) 0x4360ec LDP	X12, X10, [SP, #184]

(646) 0x4360f0 LDP	X9, X7, [SP, #200]

(646) 0x4360f4 LDP	X11, X8, [SP, #216]

(646) 0x4360f8 MOVZ	X15, #0

(646) 0x4360fc LDR	X14, [SP, #256]

(646) 0x436100 LDR	X18, [SP, #280]

(646) 0x436104 LDR	X5, [SP, #288]

(646) 0x436108 LDRSW	X16, [X14, X20,LSL #2]

(646) 0x43610c LDR	W2, [SP, #268]

(646) 0x436110 LDR	X6, [X18]

(646) 0x436114 LDR	X13, [X5]

(646) 0x436118 MADD	W17, W2, W16, WZR

(646) 0x43611c LDR	X30, [SP, #296]

(646) 0x436120 ADDVL	X16, X6, #1

(646) 0x436124 LDR	X3, [X30]

(646) 0x436128 ADD	X18, X3, W17,SXTW #3

(646) 0x43612c LDR	X2, [X18, X15,LSL #3]

(646) 0x436130 LDR	W14, [X28, X15,LSL #2]

(646) 0x436134 ADD	X15, X15, #1

(646) 0x436138 LDR	W0, [X28, X15,LSL #2]

(646) 0x43613c LDR	D14, [X2, #568]

(646) 0x436140 SBFM	X4, X14, #0, #31

(646) 0x436144 CMP	W0, W27

(646) 0x436148 CSEL	W1, W0, W27, #13

(646) 0x43614c SUB	W5, W1, W14

(646) 0x436150 FMUL	D16, D14, D14

(646) 0x436154 CMP	W5, #0

(646) 0x436158 B.LE	436a50

(646) 0x43615c ADD	X30, X4, X7

(646) 0x436160 ANDS	W17, W5, #128

(646) 0x436164 LDR	D0, [X2, #8]

(646) 0x436168 ADD	X1, X8, X30,LSL #3

(646) 0x43616c MOVZ	X0, #0

(646) 0x436170 MOVZ	W3, #0

(646) 0x436174 B.EQ	4362e0

(646) 0x436178 CMP	W17, #1

(646) 0x43617c B.EQ	4362ac

(646) 0x436180 CMP	W17, #2

(646) 0x436184 B.EQ	436280

(646) 0x436188 CMP	W17, #3

(646) 0x43618c B.EQ	436254

(646) 0x436190 CMP	W17, #4

(646) 0x436194 B.EQ	436228

(646) 0x436198 CMP	W17, #5

(646) 0x43619c B.EQ	4361fc

(646) 0x4361a0 CMP	W17, #6

(646) 0x4361a4 B.EQ	4361d0

(646) 0x4361a8 LDR	D1, [X8, X30,LSL #3]

(646) 0x4361ac FCMPE	D1, D0

(646) 0x4361b0 B.GE	4361cc

(646) 0x4361b4 CMP	W14, W20

(646) 0x4361b8 B.EQ	4361cc

(646) 0x4361bc MOVZ	X0, #0

(646) 0x4361c0 MOVZ	W3, #1

(646) 0x4361c4 STR	WZR, [X13, X0]

(646) 0x4361c8 STR	D1, [X6, X0]

(646) 0x4361cc MOVZ	X0, #1

(646) 0x4361d0 LDR	D2, [X1, X0,LSL #3]

(646) 0x4361d4 FCMPE	D2, D0

(646) 0x4361d8 B.GE	4361f8

(646) 0x4361dc ADD	W30, W14, W0

(646) 0x4361e0 CMP	W30, W20

(646) 0x4361e4 B.EQ	4361f8

(646) 0x4361e8 SBFM	X17, X3, #0, #31

(646) 0x4361ec ADD	W3, W3, #1

(646) 0x4361f0 STR	W0, [X13, X17,LSL #2]

(646) 0x4361f4 STR	D2, [X6, X17,LSL #3]

(646) 0x4361f8 ADD	X0, X0, #1

(646) 0x4361fc LDR	D3, [X1, X0,LSL #3]

(646) 0x436200 FCMPE	D3, D0

(646) 0x436204 B.GE	436224

(646) 0x436208 ADD	W30, W14, W0

(646) 0x43620c CMP	W30, W20

(646) 0x436210 B.EQ	436224

(646) 0x436214 SBFM	X17, X3, #0, #31

(646) 0x436218 ADD	W3, W3, #1

(646) 0x43621c STR	W0, [X13, X17,LSL #2]

(646) 0x436220 STR	D3, [X6, X17,LSL #3]

(646) 0x436224 ADD	X0, X0, #1

(646) 0x436228 LDR	D4, [X1, X0,LSL #3]

(646) 0x43622c FCMPE	D4, D0

(646) 0x436230 B.GE	436250

(646) 0x436234 ADD	W30, W14, W0

(646) 0x436238 CMP	W30, W20

(646) 0x43623c B.EQ	436250

(646) 0x436240 SBFM	X17, X3, #0, #31

(646) 0x436244 ADD	W3, W3, #1

(646) 0x436248 STR	W0, [X13, X17,LSL #2]

(646) 0x43624c STR	D4, [X6, X17,LSL #3]

(646) 0x436250 ADD	X0, X0, #1

(646) 0x436254 LDR	D5, [X1, X0,LSL #3]

(646) 0x436258 FCMPE	D5, D0

(646) 0x43625c B.GE	43627c

(646) 0x436260 ADD	W30, W14, W0

(646) 0x436264 CMP	W30, W20

(646) 0x436268 B.EQ	43627c

(646) 0x43626c SBFM	X17, X3, #0, #31

(646) 0x436270 ADD	W3, W3, #1

(646) 0x436274 STR	W0, [X13, X17,LSL #2]

(646) 0x436278 STR	D5, [X6, X17,LSL #3]

(646) 0x43627c ADD	X0, X0, #1

(646) 0x436280 LDR	D6, [X1, X0,LSL #3]

(646) 0x436284 FCMPE	D6, D0

(646) 0x436288 B.GE	4362a8

(646) 0x43628c ADD	W30, W14, W0

(646) 0x436290 CMP	W30, W20

(646) 0x436294 B.EQ	4362a8

(646) 0x436298 SBFM	X17, X3, #0, #31

(646) 0x43629c ADD	W3, W3, #1

(646) 0x4362a0 STR	W0, [X13, X17,LSL #2]

(646) 0x4362a4 STR	D6, [X6, X17,LSL #3]

(646) 0x4362a8 ADD	X0, X0, #1

(646) 0x4362ac LDR	D7, [X1, X0,LSL #3]

(646) 0x4362b0 FCMPE	D7, D0

(646) 0x4362b4 B.GE	4362d4

(646) 0x4362b8 ADD	W30, W14, W0

(646) 0x4362bc CMP	W30, W20

(646) 0x4362c0 B.EQ	4362d4

(646) 0x4362c4 SBFM	X17, X3, #0, #31

(646) 0x4362c8 ADD	W3, W3, #1

(646) 0x4362cc STR	W0, [X13, X17,LSL #2]

(646) 0x4362d0 STR	D7, [X6, X17,LSL #3]

(646) 0x4362d4 ADD	X0, X0, #1

(646) 0x4362d8 CMP	W5, W0

(646) 0x4362dc B.LE	436448

  (647) 0x4362e0 LDR	D8, [X1, X0,LSL #3]

  (647) 0x4362e4 FCMPE	D8, D0

  (647) 0x4362e8 B.GE	436308

  (647) 0x4362ec ADD	W30, W14, W0

  (647) 0x4362f0 CMP	W30, W20

  (647) 0x4362f4 B.EQ	436308

  (647) 0x4362f8 SBFM	X17, X3, #0, #31

  (647) 0x4362fc ADD	W3, W3, #1

  (647) 0x436300 STR	W0, [X13, X17,LSL #2]

  (647) 0x436304 STR	D8, [X6, X17,LSL #3]

  (647) 0x436308 ADD	X0, X0, #1

  (647) 0x43630c LDR	D9, [X1, X0,LSL #3]

  (647) 0x436310 FCMPE	D9, D0

  (647) 0x436314 B.GE	436334

  (647) 0x436318 ADD	W30, W14, W0

  (647) 0x43631c CMP	W30, W20

  (647) 0x436320 B.EQ	436334

  (647) 0x436324 SBFM	X17, X3, #0, #31

  (647) 0x436328 ADD	W3, W3, #1

  (647) 0x43632c STR	W0, [X13, X17,LSL #2]

  (647) 0x436330 STR	D9, [X6, X17,LSL #3]

  (647) 0x436334 ADD	X17, X0, #1

  (647) 0x436338 LDR	D10, [X1, X17,LSL #3]

  (647) 0x43633c FCMPE	D10, D0

  (647) 0x436340 B.GE	436360

  (647) 0x436344 ADD	W30, W14, W17

  (647) 0x436348 CMP	W30, W20

  (647) 0x43634c B.EQ	436360

  (647) 0x436350 SBFM	X30, X3, #0, #31

  (647) 0x436354 ADD	W3, W3, #1

  (647) 0x436358 STR	W17, [X13, X30,LSL #2]

  (647) 0x43635c STR	D10, [X6, X30,LSL #3]

  (647) 0x436360 ADD	X17, X0, #2

  (647) 0x436364 LDR	D11, [X1, X17,LSL #3]

  (647) 0x436368 FCMPE	D11, D0

  (647) 0x43636c B.GE	43638c

  (647) 0x436370 ADD	W30, W14, W17

  (647) 0x436374 CMP	W30, W20

  (647) 0x436378 B.EQ	43638c

  (647) 0x43637c SBFM	X30, X3, #0, #31

  (647) 0x436380 ADD	W3, W3, #1

  (647) 0x436384 STR	W17, [X13, X30,LSL #2]

  (647) 0x436388 STR	D11, [X6, X30,LSL #3]

  (647) 0x43638c ADD	X17, X0, #3

  (647) 0x436390 LDR	D12, [X1, X17,LSL #3]

  (647) 0x436394 FCMPE	D12, D0

  (647) 0x436398 B.GE	4363b8

  (647) 0x43639c ADD	W30, W14, W17

  (647) 0x4363a0 CMP	W30, W20

  (647) 0x4363a4 B.EQ	4363b8

  (647) 0x4363a8 SBFM	X30, X3, #0, #31

  (647) 0x4363ac ADD	W3, W3, #1

  (647) 0x4363b0 STR	W17, [X13, X30,LSL #2]

  (647) 0x4363b4 STR	D12, [X6, X30,LSL #3]

  (647) 0x4363b8 ADD	X17, X0, #4

  (647) 0x4363bc LDR	D13, [X1, X17,LSL #3]

  (647) 0x4363c0 FCMPE	D13, D0

  (647) 0x4363c4 B.GE	4363e4

  (647) 0x4363c8 ADD	W30, W14, W17

  (647) 0x4363cc CMP	W30, W20

  (647) 0x4363d0 B.EQ	4363e4

  (647) 0x4363d4 SBFM	X30, X3, #0, #31

  (647) 0x4363d8 ADD	W3, W3, #1

  (647) 0x4363dc STR	W17, [X13, X30,LSL #2]

  (647) 0x4363e0 STR	D13, [X6, X30,LSL #3]

  (647) 0x4363e4 ADD	X17, X0, #5

  (647) 0x4363e8 LDR	D15, [X1, X17,LSL #3]

  (647) 0x4363ec FCMPE	D15, D0

  (647) 0x4363f0 B.GE	436410

  (647) 0x4363f4 ADD	W30, W14, W17

  (647) 0x4363f8 CMP	W30, W20

  (647) 0x4363fc B.EQ	436410

  (647) 0x436400 SBFM	X30, X3, #0, #31

  (647) 0x436404 ADD	W3, W3, #1

  (647) 0x436408 STR	W17, [X13, X30,LSL #2]

  (647) 0x43640c STR	D15, [X6, X30,LSL #3]

  (647) 0x436410 ADD	X17, X0, #6

  (647) 0x436414 LDR	D17, [X1, X17,LSL #3]

  (647) 0x436418 FCMPE	D17, D0

  (647) 0x43641c B.GE	43643c

  (647) 0x436420 ADD	W30, W14, W17

  (647) 0x436424 CMP	W30, W20

  (647) 0x436428 B.EQ	43643c

  (647) 0x43642c SBFM	X30, X3, #0, #31

  (647) 0x436430 ADD	W3, W3, #1

  (647) 0x436434 STR	W17, [X13, X30,LSL #2]

  (647) 0x436438 STR	D17, [X6, X30,LSL #3]

  (647) 0x43643c ADD	X0, X0, #7

  (647) 0x436440 CMP	W5, W0

  (647) 0x436444 B.GT	4362e0

(646) 0x436448 ADDVL	X14, SP, #22

(646) 0x43644c FDUP	Z18.D, #112

(646) 0x436450 PTRUE	P0.B, ALL

(646) 0x436454 ADD	X14, X14, #336

(646) 0x436458 STR	Z18, [X14, MUL VL]

(646) 0x43645c CBZ	W3, 436a50

0x436460 ADDVL	X0, SP, #20

0x436464 UBFM	X4, X4, #61, #60

0x436468 LD1RD	{Z20.D}, P0/Z, [X2, #21]

0x43646c ADD	X0, X0, #336

0x436470 ADDVL	X17, SP, #21

0x436474 STR	Z20, [X0, MUL VL]

0x436478 ADD	X17, X17, #336

0x43647c ADD	X30, X23, X4

0x436480 LD1RD	{Z19.D}, P0/Z, [X2, #20]

0x436484 ADD	X5, X19, X4

0x436488 ADD	X14, X24, X4

0x43648c STR	Z19, [X17, MUL VL]

0x436490 ADDVL	X4, SP, #19

0x436494 ADDVL	X0, SP, #17

0x436498 DUP	Z29.D, Z16.D[0]

0x43649c ADD	X4, X4, #336

0x4364a0 ADD	X0, X0, #336

0x4364a4 LD1RD	{Z30.D}, P0/Z, [X2, #22]

0x4364a8 ADDVL	X17, SP, #18

0x4364ac LD1RD	{Z16.D}, P0/Z, [X2, #25]

0x4364b0 STR	Z30, [X4, MUL VL]

0x4364b4 ADD	X17, X17, #336

0x4364b8 ADDVL	X4, SP, #16

0x4364bc STR	Z16, [X0, MUL VL]

0x4364c0 ADDVL	X0, SP, #14

0x4364c4 ADD	X4, X4, #336

0x4364c8 LD1RD	{Z31.D}, P0/Z, [X2, #24]

0x4364cc ADD	X0, X0, #336

0x4364d0 STR	Z31, [X17, MUL VL]

0x4364d4 ADDVL	X17, SP, #15

0x4364d8 ADD	X17, X17, #336

0x4364dc LD1RD	{Z0.D}, P0/Z, [X2, #26]

0x4364e0 LD1RD	{Z2.D}, P0/Z, [X2, #29]

0x4364e4 STR	Z0, [X4, MUL VL]

0x4364e8 ADDVL	X4, SP, #13

0x4364ec STR	Z2, [X0, MUL VL]

0x4364f0 ADDVL	X0, SP, #11

0x4364f4 ADD	X4, X4, #336

0x4364f8 LD1RD	{Z1.D}, P0/Z, [X2, #28]

0x4364fc ADD	X0, X0, #336

0x436500 STR	Z1, [X17, MUL VL]

0x436504 ADDVL	X17, SP, #12

0x436508 ADD	X17, X17, #336

0x43650c LD1RD	{Z3.D}, P0/Z, [X2, #30]

0x436510 LD1RD	{Z5.D}, P0/Z, [X2, #33]

0x436514 STR	Z3, [X4, MUL VL]

0x436518 ADDVL	X4, SP, #10

0x43651c STR	Z5, [X0, MUL VL]

0x436520 ADDVL	X0, SP, #8

0x436524 ADD	X4, X4, #336

0x436528 LD1RD	{Z4.D}, P0/Z, [X2, #32]

0x43652c ADD	X0, X0, #336

0x436530 STR	Z4, [X17, MUL VL]

0x436534 ADDVL	X17, SP, #9

0x436538 ADD	X17, X17, #336

0x43653c LD1RD	{Z6.D}, P0/Z, [X2, #34]

0x436540 LD1RD	{Z28.D}, P0/Z, [X2, #37]

0x436544 LD1RD	{Z27.D}, P0/Z, [X2, #38]

0x436548 LD1RD	{Z26.D}, P0/Z, [X2, #41]

0x43654c LD1RD	{Z25.D}, P0/Z, [X2, #42]

0x436550 LD1RD	{Z24.D}, P0/Z, [X2, #45]

0x436554 LD1RD	{Z23.D}, P0/Z, [X2, #46]

0x436558 LD1RD	{Z22.D}, P0/Z, [X2, #49]

0x43655c LD1RD	{Z21.D}, P0/Z, [X2, #50]

0x436560 STR	Z6, [X4, MUL VL]

0x436564 LD1RD	{Z7.D}, P0/Z, [X2, #3]

0x436568 ADD	X4, SP, #336

0x43656c LD1RD	{Z8.D}, P0/Z, [X2, #4]

0x436570 STR	Z8, [X0, MUL VL]

0x436574 ADD	X0, SP, #336

0x436578 LD1RD	{Z17.D}, P0/Z, [X2, #11]

0x43657c LD1RD	{Z9.D}, P0/Z, [X2, #5]

0x436580 STR	Z17, [X0, #2, MUL VL]

0x436584 STR	Z9, [X4, #7, MUL VL]

0x436588 LD1RD	{Z10.D}, P0/Z, [X2, #6]

0x43658c LD1RD	{Z11.D}, P0/Z, [X2, #7]

0x436590 STR	Z10, [X4, #6, MUL VL]

0x436594 STR	Z11, [X4, #5, MUL VL]

0x436598 LD1RD	{Z13.D}, P0/Z, [X2, #9]

0x43659c LD1RD	{Z15.D}, P0/Z, [X2, #10]

0x4365a0 STR	Z13, [X0, #4, MUL VL]

0x4365a4 STR	Z15, [X0, #3, MUL VL]

0x4365a8 STR	Z7, [X17, MUL VL]

0x4365ac ADDVL	X17, X4, #24

0x4365b0 ADDVL	X4, X0, #23

0x4365b4 LDR	X0, [X2, #536]

0x4365b8 MOVZ	X1, #0

0x4365bc LD1RD	{Z18.D}, P0/Z, [X2, #12]

0x4365c0 LD1RD	{Z19.D}, P0/Z, [X2, #13]

0x4365c4 LD1RD	{Z20.D}, P0/Z, [X2, #14]

0x4365c8 LD1RD	{Z12.D}, P0/Z, [X2, #8]

0x4365cc STR	Z18, [X4, MUL VL]

0x4365d0 ADD	X4, SP, #336

0x4365d4 STR	Z12, [X17, MUL VL]

0x4365d8 ADD	X17, SP, #336

0x4365dc DUP	Z14.D, Z14.D[0]

0x4365e0 STR	Z19, [X17, #1, MUL VL]

0x4365e4 WHILELO	P3.S, WZR, W3

0x4365e8 ADDVL	X17, X4, #25

0x4365ec LD1RD	{Z19.D}, P0/Z, [X2, #16]

0x4365f0 LD1RD	{Z18.D}, P0/Z, [X2, #17]

0x4365f4 LD1RD	{Z17.D}, P0/Z, [X2, #18]

0x4365f8 STR	Z20, [X4, MUL VL]

0x4365fc LD1RD	{Z20.D}, P0/Z, [X2, #15]

0x436600 STR	Z29, [X17, MUL VL]

(645) 0x436604 PUNPKHI	P1.H, P3.B

(645) 0x436608 LD1D	{Z4.D}, P1/Z, [X16, X1,LSL #3]

(645) 0x43660c FMUL	Z0.D, Z14.D, Z4.D

(645) 0x436610 MOVPRFX	Z31, Z0

(645) 0x436614 FCVTZS	Z31.S, P0/M, Z0.D

(645) 0x436618 PUNPKLO	P2.H, P3.B

(645) 0x43661c LD1D	{Z8.D}, P2/Z, [X6, X1,LSL #3]

(645) 0x436620 FMUL	Z29.D, Z8.D, Z14.D

(645) 0x436624 MOVPRFX	Z30, Z29

(645) 0x436628 FCVTZS	Z30.S, P0/M, Z29.D

(645) 0x43662c UZP1	Z2.S, Z30.S, Z31.S

(645) 0x436630 MOVPRFX	Z3, Z2

(645) 0x436634 ADD	Z3.S, Z3.S, #1

(645) 0x436638 MOVPRFX	Z31, Z2

(645) 0x43663c ADD	Z31.S, Z31.S, #3

(645) 0x436640 SUNPKLO	Z5.D, Z3

(645) 0x436644 SUNPKLO	Z11.D, Z2

(645) 0x436648 ZIP2	Z16.S, Z2.S, Z2.S

(645) 0x43664c SUNPKHI	Z7.D, Z3

(645) 0x436650 SCVTF	Z16.D, P0/M, Z16.S

(645) 0x436654 SUNPKHI	Z3.D, Z31

(645) 0x436658 FSUB	Z1.D, Z29.D, Z16.D

(645) 0x43665c SUNPKLO	Z12.D, Z31

(645) 0x436660 MOVPRFX	Z6, Z25

(645) 0x436664 FMLA	Z6.D, P0/M, Z26.D, Z1.D

(645) 0x436668 LD1D	{Z12.D}, P2/Z, [X0, Z12.D,LSL #3]

(645) 0x43666c MOVPRFX	Z29, Z21

(645) 0x436670 FMLA	Z29.D, P0/M, Z22.D, Z1.D

(645) 0x436674 FMUL	Z31.D, Z29.D, Z12.D

(645) 0x436678 LD1D	{Z30.D}, P2/Z, [X0, Z5.D,LSL #3]

(645) 0x43667c LD1D	{Z13.D}, P2/Z, [X0, Z11.D,LSL #3]

(645) 0x436680 FMUL	Z10.D, Z6.D, Z30.D

(645) 0x436684 MOVPRFX	Z5, Z2

(645) 0x436688 ADD	Z5.S, Z5.S, #2

(645) 0x43668c LD1D	{Z6.D}, P1/Z, [X0, Z3.D,LSL #3]

(645) 0x436690 MOVPRFX	Z16, Z27

(645) 0x436694 FMLA	Z16.D, P0/M, Z28.D, Z1.D

(645) 0x436698 MOVPRFX	Z29, Z23

(645) 0x43669c FMLA	Z29.D, P0/M, Z24.D, Z1.D

(645) 0x4366a0 FMAD	Z16.D, P0/M, Z13.D, Z10.D

(645) 0x4366a4 SUNPKLO	Z11.D, Z5

(645) 0x4366a8 SUNPKHI	Z3.D, Z5

(645) 0x4366ac LD1D	{Z11.D}, P2/Z, [X0, Z11.D,LSL #3]

(645) 0x4366b0 ADDVL	X4, SP, #25

(645) 0x4366b4 FMAD	Z29.D, P0/M, Z11.D, Z31.D

(645) 0x4366b8 ADDVL	X2, SP, #22

(645) 0x4366bc FADD	Z31.D, Z16.D, Z29.D

(645) 0x4366c0 LD1D	{Z5.D}, P1/Z, [X0, Z3.D,LSL #3]

(645) 0x4366c4 LD1W	{Z9.S}, P3/Z, [X13, X1,LSL #2]

(645) 0x4366c8 LD1D	{Z7.D}, P1/Z, [X0, Z7.D,LSL #3]

(645) 0x4366cc SUNPKLO	Z15.D, Z9

(645) 0x4366d0 ADD	X4, X4, #336

(645) 0x4366d4 ADD	X2, X2, #336

(645) 0x4366d8 SUNPKHI	Z10.D, Z2

(645) 0x4366dc ADDVL	X17, SP, #13

(645) 0x4366e0 LD1D	{Z10.D}, P1/Z, [X0, Z10.D,LSL #3]

(645) 0x4366e4 ZIP1	Z2.S, Z2.S, Z2.S

(645) 0x4366e8 SCVTF	Z2.D, P0/M, Z2.S

(645) 0x4366ec FSUB	Z0.D, Z0.D, Z2.D

(645) 0x4366f0 MOVPRFX	Z3, Z21

(645) 0x4366f4 FMLA	Z3.D, P0/M, Z22.D, Z0.D

(645) 0x4366f8 FMUL	Z3.D, Z3.D, Z6.D

(645) 0x4366fc LDR	Z16, [X4, MUL VL]

(645) 0x436700 FMUL	Z29.D, Z31.D, Z16.D

(645) 0x436704 MOVPRFX	Z31, Z23

(645) 0x436708 FMLA	Z31.D, P0/M, Z24.D, Z0.D

(645) 0x43670c ST1D	{Z29.D}, P2, [X30, Z15.D,LSL #3]

(645) 0x436710 FMLA	Z3.D, P0/M, Z31.D, Z5.D

(645) 0x436714 SUNPKHI	Z9.D, Z9

(645) 0x436718 MOVPRFX	Z29, Z25

(645) 0x43671c FMLA	Z29.D, P0/M, Z26.D, Z0.D

(645) 0x436720 ADD	X17, X17, #336

(645) 0x436724 FMUL	Z31.D, Z29.D, Z7.D

(645) 0x436728 MOVPRFX	Z2, Z27

(645) 0x43672c FMLA	Z2.D, P0/M, Z28.D, Z0.D

(645) 0x436730 ADDVL	X4, SP, #14

(645) 0x436734 FMAD	Z2.D, P0/M, Z10.D, Z31.D

(645) 0x436738 FADD	Z2.D, Z2.D, Z3.D

(645) 0x43673c FMUL	Z16.D, Z2.D, Z16.D

(645) 0x436740 ST1D	{Z16.D}, P1, [X30, Z9.D,LSL #3]

(645) 0x436744 LDR	Z3, [X2, MUL VL]

(645) 0x436748 ADDVL	X2, SP, #10

(645) 0x43674c ADD	X4, X4, #336

(645) 0x436750 ADD	X2, X2, #336

(645) 0x436754 LDR	Z31, [X4, MUL VL]

(645) 0x436758 LDR	Z29, [X17, MUL VL]

(645) 0x43675c ADDVL	X17, SP, #11

(645) 0x436760 FMLA	Z29.D, P0/M, Z31.D, Z1.D

(645) 0x436764 ADD	X17, X17, #336

(645) 0x436768 ADDVL	X4, SP, #15

(645) 0x43676c LDR	Z31, [X2, MUL VL]

(645) 0x436770 ADDVL	X2, SP, #12

(645) 0x436774 ADD	X4, X4, #336

(645) 0x436778 LDR	Z2, [X17, MUL VL]

(645) 0x43677c ADD	X2, X2, #336

(645) 0x436780 ADDVL	X17, SP, #19

(645) 0x436784 FMLA	Z31.D, P0/M, Z2.D, Z1.D

(645) 0x436788 ADD	X17, X17, #336

(645) 0x43678c LDR	Z16, [X4, MUL VL]

(645) 0x436790 ADDVL	X4, SP, #20

(645) 0x436794 LDR	Z2, [X2, MUL VL]

(645) 0x436798 ADDVL	X2, SP, #21

(645) 0x43679c ADD	X4, X4, #336

(645) 0x4367a0 ADD	X2, X2, #336

(645) 0x4367a4 FDIVR	Z8.D, P0/M, Z8.D, Z3.D

(645) 0x4367a8 FMUL	Z3.D, Z1.D, Z1.D

(645) 0x4367ac FMLA	Z29.D, P0/M, Z16.D, Z3.D

(645) 0x4367b0 FMLA	Z31.D, P0/M, Z2.D, Z3.D

(645) 0x4367b4 LDR	Z16, [X4, MUL VL]

(645) 0x4367b8 LDR	Z2, [X17, MUL VL]

(645) 0x4367bc ADDVL	X17, SP, #16

(645) 0x4367c0 FMLA	Z2.D, P0/M, Z16.D, Z1.D

(645) 0x4367c4 FMUL	Z31.D, Z31.D, Z12.D

(645) 0x4367c8 ADD	X17, X17, #336

(645) 0x4367cc ADDVL	X4, SP, #17

(645) 0x4367d0 LDR	Z16, [X2, MUL VL]

(645) 0x4367d4 ADDVL	X2, SP, #18

(645) 0x4367d8 FMLA	Z2.D, P0/M, Z16.D, Z3.D

(645) 0x4367dc FMAD	Z29.D, P0/M, Z11.D, Z31.D

(645) 0x4367e0 ADD	X4, X4, #336

(645) 0x4367e4 ADD	X2, X2, #336

(645) 0x4367e8 LDR	Z16, [X4, MUL VL]

(645) 0x4367ec LDR	Z31, [X17, MUL VL]

(645) 0x4367f0 ADDVL	X17, SP, #22

(645) 0x4367f4 FMLA	Z31.D, P0/M, Z16.D, Z1.D

(645) 0x4367f8 ADD	X17, X17, #336

(645) 0x4367fc ADDVL	X4, SP, #13

(645) 0x436800 LDR	Z16, [X2, MUL VL]

(645) 0x436804 ADDVL	X2, SP, #14

(645) 0x436808 FMLA	Z31.D, P0/M, Z16.D, Z3.D

(645) 0x43680c FMUL	Z31.D, Z31.D, Z30.D

(645) 0x436810 FMAD	Z2.D, P0/M, Z13.D, Z31.D

(645) 0x436814 ADD	X4, X4, #336

(645) 0x436818 FADD	Z29.D, Z2.D, Z29.D

(645) 0x43681c ADD	X2, X2, #336

(645) 0x436820 FMUL	Z8.D, Z8.D, Z14.D

(645) 0x436824 FMUL	Z8.D, Z29.D, Z8.D

(645) 0x436828 ST1D	{Z8.D}, P2, [X5, Z15.D,LSL #3]

(645) 0x43682c LDR	Z2, [X17, MUL VL]

(645) 0x436830 ADDVL	X17, SP, #10

(645) 0x436834 FDIVR	Z4.D, P0/M, Z4.D, Z2.D

(645) 0x436838 FMUL	Z8.D, Z4.D, Z14.D

(645) 0x43683c ADD	X17, X17, #336

(645) 0x436840 LDR	Z4, [X2, MUL VL]

(645) 0x436844 ADDVL	X2, SP, #15

(645) 0x436848 LDR	Z29, [X4, MUL VL]

(645) 0x43684c ADDVL	X4, SP, #11

(645) 0x436850 ADD	X2, X2, #336

(645) 0x436854 ADD	X4, X4, #336

(645) 0x436858 LDR	Z31, [X17, MUL VL]

(645) 0x43685c ADDVL	X17, SP, #12

(645) 0x436860 LDR	Z16, [X4, MUL VL]

(645) 0x436864 FMLA	Z29.D, P0/M, Z4.D, Z0.D

(645) 0x436868 FMLA	Z31.D, P0/M, Z16.D, Z0.D

(645) 0x43686c ADD	X17, X17, #336

(645) 0x436870 LDR	Z4, [X2, MUL VL]

(645) 0x436874 ADDVL	X2, SP, #20

(645) 0x436878 LDR	Z16, [X17, MUL VL]

(645) 0x43687c FMUL	Z2.D, Z0.D, Z0.D

(645) 0x436880 ADD	X2, X2, #336

(645) 0x436884 FMLA	Z31.D, P0/M, Z16.D, Z2.D

(645) 0x436888 ADDVL	X4, SP, #19

(645) 0x43688c ADDVL	X17, SP, #21

(645) 0x436890 LDR	Z16, [X2, MUL VL]

(645) 0x436894 FMLA	Z29.D, P0/M, Z4.D, Z2.D

(645) 0x436898 ADD	X4, X4, #336

(645) 0x43689c ADD	X17, X17, #336

(645) 0x4368a0 ADDVL	X2, SP, #17

(645) 0x4368a4 LDR	Z4, [X4, MUL VL]

(645) 0x4368a8 FMLA	Z4.D, P0/M, Z16.D, Z0.D

(645) 0x4368ac LDR	Z16, [X17, MUL VL]

(645) 0x4368b0 FMUL	Z31.D, Z31.D, Z6.D

(645) 0x4368b4 FMLA	Z4.D, P0/M, Z16.D, Z2.D

(645) 0x4368b8 ADD	X2, X2, #336

(645) 0x4368bc ADDVL	X4, SP, #16

(645) 0x4368c0 ADDVL	X17, SP, #18

(645) 0x4368c4 LDR	Z16, [X2, MUL VL]

(645) 0x4368c8 FMAD	Z29.D, P0/M, Z5.D, Z31.D

(645) 0x4368cc ADD	X4, X4, #336

(645) 0x4368d0 ADD	X17, X17, #336

(645) 0x4368d4 LDR	Z31, [X4, MUL VL]

(645) 0x4368d8 FMLA	Z31.D, P0/M, Z16.D, Z0.D

(645) 0x4368dc LDR	Z16, [X17, MUL VL]

(645) 0x4368e0 FMLA	Z31.D, P0/M, Z16.D, Z2.D

(645) 0x4368e4 FMUL	Z31.D, Z31.D, Z7.D

(645) 0x4368e8 ADD	X2, SP, #336

(645) 0x4368ec FMAD	Z4.D, P0/M, Z10.D, Z31.D

(645) 0x4368f0 ADDVL	X4, SP, #24

(645) 0x4368f4 FADD	Z29.D, Z4.D, Z29.D

(645) 0x4368f8 FMUL	Z8.D, Z29.D, Z8.D

(645) 0x4368fc ST1D	{Z8.D}, P1, [X5, Z9.D,LSL #3]

(645) 0x436900 LDR	Z31, [X2, #4, MUL VL]

(645) 0x436904 LDR	Z4, [X2, #3, MUL VL]

(645) 0x436908 ADD	X4, X4, #336

(645) 0x43690c FMLA	Z4.D, P0/M, Z31.D, Z1.D

(645) 0x436910 ADDVL	X17, SP, #9

(645) 0x436914 LDR	Z31, [X2, #5, MUL VL]

(645) 0x436918 FMUL	Z29.D, Z3.D, Z1.D

(645) 0x43691c INCB	X2, ALL, MUL #8

(645) 0x436920 ADD	X17, X17, #336

(645) 0x436924 LDR	Z16, [X4, MUL VL]

(645) 0x436928 ADD	X4, SP, #336

(645) 0x43692c FMUL	Z8.D, Z16.D, Z3.D

(645) 0x436930 FMLA	Z8.D, P0/M, Z31.D, Z29.D

(645) 0x436934 FADD	Z8.D, Z4.D, Z8.D

(645) 0x436938 FMUL	Z8.D, Z8.D, Z30.D

(645) 0x43693c LDR	Z30, [X4, #7, MUL VL]

(645) 0x436940 LDR	Z4, [X17, MUL VL]

(645) 0x436944 LDR	Z31, [X2, MUL VL]

(645) 0x436948 FMUL	Z31.D, Z31.D, Z3.D

(645) 0x43694c FMLA	Z31.D, P0/M, Z4.D, Z29.D

(645) 0x436950 ADD	X17, SP, #336

(645) 0x436954 LDR	Z4, [X4, #6, MUL VL]

(645) 0x436958 ADDVL	X2, X4, #23

(645) 0x43695c FMLA	Z4.D, P0/M, Z30.D, Z1.D

(645) 0x436960 FMUL	Z30.D, Z19.D, Z3.D

(645) 0x436964 FADD	Z4.D, Z4.D, Z31.D

(645) 0x436968 FMLA	Z30.D, P0/M, Z20.D, Z29.D

(645) 0x43696c LDR	Z31, [X17, #2, MUL VL]

(645) 0x436970 FMAD	Z4.D, P0/M, Z13.D, Z8.D

(645) 0x436974 MOVPRFX	Z8, Z17

(645) 0x436978 FMLA	Z8.D, P0/M, Z18.D, Z1.D

(645) 0x43697c FADD	Z8.D, Z8.D, Z30.D

(645) 0x436980 LDR	Z13, [X2, MUL VL]

(645) 0x436984 FMUL	Z3.D, Z13.D, Z3.D

(645) 0x436988 FMAD	Z29.D, P0/M, Z31.D, Z3.D

(645) 0x43698c FMUL	Z12.D, Z8.D, Z12.D

(645) 0x436990 LDR	Z3, [X17, #1, MUL VL]

(645) 0x436994 ADDVL	X4, SP, #9

(645) 0x436998 LDR	Z30, [X17, MUL VL]

(645) 0x43699c FMAD	Z1.D, P0/M, Z3.D, Z30.D

(645) 0x4369a0 FADD	Z1.D, Z1.D, Z29.D

(645) 0x4369a4 FMUL	Z29.D, Z16.D, Z2.D

(645) 0x4369a8 FMAD	Z1.D, P0/M, Z11.D, Z12.D

(645) 0x4369ac FADD	Z11.D, Z4.D, Z1.D

(645) 0x4369b0 ST1D	{Z11.D}, P2, [X14, Z15.D,LSL #3]

(645) 0x4369b4 FMUL	Z15.D, Z2.D, Z0.D

(645) 0x4369b8 LDR	Z4, [X17, #4, MUL VL]

(645) 0x4369bc LDR	Z31, [X17, #5, MUL VL]

(645) 0x4369c0 LDR	Z16, [X17, #3, MUL VL]

(645) 0x4369c4 FMLA	Z29.D, P0/M, Z31.D, Z15.D

(645) 0x4369c8 FMLA	Z16.D, P0/M, Z4.D, Z0.D

(645) 0x4369cc INCB	X17, ALL, MUL #8

(645) 0x4369d0 LDR	Z8, [X17, MUL VL]

(645) 0x4369d4 ADD	X2, SP, #336

(645) 0x4369d8 FMUL	Z12.D, Z8.D, Z2.D

(645) 0x4369dc FADD	Z3.D, Z16.D, Z29.D

(645) 0x4369e0 LDR	Z1, [X2, #6, MUL VL]

(645) 0x4369e4 FMUL	Z11.D, Z3.D, Z7.D

(645) 0x4369e8 FMUL	Z29.D, Z19.D, Z2.D

(645) 0x4369ec LDR	Z7, [X2, #7, MUL VL]

(645) 0x4369f0 FMLA	Z29.D, P0/M, Z20.D, Z15.D

(645) 0x4369f4 FMLA	Z1.D, P0/M, Z7.D, Z0.D

(645) 0x4369f8 LDR	Z31, [X2, #1, MUL VL]

(645) 0x4369fc ADD	X4, X4, #336

(645) 0x436a00 LDR	Z30, [X4, MUL VL]

(645) 0x436a04 FMLA	Z12.D, P0/M, Z30.D, Z15.D

(645) 0x436a08 FADD	Z16.D, Z1.D, Z12.D

(645) 0x436a0c FMAD	Z16.D, P0/M, Z10.D, Z11.D

(645) 0x436a10 FMUL	Z10.D, Z13.D, Z2.D

(645) 0x436a14 MOVPRFX	Z2, Z17

(645) 0x436a18 FMLA	Z2.D, P0/M, Z18.D, Z0.D

(645) 0x436a1c LDR	Z13, [X2, #2, MUL VL]

(645) 0x436a20 FADD	Z4.D, Z29.D, Z2.D

(645) 0x436a24 FMAD	Z15.D, P0/M, Z13.D, Z10.D

(645) 0x436a28 FMUL	Z6.D, Z4.D, Z6.D

(645) 0x436a2c LDR	Z8, [X2, MUL VL]

(645) 0x436a30 FMAD	Z0.D, P0/M, Z31.D, Z8.D

(645) 0x436a34 FADD	Z0.D, Z0.D, Z15.D

(645) 0x436a38 FMAD	Z0.D, P0/M, Z5.D, Z6.D

(645) 0x436a3c FADD	Z5.D, Z16.D, Z0.D

(645) 0x436a40 ST1D	{Z5.D}, P1, [X14, Z9.D,LSL #3]

(645) 0x436a44 ADD	X1, X1, X21

(645) 0x436a48 WHILELO	P3.S, W1, W3

(645) 0x436a4c B.NE	436604

(646) 0x436a50 CMP	X15, X11

(646) 0x436a54 B.NE	43612c

(646) 0x436a58 CMP	X24, X9

(646) 0x436a5c B.EQ	437260

(646) 0x436a60 SUB	X3, X9, X24

(646) 0x436a64 MOVI	D23, #0

(646) 0x436a68 ORR	X18, XZR, X24

(646) 0x436a6c SUB	X6, X3, #8

(646) 0x436a70 UBFM	X13, X6, #3, #63

(646) 0x436a74 ADD	X15, X13, #1

(646) 0x436a78 ANDS	X16, X15, #4224

(646) 0x436a7c B.EQ	436aec

(646) 0x436a80 CMP	X16, #1

(646) 0x436a84 B.EQ	436adc

(646) 0x436a88 CMP	X16, #2

(646) 0x436a8c B.EQ	436ad4

(646) 0x436a90 CMP	X16, #3

(646) 0x436a94 B.EQ	436acc

(646) 0x436a98 CMP	X16, #4

(646) 0x436a9c B.EQ	436ac4

(646) 0x436aa0 CMP	X16, #5

(646) 0x436aa4 B.EQ	436abc

(646) 0x436aa8 CMP	X16, #6

(646) 0x436aac B.EQ	436ab4

(646) 0x436ab0 LDR	D23, [X18], #8

(646) 0x436ab4 LDR	D14, [X18], #8

(646) 0x436ab8 FADD	D23, D23, D14

(646) 0x436abc LDR	D28, [X18], #8

(646) 0x436ac0 FADD	D23, D23, D28

(646) 0x436ac4 LDR	D27, [X18], #8

(646) 0x436ac8 FADD	D23, D23, D27

(646) 0x436acc LDR	D26, [X18], #8

(646) 0x436ad0 FADD	D23, D23, D26

(646) 0x436ad4 LDR	D25, [X18], #8

(646) 0x436ad8 FADD	D23, D23, D25

(646) 0x436adc LDR	D24, [X18], #8

(646) 0x436ae0 FADD	D23, D23, D24

(646) 0x436ae4 CMP	X18, X9

(646) 0x436ae8 B.EQ	436b34

  (656) 0x436aec ORR	X27, XZR, X18

  (656) 0x436af0 LDR	D20, [X18, #8]

  (656) 0x436af4 LDR	D22, [X27], #8

  (656) 0x436af8 LDP	D19, D18, [X18, #24]

  (656) 0x436afc LDP	D17, D9, [X18, #40]

  (656) 0x436b00 ADD	X18, X18, #64

  (656) 0x436b04 FADD	D21, D23, D22

  (656) 0x436b08 LDR	D3, [X27, #8]

  (656) 0x436b0c LDUR	D12, [X18, #504]

  (656) 0x436b10 FADD	D15, D21, D20

  (656) 0x436b14 FADD	D30, D15, D3

  (656) 0x436b18 FADD	D11, D30, D19

  (656) 0x436b1c FADD	D1, D11, D18

  (656) 0x436b20 FADD	D7, D1, D17

  (656) 0x436b24 FADD	D29, D7, D9

  (656) 0x436b28 FADD	D23, D29, D12

  (656) 0x436b2c CMP	X18, X9

  (656) 0x436b30 B.NE	436aec

(646) 0x436b34 ADDVL	X30, SP, #26

(646) 0x436b38 STR	D23, [X26, X20,LSL #3]

(646) 0x436b3c STP	XZR, XZR, [X30, #336]

(646) 0x436b40 STR	XZR, [X30, #352]

(646) 0x436b44 CMP	W22, #0

(646) 0x436b48 B.LE	437258

(646) 0x436b4c ANDS	W5, W22, #128

(646) 0x436b50 MOVI	D0, #0

(646) 0x436b54 FMOV	D10, #2.0000000

(646) 0x436b58 MOVZ	X14, #0

(646) 0x436b5c B.EQ	436c20

(646) 0x436b60 CMP	W5, #1

(646) 0x436b64 B.EQ	436c04

(646) 0x436b68 CMP	W5, #2

(646) 0x436b6c B.EQ	436bf0

(646) 0x436b70 CMP	W5, #3

(646) 0x436b74 B.EQ	436bdc

(646) 0x436b78 CMP	W5, #4

(646) 0x436b7c B.EQ	436bc8

(646) 0x436b80 CMP	W5, #5

(646) 0x436b84 B.EQ	436bb4

(646) 0x436b88 CMP	W5, #6

(646) 0x436b8c B.EQ	436ba0

(646) 0x436b90 LDR	D2, [X19]

(646) 0x436b94 MOVZ	X14, #1

(646) 0x436b98 LDR	D13, [X23]

(646) 0x436b9c FMADD	D0, D2, D10, D13

(646) 0x436ba0 LDR	D4, [X19, X14,LSL #3]

(646) 0x436ba4 LDR	D31, [X23, X14,LSL #3]

(646) 0x436ba8 ADD	X14, X14, #1

(646) 0x436bac FMADD	D8, D4, D10, D31

(646) 0x436bb0 FADD	D0, D0, D8

(646) 0x436bb4 LDR	D6, [X19, X14,LSL #3]

(646) 0x436bb8 LDR	D5, [X23, X14,LSL #3]

(646) 0x436bbc ADD	X14, X14, #1

(646) 0x436bc0 FMADD	D14, D6, D10, D5

(646) 0x436bc4 FADD	D0, D0, D14

(646) 0x436bc8 LDR	D28, [X19, X14,LSL #3]

(646) 0x436bcc LDR	D27, [X23, X14,LSL #3]

(646) 0x436bd0 ADD	X14, X14, #1

(646) 0x436bd4 FMADD	D26, D28, D10, D27

(646) 0x436bd8 FADD	D0, D0, D26

(646) 0x436bdc LDR	D25, [X19, X14,LSL #3]

(646) 0x436be0 LDR	D24, [X23, X14,LSL #3]

(646) 0x436be4 ADD	X14, X14, #1

(646) 0x436be8 FMADD	D23, D25, D10, D24

(646) 0x436bec FADD	D0, D0, D23

(646) 0x436bf0 LDR	D22, [X19, X14,LSL #3]

(646) 0x436bf4 LDR	D21, [X23, X14,LSL #3]

(646) 0x436bf8 ADD	X14, X14, #1

(646) 0x436bfc FMADD	D20, D22, D10, D21

(646) 0x436c00 FADD	D0, D0, D20

(646) 0x436c04 LDR	D19, [X19, X14,LSL #3]

(646) 0x436c08 LDR	D18, [X23, X14,LSL #3]

(646) 0x436c0c ADD	X14, X14, #1

(646) 0x436c10 FMADD	D17, D19, D10, D18

(646) 0x436c14 FADD	D0, D0, D17

(646) 0x436c18 CMP	W22, W14

(646) 0x436c1c B.LE	436cc8

  (655) 0x436c20 LDR	D9, [X19, X14,LSL #3]

  (655) 0x436c24 ADD	X0, X14, #1

  (655) 0x436c28 ADD	X4, X14, #2

  (655) 0x436c2c ADD	X17, X14, #3

  (655) 0x436c30 ADD	X2, X14, #4

  (655) 0x436c34 LDR	D15, [X23, X14,LSL #3]

  (655) 0x436c38 ADD	X1, X14, #5

  (655) 0x436c3c ADD	X3, X14, #6

  (655) 0x436c40 ADD	X6, X14, #7

  (655) 0x436c44 ADD	X14, X14, #8

  (655) 0x436c48 LDR	D12, [X19, X0,LSL #3]

  (655) 0x436c4c LDR	D3, [X23, X0,LSL #3]

  (655) 0x436c50 FMADD	D30, D9, D10, D15

  (655) 0x436c54 LDR	D11, [X19, X4,LSL #3]

  (655) 0x436c58 LDR	D1, [X23, X4,LSL #3]

  (655) 0x436c5c FMADD	D29, D12, D10, D3

  (655) 0x436c60 LDR	D7, [X19, X17,LSL #3]

  (655) 0x436c64 LDR	D16, [X23, X17,LSL #3]

  (655) 0x436c68 FMADD	D2, D11, D10, D1

  (655) 0x436c6c LDR	D13, [X19, X2,LSL #3]

  (655) 0x436c70 FADD	D31, D0, D30

  (655) 0x436c74 LDR	D8, [X23, X2,LSL #3]

  (655) 0x436c78 FMADD	D6, D7, D10, D16

  (655) 0x436c7c LDR	D14, [X19, X1,LSL #3]

  (655) 0x436c80 LDR	D4, [X23, X1,LSL #3]

  (655) 0x436c84 FADD	D28, D31, D29

  (655) 0x436c88 FMADD	D5, D13, D10, D8

  (655) 0x436c8c LDR	D27, [X19, X3,LSL #3]

  (655) 0x436c90 LDR	D26, [X23, X3,LSL #3]

  (655) 0x436c94 FMADD	D25, D14, D10, D4

  (655) 0x436c98 LDR	D24, [X19, X6,LSL #3]

  (655) 0x436c9c FADD	D23, D28, D2

  (655) 0x436ca0 LDR	D22, [X23, X6,LSL #3]

  (655) 0x436ca4 FMADD	D21, D27, D10, D26

  (655) 0x436ca8 FADD	D20, D23, D6

  (655) 0x436cac FMADD	D19, D24, D10, D22

  (655) 0x436cb0 FADD	D18, D20, D5

  (655) 0x436cb4 FADD	D17, D18, D25

  (655) 0x436cb8 FADD	D0, D17, D21

  (655) 0x436cbc FADD	D0, D0, D19

  (655) 0x436cc0 CMP	W22, W14

  (655) 0x436cc4 B.GT	436c20

(646) 0x436cc8 FNEG	D16, D0

(646) 0x436ccc LDR	X13, [X10]

(646) 0x436cd0 MOVZ	X4, #1

(646) 0x436cd4 LDR	X2, [X10, #16]

(646) 0x436cd8 LDR	X15, [SP, #272]

(646) 0x436cdc UBFM	X18, X13, #61, #60

(646) 0x436ce0 ORR	X1, XZR, X2

  (648) 0x436ce4 CMP	W22, #0

  (648) 0x436ce8 B.LE	4371d8

  (648) 0x436cec ANDS	W16, W22, #128

  (648) 0x436cf0 MOVI	D6, #0

  (648) 0x436cf4 MOVZ	X27, #0

  (648) 0x436cf8 B.EQ	436da4

  (648) 0x436cfc CMP	W16, #1

  (648) 0x436d00 B.EQ	436d8c

  (648) 0x436d04 CMP	W16, #2

  (648) 0x436d08 B.EQ	436d7c

  (648) 0x436d0c CMP	W16, #3

  (648) 0x436d10 B.EQ	436d6c

  (648) 0x436d14 CMP	W16, #4

  (648) 0x436d18 B.EQ	436d5c

  (648) 0x436d1c CMP	W16, #5

  (648) 0x436d20 B.EQ	436d4c

  (648) 0x436d24 CMP	W16, #6

  (648) 0x436d28 B.EQ	436d3c

  (648) 0x436d2c LDR	D10, [X1]

  (648) 0x436d30 MOVZ	X27, #1

  (648) 0x436d34 LDR	D9, [X19]

  (648) 0x436d38 FMADD	D6, D9, D10, D6

  (648) 0x436d3c LDR	D15, [X19, X27,LSL #3]

  (648) 0x436d40 LDR	D12, [X1, X27,LSL #3]

  (648) 0x436d44 ADD	X27, X27, #1

  (648) 0x436d48 FMADD	D6, D15, D12, D6

  (648) 0x436d4c LDR	D3, [X19, X27,LSL #3]

  (648) 0x436d50 LDR	D30, [X1, X27,LSL #3]

  (648) 0x436d54 ADD	X27, X27, #1

  (648) 0x436d58 FMADD	D6, D3, D30, D6

  (648) 0x436d5c LDR	D11, [X19, X27,LSL #3]

  (648) 0x436d60 LDR	D1, [X1, X27,LSL #3]

  (648) 0x436d64 ADD	X27, X27, #1

  (648) 0x436d68 FMADD	D6, D11, D1, D6

  (648) 0x436d6c LDR	D29, [X19, X27,LSL #3]

  (648) 0x436d70 LDR	D7, [X1, X27,LSL #3]

  (648) 0x436d74 ADD	X27, X27, #1

  (648) 0x436d78 FMADD	D6, D29, D7, D6

  (648) 0x436d7c LDR	D2, [X19, X27,LSL #3]

  (648) 0x436d80 LDR	D13, [X1, X27,LSL #3]

  (648) 0x436d84 ADD	X27, X27, #1

  (648) 0x436d88 FMADD	D6, D2, D13, D6

  (648) 0x436d8c LDR	D31, [X19, X27,LSL #3]

  (648) 0x436d90 LDR	D8, [X1, X27,LSL #3]

  (648) 0x436d94 ADD	X27, X27, #1

  (648) 0x436d98 FMADD	D6, D31, D8, D6

  (648) 0x436d9c CMP	W22, W27

  (648) 0x436da0 B.LE	436e2c

    (654) 0x436da4 LDR	D14, [X19, X27,LSL #3]

    (654) 0x436da8 ADD	X30, X27, #1

    (654) 0x436dac ADD	X5, X27, #2

    (654) 0x436db0 ADD	X14, X27, #3

    (654) 0x436db4 ADD	X0, X27, #4

    (654) 0x436db8 LDR	D28, [X1, X27,LSL #3]

    (654) 0x436dbc ADD	X17, X27, #5

    (654) 0x436dc0 ADD	X6, X27, #6

    (654) 0x436dc4 ADD	X3, X27, #7

    (654) 0x436dc8 ADD	X27, X27, #8

    (654) 0x436dcc LDR	D4, [X19, X30,LSL #3]

    (654) 0x436dd0 LDR	D27, [X1, X30,LSL #3]

    (654) 0x436dd4 FMADD	D26, D14, D28, D6

    (654) 0x436dd8 LDR	D25, [X19, X5,LSL #3]

    (654) 0x436ddc LDR	D24, [X1, X5,LSL #3]

    (654) 0x436de0 LDR	D5, [X19, X14,LSL #3]

    (654) 0x436de4 FMADD	D23, D4, D27, D26

    (654) 0x436de8 LDR	D22, [X1, X14,LSL #3]

    (654) 0x436dec LDR	D21, [X19, X0,LSL #3]

    (654) 0x436df0 FMADD	D20, D25, D24, D23

    (654) 0x436df4 LDR	D19, [X1, X0,LSL #3]

    (654) 0x436df8 LDR	D18, [X19, X17,LSL #3]

    (654) 0x436dfc LDR	D17, [X1, X17,LSL #3]

    (654) 0x436e00 FMADD	D0, D5, D22, D20

    (654) 0x436e04 LDR	D10, [X19, X6,LSL #3]

    (654) 0x436e08 LDR	D9, [X1, X6,LSL #3]

    (654) 0x436e0c FMADD	D15, D21, D19, D0

    (654) 0x436e10 LDR	D12, [X19, X3,LSL #3]

    (654) 0x436e14 LDR	D3, [X1, X3,LSL #3]

    (654) 0x436e18 FMADD	D30, D18, D17, D15

    (654) 0x436e1c FMADD	D11, D10, D9, D30

    (654) 0x436e20 FMADD	D6, D12, D3, D11

    (654) 0x436e24 CMP	W22, W27

    (654) 0x436e28 B.GT	436da4

  (648) 0x436e2c ADD	X13, X15, X4,LSL #3

  (648) 0x436e30 ADD	X4, X4, #1

  (648) 0x436e34 ADD	X1, X1, X18

  (648) 0x436e38 STUR	D6, [X13, #504]

  (648) 0x436e3c CMP	X4, #4

  (648) 0x436e40 B.NE	436ce4

(646) 0x436e44 ADDVL	X15, SP, #26

(646) 0x436e48 ADDVL	X16, SP, #26

(646) 0x436e4c LDR	X27, [SP, #168]

(646) 0x436e50 MOVZ	X0, #0

(646) 0x436e54 LDR	D29, [X15, #336]

(646) 0x436e58 LDP	D1, D7, [X16, #344]

(646) 0x436e5c LDR	X30, [SP, #232]

(646) 0x436e60 LDR	X14, [SP, #240]

(646) 0x436e64 STR	D29, [X27, X20,LSL #3]

(646) 0x436e68 STR	D1, [X30, X20,LSL #3]

(646) 0x436e6c STR	D7, [X14, X20,LSL #3]

(646) 0x436e70 STR	D16, [X25, X20,LSL #3]

(646) 0x436e74 CMP	W22, #0

(646) 0x436e78 B.LE	436fdc

(646) 0x436e7c ANDS	W5, W22, #64

(646) 0x436e80 FMOV	D16, #2.0000000

(646) 0x436e84 B.EQ	436f24

(646) 0x436e88 CMP	W5, #1

(646) 0x436e8c B.EQ	436ef0

(646) 0x436e90 CMP	W5, #2

(646) 0x436e94 B.EQ	436ec4

(646) 0x436e98 LDR	D2, [X24]

(646) 0x436e9c MOVZ	X0, #1

(646) 0x436ea0 LDR	D13, [X26]

(646) 0x436ea4 FADD	D31, D13, D2

(646) 0x436ea8 STR	D31, [X26]

(646) 0x436eac LDR	D6, [X23]

(646) 0x436eb0 LDR	D14, [X25]

(646) 0x436eb4 LDR	D8, [X19]

(646) 0x436eb8 FSUB	D28, D14, S6

(646) 0x436ebc FMSUB	D4, D8, D16, D28

(646) 0x436ec0 STR	D4, [X25]

(646) 0x436ec4 LDR	D27, [X26, X0,LSL #3]

(646) 0x436ec8 LDR	D26, [X24, X0,LSL #3]

(646) 0x436ecc FADD	D25, D27, D26

(646) 0x436ed0 STR	D25, [X26, X0,LSL #3]

(646) 0x436ed4 LDR	D24, [X25, X0,LSL #3]

(646) 0x436ed8 LDR	D5, [X23, X0,LSL #3]

(646) 0x436edc LDR	D23, [X19, X0,LSL #3]

(646) 0x436ee0 FSUB	D22, D24, S5

(646) 0x436ee4 FMSUB	D21, D23, D16, D22

(646) 0x436ee8 STR	D21, [X25, X0,LSL #3]

(646) 0x436eec ADD	X0, X0, #1

(646) 0x436ef0 LDR	D20, [X26, X0,LSL #3]

(646) 0x436ef4 LDR	D19, [X24, X0,LSL #3]

(646) 0x436ef8 FADD	D18, D20, D19

(646) 0x436efc STR	D18, [X26, X0,LSL #3]

(646) 0x436f00 LDR	D17, [X25, X0,LSL #3]

(646) 0x436f04 LDR	D0, [X23, X0,LSL #3]

(646) 0x436f08 LDR	D10, [X19, X0,LSL #3]

(646) 0x436f0c FSUB	D9, D17, S0

(646) 0x436f10 FMSUB	D15, D10, D16, D9

(646) 0x436f14 STR	D15, [X25, X0,LSL #3]

(646) 0x436f18 ADD	X0, X0, #1

(646) 0x436f1c CMP	W22, W0

(646) 0x436f20 B.LE	436fdc

  (653) 0x436f24 LDR	D12, [X26, X0,LSL #3]

  (653) 0x436f28 ADD	X17, X0, #1

  (653) 0x436f2c ADD	X3, X0, #2

  (653) 0x436f30 ADD	X6, X0, #3

  (653) 0x436f34 LDR	D3, [X24, X0,LSL #3]

  (653) 0x436f38 FADD	D30, D12, D3

  (653) 0x436f3c STR	D30, [X26, X0,LSL #3]

  (653) 0x436f40 LDR	D11, [X25, X0,LSL #3]

  (653) 0x436f44 LDR	D29, [X23, X0,LSL #3]

  (653) 0x436f48 LDR	D1, [X19, X0,LSL #3]

  (653) 0x436f4c FSUB	D7, D11, S29

  (653) 0x436f50 FMSUB	D2, D1, D16, D7

  (653) 0x436f54 STR	D2, [X25, X0,LSL #3]

  (653) 0x436f58 ADD	X0, X0, #4

  (653) 0x436f5c LDR	D13, [X26, X17,LSL #3]

  (653) 0x436f60 LDR	D31, [X24, X17,LSL #3]

  (653) 0x436f64 FADD	D8, D13, D31

  (653) 0x436f68 STR	D8, [X26, X17,LSL #3]

  (653) 0x436f6c LDR	D6, [X25, X17,LSL #3]

  (653) 0x436f70 LDR	D14, [X23, X17,LSL #3]

  (653) 0x436f74 LDR	D28, [X19, X17,LSL #3]

  (653) 0x436f78 FSUB	D4, D6, S14

  (653) 0x436f7c FMSUB	D27, D28, D16, D4

  (653) 0x436f80 STR	D27, [X25, X17,LSL #3]

  (653) 0x436f84 LDR	D26, [X26, X3,LSL #3]

  (653) 0x436f88 LDR	D25, [X24, X3,LSL #3]

  (653) 0x436f8c FADD	D24, D26, D25

  (653) 0x436f90 STR	D24, [X26, X3,LSL #3]

  (653) 0x436f94 LDR	D5, [X25, X3,LSL #3]

  (653) 0x436f98 LDR	D23, [X23, X3,LSL #3]

  (653) 0x436f9c LDR	D22, [X19, X3,LSL #3]

  (653) 0x436fa0 FSUB	D21, D5, S23

  (653) 0x436fa4 FMSUB	D20, D22, D16, D21

  (653) 0x436fa8 STR	D20, [X25, X3,LSL #3]

  (653) 0x436fac LDR	D19, [X26, X6,LSL #3]

  (653) 0x436fb0 LDR	D18, [X24, X6,LSL #3]

  (653) 0x436fb4 FADD	D17, D19, D18

  (653) 0x436fb8 STR	D17, [X26, X6,LSL #3]

  (653) 0x436fbc LDR	D0, [X25, X6,LSL #3]

  (653) 0x436fc0 LDR	D10, [X23, X6,LSL #3]

  (653) 0x436fc4 LDR	D9, [X19, X6,LSL #3]

  (653) 0x436fc8 FSUB	D15, D0, S10

  (653) 0x436fcc FMSUB	D12, D9, D16, D15

  (653) 0x436fd0 STR	D12, [X25, X6,LSL #3]

  (653) 0x436fd4 CMP	W22, W0

  (653) 0x436fd8 B.GT	436f24

(646) 0x436fdc LDR	X1, [SP, #168]

(646) 0x436fe0 MOVZ	W16, #3

  (649) 0x436fe4 MOVZ	X27, #0

  (649) 0x436fe8 CMP	W22, #0

  (649) 0x436fec B.LE	4371a0

  (649) 0x436ff0 ANDS	W13, W22, #128

  (649) 0x436ff4 B.EQ	4370d8

  (649) 0x436ff8 CMP	W13, #1

  (649) 0x436ffc B.EQ	4370b8

  (649) 0x437000 CMP	W13, #2

  (649) 0x437004 B.EQ	4370a0

  (649) 0x437008 CMP	W13, #3

  (649) 0x43700c B.EQ	437088

  (649) 0x437010 CMP	W13, #4

  (649) 0x437014 B.EQ	437070

  (649) 0x437018 CMP	W13, #5

  (649) 0x43701c B.EQ	437058

  (649) 0x437020 CMP	W13, #6

  (649) 0x437024 B.EQ	437040

  (649) 0x437028 LDR	D16, [X1]

  (649) 0x43702c MOVZ	X27, #1

  (649) 0x437030 LDR	D3, [X2]

  (649) 0x437034 LDR	D30, [X19]

  (649) 0x437038 FMSUB	D11, D30, D3, D16

  (649) 0x43703c STR	D11, [X1]

  (649) 0x437040 LDR	D29, [X19, X27,LSL #3]

  (649) 0x437044 LDR	D1, [X2, X27,LSL #3]

  (649) 0x437048 LDR	D7, [X1, X27,LSL #3]

  (649) 0x43704c FMSUB	D2, D29, D1, D7

  (649) 0x437050 STR	D2, [X1, X27,LSL #3]

  (649) 0x437054 ADD	X27, X27, #1

  (649) 0x437058 LDR	D13, [X19, X27,LSL #3]

  (649) 0x43705c LDR	D31, [X2, X27,LSL #3]

  (649) 0x437060 LDR	D8, [X1, X27,LSL #3]

  (649) 0x437064 FMSUB	D6, D13, D31, D8

  (649) 0x437068 STR	D6, [X1, X27,LSL #3]

  (649) 0x43706c ADD	X27, X27, #1

  (649) 0x437070 LDR	D14, [X19, X27,LSL #3]

  (649) 0x437074 LDR	D28, [X2, X27,LSL #3]

  (649) 0x437078 LDR	D4, [X1, X27,LSL #3]

  (649) 0x43707c FMSUB	D27, D14, D28, D4

  (649) 0x437080 STR	D27, [X1, X27,LSL #3]

  (649) 0x437084 ADD	X27, X27, #1

  (649) 0x437088 LDR	D26, [X19, X27,LSL #3]

  (649) 0x43708c LDR	D25, [X2, X27,LSL #3]

  (649) 0x437090 LDR	D24, [X1, X27,LSL #3]

  (649) 0x437094 FMSUB	D5, D26, D25, D24

  (649) 0x437098 STR	D5, [X1, X27,LSL #3]

  (649) 0x43709c ADD	X27, X27, #1

  (649) 0x4370a0 LDR	D23, [X19, X27,LSL #3]

  (649) 0x4370a4 LDR	D22, [X2, X27,LSL #3]

  (649) 0x4370a8 LDR	D21, [X1, X27,LSL #3]

  (649) 0x4370ac FMSUB	D20, D23, D22, D21

  (649) 0x4370b0 STR	D20, [X1, X27,LSL #3]

  (649) 0x4370b4 ADD	X27, X27, #1

  (649) 0x4370b8 LDR	D19, [X19, X27,LSL #3]

  (649) 0x4370bc LDR	D18, [X2, X27,LSL #3]

  (649) 0x4370c0 LDR	D17, [X1, X27,LSL #3]

  (649) 0x4370c4 FMSUB	D0, D19, D18, D17

  (649) 0x4370c8 STR	D0, [X1, X27,LSL #3]

  (649) 0x4370cc ADD	X27, X27, #1

  (649) 0x4370d0 CMP	W22, W27

  (649) 0x4370d4 B.LE	4371a0

    (652) 0x4370d8 LDR	D10, [X19, X27,LSL #3]

    (652) 0x4370dc ADD	X30, X27, #1

    (652) 0x4370e0 ADD	X15, X27, #2

    (652) 0x4370e4 ADD	X14, X27, #3

    (652) 0x4370e8 ADD	X0, X27, #4

    (652) 0x4370ec LDR	D9, [X2, X27,LSL #3]

    (652) 0x4370f0 ADD	X17, X27, #5

    (652) 0x4370f4 ADD	X5, X27, #6

    (652) 0x4370f8 ADD	X4, X27, #7

    (652) 0x4370fc LDR	D15, [X1, X27,LSL #3]

    (652) 0x437100 FMSUB	D12, D10, D9, D15

    (652) 0x437104 STR	D12, [X1, X27,LSL #3]

    (652) 0x437108 ADD	X27, X27, #8

    (652) 0x43710c LDR	D16, [X19, X30,LSL #3]

    (652) 0x437110 LDR	D3, [X2, X30,LSL #3]

    (652) 0x437114 LDR	D30, [X1, X30,LSL #3]

    (652) 0x437118 FMSUB	D11, D16, D3, D30

    (652) 0x43711c STR	D11, [X1, X30,LSL #3]

    (652) 0x437120 LDR	D29, [X19, X15,LSL #3]

    (652) 0x437124 LDR	D1, [X2, X15,LSL #3]

    (652) 0x437128 LDR	D7, [X1, X15,LSL #3]

    (652) 0x43712c FMSUB	D2, D29, D1, D7

    (652) 0x437130 STR	D2, [X1, X15,LSL #3]

    (652) 0x437134 LDR	D13, [X19, X14,LSL #3]

    (652) 0x437138 LDR	D31, [X2, X14,LSL #3]

    (652) 0x43713c LDR	D8, [X1, X14,LSL #3]

    (652) 0x437140 FMSUB	D6, D13, D31, D8

    (652) 0x437144 STR	D6, [X1, X14,LSL #3]

    (652) 0x437148 LDR	D14, [X19, X0,LSL #3]

    (652) 0x43714c LDR	D28, [X2, X0,LSL #3]

    (652) 0x437150 LDR	D4, [X1, X0,LSL #3]

    (652) 0x437154 FMSUB	D27, D14, D28, D4

    (652) 0x437158 STR	D27, [X1, X0,LSL #3]

    (652) 0x43715c LDR	D26, [X19, X17,LSL #3]

    (652) 0x437160 LDR	D25, [X2, X17,LSL #3]

    (652) 0x437164 LDR	D24, [X1, X17,LSL #3]

    (652) 0x437168 FMSUB	D5, D26, D25, D24

    (652) 0x43716c STR	D5, [X1, X17,LSL #3]

    (652) 0x437170 LDR	D23, [X19, X5,LSL #3]

    (652) 0x437174 LDR	D22, [X2, X5,LSL #3]

    (652) 0x437178 LDR	D21, [X1, X5,LSL #3]

    (652) 0x43717c FMSUB	D20, D23, D22, D21

    (652) 0x437180 STR	D20, [X1, X5,LSL #3]

    (652) 0x437184 LDR	D19, [X19, X4,LSL #3]

    (652) 0x437188 LDR	D18, [X2, X4,LSL #3]

    (652) 0x43718c LDR	D17, [X1, X4,LSL #3]

    (652) 0x437190 FMSUB	D0, D19, D18, D17

    (652) 0x437194 STR	D0, [X1, X4,LSL #3]

    (652) 0x437198 CMP	W22, W27

    (652) 0x43719c B.GT	4370d8

  (649) 0x4371a0 SUBS	W16, W16, #1

  (649) 0x4371a4 ADD	X1, X1, X12

  (649) 0x4371a8 ADD	X2, X2, X18

  (649) 0x4371ac B.NE	436fe4

(646) 0x4371b0 LDR	W18, [SP, #264]

(646) 0x4371b4 ADD	X20, X20, #1

(646) 0x4371b8 ADD	X10, X10, #40

(646) 0x4371bc ADD	X9, X9, #8

(646) 0x4371c0 LDR	X22, [SP, #248]

(646) 0x4371c4 ADD	X7, X7, X22

(646) 0x4371c8 CMP	W18, W20

(646) 0x4371cc B.LE	4371f8

(646) 0x4371d0 UBFM	X2, X20, #61, #60

(646) 0x4371d4 B	4360a0

  (648) 0x4371d8 MOVI	D6, #0

  (648) 0x4371dc ADD	X13, X15, X4,LSL #3

  (648) 0x4371e0 ADD	X4, X4, #1

  (648) 0x4371e4 ADD	X1, X1, X18

  (648) 0x4371e8 STUR	D6, [X13, #504]

  (648) 0x4371ec CMP	X4, #4

  (648) 0x4371f0 B.NE	436ce4

(646) 0x4371f4 B	436e44

  (650) 0x4371f8 LDR	X8, [SP, #304]

  (650) 0x4371fc CMP	X8, X11

  (650) 0x437200 B.NE	435fd4

  (651) 0x437204 LDP	D8, D9, [SP, #96]

  (651) 0x437208 LDP	X19, X20, [SP, #16]

  (651) 0x43720c LDP	X21, X22, [SP, #32]

  (651) 0x437210 LDP	X23, X24, [SP, #48]

  (651) 0x437214 LDP	X25, X26, [SP, #64]

  (651) 0x437218 LDP	X27, X28, [SP, #80]

  (651) 0x43721c LDP	D10, D11, [SP, #112]

  (651) 0x437220 LDP	D12, D13, [SP, #128]

  (651) 0x437224 LDP	D14, D15, [SP, #144]

  (651) 0x437228 ADRP	X11,

  (651) 0x43722c ADDVL	X6, SP, #26

  (651) 0x437230 LDR	X12, [X11, #4016]

  (651) 0x437234 LDR	X2, [X6, #360]

  (651) 0x437238 LDR	X1, [X12]

  (651) 0x43723c SUBS	X2, X2, X1

  (651) 0x437240 MOVZ	X1, #0

  (651) 0x437244 B.NE	437268

  (651) 0x437248 LDP	X29, X30, [SP]

  (651) 0x43724c ADDVL	SP, SP, #26

  (651) 0x437250 ADD	SP, SP, #368

  (651) 0x437254 RET

  (651) 0x437258 MOVI	D16, #0

  (651) 0x43725c B	436ccc

(646) 0x437260 MOVI	D23, #0

(646) 0x437264 B	436b34

0x437268 STP	X19, X20, [SP, #16]

0x43726c STP	X21, X22, [SP, #32]

0x437270 STP	X23, X24, [SP, #48]

0x437274 STP	X25, X26, [SP, #64]

0x437278 STP	X27, X28, [SP, #80]

0x43727c STP	D8, D9, [SP, #96]

0x437280 STP	D10, D11, [SP, #112]

0x437284 STP	D12, D13, [SP, #128]

0x437288 STP	D14, D15, [SP, #144]

0x43728c BL	403d80

0x437290 HINT	#0

0x437294 HINT	#0

0x437298 HINT	#0

0x43729c HINT	#0

Coverage (%)	Name	Source Location	Module
►100.00+	miniqmcreference::TwoBodyJastr[...]	TwoBodyJastrowRef.h:420	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:181	exec
○	main._omp_fn.0	miniqmc.cpp:390	exec
○	GOMP_parallel		libomp.so
○	main	stl_vector.h:1043	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	TwoBodyJastrowRef.h:265-400
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:214
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:183
/usr/include/c++/11/bits/stl_algobase.h:924,1109,1115
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:276-285,291-298,305-336
/usr/include/c++/11/bits/stl_numeric.h:140-141
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229,249
/usr/include/c++/11/bits/stl_vector.h:1061,1169
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:265-268,356-367,373-400
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:216,235,243
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:302-305

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 42.00 to 34.50 cycles (1.22x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 53% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 42.00 to 26.50 cycles (1.58x speedup).

Details

45% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
66% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 42.00 to 0.50 cycles (84.00x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 344 bytes. The binary function is storing 1144 bytes.

General properties

nb instructions	150
loop length	600
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

18.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	1.00	1.00	10.75	10.75	20.00	10.50	8.75	8.75	8.75	8.75	42.00	42.00	7.00	7.50	7.50
cycles	1.00	1.00	10.75	10.75	20.00	10.50	8.75	8.75	8.75	8.75	42.00	42.00	7.00	7.50	7.50

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.25
Overall L1	42.00

Vectorization ratios

all	45%
load	0%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	66%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 42.00 cycles. At this rate:

8% of peak load performance is reached (8.19 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
56% of peak store performance is reached (27.24 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 435f40

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
CNTD X12, ALL, MUL #13	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X11, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X2, X12, #60, #59	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X2, #368	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB SP, SP, X3,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADRP X4, <4c1f70>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X8, SP, #26	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ORR X6, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X5, [X4, #4016]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X0, X1, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X0, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X0, [X1, #2576]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X1, [X5]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X1, [X8, #360]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X1, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X1, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBZ X11, 437228 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9recomputeERNS1_11ParticleSetE+0x12e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X28, [X6, #2712]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADDVL X0, SP, #20	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
UBFM X4, X4, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z20.D}, P0/Z, [X2, #21]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X0, X0, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X17, SP, #21	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z20, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X17, X17, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X30, X23, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z19.D}, P0/Z, [X2, #20]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X5, X19, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X14, X24, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z19, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X4, SP, #19	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADDVL X0, SP, #17	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
DUP Z29.D, Z16.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ADD X4, X4, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X0, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z30.D}, P0/Z, [X2, #22]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADDVL X17, SP, #18	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LD1RD {Z16.D}, P0/Z, [X2, #25]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z30, [X4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X17, X17, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X4, SP, #16	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z16, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X0, SP, #14	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X4, X4, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z31.D}, P0/Z, [X2, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X0, X0, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z31, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X17, SP, #15	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X17, X17, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z0.D}, P0/Z, [X2, #26]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z2.D}, P0/Z, [X2, #29]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z0, [X4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X4, SP, #13	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z2, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X0, SP, #11	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X4, X4, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z1.D}, P0/Z, [X2, #28]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X0, X0, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z1, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X17, SP, #12	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X17, X17, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z3.D}, P0/Z, [X2, #30]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z5.D}, P0/Z, [X2, #33]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z3, [X4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X4, SP, #10	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z5, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X0, SP, #8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X4, X4, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z4.D}, P0/Z, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X0, X0, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z4, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X17, SP, #9	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X17, X17, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z6.D}, P0/Z, [X2, #34]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z28.D}, P0/Z, [X2, #37]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z27.D}, P0/Z, [X2, #38]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z26.D}, P0/Z, [X2, #41]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z25.D}, P0/Z, [X2, #42]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z24.D}, P0/Z, [X2, #45]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z23.D}, P0/Z, [X2, #46]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z22.D}, P0/Z, [X2, #49]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z21.D}, P0/Z, [X2, #50]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z6, [X4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z7.D}, P0/Z, [X2, #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X4, SP, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z8.D}, P0/Z, [X2, #4]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z8, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X0, SP, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z17.D}, P0/Z, [X2, #11]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z9.D}, P0/Z, [X2, #5]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z17, [X0, #2, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z9, [X4, #7, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z10.D}, P0/Z, [X2, #6]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z11.D}, P0/Z, [X2, #7]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z10, [X4, #6, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z11, [X4, #5, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z13.D}, P0/Z, [X2, #9]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z15.D}, P0/Z, [X2, #10]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z13, [X0, #4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z15, [X0, #3, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z7, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X17, X4, #24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADDVL X4, X0, #23	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LDR X0, [X2, #536]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z18.D}, P0/Z, [X2, #12]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z19.D}, P0/Z, [X2, #13]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z20.D}, P0/Z, [X2, #14]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z12.D}, P0/Z, [X2, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z18, [X4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X4, SP, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z12, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X17, SP, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z14.D, Z14.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STR Z19, [X17, #1, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
WHILELO P3.S, WZR, W3	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
ADDVL X17, X4, #25	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LD1RD {Z19.D}, P0/Z, [X2, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z18.D}, P0/Z, [X2, #17]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z17.D}, P0/Z, [X2, #18]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z20, [X4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z20.D}, P0/Z, [X2, #15]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z29, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
BL 403d80 <@plt_start@+0x700>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0

Source file and lines	TwoBodyJastrowRef.h:265-400
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:214
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:183
/usr/include/c++/11/bits/stl_algobase.h:924,1109,1115
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:276-285,291-298,305-336
/usr/include/c++/11/bits/stl_numeric.h:140-141
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229,249
/usr/include/c++/11/bits/stl_vector.h:1061,1169
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:265-268,356-367,373-400
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:216,235,243
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:302-305

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

45% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
66% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 42.00 to 0.50 cycles (84.00x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 344 bytes. The binary function is storing 1144 bytes.

General properties

nb instructions	150
loop length	600
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

18.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	1.00	1.00	10.75	10.75	20.00	10.50	8.75	8.75	8.75	8.75	42.00	42.00	7.00	7.50	7.50
cycles	1.00	1.00	10.75	10.75	20.00	10.50	8.75	8.75	8.75	8.75	42.00	42.00	7.00	7.50	7.50

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.25
Overall L1	42.00

Vectorization ratios

all	45%
load	0%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	66%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 42.00 cycles. At this rate:

8% of peak load performance is reached (8.19 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
56% of peak store performance is reached (27.24 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 435f40

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
CNTD X12, ALL, MUL #13	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X11, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X2, X12, #60, #59	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X2, #368	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB SP, SP, X3,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADRP X4, <4c1f70>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X8, SP, #26	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ORR X6, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X5, [X4, #4016]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X0, X1, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X0, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X0, [X1, #2576]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X1, [X5]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X1, [X8, #360]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X1, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X1, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBZ X11, 437228 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9recomputeERNS1_11ParticleSetE+0x12e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X28, [X6, #2712]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADDVL X0, SP, #20	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
UBFM X4, X4, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z20.D}, P0/Z, [X2, #21]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X0, X0, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X17, SP, #21	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z20, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X17, X17, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X30, X23, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z19.D}, P0/Z, [X2, #20]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X5, X19, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X14, X24, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z19, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X4, SP, #19	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADDVL X0, SP, #17	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
DUP Z29.D, Z16.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ADD X4, X4, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X0, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z30.D}, P0/Z, [X2, #22]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADDVL X17, SP, #18	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LD1RD {Z16.D}, P0/Z, [X2, #25]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z30, [X4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X17, X17, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X4, SP, #16	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z16, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X0, SP, #14	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X4, X4, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z31.D}, P0/Z, [X2, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X0, X0, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z31, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X17, SP, #15	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X17, X17, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z0.D}, P0/Z, [X2, #26]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z2.D}, P0/Z, [X2, #29]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z0, [X4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X4, SP, #13	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z2, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X0, SP, #11	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X4, X4, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z1.D}, P0/Z, [X2, #28]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X0, X0, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z1, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X17, SP, #12	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X17, X17, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z3.D}, P0/Z, [X2, #30]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z5.D}, P0/Z, [X2, #33]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z3, [X4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X4, SP, #10	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z5, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X0, SP, #8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X4, X4, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z4.D}, P0/Z, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X0, X0, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z4, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X17, SP, #9	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X17, X17, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z6.D}, P0/Z, [X2, #34]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z28.D}, P0/Z, [X2, #37]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z27.D}, P0/Z, [X2, #38]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z26.D}, P0/Z, [X2, #41]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z25.D}, P0/Z, [X2, #42]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z24.D}, P0/Z, [X2, #45]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z23.D}, P0/Z, [X2, #46]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z22.D}, P0/Z, [X2, #49]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z21.D}, P0/Z, [X2, #50]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z6, [X4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z7.D}, P0/Z, [X2, #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X4, SP, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z8.D}, P0/Z, [X2, #4]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z8, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X0, SP, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z17.D}, P0/Z, [X2, #11]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z9.D}, P0/Z, [X2, #5]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z17, [X0, #2, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z9, [X4, #7, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z10.D}, P0/Z, [X2, #6]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z11.D}, P0/Z, [X2, #7]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z10, [X4, #6, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z11, [X4, #5, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z13.D}, P0/Z, [X2, #9]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z15.D}, P0/Z, [X2, #10]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z13, [X0, #4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z15, [X0, #3, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z7, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X17, X4, #24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADDVL X4, X0, #23	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LDR X0, [X2, #536]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z18.D}, P0/Z, [X2, #12]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z19.D}, P0/Z, [X2, #13]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z20.D}, P0/Z, [X2, #14]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z12.D}, P0/Z, [X2, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z18, [X4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X4, SP, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z12, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X17, SP, #336	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z14.D, Z14.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STR Z19, [X17, #1, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
WHILELO P3.S, WZR, W3	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
ADDVL X17, X4, #25	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LD1RD {Z19.D}, P0/Z, [X2, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z18.D}, P0/Z, [X2, #17]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z17.D}, P0/Z, [X2, #18]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z20, [X4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z20.D}, P0/Z, [X2, #15]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z29, [X17, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
BL 403d80 <@plt_start@+0x700>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼miniqmcreference::TwoBodyJastrowRef >::recompute(qmcplusplus::ParticleSet&)–	0.25	0.15
○Loop 645 - BsplineFunctor.h:305-336 - exec	0	0
○Loop 657 - TwoBodyJastrowRef.h:356-356 - exec	0	0
▼Loop 646 - TwoBodyJastrowRef.h:265-400 - exec–	0	0
○Loop 653 - TwoBodyJastrowRef.h:386-389 - exec	0.05	0.03
○Loop 647 - BsplineFunctor.h:291-297 - exec	0.03	0.02
○Loop 655 - TwoBodyJastrowRef.h:373-374 - exec	0.03	0.02
○Loop 656 - stl_numeric.h:140-141 - exec	0.02	0.01
○Loop 651 - TwoBodyJastrowRef.h:359-400 - exec	0	0
▼Loop 649 - TwoBodyJastrowRef.h:391-396 - exec–	0	0
○Loop 652 - TwoBodyJastrowRef.h:395-396 - exec	0.04	0.02
○Loop 650 - TwoBodyJastrowRef.h:359-362 - exec	0	0
▼Loop 648 - TwoBodyJastrowRef.h:375-381 - exec–	0	0
○Loop 654 - TwoBodyJastrowRef.h:379-380 - exec	0.07	0.04

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code