OV - exec - Function miniqmcreference::OneBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evalGrad(qmcplusplus::ParticleSet&, int)

	Function: miniqmcreference::OneBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evalGrad(qmcplu ...	Module: exec	Source: OhmmsVector.h:223-223 [...]	Coverage: 0.01%

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 183 - 183

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183:     return (const_cast<T1&>(a) = b);

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h: 251 - 251

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251:   GradType evalGrad(ParticleSet& P, int iat) { return GradType(Grad[iat]); }

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 223

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223:     return X[i];

0x413960 MOVZ	W1, #24

0x413964 LDR	X3, [X0, #392]

0x413968 ORR	X0, XZR, X8

0x41396c SMADDL	X2, W2, W1, XZR

0x413970 ADD	X4, X3, X2

0x413974 LDR	D2, [X3, X2]

0x413978 LDP	D1, D0, [X4, #8]

0x41397c STP	D2, D1, [X8]

0x413980 STR	D0, [X8, #16]

0x413984 RET

0x413988 HINT	#0

0x41398c HINT	#0

0x413990 HINT	#0

0x413994 HINT	#0

0x413998 HINT	#0

0x41399c HINT	#0

Coverage (%)	Name	Source Location	Module
►100.00+	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	OhmmsVector.h:223-223
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:183
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:251
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223

gain
potential
hint
expert

Vectorization

Your function is poorly vectorized. Only 32% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 1.67 to 0.54 cycles (3.08x speedup).

Details

40% of VPU instructions are used in vector version (process two or more data elements in vector registers):

50% of VPU loads are used in vector version.
50% of VPU stores are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 32 bytes. The binary function is storing 24 bytes.

General properties

nb instructions	16
loop length	64
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

1.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	0.50	0.50	1.00	1.00	1.00	1.00	1.00	1.00	0.00	0.00	1.67	1.67	1.67	0.00	0.00
cycles	0.50	0.50	1.00	1.00	1.00	1.00	1.00	1.00	0.00	0.00	1.67	1.67	1.67	0.00	0.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	1.25
Overall L1	1.67

Vectorization ratios

all	40%
load	50%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 1.67 cycles. At this rate:

20% of peak load performance is reached (19.20 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
30% of peak store performance is reached (14.40 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 413960

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
MOVZ W1, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X3, [X0, #392]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SMADDL X2, W2, W1, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X4, X3, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR D2, [X3, X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D1, D0, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STP D2, D1, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D0, [X8, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Source file and lines	OhmmsVector.h:223-223
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:183
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:251
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223

gain
potential
hint
expert

Vectorization

Details

40% of VPU instructions are used in vector version (process two or more data elements in vector registers):

50% of VPU loads are used in vector version.
50% of VPU stores are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 32 bytes. The binary function is storing 24 bytes.

General properties

nb instructions	16
loop length	64
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

1.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	0.50	0.50	1.00	1.00	1.00	1.00	1.00	1.00	0.00	0.00	1.67	1.67	1.67	0.00	0.00
cycles	0.50	0.50	1.00	1.00	1.00	1.00	1.00	1.00	0.00	0.00	1.67	1.67	1.67	0.00	0.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	1.25
Overall L1	1.67

Vectorization ratios

all	40%
load	50%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 1.67 cycles. At this rate:

20% of peak load performance is reached (19.20 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
30% of peak store performance is reached (14.40 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 413960

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
MOVZ W1, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X3, [X0, #392]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SMADDL X2, W2, W1, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X4, X3, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR D2, [X3, X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D1, D0, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STP D2, D1, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D0, [X8, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
○miniqmcreference::OneBodyJastrowRef >::evalGrad(qmcplusplus::ParticleSet&, int)	0.01	0

Report Configuration

Vectorization

Details

Workaround

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code