OV - exec - Function qmcplusplus::DistanceTableAA<double, 3u, 39>::move(qmcplusplus::ParticleSet const&, qmcplusplus::TinyVector<double, 3u> const&, int)

	Function: qmcplusplus::DistanceTableAA<double, 3u, 39>::move(qmcplusplus::ParticleSet const&, qmcplu ...	Module: exec	Source: VectorSoAContainer.h:241-243 [...]	Coverage: 39.16%

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds.h: 168 - 217

--------------------------------------------------------------------------------

168:     const T y0 = pos[1];

169:     const T z0 = pos[2];

[...]

185: #pragma omp simd aligned(temp_r, px, py, pz, dx, dy, dz: QMC_SIMD_ALIGNMENT)

186:     for (int iat = first; iat < last; ++iat)

187:     {

188:       const T flip    = iat < flip_ind ? one : minusone;

189:       const T displ_0 = (px[iat] - x0) * flip;

190:       const T displ_1 = (py[iat] - y0) * flip;

191:       const T displ_2 = (pz[iat] - z0) * flip;

192:

193:       const T ar_0 = -std::floor(displ_0 * g00 + displ_1 * g10 + displ_2 * g20);

194:       const T ar_1 = -std::floor(displ_0 * g01 + displ_1 * g11 + displ_2 * g21);

195:       const T ar_2 = -std::floor(displ_0 * g02 + displ_1 * g12 + displ_2 * g22);

196:

197:       const T delx = displ_0 + ar_0 * r00 + ar_1 * r10 + ar_2 * r20;

198:       const T dely = displ_1 + ar_0 * r01 + ar_1 * r11 + ar_2 * r21;

199:       const T delz = displ_2 + ar_0 * r02 + ar_1 * r12 + ar_2 * r22;

200:

201:       T rmin = delx * delx + dely * dely + delz * delz;

202:       int ic = 0;

203: #pragma unroll(7)

204:       for (int c = 1; c < 8; ++c)

205:       {

206:         const T x  = delx + cellx[c];

207:         const T y  = dely + celly[c];

208:         const T z  = delz + cellz[c];

209:         const T r2 = x * x + y * y + z * z;

210:         ic         = (r2 < rmin) ? c : ic;

211:         rmin       = (r2 < rmin) ? r2 : rmin;

212:       }

213:

214:       temp_r[iat] = std::sqrt(rmin);

215:       dx[iat]     = flip * (delx + cellx[ic]);

216:       dy[iat]     = flip * (dely + celly[ic]);

217:       dz[iat]     = flip * (delz + cellz[ic]);

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h: 241 - 243

--------------------------------------------------------------------------------

241:   T* restrict data(size_t i) { return myData + i * nGhosts; }

242:   ///return the const pointer of the i-th components

243:   const T* restrict data(size_t i) const { return myData + i * nGhosts; }

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/DistanceTableAA.h: 81 - 84

--------------------------------------------------------------------------------

81:   inline void move(const ParticleSet& P, const PosType& rnew, IndexType iat)

82:   {

83:     DTD_BConds<T, D, SC>::computeDistances(rnew, P.RSoA, Temp_r.data(), Temp_dr, 0, Ntargets, iat);

84:   }

0x46d180 LDR	X9, [X0, #136]

0x46d184 LDR	X8, [X1, #1536]

0x46d188 LDR	X13, [X0, #152]

0x46d18c UBFM	X4, X9, #61, #60

0x46d190 LDR	X11, [X1, #1552]

0x46d194 UBFM	X1, X8, #61, #60

0x46d198 LDR	W10, [X0, #200]

0x46d19c ADD	X14, X13, X4

0x46d1a0 ADD	X9, X14, X4

0x46d1a4 LDP	D6, D7, [X2]

0x46d1a8 ADD	X12, X11, X1

0x46d1ac ADD	X8, X12, X1

0x46d1b0 LDR	D16, [X2, #16]

0x46d1b4 LDR	X15, [X0, #104]

0x46d1b8 CMP	W10, #0

0x46d1bc B.LE	46d460

0x46d1c0 FMOV	D18, #-1.0000000

0x46d1c4 FMOV	D17, #1.0000000

0x46d1c8 STP	X29, X30, [SP, #960]!

0x46d1cc ADD	X29, SP, #0

0x46d1d0 MOVZ	X4, #0

0x46d1d4 ADD	X1, X0, #240

0x46d1d8 ADD	X7, X0, #384

0x46d1dc ADD	X6, X0, #448

0x46d1e0 ADD	X5, X0, #512

0x46d1e4 STP	X19, X20, [SP, #16]

0x46d1e8 MOVZ	W30, #4

0x46d1ec MOVZ	W20, #2

0x46d1f0 MOVZ	W19, #3

0x46d1f4 MOVZ	W18, #5

0x46d1f8 MOVZ	W17, #6

0x46d1fc MOVZ	W16, #7

0x46d200 STP	D8, D9, [SP, #32]

0x46d204 STR	D10, [SP, #48]

(1213) 0x46d208 LDR	D20, [X12, X4,LSL #3]

(1213) 0x46d20c CMP	W3, W4

(1213) 0x46d210 LDR	D5, [X11, X4,LSL #3]

(1213) 0x46d214 FCSEL	D19, D18, D17, #13

(1213) 0x46d218 LDR	D0, [X8, X4,LSL #3]

(1213) 0x46d21c FSUB	D1, D20, S7

(1213) 0x46d220 LDP	D28, D8, [X1, #32]

(1213) 0x46d224 FSUB	D2, D5, S6

(1213) 0x46d228 LDP	D9, D4, [X1]

(1213) 0x46d22c FSUB	D3, D0, S16

(1213) 0x46d230 LDP	D27, D21, [X1, #16]

(1213) 0x46d234 FMUL	D24, D1, D19

(1213) 0x46d238 LDP	D10, D22, [X1, #96]

(1213) 0x46d23c FMUL	D25, D2, D19

(1213) 0x46d240 LDR	D29, [X1, #80]

(1213) 0x46d244 FMUL	D26, D3, D19

(1213) 0x46d248 LDR	D23, [X1, #64]

(1213) 0x46d24c FMUL	D30, D24, D28

(1213) 0x46d250 FMUL	D31, D24, D4

(1213) 0x46d254 LDR	D28, [X1, #56]

(1213) 0x46d258 FMADD	D20, D25, D21, D30

(1213) 0x46d25c FMADD	D5, D25, D9, D31

(1213) 0x46d260 LDR	D21, [X1, #128]

(1213) 0x46d264 FMUL	D31, D24, D28

(1213) 0x46d268 FMADD	D0, D26, D8, D20

(1213) 0x46d26c FRINTM	D2, D0

(1213) 0x46d270 FNMUL	D3, D2, D22

(1213) 0x46d274 FMADD	D9, D26, D27, D5

(1213) 0x46d278 FRINTM	D4, D9

(1213) 0x46d27c FNMUL	D22, D2, D21

(1213) 0x46d280 LDR	D20, [X1, #48]

(1213) 0x46d284 FNMUL	D1, D2, D29

(1213) 0x46d288 LDR	D29, [X1, #72]

(1213) 0x46d28c FMSUB	D27, D4, D10, D3

(1213) 0x46d290 LDP	D10, D8, [X1, #112]

(1213) 0x46d294 FMADD	D3, D25, D20, D31

(1213) 0x46d298 LDR	D9, [X1, #136]

(1213) 0x46d29c FMSUB	D30, D4, D29, D1

(1213) 0x46d2a0 LDR	D2, [X1, #88]

(1213) 0x46d2a4 FMSUB	D0, D4, D8, D22

(1213) 0x46d2a8 FMADD	D23, D26, D23, D3

(1213) 0x46d2ac FRINTM	D5, D23

(1213) 0x46d2b0 FADD	D24, D24, D27

(1213) 0x46d2b4 FADD	D25, D25, D30

(1213) 0x46d2b8 LDP	D21, D30, [X6, #8]

(1213) 0x46d2bc FMSUB	D20, D5, D10, D24

(1213) 0x46d2c0 FADD	D26, D26, D0

(1213) 0x46d2c4 LDP	D29, D10, [X5, #8]

(1213) 0x46d2c8 LDP	D24, D8, [X6, #24]

(1213) 0x46d2cc FMSUB	D1, D5, D2, D25

(1213) 0x46d2d0 FMSUB	D0, D5, D9, D26

(1213) 0x46d2d4 FADD	D25, D20, D21

(1213) 0x46d2d8 FMUL	D4, D20, D20

(1213) 0x46d2dc FADD	D3, D20, D30

(1213) 0x46d2e0 FADD	D2, D20, D24

(1213) 0x46d2e4 FADD	D23, D20, D8

(1213) 0x46d2e8 LDP	D8, D30, [X7, #24]

(1213) 0x46d2ec FMUL	D5, D25, D25

(1213) 0x46d2f0 FMADD	D27, D1, D1, D4

(1213) 0x46d2f4 LDR	D4, [X5, #24]

(1213) 0x46d2f8 FADD	D22, D0, D10

(1213) 0x46d2fc FADD	D31, D0, D29

(1213) 0x46d300 LDP	D10, D21, [X7, #8]

(1213) 0x46d304 FMUL	D26, D3, D3

(1213) 0x46d308 FMUL	D9, D2, D2

(1213) 0x46d30c FADD	D3, D1, D8

(1213) 0x46d310 FADD	D2, D1, D30

(1213) 0x46d314 FMADD	D28, D0, D0, D27

(1213) 0x46d318 FMUL	D27, D23, D23

(1213) 0x46d31c FADD	D29, D0, D4

(1213) 0x46d320 FADD	D25, D1, D10

(1213) 0x46d324 FADD	D24, D1, D21

(1213) 0x46d328 FMADD	D23, D25, D25, D5

(1213) 0x46d32c FMADD	D5, D24, D24, D26

(1213) 0x46d330 FMADD	D26, D3, D3, D9

(1213) 0x46d334 FMADD	D9, D2, D2, D27

(1213) 0x46d338 FMADD	D27, D31, D31, D23

(1213) 0x46d33c FMINNM	D4, D28, D27

(1213) 0x46d340 FMADD	D22, D22, D22, D5

(1213) 0x46d344 FMINNM	D31, D22, D4

(1213) 0x46d348 FMADD	D10, D29, D29, D26

(1213) 0x46d34c FMINNM	D29, D10, D31

(1213) 0x46d350 FCMPE	D28, D27

(1213) 0x46d354 LDP	D28, D21, [X5, #32]

(1213) 0x46d358 CSINC	W2, WZR, WZR, #13

(1213) 0x46d35c FCMPE	D22, D4

(1213) 0x46d360 CSEL	W2, W2, W20, #10

(1213) 0x46d364 LDR	D8, [X5, #48]

(1213) 0x46d368 FCMPE	D10, D31

(1213) 0x46d36c CSEL	W2, W2, W19, #10

(1213) 0x46d370 LDP	D24, D2, [X6, #40]

(1213) 0x46d374 FADD	D30, D0, D28

(1213) 0x46d378 FADD	D5, D0, D21

(1213) 0x46d37c LDR	D26, [X6, #56]

(1213) 0x46d380 FADD	D3, D0, D8

(1213) 0x46d384 LDP	D21, D8, [X7, #40]

(1213) 0x46d388 FADD	D4, D20, D2

(1213) 0x46d38c FMADD	D25, D30, D30, D9

(1213) 0x46d390 FADD	D9, D20, D24

(1213) 0x46d394 FMINNM	D23, D25, D29

(1213) 0x46d398 FADD	D27, D20, D26

(1213) 0x46d39c FADD	D30, D1, D21

(1213) 0x46d3a0 FMUL	D10, D4, D4

(1213) 0x46d3a4 FMUL	D22, D9, D9

(1213) 0x46d3a8 FMUL	D31, D27, D27

(1213) 0x46d3ac FCMPE	D25, D29

(1213) 0x46d3b0 CSEL	W2, W2, W30, #10

(1213) 0x46d3b4 FADD	D25, D1, D8

(1213) 0x46d3b8 FMADD	D24, D30, D30, D22

(1213) 0x46d3bc LDR	D29, [X5, #56]

(1213) 0x46d3c0 FMADD	D5, D5, D5, D24

(1213) 0x46d3c4 FMINNM	D26, D5, D23

(1213) 0x46d3c8 FMADD	D2, D25, D25, D10

(1213) 0x46d3cc FADD	D28, D0, D29

(1213) 0x46d3d0 FMADD	D3, D3, D3, D2

(1213) 0x46d3d4 FMINNM	D9, D3, D26

(1213) 0x46d3d8 FCMPE	D5, D23

(1213) 0x46d3dc LDR	D23, [X7, #56]

(1213) 0x46d3e0 CSEL	W2, W2, W18, #10

(1213) 0x46d3e4 FCMPE	D3, D26

(1213) 0x46d3e8 CSEL	W2, W2, W17, #10

(1213) 0x46d3ec FADD	D4, D1, D23

(1213) 0x46d3f0 FMADD	D27, D4, D4, D31

(1213) 0x46d3f4 FMADD	D22, D28, D28, D27

(1213) 0x46d3f8 FMINNM	D10, D22, D9

(1213) 0x46d3fc FSQRT	D31, D10

(1213) 0x46d400 FCMPE	D22, D9

(1213) 0x46d404 CSEL	W2, W2, W16, #10

(1213) 0x46d408 ADD	X2, X0, W2,SXTW #3

(1213) 0x46d40c LDR	D29, [X2, #384]

(1213) 0x46d410 STR	D31, [X15, X4,LSL #3]

(1213) 0x46d414 FADD	D1, D1, D29

(1213) 0x46d418 FMUL	D28, D1, D19

(1213) 0x46d41c STR	D28, [X13, X4,LSL #3]

(1213) 0x46d420 LDR	D21, [X2, #448]

(1213) 0x46d424 FADD	D20, D20, D21

(1213) 0x46d428 FMUL	D8, D20, D19

(1213) 0x46d42c STR	D8, [X14, X4,LSL #3]

(1213) 0x46d430 LDR	D30, [X2, #512]

(1213) 0x46d434 FADD	D0, D0, D30

(1213) 0x46d438 FMUL	D19, D0, D19

(1213) 0x46d43c STR	D19, [X9, X4,LSL #3]

(1213) 0x46d440 ADD	X4, X4, #1

(1213) 0x46d444 CMP	W10, W4

(1213) 0x46d448 B.GT	46d208

0x46d44c LDP	X19, X20, [SP, #16]

0x46d450 LDP	D8, D9, [SP, #32]

0x46d454 LDR	D10, [SP, #48]

0x46d458 LDP	X29, X30, [SP], #64

0x46d45c RET

0x46d460 RET

0x46d464 HINT	#0

0x46d468 HINT	#0

0x46d46c HINT	#0

0x46d470 HINT	#0

0x46d474 HINT	#0

0x46d478 HINT	#0

0x46d47c HINT	#0

Coverage (%)	Name	Source Location	Module
►33.85+	qmcplusplus::ParticleSet::make[...]	ParticleSet.cpp:290	exec
○	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►18.46+	qmcplusplus::ParticleSet::make[...]	ParticleSet.cpp:290	exec
○	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►18.46+	qmcplusplus::ParticleSet::make[...]	ParticleSet.cpp:290	exec
○	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►13.85+	qmcplusplus::ParticleSet::make[...]	ParticleSet.cpp:290	exec
○	main._omp_fn.1	refwrap.h:337	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►6.15+	qmcplusplus::ParticleSet::make[...]	ParticleSet.cpp:290	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►4.62+	qmcplusplus::ParticleSet::make[...]	ParticleSet.cpp:290	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►3.08+	qmcplusplus::ParticleSet::make[...]	ParticleSet.cpp:290	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►1.54+	qmcplusplus::ParticleSet::make[...]	ParticleSet.cpp:290	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	VectorSoAContainer.h:241-243
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds.h:168-169,185-217
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:241-243
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/DistanceTableAA.h:81-84

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 5.33 to 2.00 cycles (2.67x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 24% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 5.33 to 1.17 cycles (4.57x speedup).

Details

14% of VPU instructions are used in vector version (process two or more data elements in vector registers):

50% of VPU loads are used in vector version.
50% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 124 bytes. The binary function is storing 56 bytes.

General properties

nb instructions	47
loop length	188
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

5.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	1.50	1.50	5.00	5.00	5.00	5.00	1.00	1.00	1.00	1.00	5.33	5.33	5.33	1.00	1.00
cycles	1.50	1.50	5.00	5.00	5.00	5.00	1.00	1.00	1.00	1.00	5.33	5.33	5.33	1.00	1.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	5.00
Overall L1	5.33

Vectorization ratios

all	14%
load	50%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 5.33 cycles. At this rate:

24% of peak load performance is reached (23.25 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
21% of peak store performance is reached (10.50 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 46d180

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
LDR X9, [X0, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X1, #1536]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X13, [X0, #152]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X4, X9, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X11, [X1, #1552]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X1, X8, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W10, [X0, #200]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X14, X13, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X9, X14, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP D6, D7, [X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ADD X12, X11, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X8, X12, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR D16, [X2, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR X15, [X0, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W10, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 46d460 <_ZN11qmcplusplus15DistanceTableAAIdLj3ELi39EE4moveERKNS_11ParticleSetERKNS_10TinyVectorIdLj3EEEi+0x2e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D17, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP X29, X30, [SP, #960]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X0, #240	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, X0, #384	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X6, X0, #448	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, X0, #512	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ W30, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W20, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W19, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W18, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W17, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W16, #7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D8, D9, [SP, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D10, [SP, #48]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP D8, D9, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D10, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP X29, X30, [SP], #64	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Source file and lines	VectorSoAContainer.h:241-243
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds.h:168-169,185-217
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:241-243
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/DistanceTableAA.h:81-84

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 5.33 to 2.00 cycles (2.67x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

14% of VPU instructions are used in vector version (process two or more data elements in vector registers):

50% of VPU loads are used in vector version.
50% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 124 bytes. The binary function is storing 56 bytes.

General properties

nb instructions	47
loop length	188
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

5.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	1.50	1.50	5.00	5.00	5.00	5.00	1.00	1.00	1.00	1.00	5.33	5.33	5.33	1.00	1.00
cycles	1.50	1.50	5.00	5.00	5.00	5.00	1.00	1.00	1.00	1.00	5.33	5.33	5.33	1.00	1.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	5.00
Overall L1	5.33

Vectorization ratios

all	14%
load	50%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 5.33 cycles. At this rate:

24% of peak load performance is reached (23.25 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
21% of peak store performance is reached (10.50 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 46d180

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
LDR X9, [X0, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X1, #1536]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X13, [X0, #152]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X4, X9, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X11, [X1, #1552]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X1, X8, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W10, [X0, #200]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X14, X13, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X9, X14, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP D6, D7, [X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ADD X12, X11, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X8, X12, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR D16, [X2, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR X15, [X0, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W10, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 46d460 <_ZN11qmcplusplus15DistanceTableAAIdLj3ELi39EE4moveERKNS_11ParticleSetERKNS_10TinyVectorIdLj3EEEi+0x2e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D18, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D17, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP X29, X30, [SP, #960]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X0, #240	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, X0, #384	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X6, X0, #448	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, X0, #512	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ W30, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W20, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W19, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W18, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W17, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W16, #7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D8, D9, [SP, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D10, [SP, #48]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP D8, D9, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D10, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP X29, X30, [SP], #64	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼qmcplusplus::DistanceTableAA::move(qmcplusplus::ParticleSet const&, qmcplusplus::TinyVector const&, int)–	39.16	0.32
○Loop 1213 - ParticleBConds.h:188-217 - exec	39.16	0.32

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code