OV - exec - Function qmcplusplus::DistanceTableAA<double, 3u, 39>::evaluate(qmcplusplus::ParticleSet&)

	Function: qmcplusplus::DistanceTableAA<double, 3u, 39>::evaluate(qmcplusplus::ParticleSet&)	Module: exec	Source: DistanceTableAA.h:63-72 [...]	Coverage: 1.2%

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds.h: 168 - 217

--------------------------------------------------------------------------------

168:     const T y0 = pos[1];

169:     const T z0 = pos[2];

[...]

185: #pragma omp simd aligned(temp_r, px, py, pz, dx, dy, dz: QMC_SIMD_ALIGNMENT)

186:     for (int iat = first; iat < last; ++iat)

187:     {

188:       const T flip    = iat < flip_ind ? one : minusone;

189:       const T displ_0 = (px[iat] - x0) * flip;

190:       const T displ_1 = (py[iat] - y0) * flip;

191:       const T displ_2 = (pz[iat] - z0) * flip;

192:

193:       const T ar_0 = -std::floor(displ_0 * g00 + displ_1 * g10 + displ_2 * g20);

194:       const T ar_1 = -std::floor(displ_0 * g01 + displ_1 * g11 + displ_2 * g21);

195:       const T ar_2 = -std::floor(displ_0 * g02 + displ_1 * g12 + displ_2 * g22);

196:

197:       const T delx = displ_0 + ar_0 * r00 + ar_1 * r10 + ar_2 * r20;

198:       const T dely = displ_1 + ar_0 * r01 + ar_1 * r11 + ar_2 * r21;

199:       const T delz = displ_2 + ar_0 * r02 + ar_1 * r12 + ar_2 * r22;

200:

201:       T rmin = delx * delx + dely * dely + delz * delz;

202:       int ic = 0;

203: #pragma unroll(7)

204:       for (int c = 1; c < 8; ++c)

205:       {

206:         const T x  = delx + cellx[c];

207:         const T y  = dely + celly[c];

208:         const T z  = delz + cellz[c];

209:         const T r2 = x * x + y * y + z * z;

210:         ic         = (r2 < rmin) ? c : ic;

211:         rmin       = (r2 < rmin) ? r2 : rmin;

212:       }

213:

214:       temp_r[iat] = std::sqrt(rmin);

215:       dx[iat]     = flip * (delx + cellx[ic]);

216:       dy[iat]     = flip * (dely + celly[ic]);

217:       dz[iat]     = flip * (delz + cellz[ic]);

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h: 241 - 243

--------------------------------------------------------------------------------

241:   T* restrict data(size_t i) { return myData + i * nGhosts; }

242:   ///return the const pointer of the i-th components

243:   const T* restrict data(size_t i) const { return myData + i * nGhosts; }

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/DistanceTableAA.h: 63 - 72

--------------------------------------------------------------------------------

63:   inline void evaluate(ParticleSet& P)

64:   {

65:     constexpr T BigR = std::numeric_limits<T>::max();

66:     // P.RSoA.copyIn(P.R);

67:     for (int iat = 0; iat < Ntargets; ++iat)

68:     {

69:       DTD_BConds<T, D, SC>::computeDistances(P.R[iat], P.RSoA, Distances[iat], Displacements[iat], 0, Ntargets, iat);

70:       Distances[iat][iat] = BigR; // assign big distance

71:     }

72:   }

0x46c780 LDR	W12, [X0, #200]

0x46c784 CMP	W12, #0

0x46c788 B.LE	46cac0

0x46c78c STP	X29, X30, [SP, #912]!

0x46c790 ORR	X11, XZR, X0

0x46c794 ADD	X29, SP, #0

0x46c798 MOVN	X0, #32784

0x46c79c FMOV	D17, #1.0000000

0x46c7a0 FMOV	D16, #-1.0000000

0x46c7a4 MOVZ	W7, #0

0x46c7a8 ADD	X5, X11, #384

0x46c7ac LDR	X13, [X1, #1536]

0x46c7b0 ADD	X4, X11, #448

0x46c7b4 ADD	X3, X11, #512

0x46c7b8 STP	X23, X24, [SP, #48]

0x46c7bc MOVZ	W30, #4

0x46c7c0 MOVZ	W18, #5

0x46c7c4 MOVZ	W17, #6

0x46c7c8 MOVZ	W16, #7

0x46c7cc LDR	X24, [X11, #24]

0x46c7d0 STP	X21, X22, [SP, #32]

0x46c7d4 LDR	X15, [X1, #1552]

0x46c7d8 UBFM	X24, X24, #61, #60

0x46c7dc FMOV	D18, X0

0x46c7e0 ADD	X0, X11, #240

0x46c7e4 LDR	X8, [X11, #64]

0x46c7e8 STP	X19, X20, [SP, #16]

0x46c7ec MOVZ	W20, #2

0x46c7f0 MOVZ	W19, #3

0x46c7f4 LDR	X22, [X11, #80]

0x46c7f8 ORR	X23, XZR, X8

0x46c7fc STP	D8, D9, [SP, #80]

0x46c800 LDR	X21, [X1, #1512]

0x46c804 UBFM	X1, X13, #61, #60

0x46c808 ADD	X14, X15, X1

0x46c80c STR	X25, [SP, #64]

0x46c810 ADD	X25, X24, #8

0x46c814 ADD	X13, X14, X1

0x46c818 STP	D10, D11, [SP, #96]

0x46c81c ADD	X22, X22, #8

(1208) 0x46c820 LDR	X6, [X22]

(1208) 0x46c824 MOVZ	X2, #0

(1208) 0x46c828 LDR	X10, [X22, #16]

(1208) 0x46c82c LDP	D7, D6, [X21]

(1208) 0x46c830 UBFM	X1, X6, #61, #60

(1208) 0x46c834 LDR	D5, [X21, #16]

(1208) 0x46c838 ADD	X9, X10, X1

(1208) 0x46c83c ADD	X6, X9, X1

  (1207) 0x46c840 LDR	D21, [X14, X2,LSL #3]

  (1207) 0x46c844 CMP	W7, W2

  (1207) 0x46c848 LDR	D20, [X15, X2,LSL #3]

  (1207) 0x46c84c FCSEL	D19, D17, D16, #12

  (1207) 0x46c850 LDR	D0, [X13, X2,LSL #3]

  (1207) 0x46c854 FSUB	D1, D21, S6

  (1207) 0x46c858 LDP	D27, D8, [X0, #32]

  (1207) 0x46c85c FSUB	D2, D20, S7

  (1207) 0x46c860 LDP	D26, D11, [X0, #16]

  (1207) 0x46c864 FSUB	D3, D0, S5

  (1207) 0x46c868 LDP	D9, D4, [X0]

  (1207) 0x46c86c FMUL	D22, D1, D19

  (1207) 0x46c870 LDP	D10, D23, [X0, #96]

  (1207) 0x46c874 FMUL	D24, D2, D19

  (1207) 0x46c878 LDR	D28, [X0, #80]

  (1207) 0x46c87c FMUL	D25, D3, D19

  (1207) 0x46c880 FMUL	D29, D22, D27

  (1207) 0x46c884 FMUL	D30, D22, D4

  (1207) 0x46c888 FMADD	D31, D24, D11, D29

  (1207) 0x46c88c FMADD	D21, D24, D9, D30

  (1207) 0x46c890 LDR	D9, [X0, #72]

  (1207) 0x46c894 FMADD	D20, D25, D8, D31

  (1207) 0x46c898 LDP	D8, D11, [X0, #120]

  (1207) 0x46c89c FRINTM	D0, D20

  (1207) 0x46c8a0 FNMUL	D2, D0, D23

  (1207) 0x46c8a4 FNMUL	D1, D0, D28

  (1207) 0x46c8a8 LDP	D27, D28, [X0, #48]

  (1207) 0x46c8ac FMADD	D3, D25, D26, D21

  (1207) 0x46c8b0 FRINTM	D4, D3

  (1207) 0x46c8b4 LDR	D21, [X0, #64]

  (1207) 0x46c8b8 FMSUB	D26, D4, D10, D2

  (1207) 0x46c8bc FNMUL	D10, D0, D11

  (1207) 0x46c8c0 LDR	D2, [X0, #112]

  (1207) 0x46c8c4 FMSUB	D23, D4, D9, D1

  (1207) 0x46c8c8 FMUL	D29, D22, D28

  (1207) 0x46c8cc LDR	D20, [X0, #88]

  (1207) 0x46c8d0 LDP	D9, D11, [X4, #8]

  (1207) 0x46c8d4 FMSUB	D30, D4, D8, D10

  (1207) 0x46c8d8 LDR	D4, [X0, #136]

  (1207) 0x46c8dc FMADD	D31, D24, D27, D29

  (1207) 0x46c8e0 LDP	D10, D8, [X4, #24]

  (1207) 0x46c8e4 FADD	D22, D22, D26

  (1207) 0x46c8e8 LDP	D26, D28, [X3, #8]

  (1207) 0x46c8ec FADD	D24, D24, D23

  (1207) 0x46c8f0 FMADD	D0, D25, D21, D31

  (1207) 0x46c8f4 FRINTM	D3, D0

  (1207) 0x46c8f8 LDR	D27, [X3, #24]

  (1207) 0x46c8fc FADD	D25, D25, D30

  (1207) 0x46c900 FMSUB	D21, D3, D2, D22

  (1207) 0x46c904 FMSUB	D1, D3, D20, D24

  (1207) 0x46c908 FMSUB	D0, D3, D4, D25

  (1207) 0x46c90c FADD	D31, D21, D11

  (1207) 0x46c910 FADD	D30, D21, D9

  (1207) 0x46c914 FADD	D22, D21, D10

  (1207) 0x46c918 FADD	D24, D21, D8

  (1207) 0x46c91c FMUL	D9, D21, D21

  (1207) 0x46c920 FADD	D23, D0, D26

  (1207) 0x46c924 FADD	D4, D0, D28

  (1207) 0x46c928 LDP	D26, D28, [X5, #8]

  (1207) 0x46c92c FADD	D29, D0, D27

  (1207) 0x46c930 FMUL	D3, D31, D31

  (1207) 0x46c934 LDP	D27, D8, [X5, #24]

  (1207) 0x46c938 FMUL	D20, D30, D30

  (1207) 0x46c93c FMUL	D2, D22, D22

  (1207) 0x46c940 FMUL	D25, D24, D24

  (1207) 0x46c944 FMADD	D24, D1, D1, D9

  (1207) 0x46c948 FADD	D31, D1, D26

  (1207) 0x46c94c FADD	D11, D1, D28

  (1207) 0x46c950 FADD	D10, D1, D27

  (1207) 0x46c954 FADD	D30, D1, D8

  (1207) 0x46c958 FMADD	D26, D0, D0, D24

  (1207) 0x46c95c FMADD	D22, D31, D31, D20

  (1207) 0x46c960 LDP	D8, D31, [X3, #32]

  (1207) 0x46c964 FMADD	D3, D11, D11, D3

  (1207) 0x46c968 FMADD	D2, D10, D10, D2

  (1207) 0x46c96c FMADD	D28, D30, D30, D25

  (1207) 0x46c970 LDR	D9, [X3, #48]

  (1207) 0x46c974 FADD	D11, D0, D8

  (1207) 0x46c978 FMADD	D23, D23, D23, D22

  (1207) 0x46c97c LDP	D24, D22, [X4, #40]

  (1207) 0x46c980 FMADD	D4, D4, D4, D3

  (1207) 0x46c984 FMADD	D29, D29, D29, D2

  (1207) 0x46c988 FMINNM	D20, D26, D23

  (1207) 0x46c98c FMINNM	D25, D4, D20

  (1207) 0x46c990 FMINNM	D27, D29, D25

  (1207) 0x46c994 FADD	D3, D0, D9

  (1207) 0x46c998 LDR	D2, [X4, #56]

  (1207) 0x46c99c FMADD	D10, D11, D11, D28

  (1207) 0x46c9a0 FMINNM	D30, D10, D27

  (1207) 0x46c9a4 FADD	D28, D21, D24

  (1207) 0x46c9a8 FCMPE	D26, D23

  (1207) 0x46c9ac CSINC	W1, WZR, WZR, #13

  (1207) 0x46c9b0 FADD	D26, D0, D31

  (1207) 0x46c9b4 FCMPE	D4, D20

  (1207) 0x46c9b8 CSEL	W1, W1, W20, #10

  (1207) 0x46c9bc FADD	D23, D21, D22

  (1207) 0x46c9c0 FCMPE	D29, D25

  (1207) 0x46c9c4 CSEL	W1, W1, W19, #10

  (1207) 0x46c9c8 FMUL	D4, D28, D28

  (1207) 0x46c9cc LDR	D31, [X5, #56]

  (1207) 0x46c9d0 FADD	D20, D21, D2

  (1207) 0x46c9d4 FCMPE	D10, D27

  (1207) 0x46c9d8 LDP	D27, D8, [X5, #40]

  (1207) 0x46c9dc CSEL	W1, W1, W30, #10

  (1207) 0x46c9e0 FMUL	D25, D23, D23

  (1207) 0x46c9e4 FADD	D10, D1, D31

  (1207) 0x46c9e8 FMUL	D29, D20, D20

  (1207) 0x46c9ec FADD	D9, D1, D27

  (1207) 0x46c9f0 FADD	D11, D1, D8

  (1207) 0x46c9f4 FMADD	D28, D10, D10, D29

  (1207) 0x46c9f8 FMADD	D24, D9, D9, D4

  (1207) 0x46c9fc FMADD	D22, D11, D11, D25

  (1207) 0x46ca00 FMADD	D26, D26, D26, D24

  (1207) 0x46ca04 FMINNM	D2, D26, D30

  (1207) 0x46ca08 FMADD	D3, D3, D3, D22

  (1207) 0x46ca0c FMINNM	D23, D3, D2

  (1207) 0x46ca10 FCMPE	D26, D30

  (1207) 0x46ca14 LDR	D30, [X3, #56]

  (1207) 0x46ca18 CSEL	W1, W1, W18, #10

  (1207) 0x46ca1c FCMPE	D3, D2

  (1207) 0x46ca20 CSEL	W1, W1, W17, #10

  (1207) 0x46ca24 FADD	D20, D0, D30

  (1207) 0x46ca28 FMADD	D4, D20, D20, D28

  (1207) 0x46ca2c FMINNM	D25, D4, D23

  (1207) 0x46ca30 FSQRT	D29, D25

  (1207) 0x46ca34 FCMPE	D4, D23

  (1207) 0x46ca38 CSEL	W1, W1, W16, #10

  (1207) 0x46ca3c ADD	X1, X11, W1,SXTW #3

  (1207) 0x46ca40 LDR	D27, [X1, #384]

  (1207) 0x46ca44 STR	D29, [X8, X2,LSL #3]

  (1207) 0x46ca48 FADD	D1, D1, D27

  (1207) 0x46ca4c FMUL	D8, D1, D19

  (1207) 0x46ca50 STR	D8, [X10, X2,LSL #3]

  (1207) 0x46ca54 LDR	D31, [X1, #448]

  (1207) 0x46ca58 FADD	D21, D21, D31

  (1207) 0x46ca5c FMUL	D9, D21, D19

  (1207) 0x46ca60 STR	D9, [X9, X2,LSL #3]

  (1207) 0x46ca64 LDR	D11, [X1, #512]

  (1207) 0x46ca68 FADD	D0, D0, D11

  (1207) 0x46ca6c FMUL	D19, D0, D19

  (1207) 0x46ca70 STR	D19, [X6, X2,LSL #3]

  (1207) 0x46ca74 ADD	X2, X2, #1

  (1207) 0x46ca78 CMP	W12, W2

  (1207) 0x46ca7c B.GT	46c840

(1208) 0x46ca80 ADD	W7, W7, #1

(1208) 0x46ca84 STR	D18, [X23]

(1208) 0x46ca88 ADD	X21, X21, #24

(1208) 0x46ca8c ADD	X22, X22, #40

(1208) 0x46ca90 ADD	X8, X8, X24

(1208) 0x46ca94 ADD	X23, X23, X25

(1208) 0x46ca98 CMP	W7, W12

(1208) 0x46ca9c B.NE	46c820

0x46caa0 LDP	X19, X20, [SP, #16]

0x46caa4 LDP	X21, X22, [SP, #32]

0x46caa8 LDP	X23, X24, [SP, #48]

0x46caac LDR	X25, [SP, #64]

0x46cab0 LDP	D8, D9, [SP, #80]

0x46cab4 LDP	D10, D11, [SP, #96]

0x46cab8 LDP	X29, X30, [SP], #112

0x46cabc RET

0x46cac0 RET

0x46cac4 HINT	#0

0x46cac8 HINT	#0

0x46cacc HINT	#0

0x46cad0 HINT	#0

0x46cad4 HINT	#0

0x46cad8 HINT	#0

0x46cadc HINT	#0

Coverage (%)	Name	Source Location	Module
►100.00+	qmcplusplus::ParticleSet::upda[...]	ParticleSet.cpp:250	exec
○	main._omp_fn.0	miniqmc.cpp:390	exec
○	GOMP_parallel		libomp.so
○	main	stl_vector.h:1043	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	DistanceTableAA.h:63-72
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds.h:168-169,185-217
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:241-243
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/DistanceTableAA.h:63-72

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 7.17 to 2.00 cycles (3.58x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 25% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 7.17 to 1.40 cycles (5.13x speedup).

Details

20% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 156 bytes. The binary function is storing 104 bytes.

General properties

nb instructions	56
loop length	224
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

6.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	1.50	1.50	5.75	5.75	5.75	5.75	1.25	1.25	1.25	1.25	7.17	6.83	7.00	2.50	2.50
cycles	1.50	1.50	5.75	5.75	5.75	5.75	1.25	1.25	1.25	1.25	7.17	6.83	7.00	2.50	2.50

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.13
Overall L1	7.17

Vectorization ratios

all	20%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 7.17 cycles. At this rate:

22% of peak load performance is reached (21.77 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
30% of peak store performance is reached (14.51 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 46c780

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
LDR W12, [X0, #200]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W12, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 46cac0 <_ZN11qmcplusplus15DistanceTableAAIdLj3ELi39EE8evaluateERNS_11ParticleSetE+0x340>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP X29, X30, [SP, #912]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X11, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVN X0, #32784	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D17, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D16, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVZ W7, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, X11, #384	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X13, [X1, #1536]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X4, X11, #448	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X11, #512	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ W30, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W18, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W17, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W16, #7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X24, [X11, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X15, [X1, #1552]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X24, X24, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D18, X0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X0, X11, #240	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X8, [X11, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ W20, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W19, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X22, [X11, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X23, XZR, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D8, D9, [SP, #80]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X21, [X1, #1512]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X1, X13, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X14, X15, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X25, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X25, X24, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X13, X14, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D10, D11, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X22, X22, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X25, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP D8, D9, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D10, D11, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP X29, X30, [SP], #112	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Source file and lines	DistanceTableAA.h:63-72
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds.h:168-169,185-217
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:241-243
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/DistanceTableAA.h:63-72

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 7.17 to 2.00 cycles (3.58x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

20% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 156 bytes. The binary function is storing 104 bytes.

General properties

nb instructions	56
loop length	224
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

6.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	1.50	1.50	5.75	5.75	5.75	5.75	1.25	1.25	1.25	1.25	7.17	6.83	7.00	2.50	2.50
cycles	1.50	1.50	5.75	5.75	5.75	5.75	1.25	1.25	1.25	1.25	7.17	6.83	7.00	2.50	2.50

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.13
Overall L1	7.17

Vectorization ratios

all	20%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 7.17 cycles. At this rate:

22% of peak load performance is reached (21.77 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
30% of peak store performance is reached (14.51 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 46c780

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
LDR W12, [X0, #200]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W12, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 46cac0 <_ZN11qmcplusplus15DistanceTableAAIdLj3ELi39EE8evaluateERNS_11ParticleSetE+0x340>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP X29, X30, [SP, #912]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X11, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVN X0, #32784	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D17, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D16, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVZ W7, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, X11, #384	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X13, [X1, #1536]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X4, X11, #448	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X11, #512	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ W30, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W18, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W17, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W16, #7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X24, [X11, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X15, [X1, #1552]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X24, X24, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D18, X0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X0, X11, #240	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X8, [X11, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ W20, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W19, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X22, [X11, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X23, XZR, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D8, D9, [SP, #80]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X21, [X1, #1512]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X1, X13, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X14, X15, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X25, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X25, X24, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X13, X14, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D10, D11, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X22, X22, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X25, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP D8, D9, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D10, D11, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP X29, X30, [SP], #112	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼qmcplusplus::DistanceTableAA::evaluate(qmcplusplus::ParticleSet&)–	1.2	0.01
▼Loop 1208 - DistanceTableAA.h:67-70 - exec–	0	0
○Loop 1207 - ParticleBConds.h:188-217 - exec	1.2	0.01

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code