OV - exec - Function void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh<double>(qmcplusplus::bspline_traits<double, 3u>::SplineType const*, double, double, double, double*, double*, double*, unsigned long)

	Function: void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh<double>(qmcplusplus::bspline_trai ...	Module: exec	Source: MultiBsplineRef.hpp:179-297 [...]	Coverage: 9.04%

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp: 44 - 68

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44: inline void getSplineBound(T x, TRESIDUAL& dx, int& ind, int nmax)

[...]

55:   if (x < 0)

56:   {

57:     ind = 0;

58:     dx  = T(0);

59:   }

60:   else

61:   {

62:     ind = static_cast<int>(x);

63:     dx = x - ind;

64:     // upper bound

65:     if (ind > nmax)

66:     {

67:       ind = nmax;

68:       dx  = T(1) - std::numeric_limits<T>::epsilon();

/usr/include/c++/11/bits/stl_algobase.h: 923 - 924

--------------------------------------------------------------------------------

923:       for (; __first != __last; ++__first)

924: 	*__first = __tmp;

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp: 179 - 297

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179: inline void evaluate_vgh(const typename bspline_traits<T, 3>::SplineType* restrict spline_m,

[...]

192:   x -= spline_m->x_grid.start;

193:   y -= spline_m->y_grid.start;

194:   z -= spline_m->z_grid.start;

195:   spline2::getSplineBound(x * spline_m->x_grid.delta_inv, tx, ix, spline_m->x_grid.num - 1);

196:   spline2::getSplineBound(y * spline_m->y_grid.delta_inv, ty, iy, spline_m->y_grid.num - 1);

197:   spline2::getSplineBound(z * spline_m->z_grid.delta_inv, tz, iz, spline_m->z_grid.num - 1);

[...]

203:   const intptr_t xs = spline_m->x_stride;

204:   const intptr_t ys = spline_m->y_stride;

205:   const intptr_t zs = spline_m->z_stride;

206:

207:   const size_t out_offset = spline_m->num_splines;

208:

209:   T* restrict gx = grads;

210:   T* restrict gy = grads + out_offset;

211:   T* restrict gz = grads + 2 * out_offset;

212:

213:   T* restrict hxx = hess;

214:   T* restrict hxy = hess + out_offset;

215:   T* restrict hxz = hess + 2 * out_offset;

216:   T* restrict hyy = hess + 3 * out_offset;

217:   T* restrict hyz = hess + 4 * out_offset;

218:   T* restrict hzz = hess + 5 * out_offset;

219:

220:   std::fill(vals, vals + num_splines, T());

[...]

233:   for (int i = 0; i < 4; i++)

234:     for (int j = 0; j < 4; j++)

235:     {

236:       const T* restrict coefs    = spline_m->coefs + (ix + i) * xs + (iy + j) * ys + iz * zs;

237:       const T* restrict coefszs  = coefs + zs;

238:       const T* restrict coefs2zs = coefs + 2 * zs;

239:       const T* restrict coefs3zs = coefs + 3 * zs;

240:

241:       const T pre20 = d2a[i] * b[j];

242:       const T pre10 = da[i] * b[j];

243:       const T pre00 = a[i] * b[j];

244:       const T pre11 = da[i] * db[j];

245:       const T pre01 = a[i] * db[j];

246:       const T pre02 = a[i] * d2b[j];

247:

248:       const int iSplitPoint = num_splines;

249: #pragma omp simd aligned(coefs, coefszs, coefs2zs, coefs3zs: QMC_SIMD_ALIGNMENT) simdlen(simdlen_)

250:       for (int n = 0; n < iSplitPoint; n++)

251:       {

252:         T coefsv    = coefs[n];

253:         T coefsvzs  = coefszs[n];

254:         T coefsv2zs = coefs2zs[n];

255:         T coefsv3zs = coefs3zs[n];

256:

257:         T sum0 = c[0] * coefsv + c[1] * coefsvzs + c[2] * coefsv2zs + c[3] * coefsv3zs;

258:         T sum1 = dc[0] * coefsv + dc[1] * coefsvzs + dc[2] * coefsv2zs + dc[3] * coefsv3zs;

259:         T sum2 = d2c[0] * coefsv + d2c[1] * coefsvzs + d2c[2] * coefsv2zs + d2c[3] * coefsv3zs;

260:

261:         hxx[n] += pre20 * sum0;

262:         hxy[n] += pre11 * sum0;

263:         hxz[n] += pre10 * sum1;

264:         hyy[n] += pre02 * sum0;

265:         hyz[n] += pre01 * sum1;

266:         hzz[n] += pre00 * sum2;

267:         gx[n] += pre10 * sum0;

268:         gy[n] += pre01 * sum0;

269:         gz[n] += pre00 * sum1;

270:         vals[n] += pre00 * sum0;

[...]

277:   const T dxx   = dxInv * dxInv;

278:   const T dyy   = dyInv * dyInv;

279:   const T dzz   = dzInv * dzInv;

280:   const T dxy   = dxInv * dyInv;

281:   const T dxz   = dxInv * dzInv;

282:   const T dyz   = dyInv * dzInv;

283:

284: #pragma omp simd simdlen(simdlen_)

285:   for (int n = 0; n < num_splines; n++)

286:   {

287:     gx[n] *= dxInv;

288:     gy[n] *= dyInv;

289:     gz[n] *= dzInv;

290:     hxx[n] *= dxx;

291:     hyy[n] *= dyy;

292:     hzz[n] *= dzz;

293:     hxy[n] *= dxy;

294:     hxz[n] *= dxz;

295:     hyz[n] *= dyz;

296:   }

297: }

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp: 68 - 79

--------------------------------------------------------------------------------

68:     a[0]   = ((A00 * tx + A01) * tx + A02) * tx + A03;

69:     a[1]   = ((A10 * tx + A11) * tx + A12) * tx + A13;

70:     a[2]   = ((A20 * tx + A21) * tx + A22) * tx + A23;

71:     a[3]   = ((A30 * tx + A31) * tx + A32) * tx + A33;

72:     da[0]  = (dA01 * tx + dA02) * tx + dA03;

73:     da[1]  = (dA11 * tx + dA12) * tx + dA13;

74:     da[2]  = (dA21 * tx + dA22) * tx + dA23;

75:     da[3]  = (dA31 * tx + dA32) * tx + dA33;

76:     d2a[0] = d2A02 * tx + d2A03;

77:     d2a[1] = d2A12 * tx + d2A13;

78:     d2a[2] = d2A22 * tx + d2A23;

79:     d2a[3] = d2A32 * tx + d2A33;

0x443dc0 SUB	SP, SP, #576

0x443dc4 ORR	X5, XZR, X0

0x443dc8 ADRP	X0,

0x443dcc STP	X29, X30, [SP]

0x443dd0 ADD	X29, SP, #0

0x443dd4 LDR	D3, [X5, #40]

0x443dd8 STP	D14, D15, [SP, #144]

0x443ddc LDP	D14, D4, [X5, #72]

0x443de0 STP	D10, D11, [SP, #112]

0x443de4 LDR	X6, [X0, #4016]

0x443de8 STP	X19, X20, [SP, #16]

0x443dec ORR	X19, XZR, X2

0x443df0 ORR	X20, XZR, X3

0x443df4 FSUB	D0, D0, S3

0x443df8 FSUB	D6, D1, S4

0x443dfc LDR	D1, [X5, #120]

0x443e00 STP	X21, X22, [SP, #32]

0x443e04 FMUL	D11, D0, D14

0x443e08 STP	X23, X24, [SP, #48]

0x443e0c ORR	X23, XZR, X1

0x443e10 STP	X25, X26, [SP, #64]

0x443e14 ORR	X25, XZR, X4

0x443e18 STP	X27, X28, [SP, #80]

0x443e1c FCMPE	D11, #0

0x443e20 STP	D8, D9, [SP, #96]

0x443e24 FSUB	D8, D2, S1

0x443e28 STP	D12, D13, [SP, #128]

0x443e2c LDR	X1, [X6]

0x443e30 STR	X1, [SP, #568]

0x443e34 MOVZ	X1, #0

0x443e38 LDR	W7, [X5, #56]

0x443e3c B.MI	444644

0x443e40 FCVTZS	W3, D11

0x443e44 SUB	W7, W7, #1

0x443e48 CMP	W7, W3

0x443e4c B.LT	4443c0

0x443e50 SCVTF	D5, W3

0x443e54 ORR	X2, XZR, #3840

0x443e58 FMOV	D16, #0.5000000

0x443e5c MOVK	X2, #16325

0x443e60 FMOV	D15, #-1.0000000

0x443e64 ORR	X1, XZR, #3840

0x443e68 MOVK	X1, #16357

0x443e6c FMOV	D2, #1.5000000

0x443e70 FMOV	D18, #-2.0000000

0x443e74 FMOV	D9, X2

0x443e78 FMOV	D7, #1.0000000

0x443e7c ORR	W7, WZR, W3

0x443e80 FMOV	D10, #-0.5000000

0x443e84 FMOV	D12, X1

0x443e88 FMOV	D13, #3.0000000

0x443e8c FSUB	D1, D11, S5

0x443e90 FSUB	D17, D5, S11

0x443e94 FMUL	D29, D1, D9

0x443e98 FMADD	D19, D1, D16, D15

0x443e9c FMSUB	D21, D1, D16, D16

0x443ea0 FMADD	D20, D1, D2, D18

0x443ea4 FMSUB	D23, D1, D2, D7

0x443ea8 FMUL	D22, D1, D1

0x443eac FADD	D24, D17, D7

0x443eb0 FMADD	D18, D1, D13, D18

0x443eb4 FSUB	D25, D16, S29

0x443eb8 FMADD	D26, D1, D21, D16

0x443ebc FMADD	D17, D1, D23, D16

0x443ec0 FMSUB	D7, D1, D13, D7

0x443ec4 FMUL	D29, D29, D22

0x443ec8 FMUL	D5, D22, D16

0x443ecc FMUL	D27, D1, D19

0x443ed0 FMADD	D3, D1, D26, D9

0x443ed4 FMADD	D28, D1, D25, D10

0x443ed8 FMUL	D20, D1, D20

0x443edc FMADD	D31, D1, D27, D12

0x443ee0 FMADD	D4, D1, D28, D9

0x443ee4 FADD	D30, D27, D16

0x443ee8 FNEG	D10, D30

0x443eec STP	D24, D4, [SP, #224]

(808) 0x443ef0 LDR	D13, [X5, #112]

(808) 0x443ef4 LDR	W21, [X5, #96]

(808) 0x443ef8 FMUL	D11, D13, D6

(808) 0x443efc FCMPE	D11, #0

(808) 0x443f00 B.MI	444444

(808) 0x443f04 FCVTZS	W22, D11

(808) 0x443f08 SUB	W6, W21, #1

(808) 0x443f0c CMP	W6, W22

(808) 0x443f10 B.LT	44475c

(808) 0x443f14 SCVTF	D2, W22

(808) 0x443f18 ORR	X24, XZR, #3840

(808) 0x443f1c FMOV	D15, #0.5000000

(808) 0x443f20 MOVK	X24, #16325

(808) 0x443f24 FMOV	D9, #-1.0000000

(808) 0x443f28 FMOV	D23, #-0.5000000

(808) 0x443f2c ORR	X26, XZR, #3840

(808) 0x443f30 FMOV	D16, #1.5000000

(808) 0x443f34 FMOV	D25, #-2.0000000

(808) 0x443f38 FMOV	D21, X24

(808) 0x443f3c MOVK	X26, #16357

(808) 0x443f40 FMOV	D24, #3.0000000

(808) 0x443f44 FMOV	D6, #1.0000000

(808) 0x443f48 ORR	W6, WZR, W22

(808) 0x443f4c FMOV	D22, X26

(808) 0x443f50 FSUB	D0, D11, S2

(808) 0x443f54 FSUB	D26, D2, S11

(808) 0x443f58 FMUL	D28, D0, D21

(808) 0x443f5c FMADD	D12, D0, D15, D9

(808) 0x443f60 FMSUB	D27, D0, D15, D15

(808) 0x443f64 FMADD	D19, D0, D16, D25

(808) 0x443f68 FMADD	D30, D0, D24, D25

(808) 0x443f6c FADD	D4, D26, D6

(808) 0x443f70 FMSUB	D11, D0, D16, D6

(808) 0x443f74 FMSUB	D6, D0, D24, D6

(808) 0x443f78 FSUB	D9, D15, S28

(808) 0x443f7c FMADD	D2, D0, D27, D15

(808) 0x443f80 FMUL	D24, D0, D0

(808) 0x443f84 FMADD	D16, D0, D11, D15

(808) 0x443f88 FMUL	D25, D0, D12

(808) 0x443f8c FMUL	D19, D0, D19

(808) 0x443f90 FMADD	D23, D0, D9, D23

(808) 0x443f94 FMADD	D2, D0, D2, D21

(808) 0x443f98 FMUL	D28, D28, D24

(808) 0x443f9c FMADD	D27, D0, D25, D22

(808) 0x443fa0 FADD	D22, D25, D15

(808) 0x443fa4 FMADD	D21, D0, D23, D21

(808) 0x443fa8 STP	D21, D4, [SP, #168]

(808) 0x443fac FMUL	D4, D24, D15

(808) 0x443fb0 FNEG	D15, D22

(808) 0x443fb4 LDR	D12, [X5, #152]

(808) 0x443fb8 LDR	W11, [X5, #136]

(808) 0x443fbc FMUL	D8, D12, D8

(808) 0x443fc0 FCMPE	D8, #0

(808) 0x443fc4 B.MI	444498

(808) 0x443fc8 FCVTZS	W12, D8

(808) 0x443fcc SUB	W13, W11, #1

(808) 0x443fd0 CMP	W13, W12

(808) 0x443fd4 B.GE	444688

(808) 0x443fd8 ADRP	X22,

(808) 0x443fdc MOVN	X16, #3

(808) 0x443fe0 MOVI	D26, #0

(808) 0x443fe4 MOVN	X21, #3

(808) 0x443fe8 ORR	X27, XZR, #3840

(808) 0x443fec LDR	D8, [X22, #1704]

(808) 0x443ff0 MOVN	X28, #1

(808) 0x443ff4 MOVK	X16, #49151

(808) 0x443ff8 MOVK	X21, #16351

(808) 0x443ffc MOVK	X27, #16357

(808) 0x444000 MOVK	X28, #16367

(808) 0x444004 FMOV	D24, X16

(808) 0x444008 ADRP	X30,

(808) 0x44400c FMOV	D23, X21

(808) 0x444010 MOVN	X17, #7

(808) 0x444014 MOVZ	X26, #3

(808) 0x444018 FMOV	D22, X27

(808) 0x44401c MOVK	X17, #16367

(808) 0x444020 MOVZ	X18, #15536

(808) 0x444024 FMOV	D21, X28

(808) 0x444028 MOVZ	X24, #15556

(808) 0x44402c MOVK	X26, #49120

(808) 0x444030 STR	D8, [SP, #184]

(808) 0x444034 FMOV	D25, D26

(808) 0x444038 SBFM	X8, X13, #0, #31

(808) 0x44403c LDR	D8, [X30, #1712]

(808) 0x444040 STP	X26, X24, [SP, #192]

(808) 0x444044 STP	X18, X17, [SP, #208]

(808) 0x444048 ADD	X12, SP, #520

(808) 0x44404c UBFM	X2, X25, #61, #60

(808) 0x444050 LDRSW	X3, [X5, #232]

(808) 0x444054 LDP	X11, X14, [X5, #16]

(808) 0x444058 STP	D7, D1, [X12]

(808) 0x44405c UBFM	X4, X3, #61, #60

(808) 0x444060 UBFM	X1, X3, #60, #59

(808) 0x444064 STP	D30, D6, [X12, #24]

(808) 0x444068 ADD	X28, X20, X4

(808) 0x44406c ADD	X21, X19, X4

(808) 0x444070 STR	X11, [SP, #160]

(808) 0x444074 ADD	X26, X28, X4

(808) 0x444078 STP	D31, D3, [SP, #384]

(808) 0x44407c ADD	X22, X21, X4

(808) 0x444080 ADD	X27, X26, X4

(808) 0x444084 STR	D29, [SP, #400]

(808) 0x444088 UBFM	X13, X3, #59, #58

(808) 0x44408c ADD	X10, X27, X4

(808) 0x444090 STP	D27, D2, [SP, #416]

(808) 0x444094 STR	D28, [SP, #432]

(808) 0x444098 ADD	X24, X10, X4

(808) 0x44409c STP	X10, X1, [SP, #352]

(808) 0x4440a0 STP	D20, D17, [SP, #448]

(808) 0x4440a4 STR	D5, [SP, #464]

(808) 0x4440a8 STP	D19, D16, [SP, #480]

(808) 0x4440ac STR	D4, [SP, #496]

(808) 0x4440b0 STR	D18, [SP, #512]

(808) 0x4440b4 STR	D0, [SP, #560]

(808) 0x4440b8 LDR	X18, [X5, #32]

(808) 0x4440bc CBZ	X2, 4441a8

0x4440c0 MOVZ	W1, #0

0x4440c4 ORR	X0, XZR, X23

0x4440c8 STR	X2, [SP, #240]

0x4440cc STP	W7, W6, [SP, #248]

0x4440d0 STP	X4, X13, [SP, #256]

0x4440d4 STP	X14, X18, [SP, #272]

0x4440d8 STR	D21, [SP, #288]

0x4440dc STR	X8, [SP, #296]

0x4440e0 STP	D25, D22, [SP, #304]

0x4440e4 STP	D26, D23, [SP, #320]

0x4440e8 STR	D24, [SP, #336]

0x4440ec STR	X5, [SP, #344]

0x4440f0 BL	403890

0x4440f4 MOVZ	W1, #0

0x4440f8 ORR	X0, XZR, X19

0x4440fc LDR	X2, [SP, #240]

0x444100 BL	403890

0x444104 MOVZ	W1, #0

0x444108 ORR	X0, XZR, X21

0x44410c LDR	X2, [SP, #240]

0x444110 BL	403890

0x444114 MOVZ	W1, #0

0x444118 ORR	X0, XZR, X22

0x44411c LDR	X2, [SP, #240]

0x444120 BL	403890

0x444124 MOVZ	W1, #0

0x444128 ORR	X0, XZR, X20

0x44412c LDR	X2, [SP, #240]

0x444130 BL	403890

0x444134 MOVZ	W1, #0

0x444138 ORR	X0, XZR, X28

0x44413c LDR	X2, [SP, #240]

0x444140 BL	403890

0x444144 MOVZ	W1, #0

0x444148 ORR	X0, XZR, X26

0x44414c LDR	X2, [SP, #240]

0x444150 BL	403890

0x444154 MOVZ	W1, #0

0x444158 ORR	X0, XZR, X27

0x44415c LDR	X2, [SP, #240]

0x444160 BL	403890

0x444164 MOVZ	W1, #0

0x444168 LDR	X2, [SP, #240]

0x44416c LDR	X0, [SP, #352]

0x444170 BL	403890

0x444174 MOVZ	W1, #0

0x444178 ORR	X0, XZR, X24

0x44417c LDR	X2, [SP, #240]

0x444180 BL	403890

0x444184 LDR	D21, [SP, #288]

0x444188 LDP	X4, X13, [SP, #256]

0x44418c LDP	X14, X18, [SP, #272]

0x444190 LDP	D25, D22, [SP, #304]

0x444194 LDP	D26, D23, [SP, #320]

0x444198 LDR	D24, [SP, #336]

0x44419c LDP	W7, W6, [SP, #248]

0x4441a0 LDR	X8, [SP, #296]

0x4441a4 LDR	X5, [SP, #344]

(808) 0x4441a8 SBFM	X15, X6, #0, #31

(808) 0x4441ac SBFM	X2, X7, #0, #31

(808) 0x4441b0 PTRUE	P0.B, ALL

(808) 0x4441b4 LDR	X10, [SP, #160]

(808) 0x4441b8 LD1RD	{Z27.D}, P0/Z, [SP, #23]

(808) 0x4441bc SUB	X3, X24, X13

(808) 0x4441c0 MADD	X16, X15, X14, XZR

(808) 0x4441c4 STR	D13, [SP, #160]

(808) 0x4441c8 PTRUE	P1.B, ALL

(808) 0x4441cc LDR	X17, [X5, #8]

(808) 0x4441d0 ADD	X5, X3, X4

(808) 0x4441d4 LD1RD	{Z31.D}, P1/Z, [SP, #24]

(808) 0x4441d8 STR	D12, [SP, #184]

(808) 0x4441dc ADD	X1, X5, X4

(808) 0x4441e0 PTRUE	P2.B, ALL

(808) 0x4441e4 LDP	D12, D13, [SP, #168]

(808) 0x4441e8 LD1RD	{Z30.D}, P2/Z, [SP, #25]

(808) 0x4441ec UBFM	X13, X18, #61, #60

(808) 0x4441f0 MADD	X30, X2, X10, XZR

(808) 0x4441f4 UBFM	X14, X14, #61, #60

(808) 0x4441f8 ADD	X2, X1, X4

(808) 0x4441fc LDP	D11, D9, [SP, #224]

(808) 0x444200 ORR	W15, WZR, W25

(808) 0x444204 MOVZ	X4, #0

(808) 0x444208 ADD	X9, X17, X16,LSL #3

(808) 0x44420c STP	X26, X27, [SP, #192]

(808) 0x444210 ORR	X27, XZR, X10

(808) 0x444214 MADD	X30, X18, X8, X30

(808) 0x444218 PTRUE	P3.B, ALL

(808) 0x44421c PTRUE	P4.B, ALL

(808) 0x444220 ORR	X26, XZR, X9

(808) 0x444224 DUP	Z25.D, Z25.D[0]

(808) 0x444228 DUP	Z8.D, Z8.D[0]

(808) 0x44422c DUP	Z22.D, Z22.D[0]

(808) 0x444230 DUP	Z26.D, Z26.D[0]

(808) 0x444234 DUP	Z23.D, Z23.D[0]

(808) 0x444238 LD1RD	{Z29.D}, P3/Z, [SP, #26]

(808) 0x44423c LD1RD	{Z28.D}, P4/Z, [SP, #27]

(808) 0x444240 DUP	Z24.D, Z24.D[0]

(808) 0x444244 DUP	Z21.D, Z21.D[0]

(808) 0x444248 WHILELO	P8.D, WZR, W25

  (810) 0x44424c FMOV	D18, D15

  (810) 0x444250 FMOV	D5, D12

  (810) 0x444254 ADD	X7, X26, X30,LSL #3

  (810) 0x444258 FMOV	D17, D13

  (810) 0x44425c MOVZ	X12, #0

  (810) 0x444260 CNTD	X11, ALL

  (810) 0x444264 ADD	X18, SP, #408

  (810) 0x444268 ADD	X17, SP, #472

  (810) 0x44426c PTRUE	P5.B, ALL

  (810) 0x444270 ADD	X16, SP, #536

    (811) 0x444274 ADD	X9, X13, X7

    (811) 0x444278 FMUL	D20, D9, D17

    (811) 0x44427c FMUL	D3, D11, D5

    (811) 0x444280 ADD	X8, X13, X9

    (811) 0x444284 FMUL	D1, D10, D5

    (811) 0x444288 FMUL	D4, D9, D5

    (811) 0x44428c FMUL	D6, D10, D18

    (811) 0x444290 FMUL	D19, D9, D18

    (811) 0x444294 ADD	X10, X13, X8

    (811) 0x444298 CMP	W15, #0

    (811) 0x44429c B.LE	444394

    (811) 0x4442a0 ORR	W6, WZR, W25

    (811) 0x4442a4 MOVZ	X0, #0

    (811) 0x4442a8 DUP	Z16.D, Z6.D[0]

    (811) 0x4442ac DUP	Z17.D, Z3.D[0]

    (811) 0x4442b0 DUP	Z6.D, Z1.D[0]

    (811) 0x4442b4 DUP	Z7.D, Z20.D[0]

    (811) 0x4442b8 DUP	Z5.D, Z19.D[0]

    (811) 0x4442bc DUP	Z4.D, Z4.D[0]

    (811) 0x4442c0 ORR	P6.B, P8/Z, P8.B, P8.B

      (812) 0x4442c4 LD1D	{Z20.D}, P6/Z, [X10, X0,LSL #3]

      (812) 0x4442c8 LD1D	{Z1.D}, P6/Z, [X8, X0,LSL #3]

      (812) 0x4442cc FMUL	Z19.D, Z27.D, Z20.D

      (812) 0x4442d0 FMLA	Z19.D, P5/M, Z22.D, Z1.D

      (812) 0x4442d4 LD1D	{Z18.D}, P6/Z, [X20, X0,LSL #3]

      (812) 0x4442d8 LD1D	{Z2.D}, P6/Z, [X9, X0,LSL #3]

      (812) 0x4442dc LD1D	{Z3.D}, P6/Z, [X7, X0,LSL #3]

      (812) 0x4442e0 FMUL	Z0.D, Z8.D, Z2.D

      (812) 0x4442e4 FMLA	Z0.D, P5/M, Z25.D, Z3.D

      (812) 0x4442e8 FADD	Z0.D, Z0.D, Z19.D

      (812) 0x4442ec FMUL	Z19.D, Z31.D, Z2.D

      (812) 0x4442f0 FMLA	Z18.D, P5/M, Z17.D, Z0.D

      (812) 0x4442f4 FMLA	Z19.D, P5/M, Z26.D, Z3.D

      (812) 0x4442f8 FMUL	Z2.D, Z28.D, Z2.D

      (812) 0x4442fc FMAD	Z3.D, P5/M, Z29.D, Z2.D

      (812) 0x444300 FMUL	Z2.D, Z23.D, Z20.D

      (812) 0x444304 FMUL	Z20.D, Z21.D, Z20.D

      (812) 0x444308 FMLA	Z2.D, P5/M, Z30.D, Z1.D

      (812) 0x44430c FMAD	Z1.D, P5/M, Z24.D, Z20.D

      (812) 0x444310 FADD	Z2.D, Z19.D, Z2.D

      (812) 0x444314 FADD	Z1.D, Z3.D, Z1.D

      (812) 0x444318 LD1D	{Z19.D}, P6/Z, [X19, X0,LSL #3]

      (812) 0x44431c FMLA	Z19.D, P5/M, Z6.D, Z0.D

      (812) 0x444320 ST1D	{Z18.D}, P6, [X20, X0,LSL #3]

      (812) 0x444324 LD1D	{Z3.D}, P6/Z, [X3, X0,LSL #3]

      (812) 0x444328 FMLA	Z3.D, P5/M, Z16.D, Z0.D

      (812) 0x44432c ST1D	{Z19.D}, P6, [X19, X0,LSL #3]

      (812) 0x444330 LD1D	{Z18.D}, P6/Z, [X21, X0,LSL #3]

      (812) 0x444334 FMLA	Z18.D, P5/M, Z0.D, Z5.D

      (812) 0x444338 ST1D	{Z3.D}, P6, [X3, X0,LSL #3]

      (812) 0x44433c LD1D	{Z20.D}, P6/Z, [X5, X0,LSL #3]

      (812) 0x444340 FMLA	Z20.D, P5/M, Z6.D, Z2.D

      (812) 0x444344 ST1D	{Z18.D}, P6, [X21, X0,LSL #3]

      (812) 0x444348 LD1D	{Z19.D}, P6/Z, [X22, X0,LSL #3]

      (812) 0x44434c FMLA	Z19.D, P5/M, Z2.D, Z4.D

      (812) 0x444350 ST1D	{Z20.D}, P6, [X5, X0,LSL #3]

      (812) 0x444354 LD1D	{Z3.D}, P6/Z, [X1, X0,LSL #3]

      (812) 0x444358 FMLA	Z3.D, P5/M, Z7.D, Z0.D

      (812) 0x44435c ST1D	{Z3.D}, P6, [X1, X0,LSL #3]

      (812) 0x444360 LD1D	{Z18.D}, P6/Z, [X2, X0,LSL #3]

      (812) 0x444364 FMAD	Z2.D, P5/M, Z5.D, Z18.D

      (812) 0x444368 ST1D	{Z19.D}, P6, [X22, X0,LSL #3]

      (812) 0x44436c ST1D	{Z2.D}, P6, [X2, X0,LSL #3]

      (812) 0x444370 LD1D	{Z2.D}, P6/Z, [X24, X0,LSL #3]

      (812) 0x444374 FMAD	Z1.D, P5/M, Z4.D, Z2.D

      (812) 0x444378 ST1D	{Z1.D}, P6, [X24, X0,LSL #3]

      (812) 0x44437c LD1D	{Z1.D}, P6/Z, [X23, X0,LSL #3]

      (812) 0x444380 FMAD	Z0.D, P5/M, Z4.D, Z1.D

      (812) 0x444384 ST1D	{Z0.D}, P6, [X23, X0,LSL #3]

      (812) 0x444388 ADD	X0, X0, X11

      (812) 0x44438c WHILELO	P6.D, W0, W6

      (812) 0x444390 B.NE	4442c4

    (811) 0x444394 ADD	X7, X7, X14

    (811) 0x444398 CMP	X12, #24

    (811) 0x44439c B.EQ	4444e0

    (811) 0x4443a0 ADD	X9, X12, X18

    (811) 0x4443a4 ADD	X8, X12, X17

    (811) 0x4443a8 ADD	X10, X12, X16

    (811) 0x4443ac ADD	X12, X12, #8

    (811) 0x4443b0 LDR	D18, [X8, #8]

    (811) 0x4443b4 LDR	D17, [X10, #8]

    (811) 0x4443b8 LDR	D5, [X9, #8]

    (811) 0x4443bc B	444274

0x4443c0 LDR	D13, [X5, #112]

0x4443c4 MOVI	D10, #0

0x4443c8 MOVN	X9, #3

0x4443cc MOVN	X8, #7

0x4443d0 MOVZ	X10, #15536

0x4443d4 MOVN	X4, #3

0x4443d8 MOVZ	X13, #3

0x4443dc LDR	W21, [X5, #96]

0x4443e0 ORR	X14, XZR, #3840

0x4443e4 MOVN	X15, #1

0x4443e8 STR	X10, [SP, #224]

0x4443ec MOVK	X9, #49151

0x4443f0 MOVK	X8, #16367

0x4443f4 STR	D10, [SP, #232]

0x4443f8 MOVK	X4, #16351

0x4443fc ADRP	X11,

0x444400 FMUL	D11, D13, D6

0x444404 MOVZ	X12, #15556

0x444408 MOVK	X13, #49120

0x44440c MOVK	X14, #16357

0x444410 MOVK	X15, #16367

0x444414 FMOV	D7, X9

0x444418 ADRP	X16,

0x44441c FMOV	D18, X8

0x444420 FMOV	D5, X4

0x444424 FMOV	D17, X12

0x444428 FMOV	D20, X13

0x44442c FCMPE	D11, #0

0x444430 LDR	D29, [X11, #1704]

0x444434 FMOV	D3, X14

0x444438 FMOV	D1, X15

0x44443c LDR	D31, [X16, #1712]

0x444440 B.GE	443f04

(808) 0x444444 ORR	X6, XZR, #3840

(808) 0x444448 FMOV	D6, #1.0000000

(808) 0x44444c MOVI	D4, #0

(808) 0x444450 LDR	D12, [X5, #152]

(808) 0x444454 MOVK	X6, #16325

(808) 0x444458 ORR	X4, XZR, #3840

(808) 0x44445c MOVK	X4, #16357

(808) 0x444460 FMOV	D30, #-2.0000000

(808) 0x444464 FMOV	D16, #0.5000000

(808) 0x444468 FMOV	D2, X6

(808) 0x44446c FMOV	D15, #-0.5000000

(808) 0x444470 MOVZ	W6, #0

(808) 0x444474 FMOV	D27, X4

(808) 0x444478 LDR	W11, [X5, #136]

(808) 0x44447c FMOV	D19, D4

(808) 0x444480 FMOV	D28, D4

(808) 0x444484 FMOV	D0, D4

(808) 0x444488 FMUL	D8, D12, D8

(808) 0x44448c STP	D2, D6, [SP, #168]

(808) 0x444490 FCMPE	D8, #0

(808) 0x444494 B.GE	443fc8

(808) 0x444498 MOVI	D23, #0

(808) 0x44449c FMOV	D24, #1.0000000

(808) 0x4444a0 ORR	X9, XZR, #3840

(808) 0x4444a4 FMOV	D11, #-2.0000000

(808) 0x4444a8 FMOV	D9, #0.5000000

(808) 0x4444ac ORR	X0, XZR, #3840

(808) 0x4444b0 MOVK	X9, #16325

(808) 0x4444b4 MOVK	X0, #16357

(808) 0x4444b8 FMOV	D26, #-0.5000000

(808) 0x4444bc MOVZ	X8, #0

(808) 0x4444c0 FMOV	D22, X9

(808) 0x4444c4 FMOV	D21, D23

(808) 0x4444c8 FMOV	D25, X9

(808) 0x4444cc FMOV	D8, X0

(808) 0x4444d0 STP	D23, D23, [SP, #184]

(808) 0x4444d4 STR	D9, [SP, #200]

(808) 0x4444d8 STP	D24, D11, [SP, #208]

(808) 0x4444dc B	444048

  (810) 0x4444e0 ADD	X30, X30, X27

  (810) 0x4444e4 CMP	X4, #24

  (810) 0x4444e8 B.EQ	444508

  (810) 0x4444ec ADD	X7, X4, #576

  (810) 0x4444f0 ADD	X4, X4, #8

  (810) 0x4444f4 ADD	X12, SP, X7,UXTX

  (810) 0x4444f8 LDUR	D9, [X12, #320]

  (810) 0x4444fc LDUR	D10, [X12, #384]

  (810) 0x444500 LDUR	D11, [X12, #448]

  (810) 0x444504 B	44424c

(808) 0x444508 LDR	D29, [SP, #160]

(808) 0x44450c FMUL	D10, D14, D14

(808) 0x444510 LDP	X23, X24, [SP, #192]

(808) 0x444514 LDR	D31, [SP, #184]

(808) 0x444518 FMUL	D15, D29, D29

(808) 0x44451c FMUL	D30, D14, D29

(808) 0x444520 FMUL	D28, D31, D31

(808) 0x444524 FMUL	D27, D14, D31

(808) 0x444528 FMUL	D11, D29, D31

(808) 0x44452c CMP	W25, #0

(808) 0x444530 B.LE	4445f8

(808) 0x444534 ORR	W3, WZR, W25

(808) 0x444538 WHILELO	P7.D, WZR, W25

(808) 0x44453c LDR	X25, [SP, #360]

(808) 0x444540 CNTD	X26, ALL

(808) 0x444544 MOVZ	X4, #0

(808) 0x444548 DUP	Z14.D, Z14.D[0]

(808) 0x44454c DUP	Z13.D, Z29.D[0]

(808) 0x444550 DUP	Z12.D, Z31.D[0]

(808) 0x444554 DUP	Z9.D, Z10.D[0]

(808) 0x444558 DUP	Z8.D, Z15.D[0]

(808) 0x44455c DUP	Z21.D, Z28.D[0]

(808) 0x444560 DUP	Z25.D, Z30.D[0]

(808) 0x444564 DUP	Z22.D, Z27.D[0]

(808) 0x444568 DUP	Z26.D, Z11.D[0]

(808) 0x44456c ADD	X27, X24, X25

(808) 0x444570 ADD	X1, X23, X25

(808) 0x444574 HINT	#0

(808) 0x444578 HINT	#0

(808) 0x44457c HINT	#0

  (809) 0x444580 LD1D	{Z23.D}, P7/Z, [X20, X4,LSL #3]

  (809) 0x444584 LD1D	{Z24.D}, P7/Z, [X19, X4,LSL #3]

  (809) 0x444588 FMUL	Z17.D, Z9.D, Z23.D

  (809) 0x44458c FMUL	Z16.D, Z24.D, Z14.D

  (809) 0x444590 ST1D	{Z17.D}, P7, [X20, X4,LSL #3]

  (809) 0x444594 LD1D	{Z6.D}, P7/Z, [X24, X4,LSL #3]

  (809) 0x444598 FMUL	Z7.D, Z8.D, Z6.D

  (809) 0x44459c ST1D	{Z16.D}, P7, [X19, X4,LSL #3]

  (809) 0x4445a0 LD1D	{Z5.D}, P7/Z, [X21, X4,LSL #3]

  (809) 0x4445a4 FMUL	Z4.D, Z13.D, Z5.D

  (809) 0x4445a8 ST1D	{Z7.D}, P7, [X24, X4,LSL #3]

  (809) 0x4445ac LD1D	{Z0.D}, P7/Z, [X27, X4,LSL #3]

  (809) 0x4445b0 FMUL	Z20.D, Z21.D, Z0.D

  (809) 0x4445b4 ST1D	{Z4.D}, P7, [X21, X4,LSL #3]

  (809) 0x4445b8 LD1D	{Z19.D}, P7/Z, [X22, X4,LSL #3]

  (809) 0x4445bc FMUL	Z3.D, Z12.D, Z19.D

  (809) 0x4445c0 ST1D	{Z20.D}, P7, [X27, X4,LSL #3]

  (809) 0x4445c4 LD1D	{Z18.D}, P7/Z, [X28, X4,LSL #3]

  (809) 0x4445c8 FMUL	Z2.D, Z25.D, Z18.D

  (809) 0x4445cc ST1D	{Z3.D}, P7, [X22, X4,LSL #3]

  (809) 0x4445d0 ST1D	{Z2.D}, P7, [X28, X4,LSL #3]

  (809) 0x4445d4 LD1D	{Z1.D}, P7/Z, [X23, X4,LSL #3]

  (809) 0x4445d8 FMUL	Z10.D, Z22.D, Z1.D

  (809) 0x4445dc ST1D	{Z10.D}, P7, [X23, X4,LSL #3]

  (809) 0x4445e0 LD1D	{Z29.D}, P7/Z, [X1, X4,LSL #3]

  (809) 0x4445e4 FMUL	Z31.D, Z26.D, Z29.D

  (809) 0x4445e8 ST1D	{Z31.D}, P7, [X1, X4,LSL #3]

  (809) 0x4445ec ADD	X4, X4, X26

  (809) 0x4445f0 WHILELO	P7.D, W4, W3

  (809) 0x4445f4 B.NE	444580

(808) 0x4445f8 ADRP	X19,

(808) 0x4445fc LDR	X20, [X19, #4016]

(808) 0x444600 LDR	X2, [SP, #568]

(808) 0x444604 LDR	X1, [X20]

(808) 0x444608 SUBS	X2, X2, X1

(808) 0x44460c MOVZ	X1, #0

(808) 0x444610 B.NE	4447d0

(808) 0x444614 LDP	X29, X30, [SP]

(808) 0x444618 LDP	X19, X20, [SP, #16]

(808) 0x44461c LDP	X21, X22, [SP, #32]

(808) 0x444620 LDP	X23, X24, [SP, #48]

(808) 0x444624 LDP	X25, X26, [SP, #64]

(808) 0x444628 LDP	X27, X28, [SP, #80]

(808) 0x44462c LDP	D8, D9, [SP, #96]

(808) 0x444630 LDP	D10, D11, [SP, #112]

(808) 0x444634 LDP	D12, D13, [SP, #128]

(808) 0x444638 LDP	D14, D15, [SP, #144]

(808) 0x44463c ADD	SP, SP, #576

(808) 0x444640 RET

(808) 0x444644 ORR	X17, XZR, #3840

(808) 0x444648 MOVI	D5, #0

(808) 0x44464c FMOV	D7, #1.0000000

(808) 0x444650 MOVK	X17, #16325

(808) 0x444654 ORR	X18, XZR, #3840

(808) 0x444658 FMOV	D18, #-2.0000000

(808) 0x44465c MOVK	X18, #16357

(808) 0x444660 FMOV	D17, #0.5000000

(808) 0x444664 FMOV	D10, #-0.5000000

(808) 0x444668 FMOV	D3, X17

(808) 0x44466c MOVZ	W7, #0

(808) 0x444670 FMOV	D31, X18

(808) 0x444674 FMOV	D20, D5

(808) 0x444678 FMOV	D29, D5

(808) 0x44467c FMOV	D1, D5

(808) 0x444680 STP	D7, D3, [SP, #224]

(808) 0x444684 B	443ef0

(808) 0x444688 SCVTF	D11, W12

(808) 0x44468c FMOV	D24, #1.0000000

(808) 0x444690 ORR	X14, XZR, #3840

(808) 0x444694 FMOV	D26, #0.5000000

(808) 0x444698 FMOV	D23, #3.0000000

(808) 0x44469c MOVK	X14, #16325

(808) 0x4446a0 FMOV	D22, #-1.0000000

(808) 0x4446a4 ORR	X15, XZR, #3840

(808) 0x4446a8 SBFM	X8, X12, #0, #31

(808) 0x4446ac FMOV	D9, X14

(808) 0x4446b0 MOVK	X15, #16357

(808) 0x4446b4 STR	X14, [SP, #160]

(808) 0x4446b8 STR	X15, [SP, #240]

(808) 0x4446bc FSUB	D25, D11, S8

(808) 0x4446c0 FSUB	D21, D8, S11

(808) 0x4446c4 FMOV	D11, #1.5000000

(808) 0x4446c8 STR	D25, [SP, #192]

(808) 0x4446cc FMOV	D25, #-2.0000000

(808) 0x4446d0 FMADD	D8, D21, D26, D22

(808) 0x4446d4 FMSUB	D22, D21, D26, D26

(808) 0x4446d8 FMUL	D9, D21, D9

(808) 0x4446dc FMADD	D11, D21, D11, D25

(808) 0x4446e0 LDR	D25, [SP, #192]

(808) 0x4446e4 FMADD	D22, D21, D22, D26

(808) 0x4446e8 FADD	D25, D25, D24

(808) 0x4446ec FMUL	D8, D21, D8

(808) 0x4446f0 STR	D11, [SP, #184]

(808) 0x4446f4 FMOV	D11, #1.5000000

(808) 0x4446f8 STR	D25, [SP, #208]

(808) 0x4446fc FMOV	D25, #-2.0000000

(808) 0x444700 FMSUB	D11, D21, D11, D24

(808) 0x444704 FMSUB	D24, D21, D23, D24

(808) 0x444708 FMADD	D25, D21, D23, D25

(808) 0x44470c FMADD	D23, D21, D11, D26

(808) 0x444710 LDR	D11, [SP, #184]

(808) 0x444714 FMUL	D11, D21, D11

(808) 0x444718 STR	D25, [SP, #216]

(808) 0x44471c FSUB	D25, D26, S9

(808) 0x444720 STP	D11, D23, [SP, #192]

(808) 0x444724 FMOV	D11, #-0.5000000

(808) 0x444728 FMOV	D23, X14

(808) 0x44472c FMADD	D25, D21, D25, D11

(808) 0x444730 FMADD	D22, D21, D22, D23

(808) 0x444734 FMUL	D23, D21, D21

(808) 0x444738 FMUL	D9, D9, D23

(808) 0x44473c FMUL	D23, D23, D26

(808) 0x444740 FSUB	D26, D11, S8

(808) 0x444744 FMOV	D11, X15

(808) 0x444748 STR	D9, [SP, #184]

(808) 0x44474c FMOV	D9, X14

(808) 0x444750 FMADD	D8, D21, D8, D11

(808) 0x444754 FMADD	D25, D21, D25, D9

(808) 0x444758 B	444048

(808) 0x44475c MOVI	D15, #0

(808) 0x444760 MOVN	X27, #3

(808) 0x444764 MOVN	X28, #7

(808) 0x444768 MOVN	X9, #3

(808) 0x44476c MOVZ	X2, #3

(808) 0x444770 ORR	X1, XZR, #3840

(808) 0x444774 MOVN	X8, #1

(808) 0x444778 MOVK	X27, #49151

(808) 0x44477c MOVK	X28, #16367

(808) 0x444780 MOVZ	X30, #15536

(808) 0x444784 MOVK	X9, #16351

(808) 0x444788 STR	D15, [SP, #168]

(808) 0x44478c ADRP	X0,

(808) 0x444790 MOVZ	X3, #15556

(808) 0x444794 FMOV	D6, X27

(808) 0x444798 MOVK	X2, #49120

(808) 0x44479c MOVK	X1, #16357

(808) 0x4447a0 FMOV	D30, X28

(808) 0x4447a4 MOVK	X8, #16367

(808) 0x4447a8 ADRP	X10,

(808) 0x4447ac FMOV	D4, X9

(808) 0x4447b0 FMOV	D16, X3

(808) 0x4447b4 FMOV	D19, X2

(808) 0x4447b8 FMOV	D2, X1

(808) 0x4447bc FMOV	D0, X8

(808) 0x4447c0 LDR	D28, [X0, #1704]

(808) 0x4447c4 STR	X30, [SP, #176]

(808) 0x4447c8 LDR	D27, [X10, #1712]

(808) 0x4447cc B	443fb4

0x4447d0 BL	403d80

0x4447d4 HINT	#0

0x4447d8 HINT	#0

0x4447dc HINT	#0

Coverage (%)	Name	Source Location	Module
►33.33+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:206	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:202	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►13.33+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:206	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:202	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►13.33+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:206	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:202	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:404	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►13.33+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:206	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:202	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►6.67+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:206	exec
○	miniqmcreference::DiracDetermi[...]	OhmmsVector.h:144	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:238	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:177	exec
○	main._omp_fn.0	miniqmc.cpp:390	exec
○	GOMP_parallel		libomp.so
○	main	stl_vector.h:1043	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►6.67+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:206	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:202	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►6.67+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:206	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:202	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►6.67+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:206	exec
○	miniqmcreference::DiracDetermi[...]	OhmmsVector.h:144	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:238	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:177	exec
○	main._omp_fn.0	miniqmc.cpp:390	exec
○	GOMP_parallel		libomp.so
○	main	stl_vector.h:1043	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	MultiBsplineRef.hpp:179-297
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:44,55-68
/usr/include/c++/11/bits/stl_algobase.h:923-924
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:179,192-197,203-220,233-270,277-297
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp:68-79

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 21.00 to 6.67 cycles (3.15x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 26% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 21.00 to 3.87 cycles (5.42x speedup).

Details

16% of VPU instructions are used in vector version (process two or more data elements in vector registers):

30% of VPU loads are used in vector version.
70% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 21.00 to 5.50 cycles (3.82x speedup).

FMA

Detected 12 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Conversion instructions

Detected expensive conversion instructions.

Details

FCVTZS: 1 occurrences
SCVTF: 1 occurrences

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Matching between your function (in the source code) and the binary function

The binary function is composed of 40 FP arithmetical operations:

20: addition or subtraction (12 inside FMA instructions)
20: multiply (12 inside FMA instructions)

The binary function is loading 264 bytes. The binary function is storing 312 bytes.

Arithmetic intensity

Arithmetic intensity is 0.07 FP operations per loaded or stored byte.

General properties

nb instructions	171
loop length	684
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

21.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	7.00	7.00	15.75	15.75	15.75	15.75	14.75	14.75	14.75	14.75	17.67	17.67	17.67	7.00	7.00
cycles	7.00	7.00	15.75	15.75	15.75	15.75	14.75	14.75	14.75	14.75	17.67	17.67	17.67	7.00	7.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	21.00
Overall L1	21.00

Vectorization ratios

all	16%
load	30%
store	70%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 21.00 cycles. At this rate:

13% of peak load performance is reached (12.57 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
30% of peak store performance is reached (14.86 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 443dc0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #576	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X5, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X0, <4c1dc8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR D3, [X5, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDP D14, D4, [X5, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X6, [X0, #4016]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X19, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X20, XZR, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FSUB D0, D0, S3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FSUB D6, D1, S4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D1, [X5, #120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
FMUL D11, D0, D14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X23, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X25, XZR, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
FCMPE D11, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
FSUB D8, D2, S1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X1, [X6]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X1, [SP, #568]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W7, [X5, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B.MI 444644 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x884>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCVTZS W3, D11	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	3	1
SUB W7, W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W7, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LT 4443c0 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SCVTF D5, W3	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
ORR X2, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D16, #0.5000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVK X2, #16325	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D15, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ORR X1, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X1, #16357	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D2, #1.5000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D18, #-2.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D9, X2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D7, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ORR W7, WZR, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D10, #-0.5000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D12, X1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D13, #3.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FSUB D1, D11, S5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FSUB D17, D5, S11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMUL D29, D1, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMADD D19, D1, D16, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMSUB D21, D1, D16, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D20, D1, D2, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMSUB D23, D1, D2, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMUL D22, D1, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FADD D24, D17, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMADD D18, D1, D13, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FSUB D25, D16, S29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMADD D26, D1, D21, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D17, D1, D23, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMSUB D7, D1, D13, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMUL D29, D29, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D5, D22, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D27, D1, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMADD D3, D1, D26, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D28, D1, D25, D10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMUL D20, D1, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMADD D31, D1, D27, D12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D4, D1, D28, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FADD D30, D27, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FNEG D10, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP D24, D4, [SP, #224]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP W7, W6, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X4, X13, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X14, X18, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D21, [SP, #288]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR X8, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D25, D22, [SP, #304]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D26, D23, [SP, #320]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D24, [SP, #336]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR X5, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X0, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D21, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP X4, X13, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X14, X18, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP D25, D22, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D26, D23, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D24, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP W7, W6, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X5, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D13, [X5, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
MOVI D10, #0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVN X9, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVN X8, #7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X10, #15536	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVN X4, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X13, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W21, [X5, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X14, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVN X15, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X10, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVK X9, #49151	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X8, #16367	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR D10, [SP, #232]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVK X4, #16351	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X11, <49f3fc>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMUL D11, D13, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
MOVZ X12, #15556	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X13, #49120	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X14, #16357	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X15, #16367	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D7, X9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADRP X16, <49f418>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D18, X8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D5, X4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D17, X12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D20, X13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FCMPE D11, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
LDR D29, [X11, #1704]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMOV D3, X14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D1, X15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D31, [X16, #1712]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
B.GE 443f04 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x144>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 403d80 <@plt_start@+0x700>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0

Source file and lines	MultiBsplineRef.hpp:179-297
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:44,55-68
/usr/include/c++/11/bits/stl_algobase.h:923-924
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:179,192-197,203-220,233-270,277-297
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp:68-79

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 21.00 to 6.67 cycles (3.15x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

16% of VPU instructions are used in vector version (process two or more data elements in vector registers):

30% of VPU loads are used in vector version.
70% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 21.00 to 5.50 cycles (3.82x speedup).

FMA

Detected 12 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Conversion instructions

Detected expensive conversion instructions.

Details

FCVTZS: 1 occurrences
SCVTF: 1 occurrences

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Matching between your function (in the source code) and the binary function

The binary function is composed of 40 FP arithmetical operations:

20: addition or subtraction (12 inside FMA instructions)
20: multiply (12 inside FMA instructions)

The binary function is loading 264 bytes. The binary function is storing 312 bytes.

Arithmetic intensity

Arithmetic intensity is 0.07 FP operations per loaded or stored byte.

General properties

nb instructions	171
loop length	684
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

21.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	7.00	7.00	15.75	15.75	15.75	15.75	14.75	14.75	14.75	14.75	17.67	17.67	17.67	7.00	7.00
cycles	7.00	7.00	15.75	15.75	15.75	15.75	14.75	14.75	14.75	14.75	17.67	17.67	17.67	7.00	7.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	21.00
Overall L1	21.00

Vectorization ratios

all	16%
load	30%
store	70%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 21.00 cycles. At this rate:

13% of peak load performance is reached (12.57 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
30% of peak store performance is reached (14.86 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 443dc0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #576	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X5, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X0, <4c1dc8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR D3, [X5, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDP D14, D4, [X5, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X6, [X0, #4016]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X19, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X20, XZR, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FSUB D0, D0, S3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FSUB D6, D1, S4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D1, [X5, #120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
FMUL D11, D0, D14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X23, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X25, XZR, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
FCMPE D11, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
FSUB D8, D2, S1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X1, [X6]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X1, [SP, #568]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W7, [X5, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B.MI 444644 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x884>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCVTZS W3, D11	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	3	1
SUB W7, W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W7, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LT 4443c0 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SCVTF D5, W3	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
ORR X2, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D16, #0.5000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVK X2, #16325	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D15, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ORR X1, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X1, #16357	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D2, #1.5000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D18, #-2.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D9, X2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D7, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ORR W7, WZR, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D10, #-0.5000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D12, X1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D13, #3.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FSUB D1, D11, S5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FSUB D17, D5, S11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMUL D29, D1, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMADD D19, D1, D16, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMSUB D21, D1, D16, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D20, D1, D2, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMSUB D23, D1, D2, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMUL D22, D1, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FADD D24, D17, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMADD D18, D1, D13, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FSUB D25, D16, S29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMADD D26, D1, D21, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D17, D1, D23, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMSUB D7, D1, D13, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMUL D29, D29, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D5, D22, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D27, D1, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMADD D3, D1, D26, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D28, D1, D25, D10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMUL D20, D1, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMADD D31, D1, D27, D12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D4, D1, D28, D9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FADD D30, D27, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FNEG D10, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP D24, D4, [SP, #224]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP W7, W6, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X4, X13, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X14, X18, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D21, [SP, #288]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR X8, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D25, D22, [SP, #304]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D26, D23, [SP, #320]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D24, [SP, #336]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR X5, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X0, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D21, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP X4, X13, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X14, X18, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP D25, D22, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D26, D23, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D24, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP W7, W6, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X5, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D13, [X5, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
MOVI D10, #0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVN X9, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVN X8, #7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X10, #15536	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVN X4, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X13, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W21, [X5, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X14, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVN X15, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X10, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVK X9, #49151	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X8, #16367	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR D10, [SP, #232]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVK X4, #16351	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X11, <49f3fc>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMUL D11, D13, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
MOVZ X12, #15556	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X13, #49120	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X14, #16357	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X15, #16367	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D7, X9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADRP X16, <49f418>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D18, X8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D5, X4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D17, X12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D20, X13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FCMPE D11, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
LDR D29, [X11, #1704]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMOV D3, X14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D1, X15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D31, [X16, #1712]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
B.GE 443f04 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x144>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 403d80 <@plt_start@+0x700>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh(qmcplusplus::bspline_traits::SplineType const, double, double, double, double, double, double, unsigned long)–	9.04	0.07
▼Loop 808 - MultiBsplineEvalHelper.hpp:55-68 - exec–	0	0
○Loop 809 - MultiBsplineRef.hpp:287-295 - exec	0.6	0
▼Loop 810 - MultiBsplineRef.hpp:233-270 - exec–	0	0
▼Loop 811 - MultiBsplineRef.hpp:234-270 - exec–	0	0
○Loop 812 - MultiBsplineRef.hpp:252-270 - exec	8.43	0.07

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FMA

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Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code