OV - exec - Function miniqmcreference::TwoBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::computeU3(qmcplusplus::ParticleSet const&, int, double const*, double*, double*, double*, bool)

	Function: miniqmcreference::TwoBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::computeU3(qmcpl ...	Module: exec	Source: TwoBodyJastrowRef.h:251-276 [...]	Coverage: 1.2%

/usr/include/c++/11/bits/stl_algobase.h: 924 - 1120

--------------------------------------------------------------------------------

924: 	*__first = __tmp;

[...]

1115:       if (__n <= 0)

1116: 	return __first;

1117:

1118:       __glibcxx_requires_can_increment(__first, __n);

1119:

1120:       std::__fill_a(__first, __first + __n, __value);

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 229 - 229

--------------------------------------------------------------------------------

229:     return X[i];

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 276 - 336

--------------------------------------------------------------------------------

276:   real_type dSquareDeltaRinv = DeltaRInv * DeltaRInv;

277:   constexpr real_type cOne(1);

278:

279:   //    START_MARK_FIRST();

280:

281:   ASSUME_ALIGNED(distIndices);

282:   ASSUME_ALIGNED(distArrayCompressed);

283:   int iCount                 = 0;

284:   int iLimit                 = iEnd - iStart;

[...]

291:   for (int jat = 0; jat < iLimit; jat++)

292:   {

293:     real_type r = distArray[jat];

294:     if (r < cutoff_radius && iStart + jat != iat)

295:     {

296:       distIndices[iCount]         = jat;

297:       distArrayCompressed[iCount] = r;

298:       iCount++;

[...]

305:     real_type r    = distArrayCompressed[j];

306:     int iScatter   = distIndices[j];

307:     real_type rinv = cOne / r;

308:     r *= DeltaRInv;

309:     int iGather   = (int)r;

310:     real_type t   = r - real_type(iGather);

311:     real_type tp0 = t * t * t;

312:     real_type tp1 = t * t;

313:     real_type tp2 = t;

314:

315:     real_type sCoef0 = SplineCoefs[iGather + 0];

316:     real_type sCoef1 = SplineCoefs[iGather + 1];

317:     real_type sCoef2 = SplineCoefs[iGather + 2];

318:     real_type sCoef3 = SplineCoefs[iGather + 3];

319:

320:     // clang-format off

321:     laplArray[iScatter] = dSquareDeltaRinv *

322:       (sCoef0*( d2A[ 2]*tp2 + d2A[ 3])+

323:        sCoef1*( d2A[ 6]*tp2 + d2A[ 7])+

324:        sCoef2*( d2A[10]*tp2 + d2A[11])+

325:        sCoef3*( d2A[14]*tp2 + d2A[15]));

326:

327:     gradArray[iScatter] = DeltaRInv * rinv *

328:       (sCoef0*( dA[ 1]*tp1 + dA[ 2]*tp2 + dA[ 3])+

329:        sCoef1*( dA[ 5]*tp1 + dA[ 6]*tp2 + dA[ 7])+

330:        sCoef2*( dA[ 9]*tp1 + dA[10]*tp2 + dA[11])+

331:        sCoef3*( dA[13]*tp1 + dA[14]*tp2 + dA[15]));

332:

333:     valArray[iScatter] = (sCoef0*(A[ 0]*tp0 + A[ 1]*tp1 + A[ 2]*tp2 + A[ 3])+

334:         sCoef1*(A[ 4]*tp0 + A[ 5]*tp1 + A[ 6]*tp2 + A[ 7])+

335:         sCoef2*(A[ 8]*tp0 + A[ 9]*tp1 + A[10]*tp2 + A[11])+

336:         sCoef3*(A[12]*tp0 + A[13]*tp1 + A[14]*tp2 + A[15]));

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h: 251 - 276

--------------------------------------------------------------------------------

251: inline void TwoBodyJastrowRef<FT>::computeU3(const ParticleSet& P,

[...]

259:   const int jelmax = triangle ? iat : N;

[...]

265:   const int igt = P.GroupID[iat] * NumGroups;

266:   for (int jg = 0; jg < NumGroups; ++jg)

267:   {

268:     const FuncType& f2(*F[igt + jg]);

[...]

276: }

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 302 - 305

--------------------------------------------------------------------------------

302:   inline int first(int igroup) const { return SubPtcl[igroup]; }

303:

304:   /// return the last index of a group i

305:   inline int last(int igroup) const { return SubPtcl[igroup + 1]; }

/usr/include/c++/11/bits/stl_vector.h: 1061 - 1061

--------------------------------------------------------------------------------

1061:       operator[](size_type __n) const _GLIBCXX_NOEXCEPT

0x434c20 CNTB	X12, ALL

0x434c24 MOVZ	X13, #25

0x434c28 ADD	X11, SP, #0

0x434c2c MADD	X8, X12, X13, XZR

0x434c30 ADD	X9, X8, #160

(638) 0x434c34 CMP	X9, #15

(638) 0x434c38 B.LT	434c4c

(638) 0x434c3c SUB	SP, SP, #15

(638) 0x434c40 STR	XZR, [SP]

(638) 0x434c44 SUB	X9, X9, #15

(638) 0x434c48 B	434c34

0x434c4c SUB	SP, SP, X9,UXTX

0x434c50 STP	X29, X30, [SP]

0x434c54 ADD	X29, SP, #0

0x434c58 STP	X19, X20, [SP, #16]

0x434c5c ORR	W19, WZR, W2

0x434c60 ORR	W20, WZR, W2

0x434c64 STP	X21, X22, [SP, #32]

0x434c68 ORR	X21, XZR, X3

0x434c6c ORR	X22, XZR, X4

0x434c70 STP	X23, X24, [SP, #48]

0x434c74 ORR	X23, XZR, X5

0x434c78 ORR	X24, XZR, X6

0x434c7c STP	X25, X26, [SP, #64]

0x434c80 ORR	X25, XZR, X0

0x434c84 ORR	X26, XZR, X1

0x434c88 ANDS	WZR, W7, #448

0x434c8c B.NE	434c94

0x434c90 LDR	W20, [X0, #144]

0x434c94 CMP	W20, #0

0x434c98 B.LE	434cd8

0x434c9c STR	X27, [SP, #80]

0x434ca0 SBFM	X27, X20, #61, #31

0x434ca4 MOVZ	W1, #0

0x434ca8 ORR	X2, XZR, X27

0x434cac ORR	X0, XZR, X22

0x434cb0 BL	403890

0x434cb4 ORR	X2, XZR, X27

0x434cb8 MOVZ	W1, #0

0x434cbc ORR	X0, XZR, X23

0x434cc0 BL	403890

0x434cc4 ORR	X2, XZR, X27

0x434cc8 MOVZ	W1, #0

0x434ccc ORR	X0, XZR, X24

0x434cd0 BL	403890

0x434cd4 LDR	X27, [SP, #80]

0x434cd8 LDR	X0, [X26, #1472]

0x434cdc LDR	X15, [X25, #160]

0x434ce0 LDRSW	X1, [X0, X19,SXTW #2]

0x434ce4 MADD	W5, W1, W15, WZR

0x434ce8 CBZ	X15, 43561c

0x434cec LDR	X12, [X25, #464]

0x434cf0 MOVZ	X2, #0

0x434cf4 CNTW	X4, ALL

0x434cf8 PTRUE	P0.B, ALL

0x434cfc STP	D8, D9, [SP, #96]

0x434d00 LDR	X6, [X25, #512]

0x434d04 ADD	X14, X6, W5,SXTW #3

0x434d08 STP	D10, D11, [SP, #112]

0x434d0c LDR	X13, [X25, #488]

0x434d10 ADDVL	X3, X12, #1

0x434d14 STP	D12, D13, [SP, #128]

0x434d18 LDR	X6, [X26, #2712]

0x434d1c STP	D14, D15, [SP, #144]

(636) 0x434d20 LDR	X7, [X14, X2,LSL #3]

(636) 0x434d24 LDR	W17, [X6, X2,LSL #2]

(636) 0x434d28 ADD	X2, X2, #1

(636) 0x434d2c LDR	W10, [X6, X2,LSL #2]

(636) 0x434d30 LDR	D14, [X7, #568]

(636) 0x434d34 CMP	W10, W20

(636) 0x434d38 CSEL	W16, W10, W20, #13

(636) 0x434d3c SUB	W18, W16, W17

(636) 0x434d40 FMUL	D16, D14, D14

(636) 0x434d44 CMP	W18, #0

(636) 0x434d48 B.LE	435604

(636) 0x434d4c SBFM	X30, X17, #61, #31

(636) 0x434d50 ANDS	W9, W18, #128

(636) 0x434d54 LDR	D0, [X7, #8]

(636) 0x434d58 ADD	X11, X21, X30

(636) 0x434d5c SBFM	X25, X17, #0, #31

(636) 0x434d60 MOVZ	X0, #0

(636) 0x434d64 MOVZ	W8, #0

(636) 0x434d68 B.EQ	434ebc

(636) 0x434d6c CMP	W9, #1

(636) 0x434d70 B.EQ	434e88

(636) 0x434d74 CMP	W9, #2

(636) 0x434d78 B.EQ	434e5c

(636) 0x434d7c CMP	W9, #3

(636) 0x434d80 B.EQ	434e30

(636) 0x434d84 CMP	W9, #4

(636) 0x434d88 B.EQ	434e04

(636) 0x434d8c CMP	W9, #5

(636) 0x434d90 B.EQ	434dd8

(636) 0x434d94 CMP	W9, #6

(636) 0x434d98 B.EQ	434dac

(636) 0x434d9c LDR	D1, [X21, X25,LSL #3]

(636) 0x434da0 FCMPE	D1, D0

(636) 0x434da4 B.MI	43563c

(636) 0x434da8 MOVZ	X0, #1

(636) 0x434dac LDR	D2, [X11, X0,LSL #3]

(636) 0x434db0 FCMPE	D2, D0

(636) 0x434db4 B.GE	434dd4

(636) 0x434db8 ADD	W1, W17, W0

(636) 0x434dbc CMP	W19, W1

(636) 0x434dc0 B.EQ	434dd4

(636) 0x434dc4 SBFM	X5, X8, #0, #31

(636) 0x434dc8 ADD	W8, W8, #1

(636) 0x434dcc STR	W0, [X13, X5,LSL #2]

(636) 0x434dd0 STR	D2, [X12, X5,LSL #3]

(636) 0x434dd4 ADD	X0, X0, #1

(636) 0x434dd8 LDR	D3, [X11, X0,LSL #3]

(636) 0x434ddc FCMPE	D3, D0

(636) 0x434de0 B.GE	434e00

(636) 0x434de4 ADD	W10, W17, W0

(636) 0x434de8 CMP	W19, W10

(636) 0x434dec B.EQ	434e00

(636) 0x434df0 SBFM	X16, X8, #0, #31

(636) 0x434df4 ADD	W8, W8, #1

(636) 0x434df8 STR	W0, [X13, X16,LSL #2]

(636) 0x434dfc STR	D3, [X12, X16,LSL #3]

(636) 0x434e00 ADD	X0, X0, #1

(636) 0x434e04 LDR	D4, [X11, X0,LSL #3]

(636) 0x434e08 FCMPE	D4, D0

(636) 0x434e0c B.GE	434e2c

(636) 0x434e10 ADD	W9, W17, W0

(636) 0x434e14 CMP	W19, W9

(636) 0x434e18 B.EQ	434e2c

(636) 0x434e1c SBFM	X25, X8, #0, #31

(636) 0x434e20 ADD	W8, W8, #1

(636) 0x434e24 STR	W0, [X13, X25,LSL #2]

(636) 0x434e28 STR	D4, [X12, X25,LSL #3]

(636) 0x434e2c ADD	X0, X0, #1

(636) 0x434e30 LDR	D5, [X11, X0,LSL #3]

(636) 0x434e34 FCMPE	D5, D0

(636) 0x434e38 B.GE	434e58

(636) 0x434e3c ADD	W26, W17, W0

(636) 0x434e40 CMP	W19, W26

(636) 0x434e44 B.EQ	434e58

(636) 0x434e48 SBFM	X1, X8, #0, #31

(636) 0x434e4c ADD	W8, W8, #1

(636) 0x434e50 STR	W0, [X13, X1,LSL #2]

(636) 0x434e54 STR	D5, [X12, X1,LSL #3]

(636) 0x434e58 ADD	X0, X0, #1

(636) 0x434e5c LDR	D6, [X11, X0,LSL #3]

(636) 0x434e60 FCMPE	D6, D0

(636) 0x434e64 B.GE	434e84

(636) 0x434e68 ADD	W5, W17, W0

(636) 0x434e6c CMP	W19, W5

(636) 0x434e70 B.EQ	434e84

(636) 0x434e74 SBFM	X10, X8, #0, #31

(636) 0x434e78 ADD	W8, W8, #1

(636) 0x434e7c STR	W0, [X13, X10,LSL #2]

(636) 0x434e80 STR	D6, [X12, X10,LSL #3]

(636) 0x434e84 ADD	X0, X0, #1

(636) 0x434e88 LDR	D7, [X11, X0,LSL #3]

(636) 0x434e8c FCMPE	D7, D0

(636) 0x434e90 B.GE	434eb0

(636) 0x434e94 ADD	W16, W17, W0

(636) 0x434e98 CMP	W19, W16

(636) 0x434e9c B.EQ	434eb0

(636) 0x434ea0 SBFM	X9, X8, #0, #31

(636) 0x434ea4 ADD	W8, W8, #1

(636) 0x434ea8 STR	W0, [X13, X9,LSL #2]

(636) 0x434eac STR	D7, [X12, X9,LSL #3]

(636) 0x434eb0 ADD	X0, X0, #1

(636) 0x434eb4 CMP	W18, W0

(636) 0x434eb8 B.LE	435024

  (637) 0x434ebc LDR	D8, [X11, X0,LSL #3]

  (637) 0x434ec0 FCMPE	D8, D0

  (637) 0x434ec4 B.GE	434ee4

  (637) 0x434ec8 ADD	W25, W17, W0

  (637) 0x434ecc CMP	W19, W25

  (637) 0x434ed0 B.EQ	434ee4

  (637) 0x434ed4 SBFM	X26, X8, #0, #31

  (637) 0x434ed8 ADD	W8, W8, #1

  (637) 0x434edc STR	W0, [X13, X26,LSL #2]

  (637) 0x434ee0 STR	D8, [X12, X26,LSL #3]

  (637) 0x434ee4 ADD	X0, X0, #1

  (637) 0x434ee8 LDR	D9, [X11, X0,LSL #3]

  (637) 0x434eec FCMPE	D9, D0

  (637) 0x434ef0 B.GE	434f10

  (637) 0x434ef4 ADD	W1, W17, W0

  (637) 0x434ef8 CMP	W19, W1

  (637) 0x434efc B.EQ	434f10

  (637) 0x434f00 SBFM	X5, X8, #0, #31

  (637) 0x434f04 ADD	W8, W8, #1

  (637) 0x434f08 STR	W0, [X13, X5,LSL #2]

  (637) 0x434f0c STR	D9, [X12, X5,LSL #3]

  (637) 0x434f10 ADD	X10, X0, #1

  (637) 0x434f14 LDR	D10, [X11, X10,LSL #3]

  (637) 0x434f18 FCMPE	D10, D0

  (637) 0x434f1c B.GE	434f3c

  (637) 0x434f20 ADD	W16, W17, W10

  (637) 0x434f24 CMP	W19, W16

  (637) 0x434f28 B.EQ	434f3c

  (637) 0x434f2c SBFM	X9, X8, #0, #31

  (637) 0x434f30 ADD	W8, W8, #1

  (637) 0x434f34 STR	W10, [X13, X9,LSL #2]

  (637) 0x434f38 STR	D10, [X12, X9,LSL #3]

  (637) 0x434f3c ADD	X25, X0, #2

  (637) 0x434f40 LDR	D11, [X11, X25,LSL #3]

  (637) 0x434f44 FCMPE	D11, D0

  (637) 0x434f48 B.GE	434f68

  (637) 0x434f4c ADD	W26, W17, W25

  (637) 0x434f50 CMP	W19, W26

  (637) 0x434f54 B.EQ	434f68

  (637) 0x434f58 SBFM	X1, X8, #0, #31

  (637) 0x434f5c ADD	W8, W8, #1

  (637) 0x434f60 STR	W25, [X13, X1,LSL #2]

  (637) 0x434f64 STR	D11, [X12, X1,LSL #3]

  (637) 0x434f68 ADD	X5, X0, #3

  (637) 0x434f6c LDR	D12, [X11, X5,LSL #3]

  (637) 0x434f70 FCMPE	D12, D0

  (637) 0x434f74 B.GE	434f94

  (637) 0x434f78 ADD	W10, W17, W5

  (637) 0x434f7c CMP	W19, W10

  (637) 0x434f80 B.EQ	434f94

  (637) 0x434f84 SBFM	X16, X8, #0, #31

  (637) 0x434f88 ADD	W8, W8, #1

  (637) 0x434f8c STR	W5, [X13, X16,LSL #2]

  (637) 0x434f90 STR	D12, [X12, X16,LSL #3]

  (637) 0x434f94 ADD	X9, X0, #4

  (637) 0x434f98 LDR	D13, [X11, X9,LSL #3]

  (637) 0x434f9c FCMPE	D13, D0

  (637) 0x434fa0 B.GE	434fc0

  (637) 0x434fa4 ADD	W25, W17, W9

  (637) 0x434fa8 CMP	W19, W25

  (637) 0x434fac B.EQ	434fc0

  (637) 0x434fb0 SBFM	X26, X8, #0, #31

  (637) 0x434fb4 ADD	W8, W8, #1

  (637) 0x434fb8 STR	W9, [X13, X26,LSL #2]

  (637) 0x434fbc STR	D13, [X12, X26,LSL #3]

  (637) 0x434fc0 ADD	X1, X0, #5

  (637) 0x434fc4 LDR	D15, [X11, X1,LSL #3]

  (637) 0x434fc8 FCMPE	D15, D0

  (637) 0x434fcc B.GE	434fec

  (637) 0x434fd0 ADD	W5, W17, W1

  (637) 0x434fd4 CMP	W19, W5

  (637) 0x434fd8 B.EQ	434fec

  (637) 0x434fdc SBFM	X10, X8, #0, #31

  (637) 0x434fe0 ADD	W8, W8, #1

  (637) 0x434fe4 STR	W1, [X13, X10,LSL #2]

  (637) 0x434fe8 STR	D15, [X12, X10,LSL #3]

  (637) 0x434fec ADD	X9, X0, #6

  (637) 0x434ff0 LDR	D17, [X11, X9,LSL #3]

  (637) 0x434ff4 FCMPE	D17, D0

  (637) 0x434ff8 B.GE	435018

  (637) 0x434ffc ADD	W16, W17, W9

  (637) 0x435000 CMP	W19, W16

  (637) 0x435004 B.EQ	435018

  (637) 0x435008 SBFM	X25, X8, #0, #31

  (637) 0x43500c ADD	W8, W8, #1

  (637) 0x435010 STR	W9, [X13, X25,LSL #2]

  (637) 0x435014 STR	D17, [X12, X25,LSL #3]

  (637) 0x435018 ADD	X0, X0, #7

  (637) 0x43501c CMP	W18, W0

  (637) 0x435020 B.GT	434ebc

(636) 0x435024 CBZ	W8, 435604

0x435028 ADDVL	X11, SP, #21

0x43502c ADDVL	X26, SP, #20

0x435030 LD1RD	{Z18.D}, P0/Z, [X7, #20]

0x435034 ADD	X11, X11, #160

0x435038 ADDVL	X5, SP, #19

0x43503c STR	Z18, [X11, MUL VL]

0x435040 ADDVL	X10, SP, #18

0x435044 ADD	X26, X26, #160

0x435048 LD1RD	{Z19.D}, P0/Z, [X7, #21]

0x43504c ADD	X5, X5, #160

0x435050 ADD	X10, X10, #160

0x435054 LD1RD	{Z20.D}, P0/Z, [X7, #22]

0x435058 ADDVL	X11, SP, #13

0x43505c LD1RD	{Z30.D}, P0/Z, [X7, #24]

0x435060 ADDVL	X9, SP, #17

0x435064 ADD	X11, X11, #160

0x435068 ADDVL	X16, SP, #16

0x43506c STR	Z19, [X26, MUL VL]

0x435070 ADDVL	X25, SP, #15

0x435074 ADDVL	X0, SP, #14

0x435078 STR	Z20, [X5, MUL VL]

0x43507c ADDVL	X26, SP, #12

0x435080 ADDVL	X5, SP, #11

0x435084 STR	Z30, [X10, MUL VL]

0x435088 ADDVL	X10, SP, #10

0x43508c LD1RD	{Z31.D}, P0/Z, [X7, #25]

0x435090 LD1RD	{Z0.D}, P0/Z, [X7, #28]

0x435094 LD1RD	{Z1.D}, P0/Z, [X7, #29]

0x435098 LD1RD	{Z2.D}, P0/Z, [X7, #30]

0x43509c LD1RD	{Z3.D}, P0/Z, [X7, #32]

0x4350a0 LD1RD	{Z4.D}, P0/Z, [X7, #33]

0x4350a4 LD1RD	{Z5.D}, P0/Z, [X7, #34]

0x4350a8 ADD	X9, X9, #160

0x4350ac ADD	X16, X16, #160

0x4350b0 ADD	X25, X25, #160

0x4350b4 DUP	Z29.D, Z16.D[0]

0x4350b8 ADD	X0, X0, #160

0x4350bc LD1RD	{Z16.D}, P0/Z, [X7, #26]

0x4350c0 ADD	X26, X26, #160

0x4350c4 ADD	X5, X5, #160

0x4350c8 ADD	X10, X10, #160

0x4350cc LD1RD	{Z28.D}, P0/Z, [X7, #37]

0x4350d0 LD1RD	{Z27.D}, P0/Z, [X7, #38]

0x4350d4 LD1RD	{Z26.D}, P0/Z, [X7, #41]

0x4350d8 LD1RD	{Z25.D}, P0/Z, [X7, #42]

0x4350dc LD1RD	{Z24.D}, P0/Z, [X7, #45]

0x4350e0 LD1RD	{Z23.D}, P0/Z, [X7, #46]

0x4350e4 LD1RD	{Z22.D}, P0/Z, [X7, #49]

0x4350e8 LD1RD	{Z21.D}, P0/Z, [X7, #50]

0x4350ec STR	Z31, [X9, MUL VL]

0x4350f0 STR	Z16, [X16, MUL VL]

0x4350f4 STR	Z0, [X25, MUL VL]

0x4350f8 STR	Z1, [X0, MUL VL]

0x4350fc STR	Z2, [X11, MUL VL]

0x435100 ADD	X11, SP, #160

0x435104 STR	Z3, [X26, MUL VL]

0x435108 STR	Z4, [X5, MUL VL]

0x43510c STR	Z5, [X10, MUL VL]

0x435110 LD1RD	{Z6.D}, P0/Z, [X7, #3]

0x435114 LD1RD	{Z17.D}, P0/Z, [X7, #12]

0x435118 LD1RD	{Z18.D}, P0/Z, [X7, #13]

0x43511c LD1RD	{Z19.D}, P0/Z, [X7, #14]

0x435120 ADD	X10, SP, #160

0x435124 LD1RD	{Z7.D}, P0/Z, [X7, #4]

0x435128 LD1RD	{Z8.D}, P0/Z, [X7, #5]

0x43512c LD1RD	{Z9.D}, P0/Z, [X7, #6]

0x435130 LD1RD	{Z10.D}, P0/Z, [X7, #7]

0x435134 LD1RD	{Z11.D}, P0/Z, [X7, #8]

0x435138 LD1RD	{Z12.D}, P0/Z, [X7, #9]

0x43513c LD1RD	{Z13.D}, P0/Z, [X7, #10]

0x435140 LD1RD	{Z15.D}, P0/Z, [X7, #11]

0x435144 ADDVL	X26, X11, #22

0x435148 ADD	X5, SP, #160

0x43514c LD1RD	{Z20.D}, P0/Z, [X7, #15]

0x435150 STR	Z18, [X5, #1, MUL VL]

0x435154 LD1RD	{Z18.D}, P0/Z, [X7, #17]

0x435158 STR	Z17, [X26, MUL VL]

0x43515c LD1RD	{Z17.D}, P0/Z, [X7, #18]

0x435160 STR	Z19, [X10, MUL VL]

0x435164 LD1RD	{Z19.D}, P0/Z, [X7, #16]

0x435168 LDR	X7, [X7, #536]

0x43516c ADD	X17, X24, X30

0x435170 ADD	X18, X23, X30

0x435174 DUP	Z14.D, Z14.D[0]

0x435178 ADDVL	X9, SP, #9

0x43517c ADD	X30, X22, X30

0x435180 STR	Z12, [X11, #4, MUL VL]

0x435184 MOVZ	X1, #0

0x435188 ADD	X25, SP, #160

0x43518c STR	Z13, [X11, #3, MUL VL]

0x435190 ADD	X9, X9, #160

0x435194 ADDVL	X16, SP, #8

0x435198 STR	Z6, [X9, MUL VL]

0x43519c ADD	X16, X16, #160

0x4351a0 ADDVL	X0, X25, #23

0x4351a4 STR	Z8, [X25, #7, MUL VL]

0x4351a8 ADDVL	X9, X10, #24

0x4351ac STR	Z9, [X25, #6, MUL VL]

0x4351b0 STR	Z10, [X25, #5, MUL VL]

0x4351b4 STR	Z15, [X11, #2, MUL VL]

0x4351b8 WHILELO	P3.S, WZR, W8

0x4351bc STR	Z7, [X16, MUL VL]

0x4351c0 STR	Z11, [X0, MUL VL]

0x4351c4 STR	Z29, [X9, MUL VL]

(635) 0x4351c8 PUNPKHI	P1.H, P3.B

(635) 0x4351cc LD1D	{Z5.D}, P1/Z, [X3, X1,LSL #3]

(635) 0x4351d0 FMUL	Z0.D, Z14.D, Z5.D

(635) 0x4351d4 MOVPRFX	Z31, Z0

(635) 0x4351d8 FCVTZS	Z31.S, P0/M, Z0.D

(635) 0x4351dc PUNPKLO	P2.H, P3.B

(635) 0x4351e0 LD1D	{Z8.D}, P2/Z, [X12, X1,LSL #3]

(635) 0x4351e4 FMUL	Z29.D, Z8.D, Z14.D

(635) 0x4351e8 MOVPRFX	Z30, Z29

(635) 0x4351ec FCVTZS	Z30.S, P0/M, Z29.D

(635) 0x4351f0 UZP1	Z2.S, Z30.S, Z31.S

(635) 0x4351f4 MOVPRFX	Z3, Z2

(635) 0x4351f8 ADD	Z3.S, Z3.S, #1

(635) 0x4351fc MOVPRFX	Z31, Z2

(635) 0x435200 ADD	Z31.S, Z31.S, #3

(635) 0x435204 SUNPKLO	Z4.D, Z3

(635) 0x435208 SUNPKLO	Z11.D, Z2

(635) 0x43520c ZIP2	Z16.S, Z2.S, Z2.S

(635) 0x435210 SUNPKHI	Z7.D, Z3

(635) 0x435214 SCVTF	Z16.D, P0/M, Z16.S

(635) 0x435218 SUNPKHI	Z3.D, Z31

(635) 0x43521c FSUB	Z1.D, Z29.D, Z16.D

(635) 0x435220 SUNPKLO	Z12.D, Z31

(635) 0x435224 MOVPRFX	Z6, Z25

(635) 0x435228 FMLA	Z6.D, P0/M, Z26.D, Z1.D

(635) 0x43522c LD1D	{Z12.D}, P2/Z, [X7, Z12.D,LSL #3]

(635) 0x435230 MOVPRFX	Z29, Z21

(635) 0x435234 FMLA	Z29.D, P0/M, Z22.D, Z1.D

(635) 0x435238 FMUL	Z31.D, Z29.D, Z12.D

(635) 0x43523c LD1D	{Z30.D}, P2/Z, [X7, Z4.D,LSL #3]

(635) 0x435240 LD1D	{Z13.D}, P2/Z, [X7, Z11.D,LSL #3]

(635) 0x435244 FMUL	Z10.D, Z6.D, Z30.D

(635) 0x435248 MOVPRFX	Z16, Z27

(635) 0x43524c FMLA	Z16.D, P0/M, Z28.D, Z1.D

(635) 0x435250 MOVPRFX	Z6, Z2

(635) 0x435254 ADD	Z6.S, Z6.S, #2

(635) 0x435258 FMAD	Z16.D, P0/M, Z13.D, Z10.D

(635) 0x43525c MOVPRFX	Z29, Z23

(635) 0x435260 FMLA	Z29.D, P0/M, Z24.D, Z1.D

(635) 0x435264 SUNPKLO	Z11.D, Z6

(635) 0x435268 ADDVL	X16, SP, #24

(635) 0x43526c LD1D	{Z11.D}, P2/Z, [X7, Z11.D,LSL #3]

(635) 0x435270 FMAD	Z29.D, P0/M, Z11.D, Z31.D

(635) 0x435274 FADD	Z31.D, Z16.D, Z29.D

(635) 0x435278 LD1D	{Z4.D}, P1/Z, [X7, Z3.D,LSL #3]

(635) 0x43527c ADD	X16, X16, #160

(635) 0x435280 SUNPKHI	Z10.D, Z2

(635) 0x435284 SUNPKHI	Z3.D, Z6

(635) 0x435288 ZIP1	Z2.S, Z2.S, Z2.S

(635) 0x43528c SCVTF	Z2.D, P0/M, Z2.S

(635) 0x435290 FSUB	Z0.D, Z0.D, Z2.D

(635) 0x435294 LDR	Z16, [X16, MUL VL]

(635) 0x435298 FMUL	Z29.D, Z31.D, Z16.D

(635) 0x43529c MOVPRFX	Z31, Z23

(635) 0x4352a0 FMLA	Z31.D, P0/M, Z24.D, Z0.D

(635) 0x4352a4 LD1D	{Z6.D}, P1/Z, [X7, Z3.D,LSL #3]

(635) 0x4352a8 LD1W	{Z9.S}, P3/Z, [X13, X1,LSL #2]

(635) 0x4352ac LD1D	{Z7.D}, P1/Z, [X7, Z7.D,LSL #3]

(635) 0x4352b0 LD1D	{Z10.D}, P1/Z, [X7, Z10.D,LSL #3]

(635) 0x4352b4 SUNPKLO	Z15.D, Z9

(635) 0x4352b8 MOVPRFX	Z3, Z21

(635) 0x4352bc FMLA	Z3.D, P0/M, Z22.D, Z0.D

(635) 0x4352c0 ST1D	{Z29.D}, P2, [X17, Z15.D,LSL #3]

(635) 0x4352c4 MOVPRFX	Z2, Z27

(635) 0x4352c8 FMLA	Z2.D, P0/M, Z28.D, Z0.D

(635) 0x4352cc MOVPRFX	Z29, Z25

(635) 0x4352d0 FMLA	Z29.D, P0/M, Z26.D, Z0.D

(635) 0x4352d4 FMUL	Z3.D, Z3.D, Z4.D

(635) 0x4352d8 ADDVL	X25, SP, #13

(635) 0x4352dc FMLA	Z3.D, P0/M, Z31.D, Z6.D

(635) 0x4352e0 ADDVL	X0, SP, #14

(635) 0x4352e4 FMUL	Z31.D, Z29.D, Z7.D

(635) 0x4352e8 ADDVL	X26, SP, #11

(635) 0x4352ec FMAD	Z2.D, P0/M, Z10.D, Z31.D

(635) 0x4352f0 ADDVL	X5, SP, #15

(635) 0x4352f4 FADD	Z2.D, Z2.D, Z3.D

(635) 0x4352f8 FMUL	Z16.D, Z2.D, Z16.D

(635) 0x4352fc SUNPKHI	Z9.D, Z9

(635) 0x435300 ADD	X25, X25, #160

(635) 0x435304 ST1D	{Z16.D}, P1, [X17, Z9.D,LSL #3]

(635) 0x435308 ADD	X0, X0, #160

(635) 0x43530c ADD	X26, X26, #160

(635) 0x435310 ADD	X5, X5, #160

(635) 0x435314 FDUP	Z3.D, #112

(635) 0x435318 ADDVL	X11, SP, #10

(635) 0x43531c ADDVL	X10, SP, #12

(635) 0x435320 ADDVL	X16, SP, #20

(635) 0x435324 LDR	Z31, [X0, MUL VL]

(635) 0x435328 LDR	Z2, [X26, MUL VL]

(635) 0x43532c LDR	Z16, [X5, MUL VL]

(635) 0x435330 ADD	X11, X11, #160

(635) 0x435334 ADD	X10, X10, #160

(635) 0x435338 ADD	X16, X16, #160

(635) 0x43533c FDIVR	Z8.D, P0/M, Z8.D, Z3.D

(635) 0x435340 ADDVL	X9, SP, #19

(635) 0x435344 FMUL	Z3.D, Z1.D, Z1.D

(635) 0x435348 LDR	Z29, [X25, MUL VL]

(635) 0x43534c ADDVL	X25, SP, #21

(635) 0x435350 FMLA	Z29.D, P0/M, Z31.D, Z1.D

(635) 0x435354 FMLA	Z29.D, P0/M, Z16.D, Z3.D

(635) 0x435358 LDR	Z31, [X11, MUL VL]

(635) 0x43535c FMLA	Z31.D, P0/M, Z2.D, Z1.D

(635) 0x435360 LDR	Z16, [X16, MUL VL]

(635) 0x435364 LDR	Z2, [X10, MUL VL]

(635) 0x435368 ADD	X9, X9, #160

(635) 0x43536c FMLA	Z31.D, P0/M, Z2.D, Z3.D

(635) 0x435370 ADD	X25, X25, #160

(635) 0x435374 ADDVL	X11, SP, #17

(635) 0x435378 LDR	Z2, [X9, MUL VL]

(635) 0x43537c FMLA	Z2.D, P0/M, Z16.D, Z1.D

(635) 0x435380 LDR	Z16, [X25, MUL VL]

(635) 0x435384 FMUL	Z31.D, Z31.D, Z12.D

(635) 0x435388 FMLA	Z2.D, P0/M, Z16.D, Z3.D

(635) 0x43538c ADD	X11, X11, #160

(635) 0x435390 ADDVL	X0, SP, #16

(635) 0x435394 ADDVL	X26, SP, #18

(635) 0x435398 LDR	Z16, [X11, MUL VL]

(635) 0x43539c FMAD	Z29.D, P0/M, Z11.D, Z31.D

(635) 0x4353a0 ADD	X0, X0, #160

(635) 0x4353a4 ADD	X26, X26, #160

(635) 0x4353a8 LDR	Z31, [X0, MUL VL]

(635) 0x4353ac FMLA	Z31.D, P0/M, Z16.D, Z1.D

(635) 0x4353b0 LDR	Z16, [X26, MUL VL]

(635) 0x4353b4 FMLA	Z31.D, P0/M, Z16.D, Z3.D

(635) 0x4353b8 FMUL	Z31.D, Z31.D, Z30.D

(635) 0x4353bc FMAD	Z2.D, P0/M, Z13.D, Z31.D

(635) 0x4353c0 ADDVL	X10, SP, #14

(635) 0x4353c4 FADD	Z29.D, Z2.D, Z29.D

(635) 0x4353c8 ADDVL	X16, SP, #11

(635) 0x4353cc FDUP	Z2.D, #112

(635) 0x4353d0 FMUL	Z8.D, Z8.D, Z14.D

(635) 0x4353d4 FDIVR	Z5.D, P0/M, Z5.D, Z2.D

(635) 0x4353d8 FMUL	Z8.D, Z29.D, Z8.D

(635) 0x4353dc ADD	X10, X10, #160

(635) 0x4353e0 ST1D	{Z8.D}, P2, [X18, Z15.D,LSL #3]

(635) 0x4353e4 ADD	X16, X16, #160

(635) 0x4353e8 FMUL	Z8.D, Z5.D, Z14.D

(635) 0x4353ec ADDVL	X5, SP, #13

(635) 0x4353f0 ADDVL	X9, SP, #10

(635) 0x4353f4 ADDVL	X25, SP, #15

(635) 0x4353f8 ADDVL	X0, SP, #12

(635) 0x4353fc LDR	Z5, [X10, MUL VL]

(635) 0x435400 LDR	Z16, [X16, MUL VL]

(635) 0x435404 ADD	X5, X5, #160

(635) 0x435408 ADD	X9, X9, #160

(635) 0x43540c ADD	X25, X25, #160

(635) 0x435410 ADD	X0, X0, #160

(635) 0x435414 LDR	Z29, [X5, MUL VL]

(635) 0x435418 ADDVL	X26, SP, #20

(635) 0x43541c FMLA	Z29.D, P0/M, Z5.D, Z0.D

(635) 0x435420 LDR	Z31, [X9, MUL VL]

(635) 0x435424 FMLA	Z31.D, P0/M, Z16.D, Z0.D

(635) 0x435428 LDR	Z5, [X25, MUL VL]

(635) 0x43542c LDR	Z16, [X0, MUL VL]

(635) 0x435430 FMUL	Z2.D, Z0.D, Z0.D

(635) 0x435434 ADD	X26, X26, #160

(635) 0x435438 FMLA	Z31.D, P0/M, Z16.D, Z2.D

(635) 0x43543c ADDVL	X11, SP, #19

(635) 0x435440 ADDVL	X5, SP, #21

(635) 0x435444 LDR	Z16, [X26, MUL VL]

(635) 0x435448 FMLA	Z29.D, P0/M, Z5.D, Z2.D

(635) 0x43544c ADD	X11, X11, #160

(635) 0x435450 ADD	X5, X5, #160

(635) 0x435454 ADDVL	X9, SP, #17

(635) 0x435458 LDR	Z5, [X11, MUL VL]

(635) 0x43545c FMLA	Z5.D, P0/M, Z16.D, Z0.D

(635) 0x435460 LDR	Z16, [X5, MUL VL]

(635) 0x435464 FMUL	Z31.D, Z31.D, Z4.D

(635) 0x435468 FMLA	Z5.D, P0/M, Z16.D, Z2.D

(635) 0x43546c ADD	X9, X9, #160

(635) 0x435470 ADDVL	X10, SP, #16

(635) 0x435474 LDR	Z16, [X9, MUL VL]

(635) 0x435478 ADDVL	X16, SP, #18

(635) 0x43547c FMAD	Z29.D, P0/M, Z6.D, Z31.D

(635) 0x435480 ADD	X10, X10, #160

(635) 0x435484 ADD	X16, X16, #160

(635) 0x435488 LDR	Z31, [X10, MUL VL]

(635) 0x43548c FMLA	Z31.D, P0/M, Z16.D, Z0.D

(635) 0x435490 LDR	Z16, [X16, MUL VL]

(635) 0x435494 FMLA	Z31.D, P0/M, Z16.D, Z2.D

(635) 0x435498 FMUL	Z31.D, Z31.D, Z7.D

(635) 0x43549c ADD	X0, SP, #160

(635) 0x4354a0 FMAD	Z5.D, P0/M, Z10.D, Z31.D

(635) 0x4354a4 FADD	Z29.D, Z5.D, Z29.D

(635) 0x4354a8 FMUL	Z8.D, Z29.D, Z8.D

(635) 0x4354ac ST1D	{Z8.D}, P1, [X18, Z9.D,LSL #3]

(635) 0x4354b0 LDR	Z31, [X0, #4, MUL VL]

(635) 0x4354b4 LDR	Z5, [X0, #3, MUL VL]

(635) 0x4354b8 ADDVL	X25, SP, #23

(635) 0x4354bc FMLA	Z5.D, P0/M, Z31.D, Z1.D

(635) 0x4354c0 ADDVL	X11, SP, #9

(635) 0x4354c4 LDR	Z31, [X0, #5, MUL VL]

(635) 0x4354c8 FMUL	Z29.D, Z3.D, Z1.D

(635) 0x4354cc ADD	X26, SP, #160

(635) 0x4354d0 ADD	X25, X25, #160

(635) 0x4354d4 LDR	Z16, [X25, MUL VL]

(635) 0x4354d8 INCB	X0, ALL, MUL #8

(635) 0x4354dc FMUL	Z8.D, Z16.D, Z3.D

(635) 0x4354e0 ADD	X11, X11, #160

(635) 0x4354e4 FMLA	Z8.D, P0/M, Z31.D, Z29.D

(635) 0x4354e8 FADD	Z8.D, Z5.D, Z8.D

(635) 0x4354ec FMUL	Z8.D, Z8.D, Z30.D

(635) 0x4354f0 LDR	Z30, [X26, #7, MUL VL]

(635) 0x4354f4 LDR	Z5, [X11, MUL VL]

(635) 0x4354f8 LDR	Z31, [X0, MUL VL]

(635) 0x4354fc FMUL	Z31.D, Z31.D, Z3.D

(635) 0x435500 FMLA	Z31.D, P0/M, Z5.D, Z29.D

(635) 0x435504 ADD	X10, SP, #160

(635) 0x435508 LDR	Z5, [X26, #6, MUL VL]

(635) 0x43550c ADDVL	X5, X26, #22

(635) 0x435510 FMLA	Z5.D, P0/M, Z30.D, Z1.D

(635) 0x435514 FMUL	Z30.D, Z19.D, Z3.D

(635) 0x435518 FADD	Z5.D, Z5.D, Z31.D

(635) 0x43551c FMLA	Z30.D, P0/M, Z20.D, Z29.D

(635) 0x435520 LDR	Z31, [X10, #2, MUL VL]

(635) 0x435524 FMAD	Z5.D, P0/M, Z13.D, Z8.D

(635) 0x435528 MOVPRFX	Z8, Z17

(635) 0x43552c FMLA	Z8.D, P0/M, Z1.D, Z18.D

(635) 0x435530 FADD	Z8.D, Z8.D, Z30.D

(635) 0x435534 LDR	Z13, [X5, MUL VL]

(635) 0x435538 FMUL	Z3.D, Z13.D, Z3.D

(635) 0x43553c FMAD	Z29.D, P0/M, Z31.D, Z3.D

(635) 0x435540 FMUL	Z12.D, Z8.D, Z12.D

(635) 0x435544 LDR	Z3, [X10, #1, MUL VL]

(635) 0x435548 ADDVL	X9, SP, #9

(635) 0x43554c LDR	Z30, [X10, MUL VL]

(635) 0x435550 FMAD	Z1.D, P0/M, Z3.D, Z30.D

(635) 0x435554 FADD	Z1.D, Z1.D, Z29.D

(635) 0x435558 FMUL	Z29.D, Z16.D, Z2.D

(635) 0x43555c FMAD	Z1.D, P0/M, Z11.D, Z12.D

(635) 0x435560 FADD	Z11.D, Z5.D, Z1.D

(635) 0x435564 ST1D	{Z11.D}, P2, [X30, Z15.D,LSL #3]

(635) 0x435568 FMUL	Z15.D, Z2.D, Z0.D

(635) 0x43556c LDR	Z5, [X10, #4, MUL VL]

(635) 0x435570 LDR	Z31, [X10, #5, MUL VL]

(635) 0x435574 LDR	Z16, [X10, #3, MUL VL]

(635) 0x435578 FMLA	Z29.D, P0/M, Z31.D, Z15.D

(635) 0x43557c FMLA	Z16.D, P0/M, Z5.D, Z0.D

(635) 0x435580 INCB	X10, ALL, MUL #8

(635) 0x435584 LDR	Z8, [X10, MUL VL]

(635) 0x435588 ADD	X16, SP, #160

(635) 0x43558c FMUL	Z3.D, Z8.D, Z2.D

(635) 0x435590 FADD	Z30.D, Z16.D, Z29.D

(635) 0x435594 LDR	Z11, [X16, #7, MUL VL]

(635) 0x435598 FMUL	Z1.D, Z30.D, Z7.D

(635) 0x43559c FMUL	Z29.D, Z19.D, Z2.D

(635) 0x4355a0 LDR	Z7, [X16, #6, MUL VL]

(635) 0x4355a4 FMLA	Z29.D, P0/M, Z20.D, Z15.D

(635) 0x4355a8 FMLA	Z7.D, P0/M, Z11.D, Z0.D

(635) 0x4355ac LDR	Z31, [X16, #1, MUL VL]

(635) 0x4355b0 ADD	X9, X9, #160

(635) 0x4355b4 LDR	Z8, [X16, MUL VL]

(635) 0x4355b8 LDR	Z12, [X9, MUL VL]

(635) 0x4355bc FMLA	Z3.D, P0/M, Z12.D, Z15.D

(635) 0x4355c0 FADD	Z16.D, Z7.D, Z3.D

(635) 0x4355c4 FMAD	Z16.D, P0/M, Z10.D, Z1.D

(635) 0x4355c8 FMUL	Z10.D, Z13.D, Z2.D

(635) 0x4355cc MOVPRFX	Z2, Z17

(635) 0x4355d0 FMLA	Z2.D, P0/M, Z0.D, Z18.D

(635) 0x4355d4 LDR	Z13, [X16, #2, MUL VL]

(635) 0x4355d8 FADD	Z5.D, Z29.D, Z2.D

(635) 0x4355dc FMAD	Z15.D, P0/M, Z13.D, Z10.D

(635) 0x4355e0 FMAD	Z0.D, P0/M, Z31.D, Z8.D

(635) 0x4355e4 FMUL	Z4.D, Z4.D, Z5.D

(635) 0x4355e8 FADD	Z0.D, Z0.D, Z15.D

(635) 0x4355ec FMAD	Z0.D, P0/M, Z6.D, Z4.D

(635) 0x4355f0 FADD	Z6.D, Z0.D, Z16.D

(635) 0x4355f4 ST1D	{Z6.D}, P1, [X30, Z9.D,LSL #3]

(635) 0x4355f8 ADD	X1, X1, X4

(635) 0x4355fc WHILELO	P3.S, W1, W8

(635) 0x435600 B.NE	4351c8

(636) 0x435604 CMP	X15, X2

(636) 0x435608 B.NE	434d20

(636) 0x43560c LDP	D8, D9, [SP, #96]

(636) 0x435610 LDP	D10, D11, [SP, #112]

(636) 0x435614 LDP	D12, D13, [SP, #128]

(636) 0x435618 LDP	D14, D15, [SP, #144]

(636) 0x43561c LDP	X29, X30, [SP]

(636) 0x435620 LDP	X19, X20, [SP, #16]

(636) 0x435624 LDP	X21, X22, [SP, #32]

(636) 0x435628 LDP	X23, X24, [SP, #48]

(636) 0x43562c LDP	X25, X26, [SP, #64]

(636) 0x435630 ADDVL	SP, SP, #25

(636) 0x435634 ADD	SP, SP, #160

(636) 0x435638 RET

(636) 0x43563c CMP	W19, W17

(636) 0x435640 B.EQ	434da8

(636) 0x435644 MOVZ	X26, #0

(636) 0x435648 MOVZ	W8, #1

(636) 0x43564c STR	WZR, [X13, X26]

(636) 0x435650 STR	D1, [X12, X26]

(636) 0x435654 B	434da8

0x435658 HINT	#0

0x43565c HINT	#0

Coverage (%)	Name	Source Location	Module
►50.00+	miniqmcreference::TwoBodyJastr[...]	stl_iterator.h:1007	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:207	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec
►50.00+	miniqmcreference::TwoBodyJastr[...]	stl_iterator.h:1007	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:207	exec
○	main._omp_fn.1	stl_vector.h:1043	exec
○	GOMP_parallel		libomp.so
○	main	miniqmc.cpp:402	exec
○	__libc_start_main		libc-2.31.so
○	_start	miniqmc.cpp:546	exec

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	TwoBodyJastrowRef.h:251-276
Module	exec

The function is defined in:

/usr/include/c++/11/bits/stl_algobase.h:924,1115-1120
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:229
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:276-284,291-298,305-336
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:251,259,265-268,276
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:302-305
/usr/include/c++/11/bits/stl_vector.h:1061

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 35.50 to 32.50 cycles (1.09x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 48% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 35.50 to 21.75 cycles (1.63x speedup).

Details

34% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
10% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 35.50 to 1.50 cycles (23.67x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 360 bytes. The binary function is storing 952 bytes.

General properties

nb instructions	164
loop length	656
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

20.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.00	3.00	17.50	17.25	24.00	17.25	7.75	7.75	7.75	7.75	35.50	35.50	10.00	3.00	3.00
cycles	3.00	3.00	17.50	17.25	24.00	17.25	7.75	7.75	7.75	7.75	35.50	35.50	10.00	3.00	3.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	20.25
Overall L1	35.50

Vectorization ratios

all	34%
load	0%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 35.50 cycles. At this rate:

10% of peak load performance is reached (10.14 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
55% of peak store performance is reached (26.82 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 434c20

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
CNTB X12, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MOVZ X13, #25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X11, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X8, X12, X13, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X9, X8, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB SP, SP, X9,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR W19, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W20, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X21, XZR, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X22, XZR, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X23, XZR, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X24, XZR, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X25, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X26, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS WZR, W7, #448	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 434c94 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9computeU3ERKNS1_11ParticleSetEiPKdPdSA_SA_b+0x74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W20, [X0, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W20, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 434cd8 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9computeU3ERKNS1_11ParticleSetEiPKdPdSA_SA_b+0xb8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SBFM X27, X20, #61, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X2, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X2, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X2, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X0, [X26, #1472]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X15, [X25, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDRSW X1, [X0, X19,SXTW #2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD W5, W1, W15, WZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
CBZ X15, 43561c <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9computeU3ERKNS1_11ParticleSetEiPKdPdSA_SA_b+0x9fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X12, [X25, #464]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ X2, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CNTW X4, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
PTRUE P0.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X6, [X25, #512]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X14, X6, W5,SXTW #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X13, [X25, #488]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADDVL X3, X12, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X6, [X26, #2712]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADDVL X11, SP, #21	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADDVL X26, SP, #20	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LD1RD {Z18.D}, P0/Z, [X7, #20]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X11, X11, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X5, SP, #19	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z18, [X11, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X10, SP, #18	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X26, X26, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z19.D}, P0/Z, [X7, #21]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X5, X5, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X10, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z20.D}, P0/Z, [X7, #22]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADDVL X11, SP, #13	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LD1RD {Z30.D}, P0/Z, [X7, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADDVL X9, SP, #17	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X11, X11, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X16, SP, #16	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z19, [X26, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X25, SP, #15	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADDVL X0, SP, #14	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z20, [X5, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X26, SP, #12	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADDVL X5, SP, #11	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z30, [X10, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X10, SP, #10	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LD1RD {Z31.D}, P0/Z, [X7, #25]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z0.D}, P0/Z, [X7, #28]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z1.D}, P0/Z, [X7, #29]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z2.D}, P0/Z, [X7, #30]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z3.D}, P0/Z, [X7, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z4.D}, P0/Z, [X7, #33]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z5.D}, P0/Z, [X7, #34]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X9, X9, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X16, X16, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X25, X25, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z29.D, Z16.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ADD X0, X0, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z16.D}, P0/Z, [X7, #26]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X26, X26, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, X5, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X10, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z28.D}, P0/Z, [X7, #37]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z27.D}, P0/Z, [X7, #38]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z26.D}, P0/Z, [X7, #41]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z25.D}, P0/Z, [X7, #42]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z24.D}, P0/Z, [X7, #45]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z23.D}, P0/Z, [X7, #46]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z22.D}, P0/Z, [X7, #49]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z21.D}, P0/Z, [X7, #50]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z31, [X9, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z16, [X16, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z0, [X25, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z1, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z2, [X11, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X11, SP, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z3, [X26, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z4, [X5, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z5, [X10, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z6.D}, P0/Z, [X7, #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z17.D}, P0/Z, [X7, #12]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z18.D}, P0/Z, [X7, #13]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z19.D}, P0/Z, [X7, #14]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X10, SP, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z7.D}, P0/Z, [X7, #4]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z8.D}, P0/Z, [X7, #5]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z9.D}, P0/Z, [X7, #6]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z10.D}, P0/Z, [X7, #7]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z11.D}, P0/Z, [X7, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z12.D}, P0/Z, [X7, #9]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z13.D}, P0/Z, [X7, #10]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z15.D}, P0/Z, [X7, #11]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADDVL X26, X11, #22	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X5, SP, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z20.D}, P0/Z, [X7, #15]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z18, [X5, #1, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z18.D}, P0/Z, [X7, #17]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z17, [X26, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z17.D}, P0/Z, [X7, #18]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z19, [X10, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z19.D}, P0/Z, [X7, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LDR X7, [X7, #536]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X17, X24, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X18, X23, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z14.D, Z14.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ADDVL X9, SP, #9	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X30, X22, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z12, [X11, #4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X25, SP, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z13, [X11, #3, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X9, X9, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X16, SP, #8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z6, [X9, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X16, X16, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X0, X25, #23	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z8, [X25, #7, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X9, X10, #24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z9, [X25, #6, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z10, [X25, #5, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z15, [X11, #2, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
WHILELO P3.S, WZR, W8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
STR Z7, [X16, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z11, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z29, [X9, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
HINT #0
HINT #0

Source file and lines	TwoBodyJastrowRef.h:251-276
Module	exec

The function is defined in:

/usr/include/c++/11/bits/stl_algobase.h:924,1115-1120
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:229
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:276-284,291-298,305-336
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:251,259,265-268,276
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:302-305
/usr/include/c++/11/bits/stl_vector.h:1061

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

34% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
10% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 35.50 to 1.50 cycles (23.67x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 360 bytes. The binary function is storing 952 bytes.

General properties

nb instructions	164
loop length	656
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

20.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.00	3.00	17.50	17.25	24.00	17.25	7.75	7.75	7.75	7.75	35.50	35.50	10.00	3.00	3.00
cycles	3.00	3.00	17.50	17.25	24.00	17.25	7.75	7.75	7.75	7.75	35.50	35.50	10.00	3.00	3.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	20.25
Overall L1	35.50

Vectorization ratios

all	34%
load	0%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 35.50 cycles. At this rate:

10% of peak load performance is reached (10.14 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
55% of peak store performance is reached (26.82 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 434c20

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
CNTB X12, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MOVZ X13, #25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X11, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X8, X12, X13, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X9, X8, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB SP, SP, X9,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR W19, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W20, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X21, XZR, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X22, XZR, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X23, XZR, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X24, XZR, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X25, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X26, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS WZR, W7, #448	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 434c94 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9computeU3ERKNS1_11ParticleSetEiPKdPdSA_SA_b+0x74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W20, [X0, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W20, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 434cd8 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9computeU3ERKNS1_11ParticleSetEiPKdPdSA_SA_b+0xb8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SBFM X27, X20, #61, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X2, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X2, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X2, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403890 <@plt_start@+0x210>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X0, [X26, #1472]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X15, [X25, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDRSW X1, [X0, X19,SXTW #2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD W5, W1, W15, WZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
CBZ X15, 43561c <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE9computeU3ERKNS1_11ParticleSetEiPKdPdSA_SA_b+0x9fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X12, [X25, #464]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ X2, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CNTW X4, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
PTRUE P0.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X6, [X25, #512]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X14, X6, W5,SXTW #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X13, [X25, #488]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADDVL X3, X12, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X6, [X26, #2712]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADDVL X11, SP, #21	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADDVL X26, SP, #20	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LD1RD {Z18.D}, P0/Z, [X7, #20]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X11, X11, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X5, SP, #19	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z18, [X11, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X10, SP, #18	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X26, X26, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z19.D}, P0/Z, [X7, #21]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X5, X5, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X10, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z20.D}, P0/Z, [X7, #22]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADDVL X11, SP, #13	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LD1RD {Z30.D}, P0/Z, [X7, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADDVL X9, SP, #17	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X11, X11, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X16, SP, #16	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z19, [X26, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X25, SP, #15	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADDVL X0, SP, #14	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z20, [X5, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X26, SP, #12	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADDVL X5, SP, #11	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z30, [X10, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X10, SP, #10	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LD1RD {Z31.D}, P0/Z, [X7, #25]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z0.D}, P0/Z, [X7, #28]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z1.D}, P0/Z, [X7, #29]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z2.D}, P0/Z, [X7, #30]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z3.D}, P0/Z, [X7, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z4.D}, P0/Z, [X7, #33]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z5.D}, P0/Z, [X7, #34]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X9, X9, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X16, X16, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X25, X25, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z29.D, Z16.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ADD X0, X0, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z16.D}, P0/Z, [X7, #26]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X26, X26, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, X5, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X10, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z28.D}, P0/Z, [X7, #37]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z27.D}, P0/Z, [X7, #38]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z26.D}, P0/Z, [X7, #41]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z25.D}, P0/Z, [X7, #42]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z24.D}, P0/Z, [X7, #45]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z23.D}, P0/Z, [X7, #46]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z22.D}, P0/Z, [X7, #49]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z21.D}, P0/Z, [X7, #50]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z31, [X9, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z16, [X16, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z0, [X25, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z1, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z2, [X11, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X11, SP, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z3, [X26, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z4, [X5, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z5, [X10, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z6.D}, P0/Z, [X7, #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z17.D}, P0/Z, [X7, #12]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z18.D}, P0/Z, [X7, #13]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z19.D}, P0/Z, [X7, #14]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADD X10, SP, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z7.D}, P0/Z, [X7, #4]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z8.D}, P0/Z, [X7, #5]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z9.D}, P0/Z, [X7, #6]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z10.D}, P0/Z, [X7, #7]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z11.D}, P0/Z, [X7, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z12.D}, P0/Z, [X7, #9]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z13.D}, P0/Z, [X7, #10]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LD1RD {Z15.D}, P0/Z, [X7, #11]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADDVL X26, X11, #22	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X5, SP, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1RD {Z20.D}, P0/Z, [X7, #15]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z18, [X5, #1, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z18.D}, P0/Z, [X7, #17]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z17, [X26, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z17.D}, P0/Z, [X7, #18]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
STR Z19, [X10, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LD1RD {Z19.D}, P0/Z, [X7, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
LDR X7, [X7, #536]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X17, X24, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X18, X23, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z14.D, Z14.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ADDVL X9, SP, #9	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X30, X22, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z12, [X11, #4, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X25, SP, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR Z13, [X11, #3, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X9, X9, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X16, SP, #8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z6, [X9, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X16, X16, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADDVL X0, X25, #23	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z8, [X25, #7, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADDVL X9, X10, #24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR Z9, [X25, #6, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z10, [X25, #5, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z15, [X11, #2, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
WHILELO P3.S, WZR, W8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
STR Z7, [X16, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z11, [X0, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
STR Z29, [X9, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼miniqmcreference::TwoBodyJastrowRef >::computeU3(qmcplusplus::ParticleSet const&, int, double const, double, double, double, bool)–	1.2	0.01
○Loop 635 - BsplineFunctor.h:305-336 - exec	0	0
▼Loop 636 - TwoBodyJastrowRef.h:266-276 - exec–	0	0
○Loop 637 - BsplineFunctor.h:291-297 - exec	1.2	0.01
○Loop 638 - TwoBodyJastrowRef.h:251-251 - exec	0	0

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code