OV - exec - Function qmcplusplus::BsplineFunctor<double>::evaluateV(int, int, int, double const*, double*) const

	Function: qmcplusplus::BsplineFunctor<double>::evaluateV(int, int, int, double const, double) cons ...	Module: exec	Source: BsplineFunctor.h:228-262	Coverage: 4.07%

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 228 - 262

--------------------------------------------------------------------------------

228: {

229:   const real_type* restrict distArray = _distArray + iStart;

230:

231:   ASSUME_ALIGNED(distArrayCompressed);

232:   int iCount       = 0;

233:   const int iLimit = iEnd - iStart;

234:

235: #pragma vector always

236:   for (int jat = 0; jat < iLimit; jat++)

237:   {

238:     real_type r = distArray[jat];

239:     // pick the distances smaller than the cutoff and avoid the reference atom

240:     if (r < cutoff_radius && iStart + jat != iat)

241:       distArrayCompressed[iCount++] = distArray[jat];

242:   }

243:

244:   real_type d = 0.0;

245:   //#pragma omp simd reduction(+:d)

246:   for (int jat = 0; jat < iCount; jat++)

247:   {

248:     real_type r = distArrayCompressed[jat];

249:     r *= DeltaRInv;

250:     int i         = (int)r;

251:     real_type t   = r - real_type(i);

252:     real_type tp0 = t * t * t;

253:     real_type tp1 = t * t;

254:     real_type tp2 = t;

255:

256:     real_type d1 = SplineCoefs[i + 0] * (A[0] * tp0 + A[1] * tp1 + A[2] * tp2 + A[3]);

257:     real_type d2 = SplineCoefs[i + 1] * (A[4] * tp0 + A[5] * tp1 + A[6] * tp2 + A[7]);

258:     real_type d3 = SplineCoefs[i + 2] * (A[8] * tp0 + A[9] * tp1 + A[10] * tp2 + A[11]);

259:     real_type d4 = SplineCoefs[i + 3] * (A[12] * tp0 + A[13] * tp1 + A[14] * tp2 + A[15]);

260:     d += (d1 + d2 + d3 + d4);

261:   }

262:   return d;

0x417020 SUB	SP, SP, #176

0x417024 STP	D15, D14, [SP, #112]

0x417028 STP	D13, D12, [SP, #128]

0x41702c STP	D11, D10, [SP, #144]

0x417030 STP	D9, D8, [SP, #160]

0x417034 SUB	W9, W3, W2

0x417038 MOVI	D0, #0

0x41703c CMP	W9, #1

0x417040 B.LT	4172c4

0x417044 LDR	D1, [X0, #8]

0x417048 ORR	W8, WZR, WZR

0x41704c ADD	X10, X4, W2,SXTW #3

0x417050 SUB	W11, W1, W2

0x417054 B	417070

0x417058 HINT	#0

0x41705c HINT	#0

(324) 0x417060 SUB	W11, W11, #1

(324) 0x417064 ADD	X10, X10, #8

(324) 0x417068 SUBS	X9, X9, #1

(324) 0x41706c B.EQ	41708c

(324) 0x417070 LDR	D2, [X10]

(324) 0x417074 FCMP	D2, D1

(324) 0x417078 CCMP	W11, #0, #4, #11

(324) 0x41707c B.EQ	417060

(324) 0x417080 STR	D2, [X5, X8,SXTW #3]

(324) 0x417084 ADD	W8, W8, #1

(324) 0x417088 B	417060

0x41708c CMP	W8, #1

0x417090 B.LT	4172c4

0x417094 LDR	D19, [X0, #568]

0x417098 LDP	D20, D21, [X0, #24]

0x41709c LDP	D28, D29, [X0, #40]

0x4170a0 ORR	W9, WZR, W8

0x4170a4 CNTD	X11, ALL

0x4170a8 CMP	X11, X9

0x4170ac LDP	D30, D31, [X0, #56]

0x4170b0 LDP	D8, D9, [X0, #72]

0x4170b4 LDP	D10, D11, [X0, #88]

0x4170b8 LDP	D12, D13, [X0, #104]

0x4170bc LDP	D22, D23, [X0, #120]

0x4170c0 LDP	D24, D25, [X0, #136]

0x4170c4 LDR	X8, [X0, #536]

0x4170c8 B.LS	4170d8

0x4170cc ORR	X10, XZR, XZR

0x4170d0 MOVI	D0, #0

0x4170d4 B	417224

0x4170d8 UDIV	X10, X9, X11

0x4170dc ORR	X13, XZR, XZR

0x4170e0 DUP	Z0.D, Z19.D[0]

0x4170e4 DUP	Z26.D, Z20.D[0]

0x4170e8 STP	D28, D21, [SP, #80]

0x4170ec DUP	Z27.D, Z21.D[0]

0x4170f0 DUP	Z28.D, Z28.D[0]

0x4170f4 STP	D30, D29, [SP, #64]

0x4170f8 DUP	Z29.D, Z29.D[0]

0x4170fc DUP	Z30.D, Z30.D[0]

0x417100 STP	D8, D31, [SP, #48]

0x417104 DUP	Z31.D, Z31.D[0]

0x417108 DUP	Z8.D, Z8.D[0]

0x41710c STP	D10, D9, [SP, #32]

0x417110 DUP	Z9.D, Z9.D[0]

0x417114 DUP	Z10.D, Z10.D[0]

0x417118 STP	D12, D11, [SP, #16]

0x41711c DUP	Z11.D, Z11.D[0]

0x417120 DUP	Z12.D, Z12.D[0]

0x417124 STR	D13, [SP, #8]

0x417128 DUP	Z13.D, Z13.D[0]

0x41712c DUP	Z14.D, Z22.D[0]

0x417130 DUP	Z15.D, Z23.D[0]

0x417134 DUP	Z1.D, Z24.D[0]

0x417138 DUP	Z2.D, Z25.D[0]

0x41713c DUP	Z3.D, #0

0x417140 PTRUE	P0.D, ALL

0x417144 STP	D20, D19, [SP, #96]

0x417148 UMSUBL	X12, W10, W11, X9

0x41714c UMADDL	X10, W10, W11, XZR

0x417150 HINT	#0

0x417154 HINT	#0

0x417158 HINT	#0

0x41715c HINT	#0

(322) 0x417160 LD1D	{Z4.D}, P0/Z, [X5, X13,LSL #3]

(322) 0x417164 ADD	X13, X13, X11

(322) 0x417168 CMP	X10, X13

(322) 0x41716c FMUL	Z4.D, Z0.D, Z4.D

(322) 0x417170 MOVPRFX	Z5, Z4

(322) 0x417174 FCVTZS	Z5.D, P0/M, Z4.D

(322) 0x417178 MOVPRFX	Z6, Z5

(322) 0x41717c SCVTF	Z6.D, P0/M, Z5.D

(322) 0x417180 LD1D	{Z16.D}, P0/Z, [X8, Z5.D,LSL #3]

(322) 0x417184 MOVPRFX	Z18, Z5

(322) 0x417188 ADD	Z18.D, Z18.D, #1

(322) 0x41718c LD1D	{Z18.D}, P0/Z, [X8, Z18.D,SXTW #3]

(322) 0x417190 MOVPRFX	Z20, Z5

(322) 0x417194 ADD	Z20.D, Z20.D, #2

(322) 0x417198 LD1D	{Z20.D}, P0/Z, [X8, Z20.D,SXTW #3]

(322) 0x41719c ADD	Z5.D, Z5.D, #3

(322) 0x4171a0 LD1D	{Z5.D}, P0/Z, [X8, Z5.D,SXTW #3]

(322) 0x4171a4 FSUB	Z4.D, Z4.D, Z6.D

(322) 0x4171a8 FMUL	Z6.D, Z4.D, Z4.D

(322) 0x4171ac MOVPRFX	Z17, Z29

(322) 0x4171b0 FMLA	Z17.D, P0/M, Z6.D, Z27.D

(322) 0x4171b4 FMLA	Z17.D, P0/M, Z28.D, Z4.D

(322) 0x4171b8 FMUL	Z7.D, Z6.D, Z4.D

(322) 0x4171bc MOVPRFX	Z19, Z9

(322) 0x4171c0 FMLA	Z19.D, P0/M, Z30.D, Z7.D

(322) 0x4171c4 FMLA	Z19.D, P0/M, Z31.D, Z6.D

(322) 0x4171c8 MOVPRFX	Z21, Z13

(322) 0x4171cc FMLA	Z21.D, P0/M, Z10.D, Z7.D

(322) 0x4171d0 FMLA	Z21.D, P0/M, Z11.D, Z6.D

(322) 0x4171d4 FMLA	Z17.D, P0/M, Z7.D, Z26.D

(322) 0x4171d8 FMAD	Z7.D, P0/M, Z14.D, Z2.D

(322) 0x4171dc FMLA	Z19.D, P0/M, Z8.D, Z4.D

(322) 0x4171e0 FMLA	Z21.D, P0/M, Z12.D, Z4.D

(322) 0x4171e4 FMLA	Z3.D, P0/M, Z17.D, Z16.D

(322) 0x4171e8 FMAD	Z6.D, P0/M, Z15.D, Z7.D

(322) 0x4171ec FMLA	Z3.D, P0/M, Z19.D, Z18.D

(322) 0x4171f0 FMAD	Z4.D, P0/M, Z1.D, Z6.D

(322) 0x4171f4 FMLA	Z3.D, P0/M, Z21.D, Z20.D

(322) 0x4171f8 FMLA	Z3.D, P0/M, Z4.D, Z5.D

(322) 0x4171fc B.NE	417160

0x417200 LDP	D20, D19, [SP, #96]

0x417204 LDP	D28, D21, [SP, #80]

0x417208 LDP	D30, D29, [SP, #64]

0x41720c FADDV	D0, P0, Z3.D

0x417210 LDP	D8, D31, [SP, #48]

0x417214 LDR	D13, [SP, #8]

0x417218 LDP	D10, D9, [SP, #32]

0x41721c LDP	D12, D11, [SP, #16]

0x417220 CBZ	X12, 4172c4

0x417224 ADD	X14, X5, X10,LSL #3

0x417228 SUB	X9, X9, X10

0x41722c ADD	X11, X8, #8

0x417230 ADD	X12, X8, #16

0x417234 ADD	X13, X8, #24

0x417238 HINT	#0

0x41723c HINT	#0

(323) 0x417240 LDR	D1, [X14], #8

(323) 0x417244 SUBS	X9, X9, #1

(323) 0x417248 FMUL	D1, D19, D1

(323) 0x41724c FRINTZ	D2, D1

(323) 0x417250 FCVTZS	W10, D1

(323) 0x417254 FSUB	D1, D1, S2

(323) 0x417258 LDR	D4, [X8, X10,SXTW #3]

(323) 0x41725c LDR	D6, [X11, X10,SXTW #3]

(323) 0x417260 LDR	D16, [X12, X10,SXTW #3]

(323) 0x417264 LDR	D18, [X13, X10,SXTW #3]

(323) 0x417268 FMUL	D2, D1, D1

(323) 0x41726c FMUL	D5, D28, D1

(323) 0x417270 FMADD	D5, D2, D21, D5

(323) 0x417274 FMUL	D3, D2, D1

(323) 0x417278 FMUL	D7, D31, D2

(323) 0x41727c FMUL	D17, D11, D2

(323) 0x417280 FMUL	D2, D23, D2

(323) 0x417284 FMADD	D7, D30, D3, D7

(323) 0x417288 FMADD	D17, D10, D3, D17

(323) 0x41728c FMADD	D2, D22, D3, D2

(323) 0x417290 FADD	D5, D5, D29

(323) 0x417294 FMADD	D5, D3, D20, D5

(323) 0x417298 FMADD	D7, D8, D1, D7

(323) 0x41729c FMADD	D17, D12, D1, D17

(323) 0x4172a0 FMADD	D1, D24, D1, D2

(323) 0x4172a4 FMADD	D0, D5, D4, D0

(323) 0x4172a8 FADD	D7, D7, D9

(323) 0x4172ac FADD	D17, D17, D13

(323) 0x4172b0 FADD	D1, D1, D25

(323) 0x4172b4 FMADD	D0, D7, D6, D0

(323) 0x4172b8 FMADD	D0, D17, D16, D0

(323) 0x4172bc FMADD	D0, D1, D18, D0

(323) 0x4172c0 B.NE	417240

0x4172c4 LDP	D9, D8, [SP, #160]

0x4172c8 LDP	D11, D10, [SP, #144]

0x4172cc LDP	D13, D12, [SP, #128]

0x4172d0 LDP	D15, D14, [SP, #112]

0x4172d4 ADD	SP, SP, #176

0x4172d8 RET

0x4172dc HINT	#0

Coverage (%)	Name	Source Location	Module
►100.00+	qmcplusplus::WaveFunction::rat[...]	NewTimer.h:249	exec
○	.omp_outlined..62	miniqmc.cpp:485	exec
○	__kmp_invoke_microtask		libomp.so

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	BsplineFunctor.h:228-262
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:228-262.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is partially vectorized. Only 52% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 15.00 to 11.64 cycles (1.29x speedup).

Details

63% of VPU instructions are used in vector version (process two or more data elements in vector registers):

85% of VPU loads are used in vector version.
90% of VPU stores are used in vector version.
11% of VPU addition or subtraction instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
0% of VPU divide and square root instructions are used in vector version.
58% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your function (in the source code) and the binary function

The binary function is composed of 4 FP arithmetical operations:

4: addition or subtraction

The binary function is loading 320 bytes. The binary function is storing 168 bytes.

Arithmetic intensity

Arithmetic intensity is 0.01 FP operations per loaded or stored byte.

General properties

nb instructions	92
loop length	368
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

10.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	5.50	5.50	5.50	5.50	15.00	15.00	1.50	1.50	11.17	10.83	11.00	0.00	0.00
cycles	3.50	3.50	5.50	5.50	5.50	5.50	15.00	15.00	1.50	1.50	11.17	10.83	11.00	0.00	0.00

Cycles executing div or sqrt instructions

1.00-0.50

Cycles summary

Front-end	10.38
Overall L1	15.00

Vectorization ratios

INT

all	62%
load	85%
store	90%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
other	56%

all	100%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	63%
load	85%
store	90%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	11%
fma	0%
div/sqrt	0%
other	58%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 15.00 cycles. At this rate:

22% of peak load performance is reached (21.33 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.20 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 417020

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #176	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D15, D14, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D13, D12, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D11, D10, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D9, D8, [SP, #160]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
SUB W9, W3, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVI D0, #0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
CMP W9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LT 4172c4 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x2a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D1, [X0, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ORR W8, WZR, WZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X4, W2,SXTW #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
SUB W11, W1, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 417070 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
CMP W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LT 4172c4 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x2a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D19, [X0, #568]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D20, D21, [X0, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D28, D29, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ORR W9, WZR, W8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CNTD X11, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
CMP X11, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
LDP D30, D31, [X0, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D8, D9, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D10, D11, [X0, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D12, D13, [X0, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D22, D23, [X0, #120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D24, D25, [X0, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR X8, [X0, #536]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B.LS 4170d8 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0xb8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X10, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVI D0, #0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 417224 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x204>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UDIV X10, X9, X11	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-20	1-0.50
ORR X13, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z0.D, Z19.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z26.D, Z20.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STP D28, D21, [SP, #80]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
DUP Z27.D, Z21.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z28.D, Z28.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STP D30, D29, [SP, #64]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
DUP Z29.D, Z29.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z30.D, Z30.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STP D8, D31, [SP, #48]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
DUP Z31.D, Z31.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z8.D, Z8.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STP D10, D9, [SP, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
DUP Z9.D, Z9.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z10.D, Z10.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STP D12, D11, [SP, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
DUP Z11.D, Z11.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z12.D, Z12.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STR D13, [SP, #8]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
DUP Z13.D, Z13.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z14.D, Z22.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z15.D, Z23.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z1.D, Z24.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z2.D, Z25.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z3.D, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
PTRUE P0.D, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP D20, D19, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
UMSUBL X12, W10, W11, X9	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
UMADDL X10, W10, W11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
HINT #0
HINT #0
HINT #0
HINT #0
LDP D20, D19, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D28, D21, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D30, D29, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FADDV D0, P0, Z3.D	1	0	0	0	0	0	0	0.75	0.75	0.25	0.25	0	0	0	0	0	9	2
LDP D8, D31, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D13, [SP, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D10, D9, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D12, D11, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
CBZ X12, 4172c4 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x2a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X14, X5, X10,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X9, X9, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X11, X8, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X12, X8, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X13, X8, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
HINT #0
HINT #0
LDP D9, D8, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D11, D10, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D13, D12, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D15, D14, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ADD SP, SP, #176	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0

Source file and lines	BsplineFunctor.h:228-262
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:228-262.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

63% of VPU instructions are used in vector version (process two or more data elements in vector registers):

85% of VPU loads are used in vector version.
90% of VPU stores are used in vector version.
11% of VPU addition or subtraction instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
0% of VPU divide and square root instructions are used in vector version.
58% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your function (in the source code) and the binary function

The binary function is composed of 4 FP arithmetical operations:

4: addition or subtraction

The binary function is loading 320 bytes. The binary function is storing 168 bytes.

Arithmetic intensity

Arithmetic intensity is 0.01 FP operations per loaded or stored byte.

General properties

nb instructions	92
loop length	368
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

10.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	5.50	5.50	5.50	5.50	15.00	15.00	1.50	1.50	11.17	10.83	11.00	0.00	0.00
cycles	3.50	3.50	5.50	5.50	5.50	5.50	15.00	15.00	1.50	1.50	11.17	10.83	11.00	0.00	0.00

Cycles executing div or sqrt instructions

1.00-0.50

Cycles summary

Front-end	10.38
Overall L1	15.00

Vectorization ratios

INT

all	62%
load	85%
store	90%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
other	56%

all	100%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	63%
load	85%
store	90%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	11%
fma	0%
div/sqrt	0%
other	58%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 15.00 cycles. At this rate:

22% of peak load performance is reached (21.33 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.20 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 417020

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #176	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D15, D14, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D13, D12, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D11, D10, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D9, D8, [SP, #160]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
SUB W9, W3, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVI D0, #0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
CMP W9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LT 4172c4 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x2a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D1, [X0, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ORR W8, WZR, WZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X4, W2,SXTW #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
SUB W11, W1, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 417070 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
CMP W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LT 4172c4 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x2a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D19, [X0, #568]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D20, D21, [X0, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D28, D29, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ORR W9, WZR, W8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CNTD X11, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
CMP X11, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
LDP D30, D31, [X0, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D8, D9, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D10, D11, [X0, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D12, D13, [X0, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D22, D23, [X0, #120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D24, D25, [X0, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR X8, [X0, #536]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B.LS 4170d8 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0xb8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X10, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVI D0, #0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 417224 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x204>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UDIV X10, X9, X11	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-20	1-0.50
ORR X13, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z0.D, Z19.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z26.D, Z20.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STP D28, D21, [SP, #80]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
DUP Z27.D, Z21.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z28.D, Z28.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STP D30, D29, [SP, #64]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
DUP Z29.D, Z29.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z30.D, Z30.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STP D8, D31, [SP, #48]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
DUP Z31.D, Z31.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z8.D, Z8.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STP D10, D9, [SP, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
DUP Z9.D, Z9.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z10.D, Z10.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STP D12, D11, [SP, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
DUP Z11.D, Z11.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z12.D, Z12.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
STR D13, [SP, #8]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
DUP Z13.D, Z13.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z14.D, Z22.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z15.D, Z23.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z1.D, Z24.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z2.D, Z25.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z3.D, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
PTRUE P0.D, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP D20, D19, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
UMSUBL X12, W10, W11, X9	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
UMADDL X10, W10, W11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
HINT #0
HINT #0
HINT #0
HINT #0
LDP D20, D19, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D28, D21, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D30, D29, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FADDV D0, P0, Z3.D	1	0	0	0	0	0	0	0.75	0.75	0.25	0.25	0	0	0	0	0	9	2
LDP D8, D31, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D13, [SP, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D10, D9, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D12, D11, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
CBZ X12, 4172c4 <_ZNK11qmcplusplus14BsplineFunctorIdE9evaluateVEiiiPKdPd+0x2a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X14, X5, X10,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X9, X9, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X11, X8, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X12, X8, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X13, X8, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
HINT #0
HINT #0
LDP D9, D8, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D11, D10, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D13, D12, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D15, D14, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ADD SP, SP, #176	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0

Name	Coverage (%)	Time (s)
▼qmcplusplus::BsplineFunctor::evaluateV(int, int, int, double const, double) const–	4.07	0.03
○Loop 322 - BsplineFunctor.h:246-260 - exec	1.63	0.01
○Loop 324 - BsplineFunctor.h:236-241 - exec	1.63	0.01
○Loop 323 - BsplineFunctor.h:246-260 - exec	0	0

Report Configuration

Vectorization

Details

Workaround

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code