OV - exec - Function qmcplusplus::TimerType<std::chrono::_V2::system

	Function: qmcplusplus::TimerType<std::chrono::_V2::system_clock>::start()	Module: exec	Source: NewTimer.cpp:38-81 [...]	Coverage: 0.03%

/home/hbollore/qaas-runs/171-284-6744/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp: 38 - 81

--------------------------------------------------------------------------------

38: {

39:   if (active)

[...]

53:     for (int level = omp_get_level(); level > 0; level--)

54:       if (omp_get_ancestor_thread_num(level) != 0)

55:         is_true_master = false;

56:     if (is_true_master)

57:     {

58:       if (manager)

59:       {

60:         // compute current_stack_key

61:         TimerType* parent = manager->current_timer();

62:         if (parent)

63:         {

64:           current_stack_key = parent->get_stack_key();

65:           current_stack_key.add_id(timer_id);

66:         }

67:         else

68:         {

69:           current_stack_key = StackKey();

70:           current_stack_key.add_id(timer_id);

71:         }

72:

73:         manager->push_timer(this);

74:       }

75:       start_time = CLOCK::now();

[...]

81: }

/usr/lib/gcc/aarch64-linux-gnu/12/../../../../include/c++/12/bits/stl_vector.h: 988 - 988

--------------------------------------------------------------------------------

988:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

/home/hbollore/qaas-runs/171-284-6744/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 90 - 97

--------------------------------------------------------------------------------

90:     short_buckets[level] = c1;

91:     if (level >= max_level - 1)

92:     {

93:       timer_max_level_exceeded = true;

94:     }

95:     else

96:     {

97:       level++;

/home/hbollore/qaas-runs/171-284-6744/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h: 92 - 93

--------------------------------------------------------------------------------

92:     if (CurrentTimerStack.size() > 0)

93:       current = CurrentTimerStack.back();

0x46c6e0 STP	X29, X30, [SP, #976]!

0x46c6e4 STR	X21, [SP, #16]

0x46c6e8 STP	X20, X19, [SP, #32]

0x46c6ec ADD	X29, SP, #0

0x46c6f0 LDRB	W8, [X0, #56]

0x46c6f4 CBZ	W8, 46c7c4

0x46c6f8 ORR	X19, XZR, X0

0x46c6fc BL	404940

0x46c700 CMP	W0, #1

0x46c704 B.LT	46c740

0x46c708 ORR	W20, WZR, W0

0x46c70c MOVZ	W21, #1

0x46c710 HINT	#0

0x46c714 HINT	#0

0x46c718 HINT	#0

0x46c71c HINT	#0

(1938) 0x46c720 ORR	W0, WZR, W20

(1938) 0x46c724 BL	404950

(1938) 0x46c728 CMP	W0, #0

(1938) 0x46c72c CSINC	W8, WZR, WZR, #1

(1938) 0x46c730 SUBS	W20, W20, #1

(1938) 0x46c734 AND	W21, W8, W21

(1938) 0x46c738 B.HI	46c720

0x46c73c TBZ	W21, #0, 46c7c4

0x46c740 LDR	X9, [X19, #72]

0x46c744 CBZ	X9, 46c7bc

0x46c748 LDP	X9, X8, [X9, #72]

0x46c74c CMP	X8, X9

0x46c750 B.EQ	46c794

0x46c754 LDUR	X8, [X8, #504]

0x46c758 CBZ	X8, 46c794

0x46c75c LDR	Q0, [X8, #80]

0x46c760 LDRSW	X10, [X8, #96]

0x46c764 LDRB	W8, [X19, #64]

0x46c768 ADD	X9, X19, #80

0x46c76c STR	W10, [X19, #96]

0x46c770 STR	Q0, [X19, #80]

0x46c774 STRB	W8, [X9, X10]

0x46c778 LDR	W8, [X19, #96]

0x46c77c CMP	W8, #15

0x46c780 B.LT	46c7a8

0x46c784 ADRP	X8,

0x46c788 MOVZ	W9, #1

0x46c78c STRB	W9, [X8, #1388]

0x46c790 B	46c7b0

0x46c794 LDRB	W8, [X19, #64]

0x46c798 STP	XZR, XZR, [X19, #80]

0x46c79c STRB	W8, [X19, #80]

0x46c7a0 MOVZ	W8, #1

0x46c7a4 B	46c7ac

0x46c7a8 ADD	W8, W8, #1

0x46c7ac STR	W8, [X19, #96]

0x46c7b0 LDR	X0, [X19, #72]

0x46c7b4 ORR	X1, XZR, X19

0x46c7b8 BL	471ed0

0x46c7bc BL	4049c0

0x46c7c0 STR	X0, [X19]

0x46c7c4 LDP	X20, X19, [SP, #32]

0x46c7c8 LDR	X21, [SP, #16]

0x46c7cc LDP	X29, X30, [SP], #48

0x46c7d0 RET

0x46c7d4 HINT	#0

0x46c7d8 HINT	#0

0x46c7dc HINT	#0

Coverage (%)	Name	Source Location	Module

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	NewTimer.cpp:38-81
Module	exec

The function is defined in:

/home/hbollore/qaas-runs/171-284-6744/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:38-39,53-75,81
/usr/lib/gcc/aarch64-linux-gnu/12/../../../../include/c++/12/bits/stl_vector.h:988
/home/hbollore/qaas-runs/171-284-6744/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:90-97
/home/hbollore/qaas-runs/171-284-6744/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h:92-93

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 8.17 to 2.17 cycles (3.77x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 25% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 8.17 to 1.25 cycles (6.53x speedup).

Details

22% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 8.17 to 1.50 cycles (5.44x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 107 bytes. The binary function is storing 91 bytes.

General properties

nb instructions	57
loop length	228
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

6.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	6.50	6.50	4.25	4.25	4.25	4.25	0.50	0.50	0.00	0.00	8.17	7.83	8.00	5.00	5.00
cycles	6.50	6.50	4.25	4.25	4.25	4.25	0.50	0.50	0.00	0.00	8.17	7.83	8.00	5.00	5.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.25
Overall L1	8.17

Vectorization ratios

all	22%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 8.17 cycles. At this rate:

13% of peak load performance is reached (13.10 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.14 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 46c6e0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #976]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X21, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X20, X19, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDRB W8, [X0, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ W8, 46c7c4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xe4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 404940 <@plt_start@+0x350>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP W0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LT 46c740 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR W20, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W21, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
HINT #0
HINT #0
HINT #0
HINT #0
TBZ W21, #0, 46c7c4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xe4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X9, [X19, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X9, 46c7bc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xdc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X9, X8, [X9, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
CMP X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 46c794 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xb4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X8, #504]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X8, 46c794 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xb4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR Q0, [X8, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDRSW X10, [X8, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDRB W8, [X19, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X19, #80	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W10, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR Q0, [X19, #80]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STRB W8, [X9, X10]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W8, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W8, #15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LT 46c7a8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X8, <4ec784>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STRB W9, [X8, #1388]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 46c7b0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xd0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDRB W8, [X19, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP XZR, XZR, [X19, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STRB W8, [X19, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 46c7ac <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xcc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W8, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X0, [X19, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X1, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 471ed0 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 4049c0 <@plt_start@+0x3d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X0, [X19]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X20, X19, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X21, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X29, X30, [SP], #48	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0

Source file and lines	NewTimer.cpp:38-81
Module	exec

The function is defined in:

/home/hbollore/qaas-runs/171-284-6744/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:38-39,53-75,81
/usr/lib/gcc/aarch64-linux-gnu/12/../../../../include/c++/12/bits/stl_vector.h:988
/home/hbollore/qaas-runs/171-284-6744/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:90-97
/home/hbollore/qaas-runs/171-284-6744/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h:92-93

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 8.17 to 2.17 cycles (3.77x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

22% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 8.17 to 1.50 cycles (5.44x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 107 bytes. The binary function is storing 91 bytes.

General properties

nb instructions	57
loop length	228
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

6.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	6.50	6.50	4.25	4.25	4.25	4.25	0.50	0.50	0.00	0.00	8.17	7.83	8.00	5.00	5.00
cycles	6.50	6.50	4.25	4.25	4.25	4.25	0.50	0.50	0.00	0.00	8.17	7.83	8.00	5.00	5.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.25
Overall L1	8.17

Vectorization ratios

all	22%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 8.17 cycles. At this rate:

13% of peak load performance is reached (13.10 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.14 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 46c6e0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #976]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X21, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X20, X19, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDRB W8, [X0, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ W8, 46c7c4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xe4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 404940 <@plt_start@+0x350>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP W0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LT 46c740 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR W20, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W21, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
HINT #0
HINT #0
HINT #0
HINT #0
TBZ W21, #0, 46c7c4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xe4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X9, [X19, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X9, 46c7bc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xdc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X9, X8, [X9, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
CMP X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 46c794 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xb4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X8, #504]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X8, 46c794 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xb4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR Q0, [X8, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDRSW X10, [X8, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDRB W8, [X19, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X19, #80	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W10, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR Q0, [X19, #80]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STRB W8, [X9, X10]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W8, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W8, #15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LT 46c7a8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X8, <4ec784>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STRB W9, [X8, #1388]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 46c7b0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xd0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDRB W8, [X19, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP XZR, XZR, [X19, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STRB W8, [X19, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 46c7ac <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xcc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD W8, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W8, [X19, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X0, [X19, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X1, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 471ed0 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 4049c0 <@plt_start@+0x3d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X0, [X19]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X20, X19, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X21, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X29, X30, [SP], #48	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼qmcplusplus::TimerType::start()–	0.03	0.05
○Loop 1938 - NewTimer.cpp:53-54 - exec	0	0

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code