OV - exec - Function qmcplusplus::ParticleSet::update(bool)

	Function: qmcplusplus::ParticleSet::update(bool)	Module: exec	Source: ParticleSet.cpp:238-245 [...]	Coverage: 0.01%

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/unique_ptr.h: 193 - 193

--------------------------------------------------------------------------------

193:       pointer    _M_ptr() const noexcept { return std::get<0>(_M_t); }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249

--------------------------------------------------------------------------------

242:   ScopeGuard(TIMER& t) : timer(t) { timer.start(); }

[...]

249:   ~ScopeGuard() { timer.stop(); }

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/refwrap.h: 347 - 347

--------------------------------------------------------------------------------

347:       { return *_M_data; }

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h: 993 - 993

--------------------------------------------------------------------------------

993:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.cpp: 238 - 245

--------------------------------------------------------------------------------

238: {

239:   ScopedTimer update_scope(myTimers[PS_update]);

240:

241:   coordinates_->setAllParticlePos(R);

242:   for (int i = 0; i < DistTables.size(); i++)

243:     DistTables[i]->evaluate(*this);

244:   active_ptcl_ = -1;

245: }

0x4847c0 STP	X29, X30, [SP, #976]!

0x4847c4 ADD	X29, SP, #0

0x4847c8 STP	X19, X20, [SP, #16]

0x4847cc STP	X21, X22, [SP, #32]

0x4847d0 ORR	X21, XZR, X0

0x4847d4 LDR	X0, [X0, #528]

0x4847d8 LDR	X22, [X0, #32]

0x4847dc ORR	X0, XZR, X22

0x4847e0 BL	4c43c0

0x4847e4 LDR	X0, [X21, #632]

0x4847e8 ADD	X1, X21, #40

0x4847ec LDR	X2, [X0]

0x4847f0 LDR	X3, [X2, #40]

0x4847f4 BLR	X3

0x4847f8 LDR	X6, [X21, #480]

0x4847fc ADD	X20, X21, #480

0x484800 LDR	X1, [X20, #8]

0x484804 CMP	X1, X6

0x484808 B.EQ	484838

0x48480c MOVZ	X19, #0

(1723) 0x484810 LDR	X0, [X6, X19,UXTW #3]

(1723) 0x484814 ORR	X1, XZR, X21

(1723) 0x484818 LDR	X4, [X0]

(1723) 0x48481c LDR	X5, [X4, #16]

(1723) 0x484820 BLR	X5

(1723) 0x484824 LDP	X6, X7, [X20]

(1723) 0x484828 ADD	X19, X19, #1

(1723) 0x48482c SUB	X8, X7, X6

(1723) 0x484830 CMP	X19, X8,ASR #3

(1723) 0x484834 B.CC	484810

0x484838 MOVN	W9, #0

0x48483c ORR	X0, XZR, X22

0x484840 STR	W9, [X21, #292]

0x484844 BL	4c4660

0x484848 LDP	X19, X20, [SP, #16]

0x48484c LDP	X21, X22, [SP, #32]

0x484850 LDP	X29, X30, [SP], #48

0x484854 RET

0x484858 ORR	X21, XZR, X0

0x48485c ORR	X0, XZR, X22

0x484860 BL	4c4660

0x484864 ORR	X0, XZR, X21

0x484868 BL	403e10

Coverage (%)	Name	Source Location	Module

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	ParticleSet.cpp:238-245
Module	exec

The function is defined in:

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/unique_ptr.h:193
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/refwrap.h:347
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h:993
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.cpp:238-245

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 20% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 4.67 to 0.59 cycles (7.86x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 4.67 to 2.50 cycles (1.87x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 104 bytes. The binary function is storing 52 bytes.

General properties

nb instructions	33
loop length	132
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

4.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	4.50	4.50	4.50	4.50	0.00	0.00	0.00	0.00	4.67	4.67	4.67	2.00	2.00
cycles	3.50	3.50	4.50	4.50	4.50	4.50	0.00	0.00	0.00	0.00	4.67	4.67	4.67	2.00	2.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	4.13
Overall L1	4.67

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 4.67 cycles. At this rate:

23% of peak load performance is reached (22.29 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.14 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4847c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #976]!	1	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X21, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X0, [X0, #528]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X22, [X0, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
BL 4c43c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50
LDR X0, [X21, #632]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X1, X21, #40	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X2, [X0]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X3, [X2, #40]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BLR X3	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50
LDR X6, [X21, #480]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X20, X21, #480	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X1, [X20, #8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X1, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 484838 <_ZN11qmcplusplus11ParticleSet6updateEb+0x78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X19, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MOVN W9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR W9, [X21, #292]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 4c4660 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X29, X30, [SP], #48	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ORR X21, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
BL 4c4660 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
BL 403e10 <@plt_start@+0x420>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50

Source file and lines	ParticleSet.cpp:238-245
Module	exec

The function is defined in:

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/unique_ptr.h:193
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/refwrap.h:347
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h:993
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.cpp:238-245

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 4.67 to 2.50 cycles (1.87x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 104 bytes. The binary function is storing 52 bytes.

General properties

nb instructions	33
loop length	132
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

4.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	4.50	4.50	4.50	4.50	0.00	0.00	0.00	0.00	4.67	4.67	4.67	2.00	2.00
cycles	3.50	3.50	4.50	4.50	4.50	4.50	0.00	0.00	0.00	0.00	4.67	4.67	4.67	2.00	2.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	4.13
Overall L1	4.67

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 4.67 cycles. At this rate:

23% of peak load performance is reached (22.29 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.14 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4847c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #976]!	1	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X21, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X0, [X0, #528]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X22, [X0, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
BL 4c43c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50
LDR X0, [X21, #632]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X1, X21, #40	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X2, [X0]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X3, [X2, #40]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BLR X3	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50
LDR X6, [X21, #480]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X20, X21, #480	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X1, [X20, #8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X1, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 484838 <_ZN11qmcplusplus11ParticleSet6updateEb+0x78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ X19, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MOVN W9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR W9, [X21, #292]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 4c4660 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X29, X30, [SP], #48	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ORR X21, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
BL 4c4660 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
BL 403e10 <@plt_start@+0x420>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50

Name	Coverage (%)	Time (s)
▼qmcplusplus::ParticleSet::update(bool)–	0.01	0.01
○Loop 1723 - ParticleSet.cpp:242-243 - exec	0.01	0.01

Report Configuration

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code