OV - exec - Function miniqmcreference::einspline_spo_ref<double>::evaluate(qmcplusplus::ParticleSet const&, int, qmcplusplus::Vector<double, std::allocator<double> >&)

	Function: miniqmcreference::einspline_spo_ref<double>::evaluate(qmcplusplus::ParticleSet const&, int ...	Module: exec	Source: einspline_spo_ref.hpp:172-189 [...]	Coverage: 18.81%

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h: 168 - 174

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168:     val_dot = toUnit(r);

169:     for (int i = 0; i < D; i++)

170:       if (-std::numeric_limits<T1>::epsilon() < val_dot[i] && val_dot[i] < 0)

171:         val_dot[i] = T1(0.0);

172:       else

173:         val_dot[i] -= std::floor(val_dot[i]);

174:     return val_dot;

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249

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242:   ScopeGuard(TIMER& t) : timer(t) { timer.start(); }

[...]

249:   ~ScopeGuard() { timer.stop(); }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp: 53 - 63

--------------------------------------------------------------------------------

53:   if (x < 0)

[...]

60:     ind = static_cast<int>(x);

61:     dx = x - ind;

62:     // upper bound

63:     if (ind > nmax)

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp: 42 - 71

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42:   x -= spline_m->x_grid.start;

43:   y -= spline_m->y_grid.start;

44:   z -= spline_m->z_grid.start;

45:   T tx, ty, tz;

46:   int ix, iy, iz;

47:   spline2::getSplineBound(x * spline_m->x_grid.delta_inv, tx, ix, spline_m->x_grid.num - 1);

48:   spline2::getSplineBound(y * spline_m->y_grid.delta_inv, ty, iy, spline_m->y_grid.num - 1);

49:   spline2::getSplineBound(z * spline_m->z_grid.delta_inv, tz, iz, spline_m->z_grid.num - 1);

[...]

57:   const intptr_t ys = spline_m->y_stride;

58:   const intptr_t zs = spline_m->z_stride;

59:

60:   constexpr T zero(0);

61:   std::fill(vals, vals + num_splines, zero);

62:

63:   for (size_t i = 0; i < 4; i++)

64:     for (size_t j = 0; j < 4; j++)

65:     {

66:       const T pre00           = a[i] * b[j];

67:       const T* restrict coefs = spline_m->coefs + (ix + i) * xs + (iy + j) * ys + iz * zs;

68:       for (size_t n = 0; n < num_splines; n++)

69:         vals[n] += pre00 *

70:             (c[0] * coefs[n] + c[1] * coefs[n + zs] + c[2] * coefs[n + 2 * zs] +

71:              c[3] * coefs[n + 3 * zs]);

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp: 172 - 189

--------------------------------------------------------------------------------

172:     ScopedTimer local_timer(timer);

173:

174:     auto u = Lattice.toUnit_floor(P.activeR(iat));

175:     for (int i = 0; i < nBlocks; ++i)

176:       MultiBsplineEvalRef::evaluate_v(einsplines[i], u[0], u[1], u[2], psi[i].data(), nSplinesPerBlock);

177:   }

178:

179:   inline void evaluate(const ParticleSet& P, int iat, ValueVector_t& psi_v)

180:   {

181:     evaluate_v(P, iat);

182:

183:     for (int i = 0; i < nBlocks; ++i)

184:     {

185:       // in real simulation, phase needs to be applied. Here just fake computation

186:       const int first = i * nBlocks;

187:       std::copy_n(psi[i].data(), std::min((i + 1) * nSplinesPerBlock, OrbitalSetSize) - first, psi_v.data() + first);

188:     }

189:   }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h: 150 - 152

--------------------------------------------------------------------------------

150:     return TinyVector<Type_t, 3>(lhs[0] * rhs[0] + lhs[1] * rhs[3] + lhs[2] * rhs[6],

151:                                  lhs[0] * rhs[1] + lhs[1] * rhs[4] + lhs[2] * rhs[7],

152:                                  lhs[0] * rhs[2] + lhs[1] * rhs[5] + lhs[2] * rhs[8]);

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp: 54 - 57

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54:     a[0] = ((A00 * tx + A01) * tx + A02) * tx + A03;

55:     a[1] = ((A10 * tx + A11) * tx + A12) * tx + A13;

56:     a[2] = ((A20 * tx + A21) * tx + A22) * tx + A23;

57:     a[3] = ((A30 * tx + A31) * tx + A32) * tx + A33;

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 143 - 143

--------------------------------------------------------------------------------

143:     return (active_ptcl_ == iat) ? active_pos_ : R[iat];

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 229 - 229

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229:     return X[i];

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h: 238 - 952

--------------------------------------------------------------------------------

238:       if (__b < __a)

[...]

413: 	{ *__to = *__from; }

[...]

451: 	  if (__builtin_expect(_Num > 1, true))

452: 	    __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);

[...]

951:       for (; __first != __last; ++__first)

952: 	*__first = __tmp;

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h: 1263 - 1263

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1263:       { return _M_data_ptr(this->_M_impl._M_start); }

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algo.h: 683 - 709

--------------------------------------------------------------------------------

683:     { return std::copy(__first, __first + __n, __result); }

[...]

709:       if (__n2 <= 0)

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/Tensor.h: 213 - 213

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213:   inline Type_t operator[](unsigned int i) const { return X[i]; }

0x4510e0 STP	X29, X30, [SP, #704]!

0x4510e4 ADD	X29, SP, #0

0x4510e8 STP	X19, X20, [SP, #16]

0x4510ec ORR	X20, XZR, X1

0x4510f0 ORR	W19, WZR, W2

0x4510f4 STP	X21, X22, [SP, #32]

0x4510f8 ORR	X21, XZR, X3

0x4510fc STP	X23, X24, [SP, #48]

0x451100 ORR	X23, XZR, X0

0x451104 STP	X27, X28, [SP, #80]

0x451108 STP	D8, D9, [SP, #96]

0x45110c LDR	X28, [X0, #856]

0x451110 ORR	X0, XZR, X28

0x451114 BL	4c43c0

0x451118 LDR	W0, [X20, #292]

0x45111c ADD	X4, X20, #296

0x451120 CMP	W19, W0

0x451124 B.EQ	451134

0x451128 LDR	X2, [X20, #64]

0x45112c MOVZ	W1, #24

0x451130 SMADDL	X4, W19, W1, X2

0x451134 ADD	X5, X23, #216

0x451138 LDP	D28, D27, [X4]

0x45113c PTRUE	P7.B, ALL

0x451140 MOVZ	W6, #3

0x451144 ADD	X22, SP, #288

0x451148 WHILELO	P4.D, WZR, W6

0x45114c LDP	D6, D4, [X5, #24]

0x451150 MOVZ	X3, #48304

0x451154 DUP	Z30.D, X3

0x451158 CNTD	X7, ALL

0x45115c WHILELO	P5.D, W7, W6

0x451160 LDP	D2, D23, [X5, #40]

0x451164 LDR	D17, [X23, #216]

0x451168 LDP	D3, D26, [X5, #8]

0x45116c FMUL	D0, D27, D6

0x451170 FMUL	D1, D27, D4

0x451174 FMUL	D5, D27, D2

0x451178 LDR	D24, [X4, #16]

0x45117c LDP	D25, D22, [X5, #56]

0x451180 FMADD	D18, D28, D17, D0

0x451184 FMADD	D7, D28, D3, D1

0x451188 FMADD	D8, D28, D26, D5

0x45118c FMADD	D19, D24, D23, D18

0x451190 FMADD	D9, D24, D25, D7

0x451194 FMADD	D16, D24, D22, D8

0x451198 STP	D19, D9, [SP, #288]

0x45119c STR	D16, [SP, #304]

0x4511a0 LD1D	{Z20.D}, P4/Z, [X22, MUL VL]

0x4511a4 FCMLT	P6.D, P7/Z, Z20.D, #0

0x4511a8 MOVPRFX	Z21, Z20

0x4511ac FRINTM	Z21.D, P7/M, Z20.D

0x4511b0 FCMGT	P0.D, P6/Z, Z20.D, Z30.D

0x4511b4 EOR	P1.B, P7/Z, P0.B, P7.B

0x4511b8 MOVPRFX	Z21.D, P1/Z, Z21.D

0x4511bc FSUBR	Z21.D, P1/M, Z21.D, Z20.D

0x4511c0 ST1D	{Z21.D}, P4, [X22, MUL VL]

0x4511c4 B.EQ	4511f0

0x4511c8 LD1D	{Z31.D}, P5/Z, [X22, #1, MUL VL]

0x4511cc ADDVL	X9, X22, #1

0x4511d0 FCMLT	P6.D, P7/Z, Z31.D, #0

0x4511d4 MOVPRFX	Z29, Z31

0x4511d8 FRINTM	Z29.D, P7/M, Z31.D

0x4511dc FCMGT	P15.D, P6/Z, Z31.D, Z30.D

0x4511e0 EOR	P2.B, P7/Z, P15.B, P7.B

0x4511e4 MOVPRFX	Z29.D, P2/Z, Z29.D

0x4511e8 FSUBR	Z29.D, P2/M, Z29.D, Z31.D

0x4511ec ST1D	{Z29.D}, P5, [X9, MUL VL]

0x4511f0 LDP	X10, X11, [SP, #288]

0x4511f4 LDR	X12, [X22, #16]

0x4511f8 STP	X10, X11, [SP, #232]

0x4511fc LDP	D9, D30, [SP, #232]

0x451200 STR	X12, [SP, #248]

0x451204 LDR	W11, [X23, #48]

0x451208 LDR	D8, [SP, #248]

0x45120c STR	D30, [SP, #184]

0x451210 CMP	W11, #0

0x451214 B.LE	451578

0x451218 ORR	X13, XZR, #3840

0x45121c ORR	X14, XZR, #3840

0x451220 STP	D10, D11, [SP, #112]

0x451224 MOVK	X13, #16325

0x451228 MOVK	X14, #16357

0x45122c STP	X25, X26, [SP, #64]

0x451230 FMOV	D10, X13

0x451234 FMOV	D11, X14

0x451238 STP	D12, D13, [SP, #128]

0x45123c STP	D14, D15, [SP, #144]

0x451240 LDRSW	X19, [X23, #64]

0x451244 LDR	X24, [X23, #760]

0x451248 ADD	X15, X24, W11,UXTW #3

0x45124c LDR	X25, [X23, #784]

0x451250 UBFM	X26, X19, #61, #60

0x451254 STP	X15, X28, [SP, #192]

0x451258 STP	X23, X21, [SP, #208]

    (1138) 0x45125c LDR	X21, [X24]

    (1138) 0x451260 LDR	D28, [SP, #184]

    (1138) 0x451264 LDR	X3, [X25]

    (1138) 0x451268 LDR	D14, [X21, #40]

    (1138) 0x45126c LDP	D12, D13, [X21, #72]

    (1138) 0x451270 LDR	D15, [X21, #120]

    (1138) 0x451274 FSUB	D6, D9, S14

    (1138) 0x451278 FSUB	D1, D28, S13

    (1138) 0x45127c FSUB	D0, D8, S15

    (1138) 0x451280 FMUL	D4, D6, D12

    (1138) 0x451284 FCMPE	D4, #0

    (1138) 0x451288 B.MI	451648

    (1138) 0x45128c LDR	W17, [X21, #56]

    (1138) 0x451290 FCVTZS	W16, D4

    (1138) 0x451294 SUB	W18, W17, #1

    (1138) 0x451298 CMP	W18, W16

    (1138) 0x45129c B.LT	451660

    (1138) 0x4512a0 ORR	X23, XZR, #3840

    (1138) 0x4512a4 FRINTZ	D27, D4

    (1138) 0x4512a8 FSUB	D3, D4, S27

    (1138) 0x4512ac MOVK	X23, #49093

    (1138) 0x4512b0 FMOV	D26, #0.5000000

    (1138) 0x4512b4 FMOV	D2, #-0.5000000

    (1138) 0x4512b8 FMOV	D23, #-1.0000000

    (1138) 0x4512bc SBFM	X20, X16, #0, #31

    (1138) 0x4512c0 FMOV	D5, X23

    (1138) 0x4512c4 FMSUB	D7, D3, D26, D26

    (1138) 0x4512c8 FMUL	D25, D3, D3

    (1138) 0x4512cc FMADD	D22, D3, D26, D23

    (1138) 0x4512d0 FMADD	D24, D3, D7, D26

    (1138) 0x4512d4 FMUL	D16, D3, D5

    (1138) 0x4512d8 FMADD	D27, D22, D25, D11

    (1138) 0x4512dc FMADD	D6, D3, D24, D10

    (1138) 0x4512e0 FADD	D17, D16, D26

    (1138) 0x4512e4 FNMUL	D4, D16, D25

    (1138) 0x4512e8 FMADD	D18, D3, D17, D2

    (1138) 0x4512ec FMADD	D30, D3, D18, D10

    (1138) 0x4512f0 LDR	D19, [X21, #112]

    (1138) 0x4512f4 FMUL	D20, D1, D19

    (1138) 0x4512f8 FCMPE	D20, #0

    (1138) 0x4512fc B.MI	45160c

    (1138) 0x451300 LDR	W0, [X21, #96]

    (1138) 0x451304 FCVTZS	W30, D20

    (1138) 0x451308 SUB	W1, W0, #1

    (1138) 0x45130c CMP	W1, W30

    (1138) 0x451310 B.LT	451680

    (1138) 0x451314 ORR	X2, XZR, #3840

    (1138) 0x451318 FRINTZ	D21, D20

    (1138) 0x45131c FSUB	D31, D20, S21

    (1138) 0x451320 MOVK	X2, #49093

    (1138) 0x451324 FMOV	D29, #0.5000000

    (1138) 0x451328 FMOV	D12, #-0.5000000

    (1138) 0x45132c FMOV	D14, #-1.0000000

    (1138) 0x451330 SBFM	X5, X30, #0, #31

    (1138) 0x451334 FMOV	D13, X2

    (1138) 0x451338 FMSUB	D15, D31, D29, D29

    (1138) 0x45133c FMUL	D1, D31, D31

    (1138) 0x451340 FMADD	D3, D31, D29, D14

    (1138) 0x451344 FMADD	D26, D31, D15, D29

    (1138) 0x451348 FMUL	D28, D31, D13

    (1138) 0x45134c FMADD	D25, D3, D1, D11

    (1138) 0x451350 FMADD	D23, D31, D26, D10

    (1138) 0x451354 FADD	D2, D28, D29

    (1138) 0x451358 FNMUL	D7, D28, D1

    (1138) 0x45135c FMADD	D5, D31, D2, D12

    (1138) 0x451360 FMADD	D22, D31, D5, D10

    (1138) 0x451364 LDR	D16, [X21, #152]

    (1138) 0x451368 FMUL	D0, D0, D16

    (1138) 0x45136c FCMPE	D0, #0

    (1138) 0x451370 B.MI	451630

    (1139) 0x451374 LDR	W7, [X21, #136]

    (1139) 0x451378 FCVTZS	W8, D0

    (1139) 0x45137c SUB	W9, W7, #1

    (1139) 0x451380 CMP	W9, W8

    (1139) 0x451384 B.LT	4516a0

  (1137) 0x451388 ORR	X10, XZR, #3840

  (1137) 0x45138c FRINTZ	D24, D0

  (1137) 0x451390 FSUB	D17, D0, S24

  (1137) 0x451394 MOVK	X10, #49093

  (1137) 0x451398 FMOV	D18, #0.5000000

  (1137) 0x45139c FMOV	D20, #-0.5000000

  (1137) 0x4513a0 FMOV	D31, #-1.0000000

  (1137) 0x4513a4 SBFM	X13, X8, #0, #31

  (1137) 0x4513a8 FMOV	D21, X10

  (1137) 0x4513ac FMSUB	D29, D17, D18, D18

  (1137) 0x4513b0 FMUL	D19, D17, D17

  (1137) 0x4513b4 FMADD	D13, D17, D18, D31

  (1137) 0x4513b8 FMADD	D12, D17, D29, D18

  (1137) 0x4513bc FMUL	D14, D17, D21

  (1137) 0x4513c0 FMADD	D13, D13, D19, D11

  (1137) 0x4513c4 FMADD	D12, D17, D12, D10

  (1137) 0x4513c8 FADD	D15, D14, D18

  (1137) 0x4513cc FNMUL	D14, D14, D19

  (1137) 0x4513d0 FMADD	D1, D17, D15, D20

  (1137) 0x4513d4 FMADD	D15, D17, D1, D10

    (1138) 0x4513d8 LDR	X28, [X21, #32]

    (1138) 0x4513dc STP	D30, D27, [SP, #256]

    (1138) 0x4513e0 STP	D6, D4, [SP, #272]

    (1138) 0x4513e4 STP	D22, D25, [SP, #288]

    (1138) 0x4513e8 STP	D23, D7, [SP, #304]

    (1138) 0x4513ec LDP	X27, X23, [X21, #16]

    (1138) 0x4513f0 CBZ	X26, 451410

    (1138) 0x4513f4 ORR	X0, XZR, X3

    (1138) 0x4513f8 ORR	X2, XZR, X26

    (1138) 0x4513fc MOVZ	W1, #0

    (1138) 0x451400 STP	X5, X13, [SP, #168]

    (1138) 0x451404 BL	403bd0

    (1138) 0x451408 LDP	X5, X13, [SP, #168]

    (1138) 0x45140c ORR	X3, XZR, X0

    (1138) 0x451410 MADD	X14, X28, X13, XZR

    (1138) 0x451414 LDR	X15, [X21, #8]

    (1138) 0x451418 CBZ	X19, 45154c

    (1138) 0x45141c MADD	X21, X5, X23, XZR

    (1138) 0x451420 UBFM	X16, X23, #61, #60

    (1138) 0x451424 UBFM	X18, X23, #60, #59

    (1138) 0x451428 MADD	X0, X20, X27, X14

    (1138) 0x45142c ADD	X4, SP, #256

    (1138) 0x451430 CNTD	X11, ALL

    (1138) 0x451434 SUB	X13, XZR, X28,LSL #3

    (1138) 0x451438 DUP	Z19.D, Z12.D[0]

    (1138) 0x45143c DUP	Z15.D, Z15.D[0]

    (1138) 0x451440 ADD	X17, X21, X23

    (1138) 0x451444 SUB	X20, XZR, X21,LSL #3

    (1138) 0x451448 ADD	X30, X21, X28

    (1138) 0x45144c ADD	X1, X17, X28

    (1138) 0x451450 ADD	X2, X15, X30,LSL #3

    (1138) 0x451454 ADD	X17, X13, X16

    (1138) 0x451458 ADD	X14, X20, X1,LSL #3

    (1138) 0x45145c DUP	Z1.D, Z13.D[0]

    (1138) 0x451460 DUP	Z12.D, Z14.D[0]

    (1138) 0x451464 ADD	X15, X16, X28,LSL #4

    (1138) 0x451468 WHILELO	P8.D, XZR, X19

    (1138) 0x45146c PTRUE	P7.B, ALL

      (1143) 0x451470 ADD	X23, X2, X0,LSL #3

      (1143) 0x451474 ORR	X28, XZR, X22

      (1143) 0x451478 LDR	D6, [X4]

      (1143) 0x45147c DUP	Z4.D, Z6.D[0]

        (1142) 0x451480 LDR	D3, [X28]

        (1142) 0x451484 SUB	X6, X23, X13

        (1142) 0x451488 MOVZ	X21, #0

        (1142) 0x45148c SUB	X5, X6, X13

        (1142) 0x451490 ADD	X12, X23, X13

        (1142) 0x451494 LD1RD	{Z27.D}, P7/Z, [X28, #1]

        (1142) 0x451498 ADD	X10, X23, X17

        (1142) 0x45149c ADD	X9, X23, X16

        (1142) 0x4514a0 FMUL	Z30.D, Z27.D, Z4.D

        (1142) 0x4514a4 ADD	X8, X23, X14

        (1142) 0x4514a8 ADD	X7, X23, X15

        (1142) 0x4514ac ORR	P3.B, P8/Z, P8.B, P8.B

        (1142) 0x4514b0 FMUL	D28, D6, D3

        (1142) 0x4514b4 DUP	Z2.D, Z28.D[0]

        (1142) 0x4514b8 HINT	#0

        (1142) 0x4514bc HINT	#0

          (1141) 0x4514c0 LD1D	{Z5.D}, P3/Z, [X23, X21,LSL #3]

          (1141) 0x4514c4 LD1D	{Z26.D}, P3/Z, [X12, X21,LSL #3]

          (1141) 0x4514c8 LD1D	{Z7.D}, P3/Z, [X5, X21,LSL #3]

          (1141) 0x4514cc LD1D	{Z22.D}, P3/Z, [X6, X21,LSL #3]

          (1141) 0x4514d0 LD1D	{Z16.D}, P3/Z, [X3, X21,LSL #3]

          (1141) 0x4514d4 FMUL	Z23.D, Z1.D, Z5.D

          (1141) 0x4514d8 FMUL	Z25.D, Z12.D, Z7.D

          (1141) 0x4514dc FMAD	Z26.D, P7/M, Z15.D, Z23.D

          (1141) 0x4514e0 FMAD	Z22.D, P7/M, Z19.D, Z25.D

          (1141) 0x4514e4 FADD	Z0.D, Z22.D, Z26.D

          (1141) 0x4514e8 FMAD	Z0.D, P7/M, Z2.D, Z16.D

          (1141) 0x4514ec ST1D	{Z0.D}, P3, [X3, X21,LSL #3]

          (1141) 0x4514f0 LD1D	{Z24.D}, P3/Z, [X9, X21,LSL #3]

          (1141) 0x4514f4 LD1D	{Z17.D}, P3/Z, [X10, X21,LSL #3]

          (1141) 0x4514f8 LD1D	{Z20.D}, P3/Z, [X7, X21,LSL #3]

          (1141) 0x4514fc LD1D	{Z31.D}, P3/Z, [X8, X21,LSL #3]

          (1141) 0x451500 FMUL	Z18.D, Z24.D, Z1.D

          (1141) 0x451504 FMUL	Z21.D, Z20.D, Z12.D

          (1141) 0x451508 FMAD	Z17.D, P7/M, Z15.D, Z18.D

          (1141) 0x45150c FMAD	Z31.D, P7/M, Z19.D, Z21.D

          (1141) 0x451510 FADD	Z29.D, Z31.D, Z17.D

          (1141) 0x451514 FMLA	Z0.D, P7/M, Z29.D, Z30.D

          (1141) 0x451518 ST1D	{Z0.D}, P3, [X3, X21,LSL #3]

          (1141) 0x45151c ADD	X21, X21, X11

          (1141) 0x451520 WHILELO	P3.D, X21, X19

          (1141) 0x451524 B.NE	4514c0

        (1142) 0x451528 ADD	X28, X28, #16

        (1142) 0x45152c ADD	X20, SP, #320

        (1142) 0x451530 ADD	X23, X23, X18

        (1142) 0x451534 CMP	X28, X20

        (1142) 0x451538 B.NE	451480

      (1143) 0x45153c ADD	X4, X4, #8

      (1143) 0x451540 ADD	X0, X0, X27

      (1143) 0x451544 CMP	X4, X22

      (1143) 0x451548 B.NE	451470

    (1138) 0x45154c LDR	X30, [SP, #192]

    (1138) 0x451550 ADD	X24, X24, #8

    (1138) 0x451554 ADD	X25, X25, #24

    (1138) 0x451558 CMP	X30, X24

    (1138) 0x45155c B.NE	45125c

(1140) 0x451560 LDP	D10, D11, [SP, #112]

(1140) 0x451564 LDP	X25, X26, [SP, #64]

(1140) 0x451568 LDP	X28, X23, [SP, #200]

(1140) 0x45156c LDP	D12, D13, [SP, #128]

(1140) 0x451570 LDP	D14, D15, [SP, #144]

(1140) 0x451574 LDR	X21, [SP, #216]

(1140) 0x451578 ORR	X0, XZR, X28

(1140) 0x45157c MOVZ	X22, #0

(1140) 0x451580 BL	4c4660

(1140) 0x451584 LDR	W11, [X23, #48]

(1140) 0x451588 MOVZ	W19, #0

(1140) 0x45158c CMP	W11, #0

(1140) 0x451590 B.LE	4515f0

  (1144) 0x451594 LDR	W5, [X23, #64]

  (1144) 0x451598 MADD	W1, W11, W19, WZR

  (1144) 0x45159c ADD	W19, W19, #1

  (1144) 0x4515a0 LDR	W6, [X23, #8]

  (1144) 0x4515a4 MADD	W12, W19, W5, WZR

  (1144) 0x4515a8 CMP	W12, W6

  (1144) 0x4515ac CSEL	W10, W12, W6, #13

  (1144) 0x4515b0 SUB	W9, W10, W1

  (1144) 0x4515b4 CMP	W9, #0

  (1144) 0x4515b8 B.LE	4515e4

  (1144) 0x4515bc LDR	X7, [X21, #24]

  (1144) 0x4515c0 UBFM	X8, X1, #61, #31

  (1144) 0x4515c4 UBFM	X2, X9, #61, #31

  (1144) 0x4515c8 LDR	X3, [X23, #784]

  (1144) 0x4515cc ADD	X0, X7, X8

  (1144) 0x4515d0 LDR	X1, [X3, X22]

  (1144) 0x4515d4 CMP	X2, #8

  (1144) 0x4515d8 B.EQ	4516c0

  (1144) 0x4515dc BL	403a40

  (1144) 0x4515e0 LDR	W11, [X23, #48]

  (1144) 0x4515e4 ADD	X22, X22, #24

  (1144) 0x4515e8 CMP	W19, W11

  (1144) 0x4515ec B.LT	451594

(1140) 0x4515f0 LDP	D8, D9, [SP, #96]

(1140) 0x4515f4 LDP	X19, X20, [SP, #16]

(1140) 0x4515f8 LDP	X21, X22, [SP, #32]

(1140) 0x4515fc LDP	X23, X24, [SP, #48]

(1140) 0x451600 LDP	X27, X28, [SP, #80]

(1140) 0x451604 LDP	X29, X30, [SP], #320

(1140) 0x451608 RET

  (1137) 0x45160c LDR	D16, [X21, #152]

  (1137) 0x451610 FMOV	D23, D10

  (1137) 0x451614 MOVI	D7, #0

  (1137) 0x451618 FMOV	D25, D11

  (1137) 0x45161c FMOV	D22, D10

  (1137) 0x451620 MOVZ	X5, #0

  (1137) 0x451624 FMUL	D0, D0, D16

  (1137) 0x451628 FCMPE	D0, #0

  (1137) 0x45162c B.GE	451374

    (1138) 0x451630 FMOV	D12, D10

    (1138) 0x451634 MOVI	D14, #0

    (1138) 0x451638 MOVZ	X13, #0

    (1138) 0x45163c FMOV	D13, D11

    (1138) 0x451640 FMOV	D15, D10

    (1138) 0x451644 B	4513d8

    (1138) 0x451648 FMOV	D6, D10

    (1138) 0x45164c MOVI	D4, #0

    (1138) 0x451650 MOVZ	X20, #0

    (1138) 0x451654 FMOV	D27, D11

    (1138) 0x451658 FMOV	D30, D10

    (1138) 0x45165c B	4512f0

    (1138) 0x451660 ADRP	X27,

    (1138) 0x451664 ADRP	X28,

    (1138) 0x451668 MOVI	D30, #0

    (1138) 0x45166c FMOV	D6, D11

    (1138) 0x451670 SBFM	X20, X18, #0, #31

    (1138) 0x451674 LDR	D4, [X27, #4040]

    (1138) 0x451678 LDR	D27, [X28, #4048]

    (1138) 0x45167c B	4512f0

    (1138) 0x451680 ADRP	X4,

    (1138) 0x451684 ADRP	X6,

    (1138) 0x451688 MOVI	D22, #0

    (1138) 0x45168c FMOV	D23, D11

    (1138) 0x451690 SBFM	X5, X1, #0, #31

    (1138) 0x451694 LDR	D7, [X4, #4040]

    (1138) 0x451698 LDR	D25, [X6, #4048]

    (1138) 0x45169c B	451364

  (1137) 0x4516a0 ADRP	X11,

  (1137) 0x4516a4 ADRP	X12,

  (1137) 0x4516a8 MOVI	D15, #0

  (1137) 0x4516ac FMOV	D12, D11

  (1137) 0x4516b0 SBFM	X13, X9, #0, #31

  (1137) 0x4516b4 LDR	D14, [X11, #4040]

  (1137) 0x4516b8 LDR	D13, [X12, #4048]

  (1137) 0x4516bc B	4513d8

  (1144) 0x4516c0 LDR	D6, [X1]

  (1144) 0x4516c4 STR	D6, [X7, X8]

  (1144) 0x4516c8 B	4515e4

0x4516cc HINT	#0

0x4516d0 HINT	#0

0x4516d4 HINT	#0

0x4516d8 HINT	#0

0x4516dc HINT	#0

Coverage (%)	Name	Source Location	Module

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	einspline_spo_ref.hpp:172-189
Module	exec

The function is defined in:

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:168-174
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:53,60-63
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:42-49,57-71
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp:172-189
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h:150-152
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp:54-57
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:143
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:229
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h:238,413,451-452,951-952
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h:1263
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algo.h:683,709
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/Tensor.h:213

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 13.17 to 9.50 cycles (1.39x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is partially vectorized. Only 54% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 13.17 to 9.92 cycles (1.33x speedup).

Details

55% of VPU instructions are used in vector version (process two or more data elements in vector registers):

72% of VPU loads are used in vector version.
77% of VPU stores are used in vector version.
66% of VPU addition or subtraction instructions are used in vector version.
38% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 13.17 to 0.50 cycles (26.33x speedup).

FMA

Detected 6 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Matching between your function (in the source code) and the binary function

The binary function is composed of 23 FP arithmetical operations:

14: addition or subtraction (6 inside FMA instructions)
9: multiply (6 inside FMA instructions)

The binary function is loading 252 bytes. The binary function is storing 312 bytes.

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	100
loop length	400
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

11.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	2.00	2.00	7.50	7.25	9.00	7.25	9.50	9.50	6.50	6.50	13.17	12.83	13.00	5.00	5.00
cycles	2.00	2.00	7.50	7.25	9.00	7.25	9.50	9.50	6.50	6.50	13.17	12.83	13.00	5.00	5.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.88
Overall L1	13.17

Vectorization ratios

INT

all	46%
load	72%
store	77%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	20%

all	100%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	55%
load	72%
store	77%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	66%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	38%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 13.17 cycles. At this rate:

19% of peak load performance is reached (19.14 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
49% of peak store performance is reached (23.70 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4510e0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #704]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X20, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W19, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X21, XZR, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X23, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X28, [X0, #856]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4c43c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W0, [X20, #292]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X4, X20, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W19, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 451134 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X2, [X20, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ W1, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SMADDL X4, W19, W1, X2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X5, X23, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP D28, D27, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MOVZ W6, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X22, SP, #288	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
WHILELO P4.D, WZR, W6	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
LDP D6, D4, [X5, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
MOVZ X3, #48304	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z30.D, X3	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
CNTD X7, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
WHILELO P5.D, W7, W6	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
LDP D2, D23, [X5, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D17, [X23, #216]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D3, D26, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D0, D27, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D1, D27, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D5, D27, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
LDR D24, [X4, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D25, D22, [X5, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D18, D28, D17, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D7, D28, D3, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D8, D28, D26, D5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D19, D24, D23, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D9, D24, D25, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D16, D24, D22, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STP D19, D9, [SP, #288]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D16, [SP, #304]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LD1D {Z20.D}, P4/Z, [X22, MUL VL]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
FCMLT P6.D, P7/Z, Z20.D, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
MOVPRFX Z21, Z20	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FRINTM Z21.D, P7/M, Z20.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	3	1
FCMGT P0.D, P6/Z, Z20.D, Z30.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
EOR P1.B, P7/Z, P0.B, P7.B	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	1	1
MOVPRFX Z21.D, P1/Z, Z21.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FSUBR Z21.D, P1/M, Z21.D, Z20.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ST1D {Z21.D}, P4, [X22, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
B.EQ 4511f0 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x110>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LD1D {Z31.D}, P5/Z, [X22, #1, MUL VL]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADDVL X9, X22, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
FCMLT P6.D, P7/Z, Z31.D, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
MOVPRFX Z29, Z31	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FRINTM Z29.D, P7/M, Z31.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	3	1
FCMGT P15.D, P6/Z, Z31.D, Z30.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
EOR P2.B, P7/Z, P15.B, P7.B	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	1	1
MOVPRFX Z29.D, P2/Z, Z29.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FSUBR Z29.D, P2/M, Z29.D, Z31.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ST1D {Z29.D}, P5, [X9, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LDP X10, X11, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X12, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X10, X11, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP D9, D30, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STR X12, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W11, [X23, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D8, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STR D30, [SP, #184]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
CMP W11, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 451578 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x498>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X13, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X14, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVK X13, #16325	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X14, #16357	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
FMOV D10, X13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D11, X14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDRSW X19, [X23, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X24, [X23, #760]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X15, X24, W11,UXTW #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
LDR X25, [X23, #784]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X26, X19, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X15, X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X23, X21, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Source file and lines	einspline_spo_ref.hpp:172-189
Module	exec

The function is defined in:

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:168-174
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:53,60-63
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:42-49,57-71
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp:172-189
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h:150-152
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp:54-57
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:143
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:229
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h:238,413,451-452,951-952
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h:1263
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algo.h:683,709
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/Tensor.h:213

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 13.17 to 9.50 cycles (1.39x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

55% of VPU instructions are used in vector version (process two or more data elements in vector registers):

72% of VPU loads are used in vector version.
77% of VPU stores are used in vector version.
66% of VPU addition or subtraction instructions are used in vector version.
38% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 13.17 to 0.50 cycles (26.33x speedup).

FMA

Detected 6 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Matching between your function (in the source code) and the binary function

The binary function is composed of 23 FP arithmetical operations:

14: addition or subtraction (6 inside FMA instructions)
9: multiply (6 inside FMA instructions)

The binary function is loading 252 bytes. The binary function is storing 312 bytes.

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	100
loop length	400
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

11.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	2.00	2.00	7.50	7.25	9.00	7.25	9.50	9.50	6.50	6.50	13.17	12.83	13.00	5.00	5.00
cycles	2.00	2.00	7.50	7.25	9.00	7.25	9.50	9.50	6.50	6.50	13.17	12.83	13.00	5.00	5.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.88
Overall L1	13.17

Vectorization ratios

INT

all	46%
load	72%
store	77%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	20%

all	100%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	55%
load	72%
store	77%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	66%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	38%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 13.17 cycles. At this rate:

19% of peak load performance is reached (19.14 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
49% of peak store performance is reached (23.70 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4510e0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #704]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X20, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W19, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X21, XZR, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X23, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X28, [X0, #856]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4c43c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W0, [X20, #292]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X4, X20, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W19, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 451134 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X2, [X20, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ W1, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SMADDL X4, W19, W1, X2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X5, X23, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP D28, D27, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MOVZ W6, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X22, SP, #288	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
WHILELO P4.D, WZR, W6	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
LDP D6, D4, [X5, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
MOVZ X3, #48304	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z30.D, X3	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
CNTD X7, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
WHILELO P5.D, W7, W6	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
LDP D2, D23, [X5, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D17, [X23, #216]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D3, D26, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D0, D27, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D1, D27, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D5, D27, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
LDR D24, [X4, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D25, D22, [X5, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D18, D28, D17, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D7, D28, D3, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D8, D28, D26, D5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D19, D24, D23, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D9, D24, D25, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D16, D24, D22, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STP D19, D9, [SP, #288]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D16, [SP, #304]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LD1D {Z20.D}, P4/Z, [X22, MUL VL]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
FCMLT P6.D, P7/Z, Z20.D, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
MOVPRFX Z21, Z20	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FRINTM Z21.D, P7/M, Z20.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	3	1
FCMGT P0.D, P6/Z, Z20.D, Z30.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
EOR P1.B, P7/Z, P0.B, P7.B	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	1	1
MOVPRFX Z21.D, P1/Z, Z21.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FSUBR Z21.D, P1/M, Z21.D, Z20.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ST1D {Z21.D}, P4, [X22, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
B.EQ 4511f0 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x110>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LD1D {Z31.D}, P5/Z, [X22, #1, MUL VL]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADDVL X9, X22, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
FCMLT P6.D, P7/Z, Z31.D, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
MOVPRFX Z29, Z31	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FRINTM Z29.D, P7/M, Z31.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	3	1
FCMGT P15.D, P6/Z, Z31.D, Z30.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
EOR P2.B, P7/Z, P15.B, P7.B	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	1	1
MOVPRFX Z29.D, P2/Z, Z29.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FSUBR Z29.D, P2/M, Z29.D, Z31.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ST1D {Z29.D}, P5, [X9, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
LDP X10, X11, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X12, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X10, X11, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP D9, D30, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STR X12, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W11, [X23, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D8, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STR D30, [SP, #184]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
CMP W11, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 451578 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x498>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X13, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X14, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVK X13, #16325	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X14, #16357	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
FMOV D10, X13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D11, X14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDRSW X19, [X23, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X24, [X23, #760]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X15, X24, W11,UXTW #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
LDR X25, [X23, #784]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X26, X19, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X15, X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X23, X21, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼miniqmcreference::einspline_spo_ref::evaluate(qmcplusplus::ParticleSet const&, int, qmcplusplus::Vector >&)–	18.81	30.94
▼Loop 1140 - einspline_spo_ref.hpp:175-189 - exec–	0.01	0.01
○Loop 1144 - einspline_spo_ref.hpp:183-187 - exec	0.01	0.01
▼Loop 1137 - MultiBsplineData.hpp:54-57 - exec–	0	0
▼Loop 1138 - MultiBsplineEvalHelper.hpp:53-63 - exec–	0.01	0.02
▼Loop 1143 - MultiBsplineRef.hpp:63-71 - exec–	0.01	0.02
▼Loop 1142 - MultiBsplineRef.hpp:64-71 - exec–	0.01	0.02
○Loop 1141 - MultiBsplineRef.hpp:68-71 - exec	18.75	26.03
○Loop 1139 - MultiBsplineRef.hpp:49-49 - exec	0	0

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