OV - exec - Function qmcplusplus::SoaDistanceTableAAOMPTarget<double, 3u, 40>::evaluate(qmcplusplus::ParticleSet&)

	Function: qmcplusplus::SoaDistanceTableAAOMPTarget<double, 3u, 40>::evaluate(qmcplusplus::ParticleSe ...	Module: exec	Source: SoaDistanceTableAAOMPTarget.h:179-187 [...]	Coverage: 0.05%

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/SoaDistanceTableAAOMPTarget.h: 179 - 187

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179:   inline void evaluate(ParticleSet& P) override

180:   {

181:     ScopedTimer local_timer(evaluate_timer_);

182:

183:     constexpr T BigR = std::numeric_limits<T>::max();

184:     for (int iat = 1; iat < num_targets_; ++iat)

185:       DTD_BConds<T, D, SC>::computeDistances(P.R[iat], P.getCoordinates().getAllParticlePos(), distances_[iat].data(),

186:                                              displacements_[iat], 0, iat, iat);

187:   }

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/unique_ptr.h: 193 - 193

--------------------------------------------------------------------------------

193:       pointer    _M_ptr() const noexcept { return std::get<0>(_M_t); }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/RealSpacePositionsOMPTarget.h: 163 - 163

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163:   const PosVectorSoa& getAllParticlePos() const override { return RSoA_hostview; }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249

--------------------------------------------------------------------------------

242:   ScopeGuard(TIMER& t) : timer(t) { timer.start(); }

[...]

249:   ~ScopeGuard() { timer.stop(); }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds3DSoa.h: 234 - 255

--------------------------------------------------------------------------------

234: #pragma omp simd aligned(temp_r, px, py, pz, dx, dy, dz: QMC_SIMD_ALIGNMENT)

235:     for (int iat = first; iat < last; ++iat)

236:     {

237:       T displ_0 = px[iat] - x0;

238:       T displ_1 = py[iat] - y0;

239:       T displ_2 = pz[iat] - z0;

240:

241:       T ar_0 = displ_0 * g00 + displ_1 * g10 + displ_2 * g20;

242:       T ar_1 = displ_0 * g01 + displ_1 * g11 + displ_2 * g21;

243:       T ar_2 = displ_0 * g02 + displ_1 * g12 + displ_2 * g22;

244:

245:       //put them in the box

246:       ar_0 -= round(ar_0);

247:       ar_1 -= round(ar_1);

248:       ar_2 -= round(ar_2);

249:

250:       //unit2cart

251:       dx[iat] = ar_0 * r00 + ar_1 * r10 + ar_2 * r20;

252:       dy[iat] = ar_0 * r01 + ar_1 * r11 + ar_2 * r21;

253:       dz[iat] = ar_0 * r02 + ar_1 * r12 + ar_2 * r22;

254:

255:       temp_r[iat] = std::sqrt(dx[iat] * dx[iat] + dy[iat] * dy[iat] + dz[iat] * dz[iat]);

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h: 271 - 273

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271:   inline T* restrict data(size_t i) { return myData + i * nGhosts; }

272:   ///return the const pointer of the i-th components

273:   inline const T* restrict data(size_t i) const { return myData + i * nGhosts; }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 248

--------------------------------------------------------------------------------

223:     return X[i];

[...]

248:   inline pointer data() { return X; }

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h: 1131 - 1131

--------------------------------------------------------------------------------

1131: 	return *(this->_M_impl._M_start + __n);

0x4f4700 STP	X29, X30, [SP, #912]!

0x4f4704 ADD	X29, SP, #0

0x4f4708 STP	X23, X24, [SP, #48]

0x4f470c ORR	X24, XZR, X0

0x4f4710 STP	X25, X26, [SP, #64]

0x4f4714 ORR	X25, XZR, X1

0x4f4718 LDR	X0, [X0, #632]

0x4f471c STR	X0, [SP, #104]

0x4f4720 BL	4c43c0

0x4f4724 LDR	X11, [X24, #24]

0x4f4728 CMP	X11, #1

0x4f472c B.LS	4f48ec

0x4f4730 ADRP	X26,

0x4f4734 MOVZ	X23, #24

0x4f4738 STP	X19, X20, [SP, #16]

0x4f473c ADD	X26, X26, #2208

0x4f4740 ADD	X19, X24, #280

0x4f4744 PTRUE	P7.B, ALL

0x4f4748 STP	X21, X22, [SP, #32]

0x4f474c MOVZ	X22, #1

0x4f4750 CNTD	X21, ALL

0x4f4754 STP	X27, X28, [SP, #80]

0x4f4758 ADD	X28, X25, #40

0x4f475c MOVZ	W27, #40

    (3413) 0x4f4760 LDR	X0, [X25, #632]

    (3413) 0x4f4764 LDR	X4, [X28, #24]

    (3413) 0x4f4768 LDR	X1, [X0]

    (3413) 0x4f476c ADD	X20, X4, X23

    (3413) 0x4f4770 LDR	X2, [X1, #72]

    (3413) 0x4f4774 CMP	X2, X26

    (3413) 0x4f4778 B.NE	4f4904

    (3413) 0x4f477c ADD	X0, X0, #64

    (3413) 0x4f4780 LDR	X5, [X24, #96]

    (3413) 0x4f4784 UMADDL	X3, W22, W27, XZR

    (3413) 0x4f4788 MOVZ	X30, #0

    (3413) 0x4f478c ORR	W7, WZR, W22

    (3413) 0x4f4790 LD1RD	{Z31.D}, P7/Z, [X20]

    (3413) 0x4f4794 LD1RD	{Z30.D}, P7/Z, [X20, #1]

    (3413) 0x4f4798 LDR	X6, [X24, #72]

    (3413) 0x4f479c LD1RD	{Z29.D}, P7/Z, [X20, #2]

    (3413) 0x4f47a0 WHILELO	P6.D, WZR, W22

    (3413) 0x4f47a4 LDR	X8, [X0, #8]

    (3413) 0x4f47a8 ADD	X12, X5, X3

    (3413) 0x4f47ac LDR	X14, [X12, #8]

    (3413) 0x4f47b0 ADD	X13, X6, X3

    (3413) 0x4f47b4 LDR	X9, [X0, #24]

    (3413) 0x4f47b8 LDR	X15, [X12, #24]

    (3413) 0x4f47bc LDR	X16, [X13, #24]

    (3413) 0x4f47c0 ADD	X10, X9, X8,LSL #3

    (3413) 0x4f47c4 ADD	X0, X9, X8,LSL #4

    (3413) 0x4f47c8 ADD	X17, X15, X14,LSL #3

    (3413) 0x4f47cc ADD	X18, X15, X14,LSL #4

      (3411) 0x4f47d0 LD1D	{Z27.D}, P6/Z, [X10, X30,LSL #3]

      (3411) 0x4f47d4 LD1D	{Z28.D}, P6/Z, [X9, X30,LSL #3]

      (3411) 0x4f47d8 LD1D	{Z26.D}, P6/Z, [X0, X30,LSL #3]

      (3411) 0x4f47dc LD1RD	{Z1.D}, P7/Z, [X19, #13]

      (3411) 0x4f47e0 LD1RD	{Z2.D}, P7/Z, [X19, #12]

      (3411) 0x4f47e4 LD1RD	{Z24.D}, P7/Z, [X19, #10]

      (3411) 0x4f47e8 LD1RD	{Z25.D}, P7/Z, [X19, #9]

      (3411) 0x4f47ec LD1RD	{Z17.D}, P7/Z, [X19, #16]

      (3411) 0x4f47f0 LD1RD	{Z18.D}, P7/Z, [X19, #15]

      (3411) 0x4f47f4 FSUB	Z3.D, Z27.D, Z30.D

      (3411) 0x4f47f8 FSUB	Z5.D, Z28.D, Z31.D

      (3411) 0x4f47fc FSUB	Z6.D, Z26.D, Z29.D

      (3411) 0x4f4800 LD1RD	{Z0.D}, P7/Z, [X19, #14]

      (3411) 0x4f4804 LD1RD	{Z23.D}, P7/Z, [X19, #11]

      (3411) 0x4f4808 LD1RD	{Z16.D}, P7/Z, [X19, #17]

      (3411) 0x4f480c FMUL	Z4.D, Z1.D, Z3.D

      (3411) 0x4f4810 FMUL	Z7.D, Z24.D, Z3.D

      (3411) 0x4f4814 FMLA	Z4.D, P7/M, Z2.D, Z5.D

      (3411) 0x4f4818 FMLA	Z7.D, P7/M, Z25.D, Z5.D

      (3411) 0x4f481c FMAD	Z0.D, P7/M, Z6.D, Z4.D

      (3411) 0x4f4820 FMAD	Z23.D, P7/M, Z6.D, Z7.D

      (3411) 0x4f4824 FMUL	Z19.D, Z17.D, Z3.D

      (3411) 0x4f4828 FMLA	Z19.D, P7/M, Z18.D, Z5.D

      (3411) 0x4f482c FMAD	Z16.D, P7/M, Z6.D, Z19.D

      (3411) 0x4f4830 LD1RD	{Z20.D}, P7/Z, [X19, #1]

      (3411) 0x4f4834 LD1RD	{Z3.D}, P7/Z, [X19]

      (3411) 0x4f4838 LD1RD	{Z5.D}, P7/Z, [X19, #2]

      (3411) 0x4f483c MOVPRFX	Z21, Z0

      (3411) 0x4f4840 FRINTA	Z21.D, P7/M, Z0.D

      (3411) 0x4f4844 MOVPRFX	Z22, Z23

      (3411) 0x4f4848 FRINTA	Z22.D, P7/M, Z23.D

      (3411) 0x4f484c FSUB	Z27.D, Z0.D, Z21.D

      (3411) 0x4f4850 FSUB	Z28.D, Z23.D, Z22.D

      (3411) 0x4f4854 MOVPRFX	Z4, Z16

      (3411) 0x4f4858 FRINTA	Z4.D, P7/M, Z16.D

      (3411) 0x4f485c FMUL	Z1.D, Z20.D, Z27.D

      (3411) 0x4f4860 FSUB	Z26.D, Z16.D, Z4.D

      (3411) 0x4f4864 FMLA	Z1.D, P7/M, Z3.D, Z28.D

      (3411) 0x4f4868 FMAD	Z5.D, P7/M, Z26.D, Z1.D

      (3411) 0x4f486c ST1D	{Z5.D}, P6, [X15, X30,LSL #3]

      (3411) 0x4f4870 LD1RD	{Z6.D}, P7/Z, [X19, #3]

      (3411) 0x4f4874 LD1RD	{Z0.D}, P7/Z, [X19, #4]

      (3411) 0x4f4878 LD1RD	{Z2.D}, P7/Z, [X19, #5]

      (3411) 0x4f487c FMUL	Z24.D, Z0.D, Z27.D

      (3411) 0x4f4880 FMLA	Z24.D, P7/M, Z6.D, Z28.D

      (3411) 0x4f4884 FMAD	Z2.D, P7/M, Z26.D, Z24.D

      (3411) 0x4f4888 ST1D	{Z2.D}, P6, [X17, X30,LSL #3]

      (3411) 0x4f488c LD1RD	{Z7.D}, P7/Z, [X19, #7]

      (3411) 0x4f4890 LD1RD	{Z25.D}, P7/Z, [X19, #6]

      (3411) 0x4f4894 LD1RD	{Z17.D}, P7/Z, [X19, #8]

      (3411) 0x4f4898 FMUL	Z23.D, Z7.D, Z27.D

      (3411) 0x4f489c FMLA	Z23.D, P7/M, Z25.D, Z28.D

      (3411) 0x4f48a0 FMAD	Z17.D, P7/M, Z26.D, Z23.D

      (3411) 0x4f48a4 ST1D	{Z17.D}, P6, [X18, X30,LSL #3]

      (3411) 0x4f48a8 LD1D	{Z18.D}, P6/Z, [X17, X30,LSL #3]

      (3411) 0x4f48ac LD1D	{Z19.D}, P6/Z, [X15, X30,LSL #3]

      (3411) 0x4f48b0 FMUL	Z16.D, Z18.D, Z18.D

      (3411) 0x4f48b4 FMLA	Z16.D, P7/M, Z19.D, Z19.D

      (3411) 0x4f48b8 FMLA	Z16.D, P7/M, Z17.D, Z17.D

      (3411) 0x4f48bc FSQRT	Z16.D, P7/M, Z16.D

      (3411) 0x4f48c0 ST1D	{Z16.D}, P6, [X16, X30,LSL #3]

      (3411) 0x4f48c4 ADD	X30, X30, X21

      (3411) 0x4f48c8 WHILELO	P6.D, W30, W7

      (3411) 0x4f48cc B.NE	4f47d0

    (3413) 0x4f48d0 ADD	X22, X22, #1

    (3413) 0x4f48d4 ADD	X23, X23, #24

    (3413) 0x4f48d8 CMP	X22, X11

    (3413) 0x4f48dc B.CC	4f4760

(3414) 0x4f48e0 LDP	X19, X20, [SP, #16]

(3414) 0x4f48e4 LDP	X21, X22, [SP, #32]

(3414) 0x4f48e8 LDP	X27, X28, [SP, #80]

(3414) 0x4f48ec LDR	X0, [SP, #104]

(3414) 0x4f48f0 BL	4c4660

(3414) 0x4f48f4 LDP	X23, X24, [SP, #48]

(3414) 0x4f48f8 LDP	X25, X26, [SP, #64]

(3414) 0x4f48fc LDP	X29, X30, [SP], #112

(3414) 0x4f4900 RET

  (3412) 0x4f4904 BLR	X2

  (3412) 0x4f4908 LDR	X11, [X24, #24]

  (3412) 0x4f490c PTRUE	P7.B, ALL

  (3412) 0x4f4910 B	4f4780

0x4f4914 ORR	X22, XZR, X0

0x4f4918 LDR	X0, [SP, #104]

0x4f491c BL	4c4660

0x4f4920 ORR	X0, XZR, X22

0x4f4924 BL	403e10

0x4f4928 HINT	#0

0x4f492c HINT	#0

0x4f4930 HINT	#0

0x4f4934 HINT	#0

0x4f4938 HINT	#0

0x4f493c HINT	#0

Coverage (%)	Name	Source Location	Module

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	SoaDistanceTableAAOMPTarget.h:179-187
Module	exec

The function is defined in:

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/SoaDistanceTableAAOMPTarget.h:179-187
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/unique_ptr.h:193
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/RealSpacePositionsOMPTarget.h:163
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds3DSoa.h:234-255
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:271-273
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,248
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h:1131

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 4.75 to 1.00 cycles (4.75x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 30% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 4.75 to 3.50 cycles (1.36x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 4.75 to 1.50 cycles (3.17x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 24 bytes. The binary function is storing 104 bytes.

General properties

nb instructions	35
loop length	140
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

3.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	2.00	2.00	4.75	4.75	4.75	4.75	0.00	0.00	0.00	0.00	3.50	3.50	3.00	3.50	3.50
cycles	2.00	2.00	4.75	4.75	4.75	4.75	0.00	0.00	0.00	0.00	3.50	3.50	3.00	3.50	3.50

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	3.63
Overall L1	4.75

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 4.75 cycles. At this rate:

5% of peak load performance is reached (5.05 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
45% of peak store performance is reached (21.89 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4f4700

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #912]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X24, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X25, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X0, #632]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X0, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 4c43c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LS 4f48ec <_ZN11qmcplusplus27SoaDistanceTableAAOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE+0x1ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X26, <2004c1730>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X23, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X26, X26, #2208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X19, X24, #280	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X22, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CNTD X21, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X28, X25, #40	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W27, #40	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X22, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 4c4660 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403e10 <@plt_start@+0x420>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Source file and lines	SoaDistanceTableAAOMPTarget.h:179-187
Module	exec

The function is defined in:

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/SoaDistanceTableAAOMPTarget.h:179-187
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/unique_ptr.h:193
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/RealSpacePositionsOMPTarget.h:163
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/Lattice/ParticleBConds3DSoa.h:234-255
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:271-273
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,248
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h:1131

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 4.75 to 1.00 cycles (4.75x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 4.75 to 1.50 cycles (3.17x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 24 bytes. The binary function is storing 104 bytes.

General properties

nb instructions	35
loop length	140
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

3.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	2.00	2.00	4.75	4.75	4.75	4.75	0.00	0.00	0.00	0.00	3.50	3.50	3.00	3.50	3.50
cycles	2.00	2.00	4.75	4.75	4.75	4.75	0.00	0.00	0.00	0.00	3.50	3.50	3.00	3.50	3.50

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	3.63
Overall L1	4.75

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 4.75 cycles. At this rate:

5% of peak load performance is reached (5.05 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
45% of peak store performance is reached (21.89 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4f4700

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #912]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X24, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X25, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X0, #632]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X0, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 4c43c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LS 4f48ec <_ZN11qmcplusplus27SoaDistanceTableAAOMPTargetIdLj3ELi40EE8evaluateERNS_11ParticleSetE+0x1ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X26, <2004c1730>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X23, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X26, X26, #2208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X19, X24, #280	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X22, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CNTD X21, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X28, X25, #40	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W27, #40	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X22, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 4c4660 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403e10 <@plt_start@+0x420>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼qmcplusplus::SoaDistanceTableAAOMPTarget::evaluate(qmcplusplus::ParticleSet&)–	0.05	0.09
▼Loop 3414 - SoaDistanceTableAAOMPTarget.h:184-187 - exec–	0	0
▼Loop 3412 - stl_vector.h:1131-1131 - exec–	0	0
▼Loop 3413 - SoaDistanceTableAAOMPTarget.h:184-185 - exec–	0	0.01
○Loop 3411 - ParticleBConds3DSoa.h:237-255 - exec	0.05	0.07

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code