OV - exec - Function miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector<double, std::allocator<double> >&)

	Function: miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::evalua ...	Module: exec	Source: DiracDeterminantRef.cpp:210-218 [...]	Coverage: 0.26%

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/unique_ptr.h: 193 - 193

--------------------------------------------------------------------------------

193:       pointer    _M_ptr() const noexcept { return std::get<0>(_M_t); }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DelayedUpdate.h: 98 - 113

--------------------------------------------------------------------------------

98:     if (delay_count == 0)

99:     {

100:       // Ainv is fresh, directly access Ainv

101:       std::copy_n(Ainv[rowchanged], invRow.size(), invRow.data());

102:       return;

103:     }

104:     const T cone(1);

105:     const T czero(0);

106:     const int norb     = Ainv.rows();

107:     const int lda_Binv = Binv.cols();

108:     // save Ainv[rowchanged] to invRow

109:     std::copy_n(Ainv[rowchanged], norb, invRow.data());

110:     // multiply V (NxK) Binv(KxK) U(KxN) invRow right to the left

111:     BLAS::gemv('T', norb, delay_count, cone, U.data(), norb, invRow.data(), 1, czero, p.data(), 1);

112:     BLAS::gemv('N', delay_count, delay_count, cone, Binv.data(), lda_Binv, p.data(), 1, czero, Binv[delay_count], 1);

113:     BLAS::gemv('N', norb, delay_count, -cone, V.data(), norb, Binv[delay_count], 1, cone, invRow.data(), 1);

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h: 78 - 217

--------------------------------------------------------------------------------

78:   inline size_type cols() const { return D2; }

[...]

214:   inline const Type_t* operator[](size_type i) const { return X.data() + i * D2; }

215:

216:   /// returns a pointer of i-th row, g++ iterator problem

217:   inline Type_t* operator[](size_type i) { return X.data() + i * D2; }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/SPOSet.h: 83 - 86

--------------------------------------------------------------------------------

83:     for (int iat = 0; iat < VP.getTotalNum(); ++iat)

84:     {

85:       evaluate(VP, iat, psi);

86:       ratios[iat] = simd::dot(psi.data(), psiinv.data(), psi.size());

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp: 82 - 83

--------------------------------------------------------------------------------

82:   for (int i = 0; i < n; i++)

83:     res += a[i] * b[i];

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp: 210 - 218

--------------------------------------------------------------------------------

210: void DiracDeterminantRef<DU_TYPE>::evaluateRatios(VirtualParticleSet& VP, std::vector<ValueType>& ratios)

211: {

212:   SPOVTimer->start();

213:   const int WorkingIndex = VP.refPtcl - FirstIndex;

214:   invRow_id              = WorkingIndex;

215:   updateEng.getInvRow(psiM, WorkingIndex, invRow);

216:   Phi->evaluateDetRatios(VP, psiV, invRow, ratios);

217:   SPOVTimer->stop();

218: }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 178 - 249

--------------------------------------------------------------------------------

178:   inline size_t size() const { return nLocal; }

[...]

248:   inline pointer data() { return X; }

249:   inline const_pointer data() const { return X; }

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h: 413 - 453

--------------------------------------------------------------------------------

413: 	{ *__to = *__from; }

[...]

451: 	  if (__builtin_expect(_Num > 1, true))

452: 	    __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);

453: 	  else if (_Num == 1)

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algo.h: 683 - 709

--------------------------------------------------------------------------------

683:     { return std::copy(__first, __first + __n, __result); }

[...]

709:       if (__n2 <= 0)

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp: 187 - 187

--------------------------------------------------------------------------------

187:     dgemv(trans_in, n, m, alpha, amat, lda, x, incx, beta, y, incy);

0x466c20 SUB	SP, SP, #224

0x466c24 STP	X29, X30, [SP, #32]

0x466c28 ADD	X29, SP, #32

0x466c2c STP	X19, X20, [SP, #48]

0x466c30 STP	X21, X22, [SP, #64]

0x466c34 STP	X23, X24, [SP, #80]

0x466c38 ORR	X23, XZR, X0

0x466c3c ORR	X24, XZR, X1

0x466c40 STP	X25, X26, [SP, #96]

0x466c44 ADD	X26, X0, #520

0x466c48 ORR	X25, XZR, X2

0x466c4c STP	X27, X28, [SP, #112]

0x466c50 LDR	X0, [X0, #1120]

0x466c54 BL	4c43c0

0x466c58 LDR	W0, [X24, #672]

0x466c5c LDR	W2, [X23, #1144]

0x466c60 LDR	X1, [X23, #216]

0x466c64 LDR	X4, [X23, #256]

0x466c68 SUB	W5, W0, W2

0x466c6c SBFM	X3, X5, #0, #31

0x466c70 STR	W5, [X23, #1072]

0x466c74 MADD	X6, X3, X1, XZR

0x466c78 LDR	W8, [X26, #360]

0x466c7c UBFM	X7, X6, #61, #60

0x466c80 ADD	X1, X4, X7

0x466c84 CBZ	W8, 466f80

0x466c88 LDR	X9, [X23, #656]

0x466c8c ADD	X21, X23, #648

0x466c90 ADD	X22, X23, #1032

0x466c94 LDR	X20, [X23, #208]

0x466c98 LDR	X6, [X22, #24]

0x466c9c STR	D15, [SP, #128]

0x466ca0 STR	X9, [SP, #144]

0x466ca4 CMP	W20, #0

0x466ca8 B.LE	466cc8

0x466cac UBFM	X2, X20, #61, #31

0x466cb0 CMP	X2, #8

0x466cb4 B.EQ	466fa0

0x466cb8 ORR	X0, XZR, X6

0x466cbc BL	403a40

0x466cc0 LDR	X6, [X22, #24]

0x466cc4 LDR	W8, [X26, #360]

0x466cc8 FMOV	D15, #1.0000000

0x466ccc MOVZ	W19, #1

0x466cd0 ADD	X27, SP, #216

0x466cd4 LDR	X11, [X23, #840]

0x466cd8 ADD	X28, SP, #204

0x466cdc ADD	X9, X23, #816

0x466ce0 MOVZ	W10, #84

0x466ce4 ADD	X7, SP, #200

0x466ce8 STP	W20, W8, [SP, #188]

0x466cec ADD	X5, SP, #196

0x466cf0 ADD	X3, SP, #208

0x466cf4 STR	X28, [SP, #16]

0x466cf8 ADD	X2, SP, #192

0x466cfc ADD	X0, SP, #187

0x466d00 STP	W20, W19, [SP, #196]

0x466d04 LDR	X4, [X23, #568]

0x466d08 ADD	X1, SP, #188

0x466d0c STP	X27, X11, [SP]

0x466d10 STR	X9, [SP, #168]

0x466d14 STRB	W10, [SP, #187]

0x466d18 STR	W19, [SP, #204]

0x466d1c STR	D15, [SP, #208]

0x466d20 STR	XZR, [SP, #216]

0x466d24 BL	403cf0

0x466d28 LDR	W14, [X26, #360]

0x466d2c MOVZ	W12, #78

0x466d30 ADD	X13, X23, #672

0x466d34 STR	X27, [SP]

0x466d38 ADD	X7, SP, #200

0x466d3c ADD	X5, SP, #196

0x466d40 STP	W19, W19, [SP, #200]

0x466d44 ADD	X3, SP, #208

0x466d48 ADD	X2, SP, #192

0x466d4c LDR	X18, [SP, #168]

0x466d50 ADD	X1, SP, #188

0x466d54 ADD	X0, SP, #187

0x466d58 STR	W12, [SP, #156]

0x466d5c STP	W14, W14, [SP, #188]

0x466d60 SBFM	X15, X14, #0, #31

0x466d64 LDR	X4, [X21, #8]

0x466d68 STR	X28, [SP, #16]

0x466d6c LDR	W9, [SP, #144]

0x466d70 STR	X13, [SP, #160]

0x466d74 LDR	X6, [X18, #24]

0x466d78 MADD	X8, X15, X4, XZR

0x466d7c STRB	W12, [SP, #187]

0x466d80 LDR	X4, [X23, #696]

0x466d84 STR	W9, [SP, #196]

0x466d88 STR	D15, [SP, #208]

0x466d8c STR	XZR, [SP, #216]

0x466d90 ADD	X10, X4, X8,LSL #3

0x466d94 STR	X10, [SP, #8]

0x466d98 BL	403cf0

0x466d9c LDR	W26, [X26, #360]

0x466da0 FMOV	D0, #-1.0000000

0x466da4 ADD	X7, SP, #200

0x466da8 STR	X27, [SP]

0x466dac ADD	X5, SP, #196

0x466db0 ADD	X3, SP, #208

0x466db4 LDR	X13, [SP, #160]

0x466db8 ADD	X2, SP, #192

0x466dbc ADD	X1, SP, #188

0x466dc0 STP	W20, W19, [SP, #196]

0x466dc4 ADD	X0, SP, #187

0x466dc8 STP	D0, D15, [SP, #208]

0x466dcc STP	W20, W26, [SP, #188]

0x466dd0 SBFM	X11, X26, #0, #31

0x466dd4 LDR	X21, [X21, #8]

0x466dd8 STR	W19, [SP, #204]

0x466ddc LDR	X20, [X13, #24]

0x466de0 LDR	X22, [X22, #24]

0x466de4 MADD	X27, X11, X21, XZR

0x466de8 LDR	W6, [SP, #156]

0x466dec STP	X22, X28, [SP, #8]

0x466df0 LDR	X4, [X23, #632]

0x466df4 STRB	W6, [SP, #187]

0x466df8 ADD	X6, X20, X27,LSL #3

0x466dfc BL	403cf0

0x466e00 LDR	D15, [SP, #128]

0x466e04 ADRP	X17,

0x466e08 ADD	X27, X23, #400

0x466e0c LDR	X28, [X23, #1136]

0x466e10 ADD	X30, X17, #1632

0x466e14 LDR	X7, [X28]

0x466e18 LDR	X5, [X7, #32]

0x466e1c CMP	X5, X30

0x466e20 B.NE	466f30

0x466e24 LDR	X2, [X24, #608]

0x466e28 MOVZ	X26, #0

0x466e2c ADD	X19, X23, #1032

0x466e30 CBZ	X2, 466f48

0x466e34 CNTW	X21, ALL

0x466e38 CNTD	X22, ALL

0x466e3c ADD	W20, W21, #3

(1372) 0x466e40 LDR	X7, [X7, #16]

(1372) 0x466e44 ORR	X3, XZR, X27

(1372) 0x466e48 ORR	W2, WZR, W26

(1372) 0x466e4c ORR	X1, XZR, X24

(1372) 0x466e50 ORR	X0, XZR, X28

(1372) 0x466e54 BLR	X7

(1372) 0x466e58 LDR	X12, [X27, #8]

(1372) 0x466e5c LDR	X3, [X19, #24]

(1372) 0x466e60 LDR	X14, [X27, #24]

(1372) 0x466e64 CMP	W12, #0

(1372) 0x466e68 B.LE	466f6c

(1372) 0x466e6c SUB	W0, W12, #1

(1372) 0x466e70 CMP	W0, W20

(1372) 0x466e74 B.CC	466f74

(1372) 0x466e78 MOVZ	W15, #0

(1372) 0x466e7c SUB	W1, W12, W21

(1372) 0x466e80 DUP	Z30.D, #0

(1372) 0x466e84 ORR	X8, XZR, X14

(1372) 0x466e88 ORR	X4, XZR, X3

(1372) 0x466e8c PTRUE	P7.B, ALL

(1372) 0x466e90 CNTB	X18, ALL, MUL #2

(1372) 0x466e94 ORR	Z3.D, Z30.D, Z30.D

(1372) 0x466e98 HINT	#0

(1372) 0x466e9c HINT	#0

  (1374) 0x466ea0 ADD	W15, W15, W21

  (1374) 0x466ea4 LD1D	{Z28.D}, P7/Z, [X8, #1, MUL VL]

  (1374) 0x466ea8 LD1D	{Z27.D}, P7/Z, [X4, #1, MUL VL]

  (1374) 0x466eac LD1D	{Z4.D}, P7/Z, [X8, MUL VL]

  (1374) 0x466eb0 LD1D	{Z5.D}, P7/Z, [X4, MUL VL]

  (1374) 0x466eb4 ADD	X8, X8, X18

  (1374) 0x466eb8 ADD	X4, X4, X18

  (1374) 0x466ebc FMLA	Z30.D, P7/M, Z28.D, Z27.D

  (1374) 0x466ec0 FMLA	Z3.D, P7/M, Z4.D, Z5.D

  (1374) 0x466ec4 CMP	W1, W15

  (1374) 0x466ec8 B.CS	466ea0

(1372) 0x466ecc FADD	Z29.D, Z3.D, Z30.D

(1372) 0x466ed0 CMP	W12, W15

(1372) 0x466ed4 B.EQ	466f08

(1372) 0x466ed8 UBFM	X9, X15, #61, #31

(1372) 0x466edc MOVZ	X13, #0

(1372) 0x466ee0 ADD	X11, X14, X9

(1372) 0x466ee4 ADD	X6, X3, X9

(1372) 0x466ee8 SUB	W10, W12, W15

(1372) 0x466eec WHILELO	P0.D, WZR, W10

  (1373) 0x466ef0 LD1D	{Z26.D}, P0/Z, [X11, X13,LSL #3]

  (1373) 0x466ef4 LD1D	{Z25.D}, P0/Z, [X6, X13,LSL #3]

  (1373) 0x466ef8 ADD	X13, X13, X22

  (1373) 0x466efc FMLA	Z29.D, P0/M, Z26.D, Z25.D

  (1373) 0x466f00 WHILELO	P0.D, W13, W10

  (1373) 0x466f04 B.NE	466ef0

(1372) 0x466f08 PTRUE	P1.B, ALL

(1372) 0x466f0c FADDV	D2, P1, Z29.D

(1372) 0x466f10 LDR	X17, [X25]

(1372) 0x466f14 LDR	X16, [X24, #608]

(1372) 0x466f18 STR	D2, [X17, X26,UXTW #3]

(1372) 0x466f1c ADD	X26, X26, #1

(1372) 0x466f20 CMP	X26, X16

(1372) 0x466f24 B.CS	466f48

(1372) 0x466f28 LDR	X7, [X28]

(1372) 0x466f2c B	466e40

0x466f30 ORR	X4, XZR, X25

0x466f34 ORR	X2, XZR, X27

0x466f38 ORR	X1, XZR, X24

0x466f3c ORR	X0, XZR, X28

0x466f40 ADD	X3, X23, #1032

0x466f44 BLR	X5

0x466f48 LDR	X0, [X23, #1120]

0x466f4c LDP	X29, X30, [SP, #32]

0x466f50 LDP	X19, X20, [SP, #48]

0x466f54 LDP	X21, X22, [SP, #64]

0x466f58 LDP	X25, X26, [SP, #96]

0x466f5c LDP	X27, X28, [SP, #112]

0x466f60 LDP	X23, X24, [SP, #80]

0x466f64 ADD	SP, SP, #224

0x466f68 B	4c4660

(1372) 0x466f6c MOVI	D2, #0

(1372) 0x466f70 B	466f10

(1372) 0x466f74 MOVZ	W15, #0

(1372) 0x466f78 DUP	Z29.D, #0

(1372) 0x466f7c B	466ed8

0x466f80 LDR	X16, [X23, #1040]

0x466f84 CBZ	X16, 466e04

0x466f88 UBFM	X2, X16, #61, #60

0x466f8c LDR	X0, [X23, #1056]

0x466f90 CMP	X2, #8

0x466f94 B.LE	466fac

0x466f98 BL	403a40

0x466f9c B	466e04

0x466fa0 LDR	D31, [X4, X7]

0x466fa4 STR	D31, [X6]

0x466fa8 B	466cc8

0x466fac B.NE	466e04

0x466fb0 LDR	D1, [X4, X7]

0x466fb4 STR	D1, [X0]

0x466fb8 B	466e04

0x466fbc HINT	#0

Coverage (%)	Name	Source Location	Module

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	DiracDeterminantRef.cpp:210-218
Module	exec

The function is defined in:

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/unique_ptr.h:193
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DelayedUpdate.h:98-113
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:78,214-217
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/SPOSet.h:83-86
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:82-83
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:210-218
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:178,248-249
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h:413,451-453
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algo.h:683,709
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:187

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 26.67 to 3.33 cycles (8.00x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 23% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 26.67 to 3.79 cycles (7.03x speedup).

Details

2% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
16% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 26.67 to 3.50 cycles (7.62x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 352 bytes. The binary function is storing 335 bytes.

General properties

nb instructions	167
loop length	668
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

20.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	9.50	9.50	18.00	18.00	18.00	18.00	3.00	3.00	1.00	1.00	26.67	26.67	26.67	16.00	16.00
cycles	9.50	9.50	18.00	18.00	18.00	18.00	3.00	3.00	1.00	1.00	26.67	26.67	26.67	16.00	16.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	20.75
Overall L1	26.67

Vectorization ratios

all	2%
load	0%
store	16%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 26.67 cycles. At this rate:

13% of peak load performance is reached (13.20 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
26% of peak store performance is reached (12.56 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 466c20

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X22, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X23, X24, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X23, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X24, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X26, X0, #520	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X25, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X28, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X0, [X0, #1120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 4c43c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W0, [X24, #672]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR W2, [X23, #1144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X1, [X23, #216]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X4, [X23, #256]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB W5, W0, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SBFM X3, X5, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W5, [X23, #1072]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MADD X6, X3, X1, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LDR W8, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X7, X6, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X4, X7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CBZ W8, 466f80 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x360>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X9, [X23, #656]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X21, X23, #648	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X22, X23, #1032	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X20, [X23, #208]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X6, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR D15, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR X9, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP W20, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 466cc8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0xa8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X2, X20, #61, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X2, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 466fa0 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x380>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403a40 <@plt_start@+0x50>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X6, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR W8, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FMOV D15, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVZ W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X27, SP, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X11, [X23, #840]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X28, SP, #204	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X9, X23, #816	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W10, #84	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, SP, #200	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP W20, W8, [SP, #188]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X5, SP, #196	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, SP, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X28, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X2, SP, #192	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #187	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP W20, W19, [SP, #196]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X4, [X23, #568]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X1, SP, #188	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X11, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X9, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STRB W10, [SP, #187]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W19, [SP, #204]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D15, [SP, #208]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403cf0 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W14, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ W12, #78	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X13, X23, #672	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X27, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X7, SP, #200	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, SP, #196	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP W19, W19, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X3, SP, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X2, SP, #192	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X18, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X1, SP, #188	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #187	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W12, [SP, #156]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP W14, W14, [SP, #188]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SBFM X15, X14, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X4, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X28, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W9, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X13, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X6, [X18, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X15, X4, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STRB W12, [SP, #187]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X4, [X23, #696]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR W9, [SP, #196]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D15, [SP, #208]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X10, X4, X8,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X10, [SP, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403cf0 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W26, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FMOV D0, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X7, SP, #200	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X27, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X5, SP, #196	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, SP, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X13, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X2, SP, #192	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, SP, #188	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP W20, W19, [SP, #196]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X0, SP, #187	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D0, D15, [SP, #208]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP W20, W26, [SP, #188]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SBFM X11, X26, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X21, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR W19, [SP, #204]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X20, [X13, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X22, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X27, X11, X21, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LDR W6, [SP, #156]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X22, X28, [SP, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X4, [X23, #632]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STRB W6, [SP, #187]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X6, X20, X27,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403cf0 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D15, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ADRP X17, <200452e04>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X27, X23, #400	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X28, [X23, #1136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X30, X17, #1632	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X7, [X28]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X5, [X7, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X5, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 466f30 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x310>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X2, [X24, #608]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ X26, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X19, X23, #1032	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CBZ X2, 466f48 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x328>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CNTW X21, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
CNTD X22, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD W20, W21, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X4, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X2, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X1, XZR, X24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X23, #1032	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BLR X5	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X0, [X23, #1120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X29, X30, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X19, X20, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X21, X22, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X25, X26, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X27, X28, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X23, X24, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
ADD SP, SP, #224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 4c4660 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X16, [X23, #1040]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X16, 466e04 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x1e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X2, X16, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X23, #1056]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X2, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 466fac <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x38c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 403a40 <@plt_start@+0x50>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 466e04 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x1e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D31, [X4, X7]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STR D31, [X6]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 466cc8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0xa8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B.NE 466e04 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x1e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D1, [X4, X7]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STR D1, [X0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 466e04 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x1e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0

Source file and lines	DiracDeterminantRef.cpp:210-218
Module	exec

The function is defined in:

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/unique_ptr.h:193
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DelayedUpdate.h:98-113
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:78,214-217
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/SPOSet.h:83-86
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:82-83
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:210-218
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:178,248-249
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h:413,451-453
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algo.h:683,709
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:187

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 26.67 to 3.33 cycles (8.00x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

2% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
16% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 26.67 to 3.50 cycles (7.62x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 352 bytes. The binary function is storing 335 bytes.

General properties

nb instructions	167
loop length	668
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

20.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	9.50	9.50	18.00	18.00	18.00	18.00	3.00	3.00	1.00	1.00	26.67	26.67	26.67	16.00	16.00
cycles	9.50	9.50	18.00	18.00	18.00	18.00	3.00	3.00	1.00	1.00	26.67	26.67	26.67	16.00	16.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	20.75
Overall L1	26.67

Vectorization ratios

all	2%
load	0%
store	16%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 26.67 cycles. At this rate:

13% of peak load performance is reached (13.20 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
26% of peak store performance is reached (12.56 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 466c20

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X22, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X23, X24, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X23, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X24, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X26, X0, #520	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X25, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X28, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X0, [X0, #1120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 4c43c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W0, [X24, #672]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR W2, [X23, #1144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X1, [X23, #216]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X4, [X23, #256]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB W5, W0, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SBFM X3, X5, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W5, [X23, #1072]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MADD X6, X3, X1, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LDR W8, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X7, X6, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X4, X7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CBZ W8, 466f80 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x360>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X9, [X23, #656]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X21, X23, #648	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X22, X23, #1032	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X20, [X23, #208]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X6, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR D15, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR X9, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP W20, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 466cc8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0xa8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X2, X20, #61, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X2, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 466fa0 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x380>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403a40 <@plt_start@+0x50>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X6, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR W8, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FMOV D15, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVZ W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X27, SP, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X11, [X23, #840]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X28, SP, #204	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X9, X23, #816	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W10, #84	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, SP, #200	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP W20, W8, [SP, #188]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X5, SP, #196	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, SP, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X28, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X2, SP, #192	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #187	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP W20, W19, [SP, #196]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X4, [X23, #568]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X1, SP, #188	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X11, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X9, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STRB W10, [SP, #187]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W19, [SP, #204]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D15, [SP, #208]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403cf0 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W14, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ W12, #78	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X13, X23, #672	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X27, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X7, SP, #200	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, SP, #196	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP W19, W19, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X3, SP, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X2, SP, #192	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X18, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X1, SP, #188	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #187	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W12, [SP, #156]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP W14, W14, [SP, #188]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SBFM X15, X14, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X4, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X28, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W9, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X13, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X6, [X18, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X15, X4, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STRB W12, [SP, #187]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X4, [X23, #696]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR W9, [SP, #196]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D15, [SP, #208]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X10, X4, X8,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X10, [SP, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403cf0 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W26, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FMOV D0, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X7, SP, #200	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X27, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X5, SP, #196	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, SP, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X13, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X2, SP, #192	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, SP, #188	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP W20, W19, [SP, #196]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X0, SP, #187	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D0, D15, [SP, #208]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP W20, W26, [SP, #188]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SBFM X11, X26, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X21, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR W19, [SP, #204]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X20, [X13, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X22, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X27, X11, X21, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
LDR W6, [SP, #156]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X22, X28, [SP, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X4, [X23, #632]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STRB W6, [SP, #187]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X6, X20, X27,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403cf0 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D15, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ADRP X17, <200452e04>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X27, X23, #400	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X28, [X23, #1136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X30, X17, #1632	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X7, [X28]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X5, [X7, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X5, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 466f30 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x310>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X2, [X24, #608]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ X26, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X19, X23, #1032	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CBZ X2, 466f48 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x328>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CNTW X21, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
CNTD X22, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD W20, W21, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X4, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X2, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X1, XZR, X24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X23, #1032	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BLR X5	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X0, [X23, #1120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X29, X30, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X19, X20, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X21, X22, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X25, X26, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X27, X28, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X23, X24, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
ADD SP, SP, #224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 4c4660 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X16, [X23, #1040]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X16, 466e04 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x1e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UBFM X2, X16, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X23, #1056]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X2, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 466fac <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x38c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 403a40 <@plt_start@+0x50>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 466e04 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x1e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D31, [X4, X7]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STR D31, [X6]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 466cc8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0xa8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B.NE 466e04 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x1e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D1, [X4, X7]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STR D1, [X0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 466e04 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x1e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0

Name	Coverage (%)	Time (s)
▼miniqmcreference::DiracDeterminantRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)–	0.26	0.42
▼Loop 1372 - SPOSet.h:83-86 - exec–	0.02	0.02
○Loop 1374 - inner_product.hpp:82-83 - exec	0.24	0.33
○Loop 1373 - inner_product.hpp:82-83 - exec	0	0

Report Configuration

Code clean check

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Vectorization

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Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

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Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code