OV - exec - Function miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::acceptMove(qmcplusplus::ParticleSet&, int)

	Function: miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::accept ...	Module: exec	Source: DiracDeterminantRef.cpp:123-139 [...]	Coverage: 0.01%

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DelayedUpdate.h: 128 - 230

--------------------------------------------------------------------------------

128:     const int norb     = Ainv.rows();

129:     const int lda_Binv = Binv.cols();

130:     std::copy_n(Ainv[rowchanged], norb, V[delay_count]);

131:     std::copy_n(psiV.data(), norb, U[delay_count]);

132:     delay_list[delay_count] = rowchanged;

133:     // the new Binv is [[X Y] [Z x]]

134:     BLAS::gemv('T', norb, delay_count + 1, cminusone, V.data(), norb, psiV.data(), 1, czero, p.data(), 1);

135:     // x

136:     T y = -p[delay_count];

137:     for (int i = 0; i < delay_count; i++)

138:       y += Binv[delay_count][i] * p[i];

139:     Binv[delay_count][delay_count] = y = T(1) / y;

140:     // Y

141:     BLAS::gemv('T', delay_count, delay_count, y, Binv.data(), lda_Binv, p.data(), 1, czero, Binv.data() + delay_count,

142:                lda_Binv);

143:     // X

144:     BLAS::ger(delay_count, delay_count, cminusone, Binv[delay_count], 1, Binv.data() + delay_count, lda_Binv,

145:               Binv.data(), lda_Binv);

146:     // Z

147:     for (int i = 0; i < delay_count; i++)

148:       Binv[delay_count][i] *= -y;

149:     delay_count++;

[...]

160:     if (delay_count == 0)

161:       return;

162:     // update the inverse matrix

163:     const T cone(1);

164:     const T czero(0);

165:     const int norb = Ainv.rows();

166:     if (delay_count == 1)

167:     {

168:       // this is a special case invoking the Fahy's variant of Sherman-Morrison update.

169:       // Only use the first norb elements of tempMat as a temporal array

170:       BLAS::gemv('T', norb, norb, cone, Ainv.data(), norb, U[0], 1, czero, temp.data(), 1);

171:       temp[delay_list[0]] -= cone;

172:       BLAS::ger(norb, norb, -Binv[0][0], V[0], 1, temp.data(), 1, Ainv.data(), norb);

173:     }

174:     else

175:     {

176:       const int lda_Binv     = Binv.cols();

177:       int num_threads_nested = getNextLevelNumThreads();

178:       // always use serial when norb is small or only one second level thread

179:       bool use_serial(norb <= 256 || num_threads_nested == 1);

180:       if (use_serial || BlasThreadingEnv::NestedThreadingSupported())

181:       {

182:         // threading depends on BLAS

183:         BlasThreadingEnv knob(use_serial ? 1 : num_threads_nested);

184:         BLAS::gemm('T', 'N', delay_count, norb, norb, cone, U.data(), norb, Ainv.data(), norb, czero, tempMat.data(),

185:                    lda_Binv);

186:         for (int i = 0; i < delay_count; i++)

187:           tempMat(delay_list[i], i) -= cone;

188:         BLAS::gemm('N', 'N', norb, delay_count, delay_count, cone, V.data(), norb, Binv.data(), lda_Binv, czero,

189:                    U.data(), norb);

190:         BLAS::gemm('N', 'N', norb, norb, delay_count, -cone, U.data(), norb, tempMat.data(), lda_Binv, cone,

191:                    Ainv.data(), norb);

192:       }

193:       else

194:       {

195:         // manually threaded version of the above GEMM calls

196: #pragma omp parallel

[...]

230:     delay_count = 0;

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h: 77 - 236

--------------------------------------------------------------------------------

77:   inline size_type rows() const { return D1; }

78:   inline size_type cols() const { return D2; }

[...]

217:   inline Type_t* operator[](size_type i) { return X.data() + i * D2; }

[...]

236:     return X[i * D2 + j];

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h: 38 - 38

--------------------------------------------------------------------------------

38: #pragma omp parallel

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp: 53 - 54

--------------------------------------------------------------------------------

53:   std::memcpy(target, source, sizeof(T) * n);

54: }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp: 123 - 139

--------------------------------------------------------------------------------

123: void DiracDeterminantRef<DU_TYPE>::acceptMove(ParticleSet& P, int iat)

124: {

125:   const int WorkingIndex = iat - FirstIndex;

126:   PhaseValue += evaluatePhase(curRatio);

127:   LogValue += std::log(std::abs(curRatio));

128:   UpdateTimer->start();

129:   updateEng.acceptRow(psiM, WorkingIndex, psiV);

130:   // invRow becomes invalid after accepting a move

131:   invRow_id = -1;

132:   if (UpdateMode == ORB_PBYP_PARTIAL)

133:   {

134:     simd::copy(dpsiM[WorkingIndex], dpsiV.data(), NumOrbitals);

135:     simd::copy(d2psiM[WorkingIndex], d2psiV.data(), NumOrbitals);

136:   }

137:   UpdateTimer->stop();

138:   curRatio = 1.0;

139: }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 249

--------------------------------------------------------------------------------

223:     return X[i];

[...]

248:   inline pointer data() { return X; }

249:   inline const_pointer data() const { return X; }

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h: 413 - 452

--------------------------------------------------------------------------------

413: 	{ *__to = *__from; }

[...]

451: 	  if (__builtin_expect(_Num > 1, true))

452: 	    __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DeterminantHelper.h: 23 - 23

--------------------------------------------------------------------------------

23:   return T((sign_v > 0) ? 0.0 : M_PI);

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h: 1128 - 1131

--------------------------------------------------------------------------------

1128:       operator[](size_type __n) _GLIBCXX_NOEXCEPT

1129:       {

1130: 	__glibcxx_requires_subscript(__n);

1131: 	return *(this->_M_impl._M_start + __n);

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algo.h: 683 - 709

--------------------------------------------------------------------------------

683:     { return std::copy(__first, __first + __n, __result); }

[...]

709:       if (__n2 <= 0)

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp: 187 - 447

--------------------------------------------------------------------------------

187:     dgemv(trans_in, n, m, alpha, amat, lda, x, incx, beta, y, incy);

[...]

249:     dgemm(Atrans, Btrans, M, N, K, alpha, A, lda, B, ldb, beta, C, ldc);

[...]

447:     dger(&m, &n, &alpha, x, &incx, y, &incy, a, &lda);

0x4655a0 SUB	SP, SP, #352

0x4655a4 ADRP	X1,

0x4655a8 STP	X29, X30, [SP, #48]

0x4655ac ADD	X29, SP, #48

0x4655b0 STP	X25, X26, [SP, #112]

0x4655b4 ORR	X25, XZR, X0

0x4655b8 ADD	X26, X0, #520

0x4655bc STP	X19, X20, [SP, #64]

0x4655c0 STP	X21, X22, [SP, #80]

0x4655c4 ADD	X22, X0, #608

0x4655c8 STP	X23, X24, [SP, #96]

0x4655cc ADD	X23, X0, #648

0x4655d0 ADD	X24, X0, #208

0x4655d4 STP	X27, X28, [SP, #128]

0x4655d8 STP	D14, D15, [SP, #144]

0x4655dc MOVI	D15, #0

0x4655e0 LDR	D0, [X25, #1080]

0x4655e4 LDR	D31, [X1, #400]

0x4655e8 LDR	W0, [X0, #1144]

0x4655ec FCMPE	D0, D15

0x4655f0 FABS	D0, D0

0x4655f4 SUB	W28, W2, W0

0x4655f8 FCSEL	D14, D15, D31, #12

0x4655fc BL	403ab0

0x465600 LDR	Q1, [X25, #16]

0x465604 MOV	V0.D[1], V14.D[0]

0x465608 LDR	X0, [X25, #1088]

0x46560c FADD	V2.2D, V1.2D, V0.2D

0x465610 STR	Q2, [X25, #16]

0x465614 BL	4c43c0

0x465618 LDR	X9, [X25, #208]

0x46561c SBFM	X2, X28, #0, #31

0x465620 STR	X2, [SP, #176]

0x465624 LDR	X27, [X23, #8]

0x465628 LDR	X4, [X22, #24]

0x46562c LDRSW	X7, [X26, #360]

0x465630 CMP	W9, #0

0x465634 B.LE	465a9c

0x465638 SBFM	X3, X28, #0, #31

0x46563c UBFM	X20, X9, #61, #31

0x465640 LDR	X5, [X24, #8]

0x465644 LDR	X11, [X25, #592]

0x465648 LDR	X10, [X25, #256]

0x46564c MADD	X6, X3, X5, XZR

0x465650 MADD	X12, X7, X11, XZR

0x465654 UBFM	X8, X6, #61, #60

0x465658 ADD	X1, X10, X8

0x46565c UBFM	X13, X12, #61, #60

0x465660 ADD	X0, X4, X13

0x465664 CMP	X20, #8

0x465668 B.EQ	465ed4

0x46566c ORR	X2, XZR, X20

0x465670 STR	X9, [SP, #168]

0x465674 BL	403a40

0x465678 LDR	X4, [X26, #8]

0x46567c ORR	X2, XZR, X20

0x465680 LDRSW	X7, [X26, #360]

0x465684 LDR	X9, [X25, #568]

0x465688 LDR	X1, [X25, #424]

0x46568c MADD	X18, X7, X4, XZR

0x465690 ADD	X0, X9, X18,LSL #3

0x465694 BL	403a40

0x465698 LDR	X4, [X22, #24]

0x46569c LDR	X9, [SP, #168]

0x4656a0 LDR	X6, [X25, #424]

0x4656a4 LDRSW	X7, [X26, #360]

0x4656a8 FMOV	D5, #-1.0000000

0x4656ac MOVZ	W8, #1

0x4656b0 ADD	X20, SP, #304

0x4656b4 LDR	X0, [X25, #856]

0x4656b8 ADD	X19, SP, #320

0x4656bc ADD	X17, X25, #816

0x4656c0 MOVZ	W30, #84

0x4656c4 ADD	X21, SP, #312

0x4656c8 LDR	X1, [X25, #840]

0x4656cc ADD	X2, SP, #280

0x4656d0 ADD	X5, SP, #288

0x4656d4 ORR	X3, XZR, X21

0x4656d8 STR	X17, [SP, #168]

0x4656dc STR	W28, [X0, X7,LSL #2]

0x4656e0 ADD	X7, SP, #296

0x4656e4 ADD	X0, SP, #272

0x4656e8 LDR	W10, [X26, #360]

0x4656ec ADD	X28, X25, #672

0x4656f0 STP	X19, X1, [SP]

0x4656f4 ADD	X1, SP, #276

0x4656f8 STR	X20, [SP, #16]

0x4656fc ADD	W11, W10, W8

0x465700 STRB	W30, [SP, #272]

0x465704 STR	W9, [SP, #276]

0x465708 STR	W11, [SP, #280]

0x46570c STR	W9, [SP, #288]

0x465710 STR	W8, [SP, #296]

0x465714 STR	W8, [SP, #304]

0x465718 STR	D5, [SP, #312]

0x46571c STR	XZR, [SP, #320]

0x465720 BL	403cf0

0x465724 LDR	X2, [SP, #168]

0x465728 LDR	W14, [X26, #360]

0x46572c LDR	X13, [X23, #8]

0x465730 LDR	X6, [X2, #24]

0x465734 SBFM	X15, X14, #0, #31

0x465738 UBFM	X12, X15, #61, #60

0x46573c LDR	X4, [X28, #24]

0x465740 LDR	D6, [X6, X12]

0x465744 CMP	W14, #0

0x465748 B.LE	465bd8

0x46574c CNTW	X16, ALL

0x465750 SUB	W3, W14, #1

0x465754 MADD	X5, X15, X13, XZR

0x465758 ADD	W18, W16, #3

0x46575c MOVZ	W17, #0

0x465760 CMP	W3, W18

0x465764 B.CC	465be0

0x465768 ADD	X30, X4, X5,LSL #3

0x46576c SUB	W7, W14, W16

0x465770 ORR	X8, XZR, X6

0x465774 CNTB	X9, ALL, MUL #2

0x465778 DUP	Z30.D, #0

0x46577c PTRUE	P7.B, ALL

0x465780 ORR	Z17.D, Z30.D, Z30.D

(1364) 0x465784 ADD	W17, W17, W16

(1364) 0x465788 LD1D	{Z29.D}, P7/Z, [X30, #1, MUL VL]

(1364) 0x46578c LD1D	{Z18.D}, P7/Z, [X8, #1, MUL VL]

(1364) 0x465790 LD1D	{Z27.D}, P7/Z, [X30, MUL VL]

(1364) 0x465794 LD1D	{Z26.D}, P7/Z, [X8, MUL VL]

(1364) 0x465798 ADD	X30, X30, X9

(1364) 0x46579c ADD	X8, X8, X9

(1364) 0x4657a0 FMLA	Z30.D, P7/M, Z29.D, Z18.D

(1364) 0x4657a4 FMLA	Z17.D, P7/M, Z27.D, Z26.D

(1364) 0x4657a8 CMP	W7, W17

(1364) 0x4657ac B.CS	465784

0x4657b0 FADD	Z16.D, Z17.D, Z30.D

0x4657b4 CMP	W14, W17

0x4657b8 B.EQ	4657f8

0x4657bc ORR	W10, WZR, W17

0x4657c0 MOVZ	X1, #0

0x4657c4 ADD	X0, X5, X10

0x4657c8 ADD	X16, X6, X10,LSL #3

0x4657cc CNTD	X11, ALL

0x4657d0 ADD	X3, X4, X0,LSL #3

0x4657d4 SUB	W2, W14, W17

0x4657d8 WHILELO	P0.D, WZR, W2

0x4657dc HINT	#0

(1363) 0x4657e0 LD1D	{Z25.D}, P0/Z, [X3, X1,LSL #3]

(1363) 0x4657e4 LD1D	{Z24.D}, P0/Z, [X16, X1,LSL #3]

(1363) 0x4657e8 ADD	X1, X1, X11

(1363) 0x4657ec FMLA	Z16.D, P0/M, Z25.D, Z24.D

(1363) 0x4657f0 WHILELO	P0.D, W1, W2

(1363) 0x4657f4 B.NE	4657e0

0x4657f8 PTRUE	P1.B, ALL

0x4657fc FADDV	D19, P1, Z16.D

0x465800 FSUB	D7, D19, S6

0x465804 FMOV	D14, #1.0000000

0x465808 MADD	X15, X13, X15, X15

0x46580c ADD	X12, X4, X12

0x465810 MOVZ	W18, #84

0x465814 MOVZ	W13, #1

0x465818 ADD	X7, SP, #296

0x46581c ADD	X5, SP, #288

0x465820 ORR	X3, XZR, X21

0x465824 ADD	X2, SP, #280

0x465828 STR	W18, [SP, #168]

0x46582c FDIV	D15, D14, D7

0x465830 ADD	X1, SP, #276

0x465834 ADD	X0, SP, #272

0x465838 STR	D15, [X4, X15,LSL #3]

0x46583c STP	X19, X12, [SP]

0x465840 STR	X20, [SP, #16]

0x465844 STRB	W18, [SP, #272]

0x465848 STR	W14, [SP, #276]

0x46584c STR	W14, [SP, #280]

0x465850 STR	W27, [SP, #288]

0x465854 STR	W13, [SP, #296]

0x465858 STR	W27, [SP, #304]

0x46585c STR	D15, [SP, #312]

0x465860 STR	XZR, [SP, #320]

0x465864 BL	403cf0

0x465868 LDR	W7, [X26, #360]

0x46586c FMOV	D20, #-1.0000000

0x465870 MOVZ	W14, #1

0x465874 STR	X21, [SP]

0x465878 ORR	X6, XZR, X20

0x46587c ADD	X4, SP, #296

0x465880 LDR	X9, [X23, #8]

0x465884 ORR	X2, XZR, X19

0x465888 ADD	X1, SP, #288

0x46588c ADD	X0, SP, #280

0x465890 STR	W14, [SP, #296]

0x465894 STR	W27, [SP, #304]

0x465898 SBFM	X5, X7, #0, #31

0x46589c STR	W7, [SP, #280]

0x4658a0 STR	W7, [SP, #288]

0x4658a4 LDR	X7, [X28, #24]

0x4658a8 MADD	X8, X5, X9, XZR

0x4658ac STR	W27, [SP, #312]

0x4658b0 STR	D20, [SP, #320]

0x4658b4 ADD	X5, X7, X5,LSL #3

0x4658b8 ADD	X3, X7, X8,LSL #3

0x4658bc BL	403b20

0x4658c0 LDR	W6, [X26, #360]

0x4658c4 LDR	W4, [SP, #168]

0x4658c8 CMP	W6, #0

0x4658cc B.LE	465af4

0x4658d0 LDR	X16, [X23, #8]

0x4658d4 SBFM	X30, X6, #0, #31

0x4658d8 SUB	W0, W6, #1

0x4658dc LDR	X15, [X28, #24]

0x4658e0 MADD	X2, X30, X16, XZR

0x4658e4 CMP	W0, #2

0x4658e8 B.LS	465be8

0x4658ec ADD	X1, X15, X2,LSL #3

0x4658f0 UBFM	W12, W6, #2, #31

0x4658f4 MOVZ	W18, #32

0x4658f8 DUP	V31.2D, V15.D[0]

0x4658fc UMADDL	X13, W12, W18, X1

0x465900 SUB	X14, X13, X1

0x465904 SUB	X7, X14, #32

0x465908 UBFM	X5, X7, #5, #63

0x46590c ADD	X9, X5, #1

0x465910 ANDS	X8, X9, #4160

0x465914 B.EQ	465978

0x465918 CMP	X8, #1

0x46591c B.EQ	465958

0x465920 CMP	X8, #2

0x465924 B.EQ	465940

0x465928 LDP	Q0, Q1, [X1]

0x46592c FMUL	V2.2D, V0.2D, V31.2D

0x465930 FMUL	V3.2D, V1.2D, V31.2D

0x465934 FNEG	V4.2D, V2.2D

0x465938 FNEG	V5.2D, V3.2D

0x46593c STP	Q4, Q5, [X1], #32

0x465940 LDP	Q6, Q7, [X1]

0x465944 FMUL	V16.2D, V6.2D, V31.2D

0x465948 FMUL	V30.2D, V7.2D, V31.2D

0x46594c FNEG	V17.2D, V16.2D

0x465950 FNEG	V29.2D, V30.2D

0x465954 STP	Q17, Q29, [X1], #32

0x465958 LDP	Q18, Q27, [X1]

0x46595c FMUL	V26.2D, V18.2D, V31.2D

0x465960 FMUL	V25.2D, V27.2D, V31.2D

0x465964 FNEG	V24.2D, V26.2D

0x465968 FNEG	V19.2D, V25.2D

0x46596c STP	Q24, Q19, [X1], #32

0x465970 CMP	X1, X13

0x465974 B.EQ	4659ec

(1362) 0x465978 LDP	Q14, Q20, [X1]

(1362) 0x46597c ORR	X4, XZR, X1

(1362) 0x465980 LDP	Q0, Q5, [X1, #32]

(1362) 0x465984 LDP	Q2, Q3, [X1, #64]

(1362) 0x465988 LDP	Q1, Q6, [X1, #96]

(1362) 0x46598c ADD	X1, X1, #128

(1362) 0x465990 FMUL	V23.2D, V14.2D, V31.2D

(1362) 0x465994 FMUL	V21.2D, V20.2D, V31.2D

(1362) 0x465998 FMUL	V4.2D, V0.2D, V31.2D

(1362) 0x46599c FMUL	V16.2D, V5.2D, V31.2D

(1362) 0x4659a0 FMUL	V30.2D, V2.2D, V31.2D

(1362) 0x4659a4 FMUL	V18.2D, V3.2D, V31.2D

(1362) 0x4659a8 FMUL	V26.2D, V1.2D, V31.2D

(1362) 0x4659ac FMUL	V25.2D, V6.2D, V31.2D

(1362) 0x4659b0 FNEG	V22.2D, V23.2D

(1362) 0x4659b4 FNEG	V28.2D, V21.2D

(1362) 0x4659b8 FNEG	V7.2D, V4.2D

(1362) 0x4659bc FNEG	V17.2D, V16.2D

(1362) 0x4659c0 FNEG	V29.2D, V30.2D

(1362) 0x4659c4 FNEG	V27.2D, V18.2D

(1362) 0x4659c8 FNEG	V24.2D, V26.2D

(1362) 0x4659cc FNEG	V19.2D, V25.2D

(1362) 0x4659d0 STP	Q22, Q28, [X1, #1920]

(1362) 0x4659d4 STP	Q7, Q17, [X1, #1952]

(1362) 0x4659d8 STP	Q29, Q27, [X1, #1984]

(1362) 0x4659dc STUR	Q24, [X1, #480]

(1362) 0x4659e0 STR	Q19, [X4, #112]

(1362) 0x4659e4 CMP	X1, X13

(1362) 0x4659e8 B.NE	465978

0x4659ec AND	W3, W6, #1886

0x4659f0 CMP	W3, W6

0x4659f4 B.EQ	465a2c

0x4659f8 SUB	W10, W6, W3

0x4659fc ADD	X17, X2, W3,UXTW

0x465a00 WHILELO	P6.D, WZR, W10

0x465a04 ADD	X11, X15, X17,LSL #3

0x465a08 LD1D	{Z31.D}, P6/Z, [X15, X17,LSL #3]

0x465a0c DUP	Z15.D, Z15.D[0]

0x465a10 PTRUE	P2.B, ALL

0x465a14 FMUL	Z14.D, Z15.D, Z31.D

0x465a18 FNEG	Z14.D, P2/M, Z14.D

0x465a1c ST1D	{Z14.D}, P6, [X11, MUL VL]

0x465a20 CNTD	X30, ALL

0x465a24 WHILELO	P3.D, W30, W10

0x465a28 B.NE	465a84

(1360) 0x465a2c ADD	W6, W6, #1

(1360) 0x465a30 STR	W6, [X26, #360]

(1360) 0x465a34 CMP	W27, W6

(1360) 0x465a38 B.EQ	465bf0

(1360) 0x465a3c LDR	W27, [X25, #12]

(1360) 0x465a40 MOVN	W26, #0

(1360) 0x465a44 STR	W26, [X25, #1072]

(1360) 0x465a48 CMP	W27, #2

(1360) 0x465a4c B.EQ	465aa4

(1360) 0x465a50 LDR	X0, [X25, #1088]

(1360) 0x465a54 BL	4c4660

(1360) 0x465a58 FMOV	D24, #1.0000000

(1360) 0x465a5c STR	D24, [X25, #1080]

(1360) 0x465a60 LDP	D14, D15, [SP, #144]

(1360) 0x465a64 LDP	X29, X30, [SP, #48]

(1360) 0x465a68 LDP	X19, X20, [SP, #64]

(1360) 0x465a6c LDP	X21, X22, [SP, #80]

(1360) 0x465a70 LDP	X23, X24, [SP, #96]

(1360) 0x465a74 LDP	X25, X26, [SP, #112]

(1360) 0x465a78 LDP	X27, X28, [SP, #128]

(1360) 0x465a7c ADD	SP, SP, #352

(1360) 0x465a80 RET

(1360) 0x465a84 LD1D	{Z20.D}, P3/Z, [X11, #1, MUL VL]

(1360) 0x465a88 INCB	X11, ALL

(1360) 0x465a8c FMUL	Z23.D, Z15.D, Z20.D

(1360) 0x465a90 FNEG	Z23.D, P2/M, Z23.D

(1360) 0x465a94 ST1D	{Z23.D}, P3, [X11, MUL VL]

(1360) 0x465a98 B	465a2c

0x465a9c LDR	X6, [X25, #424]

0x465aa0 B	4656a8

(1360) 0x465aa4 LDR	X21, [SP, #176]

(1360) 0x465aa8 MOVZ	W23, #24

(1360) 0x465aac LDR	X11, [X25, #280]

(1360) 0x465ab0 LDR	X4, [X25, #320]

(1360) 0x465ab4 LDR	W7, [X25, #1152]

(1360) 0x465ab8 MADD	X3, X21, X11, XZR

(1360) 0x465abc LDR	X1, [X25, #464]

(1360) 0x465ac0 ADD	X5, X3, X3,LSL #1

(1360) 0x465ac4 SMADDL	X2, W7, W23, XZR

(1360) 0x465ac8 ADD	X0, X4, X5,LSL #3

(1360) 0x465acc BL	403d20

(1360) 0x465ad0 LDR	X18, [X25, #344]

(1360) 0x465ad4 LDR	X13, [X25, #384]

(1360) 0x465ad8 LDRSW	X12, [X25, #1152]

(1360) 0x465adc MADD	X14, X21, X18, XZR

(1360) 0x465ae0 LDR	X1, [X25, #504]

(1360) 0x465ae4 ADD	X0, X13, X14,LSL #3

(1360) 0x465ae8 UBFM	X2, X12, #61, #60

(1360) 0x465aec BL	403d20

(1360) 0x465af0 B	465a50

0x465af4 ADDS	W17, W6, #1

0x465af8 CCMP	W27, W17, #0, #1

0x465afc STR	W17, [X26, #360]

0x465b00 B.NE	465a3c

0x465b04 LDR	X27, [X25, #208]

0x465b08 ORR	W16, WZR, W27

0x465b0c CMP	W17, #1

0x465b10 B.NE	465bf4

0x465b14 LDR	X24, [X25, #800]

0x465b18 ADD	X1, SP, #276

0x465b1c ADD	X0, SP, #272

0x465b20 ADD	X7, SP, #296

0x465b24 ADD	X5, SP, #288

0x465b28 STRB	W4, [SP, #272]

0x465b2c LDR	X6, [X25, #568]

0x465b30 ORR	X3, XZR, X21

0x465b34 ADD	X2, SP, #280

0x465b38 STR	X20, [SP, #16]

0x465b3c STR	W17, [SP, #168]

0x465b40 STP	X19, X24, [SP]

0x465b44 LDR	X4, [X25, #256]

0x465b48 STR	W27, [SP, #276]

0x465b4c STR	W27, [SP, #280]

0x465b50 STR	W27, [SP, #288]

0x465b54 STR	W17, [SP, #296]

0x465b58 STR	W17, [SP, #304]

0x465b5c STR	D14, [SP, #312]

0x465b60 STR	XZR, [SP, #320]

0x465b64 BL	403cf0

0x465b68 ORR	X2, XZR, X19

0x465b6c LDR	X19, [X25, #856]

0x465b70 ORR	X6, XZR, X20

0x465b74 ADD	X4, SP, #296

0x465b78 ADD	X1, SP, #288

0x465b7c LDR	X5, [X25, #800]

0x465b80 ADD	X0, SP, #280

0x465b84 LDR	X3, [X22, #24]

0x465b88 LDRSW	X10, [X19]

0x465b8c LDR	X22, [X28, #24]

0x465b90 LDR	X7, [X25, #256]

0x465b94 UBFM	X11, X10, #61, #60

0x465b98 LDR	W20, [SP, #168]

0x465b9c LDR	D23, [X5, X11]

0x465ba0 FSUB	D21, D23, S14

0x465ba4 STR	D21, [X5, X11]

0x465ba8 LDR	D22, [X22]

0x465bac STR	X21, [SP]

0x465bb0 STR	W27, [SP, #280]

0x465bb4 STR	W27, [SP, #288]

0x465bb8 STR	W20, [SP, #296]

0x465bbc STR	W20, [SP, #304]

0x465bc0 FNEG	D28, D22

0x465bc4 STR	W27, [SP, #312]

0x465bc8 STR	D28, [SP, #320]

0x465bcc BL	403b20

0x465bd0 STR	WZR, [X26, #360]

0x465bd4 B	465a3c

0x465bd8 FNEG	D7, D6

0x465bdc B	465804

0x465be0 DUP	Z16.D, #0

0x465be4 B	4657bc

0x465be8 MOVZ	W3, #0

0x465bec B	4659f8

(1360) 0x465bf0 LDR	W16, [X25, #208]

(1360) 0x465bf4 MOVZ	W15, #1

(1360) 0x465bf8 ADRP	X27,

(1360) 0x465bfc STR	W16, [SP, #168]

(1360) 0x465c00 ADD	X0, X27, #3424

(1360) 0x465c04 MOVZ	W3, #0

(1360) 0x465c08 LDR	X27, [X23, #8]

(1360) 0x465c0c MOVZ	W2, #0

(1360) 0x465c10 ORR	X1, XZR, X19

(1360) 0x465c14 STR	W15, [SP, #320]

(1360) 0x465c18 BL	403fc0

(1360) 0x465c1c LDR	W12, [SP, #168]

(1360) 0x465c20 MOVZ	W0, #1

(1360) 0x465c24 LDR	W23, [SP, #320]

(1360) 0x465c28 CMP	W12, #256

(1360) 0x465c2c CCMP	W23, #1, #4, #12

(1360) 0x465c30 B.NE	465ef8

(1360) 0x465c34 ORR	W23, WZR, W0

(1360) 0x465c38 ORR	W1, WZR, W23

(1360) 0x465c3c ADD	X0, SP, #200

(1360) 0x465c40 STR	W12, [SP, #188]

(1360) 0x465c44 BL	52bf60

(1360) 0x465c48 LDR	W14, [SP, #188]

(1360) 0x465c4c ADD	X1, X25, #232

(1360) 0x465c50 MOVZ	W2, #84

(1360) 0x465c54 MOVZ	W18, #78

(1360) 0x465c58 ADD	X8, SP, #264

(1360) 0x465c5c STR	XZR, [SP, #320]

(1360) 0x465c60 LDR	W13, [X26, #360]

(1360) 0x465c64 FMOV	D21, #1.0000000

(1360) 0x465c68 ADD	X11, SP, #276

(1360) 0x465c6c STR	X1, [SP, #168]

(1360) 0x465c70 ADD	X23, X25, #544

(1360) 0x465c74 ORR	X5, XZR, X21

(1360) 0x465c78 LDR	X9, [X25, #760]

(1360) 0x465c7c ADD	X7, SP, #268

(1360) 0x465c80 ADD	X4, SP, #264

(1360) 0x465c84 STR	W14, [SP, #188]

(1360) 0x465c88 ADD	X3, SP, #260

(1360) 0x465c8c ADD	X0, SP, #198

(1360) 0x465c90 STRB	W2, [SP, #198]

(1360) 0x465c94 ADD	X2, SP, #256

(1360) 0x465c98 ADD	X24, X25, #736

(1360) 0x465c9c STRB	W18, [SP, #199]

(1360) 0x465ca0 STP	W13, W14, [X8, #504]

(1360) 0x465ca4 STP	W14, W14, [X8]

(1360) 0x465ca8 LDR	X10, [X1, #24]

(1360) 0x465cac ADD	X1, SP, #199

(1360) 0x465cb0 STP	X19, X9, [SP, #16]

(1360) 0x465cb4 ADD	X19, SP, #272

(1360) 0x465cb8 STR	X11, [SP, #32]

(1360) 0x465cbc STP	X10, X19, [SP]

(1360) 0x465cc0 LDR	X6, [X23, #24]

(1360) 0x465cc4 STR	W14, [SP, #272]

(1360) 0x465cc8 STR	W27, [SP, #276]

(1360) 0x465ccc STR	D21, [SP, #312]

(1360) 0x465cd0 BL	403da0

(1360) 0x465cd4 LDR	W17, [X26, #360]

(1360) 0x465cd8 LDR	W30, [SP, #188]

(1360) 0x465cdc CMP	W17, #0

(1360) 0x465ce0 B.LE	465de8

(1360) 0x465ce4 SBFM	X16, X17, #0, #31

(1360) 0x465ce8 LDR	X15, [X24, #24]

(1360) 0x465cec FMOV	D22, #1.0000000

(1360) 0x465cf0 ANDS	X3, X16, #4160

(1360) 0x465cf4 MOVZ	X0, #0

(1360) 0x465cf8 LDR	X6, [X25, #720]

(1360) 0x465cfc LDR	X7, [X25, #856]

(1360) 0x465d00 B.EQ	465d70

(1360) 0x465d04 CMP	X3, #1

(1360) 0x465d08 B.EQ	465d4c

(1360) 0x465d0c CMP	X3, #2

(1360) 0x465d10 B.EQ	465d30

(1360) 0x465d14 LDRSW	X5, [X7]

(1360) 0x465d18 MOVZ	X0, #1

(1360) 0x465d1c MADD	X4, X5, X6, XZR

(1360) 0x465d20 ADD	X12, X15, X4,LSL #3

(1360) 0x465d24 LDR	D28, [X12]

(1360) 0x465d28 FSUB	D0, D28, S22

(1360) 0x465d2c STR	D0, [X12]

(1360) 0x465d30 LDRSW	X21, [X7, X0,LSL #2]

(1360) 0x465d34 MADD	X1, X21, X6, X0

(1360) 0x465d38 ADD	X0, X0, #1

(1360) 0x465d3c ADD	X2, X15, X1,LSL #3

(1360) 0x465d40 LDR	D5, [X2]

(1360) 0x465d44 FSUB	D2, D5, S22

(1360) 0x465d48 STR	D2, [X2]

(1360) 0x465d4c LDRSW	X18, [X7, X0,LSL #2]

(1360) 0x465d50 MADD	X13, X18, X6, X0

(1360) 0x465d54 ADD	X0, X0, #1

(1360) 0x465d58 ADD	X14, X15, X13,LSL #3

(1360) 0x465d5c LDR	D3, [X14]

(1360) 0x465d60 FSUB	D1, D3, S22

(1360) 0x465d64 STR	D1, [X14]

(1360) 0x465d68 CMP	X16, X0

(1360) 0x465d6c B.EQ	465de8

  (1361) 0x465d70 LDRSW	X9, [X7, X0,LSL #2]

  (1361) 0x465d74 ADD	X8, X0, #1

  (1361) 0x465d78 ADD	X10, X0, #3

  (1361) 0x465d7c ADD	X19, X0, #2

  (1361) 0x465d80 LDRSW	X11, [X7, X8,LSL #2]

  (1361) 0x465d84 LDRSW	X21, [X7, X19,LSL #2]

  (1361) 0x465d88 MADD	X3, X9, X6, X0

  (1361) 0x465d8c ADD	X0, X0, #4

  (1361) 0x465d90 LDRSW	X2, [X7, X10,LSL #2]

  (1361) 0x465d94 MADD	X4, X11, X6, X8

  (1361) 0x465d98 UBFM	X5, X3, #61, #60

  (1361) 0x465d9c MADD	X1, X21, X6, X19

  (1361) 0x465da0 LDR	D6, [X15, X5]

  (1361) 0x465da4 UBFM	X12, X4, #61, #60

  (1361) 0x465da8 MADD	X13, X2, X6, X10

  (1361) 0x465dac UBFM	X18, X1, #61, #60

  (1361) 0x465db0 UBFM	X14, X13, #61, #60

  (1361) 0x465db4 FSUB	D4, D6, S22

  (1361) 0x465db8 STR	D4, [X15, X5]

  (1361) 0x465dbc LDR	D7, [X15, X12]

  (1361) 0x465dc0 FSUB	D16, D7, S22

  (1361) 0x465dc4 STR	D16, [X15, X12]

  (1361) 0x465dc8 LDR	D30, [X15, X18]

  (1361) 0x465dcc FSUB	D17, D30, S22

  (1361) 0x465dd0 STR	D17, [X15, X18]

  (1361) 0x465dd4 LDR	D29, [X15, X14]

  (1361) 0x465dd8 FSUB	D18, D29, S22

  (1361) 0x465ddc STR	D18, [X15, X14]

  (1361) 0x465de0 CMP	X16, X0

  (1361) 0x465de4 B.NE	465d70

(1360) 0x465de8 LDR	X0, [X23, #24]

(1360) 0x465dec FMOV	D27, #1.0000000

(1360) 0x465df0 MOVZ	W6, #78

(1360) 0x465df4 ADD	X16, SP, #252

(1360) 0x465df8 ADD	X15, SP, #248

(1360) 0x465dfc STR	W30, [SP, #188]

(1360) 0x465e00 LDR	X28, [X28, #24]

(1360) 0x465e04 ADD	X5, SP, #296

(1360) 0x465e08 ADD	X7, SP, #244

(1360) 0x465e0c ADD	X4, SP, #240

(1360) 0x465e10 ADD	X3, SP, #236

(1360) 0x465e14 STRB	W6, [SP, #196]

(1360) 0x465e18 ADD	X2, SP, #232

(1360) 0x465e1c ADD	X1, SP, #197

(1360) 0x465e20 STRB	W6, [SP, #197]

(1360) 0x465e24 STP	X20, X0, [SP, #16]

(1360) 0x465e28 ADD	X0, SP, #196

(1360) 0x465e2c STP	X28, X15, [SP]

(1360) 0x465e30 LDR	X6, [X22, #24]

(1360) 0x465e34 STR	X16, [SP, #32]

(1360) 0x465e38 STP	W30, W17, [SP, #232]

(1360) 0x465e3c STP	W17, W30, [SP, #240]

(1360) 0x465e40 STP	W27, W30, [SP, #248]

(1360) 0x465e44 STR	D27, [SP, #296]

(1360) 0x465e48 STR	XZR, [SP, #304]

(1360) 0x465e4c BL	403da0

(1360) 0x465e50 LDR	X8, [SP, #168]

(1360) 0x465e54 ADD	X22, SP, #224

(1360) 0x465e58 ADD	X17, SP, #288

(1360) 0x465e5c FMOV	D26, #-1.0000000

(1360) 0x465e60 FMOV	D25, #1.0000000

(1360) 0x465e64 ADD	X20, SP, #228

(1360) 0x465e68 LDR	X24, [X24, #24]

(1360) 0x465e6c MOVZ	W30, #78

(1360) 0x465e70 ADD	X5, SP, #280

(1360) 0x465e74 ADD	X7, SP, #220

(1360) 0x465e78 ADD	X4, SP, #216

(1360) 0x465e7c LDR	W9, [SP, #188]

(1360) 0x465e80 ADD	X3, SP, #212

(1360) 0x465e84 ADD	X2, SP, #208

(1360) 0x465e88 ADD	X1, SP, #195

(1360) 0x465e8c ADD	X0, SP, #194

(1360) 0x465e90 STRB	W30, [SP, #194]

(1360) 0x465e94 LDR	X10, [X8, #24]

(1360) 0x465e98 STP	X24, X22, [SP]

(1360) 0x465e9c STRB	W30, [SP, #195]

(1360) 0x465ea0 STP	X17, X10, [SP, #16]

(1360) 0x465ea4 LDR	W19, [X26, #360]

(1360) 0x465ea8 LDR	X6, [X23, #24]

(1360) 0x465eac STR	X20, [SP, #32]

(1360) 0x465eb0 STP	W9, W9, [SP, #208]

(1360) 0x465eb4 STP	W19, W9, [SP, #216]

(1360) 0x465eb8 STP	W27, W9, [SP, #224]

(1360) 0x465ebc STP	D26, D25, [SP, #280]

(1360) 0x465ec0 BL	403da0

(1360) 0x465ec4 ADD	X0, SP, #200

(1360) 0x465ec8 BL	52bf68

(1360) 0x465ecc STR	WZR, [X26, #360]

(1360) 0x465ed0 B	465a3c

0x465ed4 LDR	D3, [X10, X8]

0x465ed8 LDR	X6, [X25, #424]

0x465edc LDR	X15, [X26, #8]

0x465ee0 LDR	X14, [X25, #568]

0x465ee4 STR	D3, [X4, X13]

0x465ee8 LDR	D4, [X6]

0x465eec MADD	X16, X7, X15, XZR

0x465ef0 STR	D4, [X14, X16,LSL #3]

0x465ef4 B	4656a8

(1360) 0x465ef8 STR	W12, [SP, #168]

(1360) 0x465efc BL	52bf6c

(1360) 0x465f00 LDR	W12, [SP, #168]

(1360) 0x465f04 TBNZ	W0, #0, 465c38

(1360) 0x465f08 ADRP	X21,

(1360) 0x465f0c ORR	X1, XZR, X19

(1360) 0x465f10 STP	X26, X24, [SP, #320]

(1360) 0x465f14 ADD	X0, X21, #3488

(1360) 0x465f18 MOVZ	W3, #0

(1360) 0x465f1c MOVZ	W2, #0

(1360) 0x465f20 STR	W12, [SP, #336]

(1360) 0x465f24 STR	W27, [SP, #340]

(1360) 0x465f28 STR	W23, [SP, #344]

(1360) 0x465f2c BL	403fc0

(1360) 0x465f30 STR	WZR, [X26, #360]

(1360) 0x465f34 B	465a3c

0x465f38 ORR	X25, XZR, X0

0x465f3c ADD	X0, SP, #200

0x465f40 BL	52bf68

0x465f44 ORR	X0, XZR, X25

0x465f48 BL	403e10

0x465f4c HINT	#0

0x465f50 HINT	#0

0x465f54 HINT	#0

0x465f58 HINT	#0

0x465f5c HINT	#0

Coverage (%)	Name	Source Location	Module

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	DiracDeterminantRef.cpp:123-139
Module	exec

The function is defined in:

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DelayedUpdate.h:128-149,160-196,230
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:77-78,217,236
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h:38
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:53-54
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:123-139
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,248-249
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h:413,451-452
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DeterminantHelper.h:23
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h:1128-1131
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algo.h:683,709
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:187,249,447

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 42.50 to 11.00 cycles (3.86x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 41% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 42.50 to 37.88 cycles (1.12x speedup).

Details

35% of VPU instructions are used in vector version (process two or more data elements in vector registers):

41% of VPU loads are used in vector version.
40% of VPU stores are used in vector version.
25% of VPU addition or subtraction instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
25% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 42.50 to 5.50 cycles (7.73x speedup).

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Matching between your function (in the source code) and the binary function

The binary function is composed of 29 FP arithmetical operations:

12: addition or subtraction
16: multiply
1: divide

The binary function is loading 532 bytes. The binary function is storing 587 bytes.

Arithmetic intensity

Arithmetic intensity is 0.03 FP operations per loaded or stored byte.

General properties

nb instructions	329
loop length	1316
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

40.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	16.00	16.00	35.75	35.75	35.75	35.75	12.75	12.75	12.75	12.75	42.50	42.17	42.33	26.50	26.50
cycles	16.00	16.00	35.75	35.75	35.75	35.75	12.75	12.75	12.75	12.75	42.50	42.17	42.33	26.50	26.50

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

1.75-3.50

Cycles summary

Front-end	40.38
Overall L1	42.50

Vectorization ratios

INT

all	20%
load	41%
store	40%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
other	9%

all	100%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	100%
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	35%
load	41%
store	40%
mul	100%
add-sub	25%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 42.50 cycles. At this rate:

13% of peak load performance is reached (12.52 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
28% of peak store performance is reached (13.81 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4655a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #352	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X1, <52e5a4>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #48	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X25, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X26, X0, #520	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X22, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X22, X0, #608	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X23, X0, #648	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X24, X0, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X28, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVI D15, #0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D0, [X25, #1080]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D31, [X1, #400]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR W0, [X0, #1144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FCMPE D0, D15	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
FABS D0, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
SUB W28, W2, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FCSEL D14, D15, D31, #12	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
BL 403ab0 <@plt_start@+0xc0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR Q1, [X25, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
MOV V0.D[1], V14.D[0]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR X0, [X25, #1088]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FADD V2.2D, V1.2D, V0.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR Q2, [X25, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
BL 4c43c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X9, [X25, #208]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SBFM X2, X28, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X2, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X27, [X23, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X4, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDRSW X7, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 465a9c <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x4fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SBFM X3, X28, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X20, X9, #61, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X5, [X24, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X25, #592]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X25, #256]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X6, X3, X5, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MADD X12, X7, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
UBFM X8, X6, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X10, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X13, X12, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X4, X13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X20, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 465ed4 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x934>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X2, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X9, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403a40 <@plt_start@+0x50>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X4, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X2, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDRSW X7, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X25, #568]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X1, [X25, #424]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X18, X7, X4, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X0, X9, X18,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403a40 <@plt_start@+0x50>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X4, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X6, [X25, #424]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDRSW X7, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FMOV D5, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVZ W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X20, SP, #304	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X25, #856]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X19, SP, #320	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X17, X25, #816	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W30, #84	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X21, SP, #312	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X1, [X25, #840]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X2, SP, #280	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, SP, #288	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X3, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X17, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W28, [X0, X7,LSL #2]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X7, SP, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #272	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W10, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X28, X25, #672	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X1, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X1, SP, #276	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD W11, W10, W8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STRB W30, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W9, [SP, #276]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W11, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W9, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W8, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W8, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D5, [SP, #312]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403cf0 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X2, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR W14, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X13, [X23, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X6, [X2, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SBFM X15, X14, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X12, X15, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X4, [X28, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D6, [X6, X12]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
CMP W14, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 465bd8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x638>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CNTW X16, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB W3, W14, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X5, X15, X13, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD W18, W16, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W17, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W3, W18	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.CC 465be0 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x640>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X30, X4, X5,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB W7, W14, W16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X8, XZR, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CNTB X9, ALL, MUL #2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
DUP Z30.D, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ORR Z17.D, Z30.D, Z30.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FADD Z16.D, Z17.D, Z30.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
CMP W14, W17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4657f8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x258>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR W10, WZR, W17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X5, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X16, X6, X10,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CNTD X11, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X3, X4, X0,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB W2, W14, W17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
WHILELO P0.D, WZR, W2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
HINT #0
PTRUE P1.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
FADDV D19, P1, Z16.D	1	0	0	0	0	0	0	0.75	0.75	0.25	0.25	0	0	0	0	0	9	2
FSUB D7, D19, S6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D14, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MADD X15, X13, X15, X15	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X12, X4, X12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W18, #84	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, SP, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, SP, #288	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X3, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X2, SP, #280	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W18, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
FDIV D15, D14, D7	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1.75-3.50
ADD X1, SP, #276	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #272	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR D15, [X4, X15,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP X19, X12, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STRB W18, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W14, [SP, #276]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W14, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W13, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D15, [SP, #312]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403cf0 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W7, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FMOV D20, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVZ W14, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X21, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X6, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, SP, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X9, [X23, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, SP, #288	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #280	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W14, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SBFM X5, X7, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W7, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W7, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X7, [X28, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X5, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR W27, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D20, [SP, #320]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X5, X7, X5,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X7, X8,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b20 <@plt_start@+0x130>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W6, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR W4, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W6, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 465af4 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x554>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X16, [X23, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SBFM X30, X6, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB W0, W6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X15, [X28, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X2, X30, X16, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
CMP W0, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LS 465be8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x648>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X15, X2,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM W12, W6, #2, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W18, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP V31.2D, V15.D[0]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
UMADDL X13, W12, W18, X1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X14, X13, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X7, X14, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X5, X7, #5, #63	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X9, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS X8, X9, #4160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 465978 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x3d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 465958 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x3b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 465940 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x3a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP Q0, Q1, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67
FMUL V2.2D, V0.2D, V31.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL V3.2D, V1.2D, V31.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FNEG V4.2D, V2.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FNEG V5.2D, V3.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP Q4, Q5, [X1], #32	1	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDP Q6, Q7, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67
FMUL V16.2D, V6.2D, V31.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL V30.2D, V7.2D, V31.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FNEG V17.2D, V16.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FNEG V29.2D, V30.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP Q17, Q29, [X1], #32	1	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDP Q18, Q27, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67
FMUL V26.2D, V18.2D, V31.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL V25.2D, V27.2D, V31.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FNEG V24.2D, V26.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FNEG V19.2D, V25.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP Q24, Q19, [X1], #32	1	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
CMP X1, X13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4659ec <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
AND W3, W6, #1886	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W3, W6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 465a2c <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x48c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB W10, W6, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X17, X2, W3,UXTW	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
WHILELO P6.D, WZR, W10	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
ADD X11, X15, X17,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1D {Z31.D}, P6/Z, [X15, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
DUP Z15.D, Z15.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
PTRUE P2.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
FMUL Z14.D, Z15.D, Z31.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	3	0.50
FNEG Z14.D, P2/M, Z14.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ST1D {Z14.D}, P6, [X11, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
CNTD X30, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
WHILELO P3.D, W30, W10	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
B.NE 465a84 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x4e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X6, [X25, #424]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B 4656a8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x108>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADDS W17, W6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CCMP W27, W17, #0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W17, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B.NE 465a3c <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x49c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X27, [X25, #208]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR W16, WZR, W27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W17, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 465bf4 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x654>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X24, [X25, #800]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X1, SP, #276	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #272	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, SP, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, SP, #288	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STRB W4, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X6, [X25, #568]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X3, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X2, SP, #280	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W17, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X19, X24, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X4, [X25, #256]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR W27, [SP, #276]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W17, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W17, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D14, [SP, #312]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403cf0 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X19, [X25, #856]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X6, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, SP, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, SP, #288	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X5, [X25, #800]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X0, SP, #280	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X3, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDRSW X10, [X19]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X22, [X28, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X7, [X25, #256]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X11, X10, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W20, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D23, [X5, X11]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FSUB D21, D23, S14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR D21, [X5, X11]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR D22, [X22]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STR X21, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W20, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W20, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
FNEG D28, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR W27, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D28, [SP, #320]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
BL 403b20 <@plt_start@+0x130>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR WZR, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 465a3c <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x49c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FNEG D7, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 465804 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x264>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
DUP Z16.D, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
B 4657bc <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x21c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 4659f8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x458>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D3, [X10, X8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR X6, [X25, #424]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X15, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X14, [X25, #568]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR D3, [X4, X13]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR D4, [X6]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
MADD X16, X7, X15, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR D4, [X14, X16,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 4656a8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x108>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X25, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #200	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 52bf68 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403e10 <@plt_start@+0x420>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Source file and lines	DiracDeterminantRef.cpp:123-139
Module	exec

The function is defined in:

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DelayedUpdate.h:128-149,160-196,230
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:77-78,217,236
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h:38
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:53-54
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:123-139
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,248-249
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h:413,451-452
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DeterminantHelper.h:23
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h:1128-1131
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algo.h:683,709
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:187,249,447

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

35% of VPU instructions are used in vector version (process two or more data elements in vector registers):

41% of VPU loads are used in vector version.
40% of VPU stores are used in vector version.
25% of VPU addition or subtraction instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
25% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 42.50 to 5.50 cycles (7.73x speedup).

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Matching between your function (in the source code) and the binary function

The binary function is composed of 29 FP arithmetical operations:

12: addition or subtraction
16: multiply
1: divide

The binary function is loading 532 bytes. The binary function is storing 587 bytes.

Arithmetic intensity

Arithmetic intensity is 0.03 FP operations per loaded or stored byte.

General properties

nb instructions	329
loop length	1316
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

40.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	16.00	16.00	35.75	35.75	35.75	35.75	12.75	12.75	12.75	12.75	42.50	42.17	42.33	26.50	26.50
cycles	16.00	16.00	35.75	35.75	35.75	35.75	12.75	12.75	12.75	12.75	42.50	42.17	42.33	26.50	26.50

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

1.75-3.50

Cycles summary

Front-end	40.38
Overall L1	42.50

Vectorization ratios

INT

all	20%
load	41%
store	40%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
other	9%

all	100%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	100%
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	35%
load	41%
store	40%
mul	100%
add-sub	25%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 42.50 cycles. At this rate:

13% of peak load performance is reached (12.52 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
28% of peak store performance is reached (13.81 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4655a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #352	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X1, <52e5a4>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #48	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X25, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X26, X0, #520	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X22, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X22, X0, #608	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X23, X0, #648	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X24, X0, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X28, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVI D15, #0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D0, [X25, #1080]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D31, [X1, #400]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR W0, [X0, #1144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FCMPE D0, D15	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
FABS D0, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
SUB W28, W2, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FCSEL D14, D15, D31, #12	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
BL 403ab0 <@plt_start@+0xc0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR Q1, [X25, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
MOV V0.D[1], V14.D[0]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR X0, [X25, #1088]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FADD V2.2D, V1.2D, V0.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR Q2, [X25, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
BL 4c43c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X9, [X25, #208]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SBFM X2, X28, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X2, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X27, [X23, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X4, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDRSW X7, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 465a9c <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x4fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SBFM X3, X28, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X20, X9, #61, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X5, [X24, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X25, #592]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X25, #256]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X6, X3, X5, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MADD X12, X7, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
UBFM X8, X6, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X10, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X13, X12, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X4, X13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X20, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 465ed4 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x934>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X2, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X9, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403a40 <@plt_start@+0x50>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X4, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X2, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDRSW X7, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X25, #568]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X1, [X25, #424]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X18, X7, X4, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X0, X9, X18,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403a40 <@plt_start@+0x50>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X4, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X6, [X25, #424]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDRSW X7, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FMOV D5, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVZ W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X20, SP, #304	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X25, #856]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X19, SP, #320	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X17, X25, #816	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W30, #84	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X21, SP, #312	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X1, [X25, #840]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X2, SP, #280	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, SP, #288	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X3, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X17, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W28, [X0, X7,LSL #2]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X7, SP, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #272	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W10, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X28, X25, #672	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X1, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X1, SP, #276	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD W11, W10, W8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STRB W30, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W9, [SP, #276]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W11, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W9, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W8, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W8, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D5, [SP, #312]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403cf0 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X2, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR W14, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X13, [X23, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X6, [X2, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SBFM X15, X14, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X12, X15, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X4, [X28, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D6, [X6, X12]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
CMP W14, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 465bd8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x638>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CNTW X16, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB W3, W14, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X5, X15, X13, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD W18, W16, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W17, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W3, W18	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.CC 465be0 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x640>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X30, X4, X5,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB W7, W14, W16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X8, XZR, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CNTB X9, ALL, MUL #2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
DUP Z30.D, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ORR Z17.D, Z30.D, Z30.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FADD Z16.D, Z17.D, Z30.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
CMP W14, W17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4657f8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x258>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR W10, WZR, W17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X5, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X16, X6, X10,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CNTD X11, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X3, X4, X0,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB W2, W14, W17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
WHILELO P0.D, WZR, W2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
HINT #0
PTRUE P1.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
FADDV D19, P1, Z16.D	1	0	0	0	0	0	0	0.75	0.75	0.25	0.25	0	0	0	0	0	9	2
FSUB D7, D19, S6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D14, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MADD X15, X13, X15, X15	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X12, X4, X12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W18, #84	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, SP, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, SP, #288	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X3, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X2, SP, #280	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W18, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
FDIV D15, D14, D7	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1.75-3.50
ADD X1, SP, #276	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #272	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR D15, [X4, X15,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP X19, X12, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STRB W18, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W14, [SP, #276]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W14, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W13, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D15, [SP, #312]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403cf0 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W7, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FMOV D20, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
MOVZ W14, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X21, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X6, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, SP, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X9, [X23, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, SP, #288	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #280	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W14, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SBFM X5, X7, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W7, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W7, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X7, [X28, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X5, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR W27, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D20, [SP, #320]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X5, X7, X5,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X7, X8,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b20 <@plt_start@+0x130>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W6, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR W4, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W6, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 465af4 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x554>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X16, [X23, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SBFM X30, X6, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB W0, W6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X15, [X28, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X2, X30, X16, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
CMP W0, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LS 465be8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x648>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X15, X2,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM W12, W6, #2, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W18, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP V31.2D, V15.D[0]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
UMADDL X13, W12, W18, X1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X14, X13, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X7, X14, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X5, X7, #5, #63	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X9, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS X8, X9, #4160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 465978 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x3d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 465958 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x3b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 465940 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x3a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP Q0, Q1, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67
FMUL V2.2D, V0.2D, V31.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL V3.2D, V1.2D, V31.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FNEG V4.2D, V2.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FNEG V5.2D, V3.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP Q4, Q5, [X1], #32	1	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDP Q6, Q7, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67
FMUL V16.2D, V6.2D, V31.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL V30.2D, V7.2D, V31.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FNEG V17.2D, V16.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FNEG V29.2D, V30.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP Q17, Q29, [X1], #32	1	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDP Q18, Q27, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67
FMUL V26.2D, V18.2D, V31.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL V25.2D, V27.2D, V31.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FNEG V24.2D, V26.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FNEG V19.2D, V25.2D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STP Q24, Q19, [X1], #32	1	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
CMP X1, X13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4659ec <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
AND W3, W6, #1886	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W3, W6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 465a2c <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x48c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB W10, W6, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X17, X2, W3,UXTW	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
WHILELO P6.D, WZR, W10	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
ADD X11, X15, X17,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LD1D {Z31.D}, P6/Z, [X15, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
DUP Z15.D, Z15.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
PTRUE P2.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
FMUL Z14.D, Z15.D, Z31.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	3	0.50
FNEG Z14.D, P2/M, Z14.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ST1D {Z14.D}, P6, [X11, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
CNTD X30, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
WHILELO P3.D, W30, W10	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
B.NE 465a84 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x4e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X6, [X25, #424]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B 4656a8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x108>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADDS W17, W6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CCMP W27, W17, #0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W17, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B.NE 465a3c <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x49c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X27, [X25, #208]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR W16, WZR, W27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W17, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 465bf4 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x654>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X24, [X25, #800]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X1, SP, #276	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #272	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, SP, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, SP, #288	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STRB W4, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X6, [X25, #568]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X3, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X2, SP, #280	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W17, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X19, X24, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X4, [X25, #256]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR W27, [SP, #276]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W17, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W17, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D14, [SP, #312]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR XZR, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 403cf0 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X19, [X25, #856]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X6, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, SP, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, SP, #288	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X5, [X25, #800]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X0, SP, #280	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X3, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDRSW X10, [X19]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X22, [X28, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X7, [X25, #256]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X11, X10, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W20, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D23, [X5, X11]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FSUB D21, D23, S14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR D21, [X5, X11]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR D22, [X22]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STR X21, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W27, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W20, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W20, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
FNEG D28, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR W27, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR D28, [SP, #320]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
BL 403b20 <@plt_start@+0x130>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR WZR, [X26, #360]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 465a3c <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x49c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FNEG D7, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 465804 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x264>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
DUP Z16.D, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
B 4657bc <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x21c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 4659f8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x458>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D3, [X10, X8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR X6, [X25, #424]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X15, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X14, [X25, #568]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR D3, [X4, X13]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR D4, [X6]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
MADD X16, X7, X15, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
STR D4, [X14, X16,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 4656a8 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10acceptMoveERNS1_11ParticleSetEi+0x108>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X25, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #200	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 52bf68 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403e10 <@plt_start@+0x420>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼miniqmcreference::DiracDeterminantRef >::acceptMove(qmcplusplus::ParticleSet&, int)–	0.01	0.02
▼Loop 1360 - DelayedUpdate.h:147-230 - exec–	0	0.01
○Loop 1361 - DelayedUpdate.h:186-187 - exec	0	0
○Loop 1363 - DelayedUpdate.h:137-138 - exec	0	0.01
○Loop 1362 - DelayedUpdate.h:147-148 - exec	0	0
○Loop 1364 - DelayedUpdate.h:137-138 - exec	0	0.01

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

FMA

Workaround

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

FMA

Workaround

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code