OV - exec - Function miniqmcreference::einspline_spo_ref<double>::evaluate(qmcplusplus::ParticleSet const&, int, qmcplusplus::Vector<double, std::allocator<double> >&, qmcplusplus::Vector<qmcplusplus::TinyVector<double, 3u>, std::allocator<qmcplusplus::TinyVector<double, 3u> > >&, qmcplusplus::Vector<double, std::allocator<double> >&)

	Function: miniqmcreference::einspline_spo_ref<double>::evaluate(qmcplusplus::ParticleSet const&, int ...	Module: exec	Source: einspline_spo_ref.hpp:203-230 [...]	Coverage: 12.55%

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h: 168 - 174

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168:     val_dot = toUnit(r);

169:     for (int i = 0; i < D; i++)

170:       if (-std::numeric_limits<T1>::epsilon() < val_dot[i] && val_dot[i] < 0)

171:         val_dot[i] = T1(0.0);

172:       else

173:         val_dot[i] -= std::floor(val_dot[i]);

174:     return val_dot;

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249

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242:   ScopeGuard(TIMER& t) : timer(t) { timer.start(); }

[...]

249:   ~ScopeGuard() { timer.stop(); }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp: 53 - 66

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53:   if (x < 0)

54:   {

55:     ind = 0;

56:     dx  = T(0);

57:   }

58:   else

59:   {

60:     ind = static_cast<int>(x);

61:     dx = x - ind;

62:     // upper bound

63:     if (ind > nmax)

64:     {

65:       ind = nmax;

66:       dx  = T(1) - std::numeric_limits<T>::epsilon();

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp: 187 - 286

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187:   x -= spline_m->x_grid.start;

188:   y -= spline_m->y_grid.start;

189:   z -= spline_m->z_grid.start;

190:   spline2::getSplineBound(x * spline_m->x_grid.delta_inv, tx, ix, spline_m->x_grid.num - 1);

191:   spline2::getSplineBound(y * spline_m->y_grid.delta_inv, ty, iy, spline_m->y_grid.num - 1);

192:   spline2::getSplineBound(z * spline_m->z_grid.delta_inv, tz, iz, spline_m->z_grid.num - 1);

[...]

199:   const intptr_t ys = spline_m->y_stride;

200:   const intptr_t zs = spline_m->z_stride;

201:

202:   const size_t out_offset = spline_m->num_splines;

203:

204:   T* restrict gx = grads;

205:   T* restrict gy = grads + out_offset;

206:   T* restrict gz = grads + 2 * out_offset;

207:

208:   T* restrict hxx = hess;

209:   T* restrict hxy = hess + out_offset;

210:   T* restrict hxz = hess + 2 * out_offset;

211:   T* restrict hyy = hess + 3 * out_offset;

212:   T* restrict hyz = hess + 4 * out_offset;

213:   T* restrict hzz = hess + 5 * out_offset;

214:

215:   std::fill(vals, vals + num_splines, T());

[...]

226:   for (int i = 0; i < 4; i++)

227:     for (int j = 0; j < 4; j++)

228:     {

229:       const T* restrict coefs    = spline_m->coefs + (ix + i) * xs + (iy + j) * ys + iz * zs;

230:       const T* restrict coefszs  = coefs + zs;

231:       const T* restrict coefs2zs = coefs + 2 * zs;

232:       const T* restrict coefs3zs = coefs + 3 * zs;

233:

234:       const T pre20 = d2a[i] * b[j];

235:       const T pre10 = da[i] * b[j];

236:       const T pre00 = a[i] * b[j];

237:       const T pre11 = da[i] * db[j];

238:       const T pre01 = a[i] * db[j];

239:       const T pre02 = a[i] * d2b[j];

240:

241:       const int iSplitPoint = num_splines;

242:       for (int n = 0; n < iSplitPoint; n++)

243:       {

244:         T coefsv    = coefs[n];

245:         T coefsvzs  = coefszs[n];

246:         T coefsv2zs = coefs2zs[n];

247:         T coefsv3zs = coefs3zs[n];

248:

249:         T sum0 = c[0] * coefsv + c[1] * coefsvzs + c[2] * coefsv2zs + c[3] * coefsv3zs;

250:         T sum1 = dc[0] * coefsv + dc[1] * coefsvzs + dc[2] * coefsv2zs + dc[3] * coefsv3zs;

251:         T sum2 = d2c[0] * coefsv + d2c[1] * coefsvzs + d2c[2] * coefsv2zs + d2c[3] * coefsv3zs;

252:

253:         hxx[n] += pre20 * sum0;

254:         hxy[n] += pre11 * sum0;

255:         hxz[n] += pre10 * sum1;

256:         hyy[n] += pre02 * sum0;

257:         hyz[n] += pre01 * sum1;

258:         hzz[n] += pre00 * sum2;

259:         gx[n] += pre10 * sum0;

260:         gy[n] += pre01 * sum0;

261:         gz[n] += pre00 * sum1;

262:         vals[n] += pre00 * sum0;

[...]

269:   const T dxx   = dxInv * dxInv;

270:   const T dyy   = dyInv * dyInv;

271:   const T dzz   = dzInv * dzInv;

272:   const T dxy   = dxInv * dyInv;

273:   const T dxz   = dxInv * dzInv;

274:   const T dyz   = dyInv * dzInv;

275:

276:   for (int n = 0; n < num_splines; n++)

277:   {

278:     gx[n] *= dxInv;

279:     gy[n] *= dyInv;

280:     gz[n] *= dzInv;

281:     hxx[n] *= dxx;

282:     hyy[n] *= dyy;

283:     hzz[n] *= dzz;

284:     hxy[n] *= dxy;

285:     hxz[n] *= dxz;

286:     hyz[n] *= dyz;

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp: 203 - 230

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203:     ScopedTimer local_timer(timer);

204:

205:     auto u = Lattice.toUnit_floor(P.activeR(iat));

206:     for (int i = 0; i < nBlocks; ++i)

207:       MultiBsplineEvalRef::evaluate_vgh(einsplines[i], u[0], u[1], u[2], psi[i].data(), grad[i].data(), hess[i].data(),

208:                                         nSplinesPerBlock);

209:   }

210:

211:   inline void evaluate(const ParticleSet& P,

[...]

219:     for (int i = 0; i < nBlocks; ++i)

220:     {

221:       // in real simulation, phase needs to be applied. Here just fake computation

222:       const int first = i * nBlocks;

223:       for (int j = first; j < std::min((i + 1) * nSplinesPerBlock, OrbitalSetSize); j++)

224:       {

225:         psi_v[j]   = psi[i][j - first];

226:         dpsi_v[j]  = grad[i][j - first];

227:         d2psi_v[j] = hess[i].data(0)[j - first];

228:       }

229:     }

230:   }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h: 150 - 152

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150:     return TinyVector<Type_t, 3>(lhs[0] * rhs[0] + lhs[1] * rhs[3] + lhs[2] * rhs[6],

151:                                  lhs[0] * rhs[1] + lhs[1] * rhs[4] + lhs[2] * rhs[7],

152:                                  lhs[0] * rhs[2] + lhs[1] * rhs[5] + lhs[2] * rhs[8]);

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp: 68 - 79

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68:     a[0]   = ((A00 * tx + A01) * tx + A02) * tx + A03;

69:     a[1]   = ((A10 * tx + A11) * tx + A12) * tx + A13;

70:     a[2]   = ((A20 * tx + A21) * tx + A22) * tx + A23;

71:     a[3]   = ((A30 * tx + A31) * tx + A32) * tx + A33;

72:     da[0]  = (dA01 * tx + dA02) * tx + dA03;

73:     da[1]  = (dA11 * tx + dA12) * tx + dA13;

74:     da[2]  = (dA21 * tx + dA22) * tx + dA23;

75:     da[3]  = (dA31 * tx + dA32) * tx + dA33;

76:     d2a[0] = d2A02 * tx + d2A03;

77:     d2a[1] = d2A12 * tx + d2A13;

78:     d2a[2] = d2A22 * tx + d2A23;

79:     d2a[3] = d2A32 * tx + d2A33;

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 143 - 143

--------------------------------------------------------------------------------

143:     return (active_ptcl_ == iat) ? active_pos_ : R[iat];

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h: 231 - 271

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231:   inline const AoSElement_t operator[](size_t i) const { return AoSElement_t(myData + i, nGhosts); }

[...]

265:   inline T* data() { return myData; }

[...]

271:   inline T* restrict data(size_t i) { return myData + i * nGhosts; }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 229

--------------------------------------------------------------------------------

223:     return X[i];

[...]

229:     return X[i];

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h: 238 - 952

--------------------------------------------------------------------------------

238:       if (__b < __a)

[...]

951:       for (; __first != __last; ++__first)

952: 	*__first = __tmp;

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h: 145 - 145

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145:       X[i] = base[i * offset];

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h: 1131 - 1263

--------------------------------------------------------------------------------

1131: 	return *(this->_M_impl._M_start + __n);

[...]

1263:       { return _M_data_ptr(this->_M_impl._M_start); }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/Tensor.h: 213 - 213

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213:   inline Type_t operator[](unsigned int i) const { return X[i]; }

0x453c20 SUB	SP, SP, #656

0x453c24 STP	X29, X30, [SP]

0x453c28 ADD	X29, SP, #0

0x453c2c STP	X19, X20, [SP, #16]

0x453c30 ORR	X19, XZR, X0

0x453c34 ORR	X20, XZR, X5

0x453c38 STP	X21, X22, [SP, #32]

0x453c3c ORR	X21, XZR, X4

0x453c40 ORR	X22, XZR, X3

0x453c44 STP	X23, X24, [SP, #48]

0x453c48 ORR	W24, WZR, W2

0x453c4c STP	X25, X26, [SP, #64]

0x453c50 ORR	X25, XZR, X1

0x453c54 STP	X27, X28, [SP, #80]

0x453c58 LDR	X23, [X0, #856]

0x453c5c ORR	X0, XZR, X23

0x453c60 BL	4c43c0

0x453c64 LDR	W0, [X25, #292]

0x453c68 ADD	X4, X25, #296

0x453c6c CMP	W24, W0

0x453c70 B.EQ	453c80

0x453c74 LDR	X2, [X25, #64]

0x453c78 MOVZ	W1, #24

0x453c7c SMADDL	X4, W24, W1, X2

0x453c80 ADD	X5, X19, #216

0x453c84 LDP	D28, D27, [X4]

0x453c88 PTRUE	P7.B, ALL

0x453c8c MOVZ	W6, #3

0x453c90 ADD	X14, SP, #624

0x453c94 WHILELO	P4.D, WZR, W6

0x453c98 LDP	D6, D4, [X5, #24]

0x453c9c MOVZ	X3, #48304

0x453ca0 DUP	Z30.D, X3

0x453ca4 CNTD	X7, ALL

0x453ca8 WHILELO	P5.D, W7, W6

0x453cac LDP	D2, D23, [X5, #40]

0x453cb0 LDR	D19, [X19, #216]

0x453cb4 LDP	D3, D26, [X5, #8]

0x453cb8 FMUL	D0, D27, D6

0x453cbc FMUL	D1, D27, D4

0x453cc0 FMUL	D5, D27, D2

0x453cc4 LDR	D24, [X4, #16]

0x453cc8 LDP	D25, D22, [X5, #56]

0x453ccc FMADD	D20, D28, D19, D0

0x453cd0 FMADD	D7, D28, D3, D1

0x453cd4 FMADD	D16, D28, D26, D5

0x453cd8 FMADD	D21, D24, D23, D20

0x453cdc FMADD	D17, D24, D25, D7

0x453ce0 FMADD	D18, D24, D22, D16

0x453ce4 STR	D21, [SP, #624]

0x453ce8 STR	D17, [SP, #632]

0x453cec STR	D18, [SP, #640]

0x453cf0 LD1D	{Z29.D}, P4/Z, [X14, MUL VL]

0x453cf4 FCMLT	P6.D, P7/Z, Z29.D, #0

0x453cf8 MOVPRFX	Z31, Z29

0x453cfc FRINTM	Z31.D, P7/M, Z29.D

0x453d00 FCMGT	P0.D, P6/Z, Z29.D, Z30.D

0x453d04 EOR	P1.B, P7/Z, P0.B, P7.B

0x453d08 MOVPRFX	Z31.D, P1/Z, Z31.D

0x453d0c FSUBR	Z31.D, P1/M, Z31.D, Z29.D

0x453d10 ST1D	{Z31.D}, P4, [X14, MUL VL]

0x453d14 B.EQ	453d40

0x453d18 LD1D	{Z6.D}, P5/Z, [X14, #1, MUL VL]

0x453d1c ADDVL	X9, X14, #1

0x453d20 FCMLT	P6.D, P7/Z, Z6.D, #0

0x453d24 MOVPRFX	Z4, Z6

0x453d28 FRINTM	Z4.D, P7/M, Z6.D

0x453d2c FCMGT	P15.D, P6/Z, Z6.D, Z30.D

0x453d30 EOR	P2.B, P7/Z, P15.B, P7.B

0x453d34 MOVPRFX	Z4.D, P2/Z, Z4.D

0x453d38 FSUBR	Z4.D, P2/M, Z4.D, Z6.D

0x453d3c ST1D	{Z4.D}, P5, [X9, MUL VL]

0x453d40 ADD	X10, SP, #512

0x453d44 LDR	X15, [X14, #16]

0x453d48 ADD	X11, SP, #512

0x453d4c LDP	X12, X13, [X10, #112]

0x453d50 STR	X15, [SP, #456]

0x453d54 STP	X12, X13, [X11, #952]

0x453d58 LDR	D30, [SP, #440]

0x453d5c LDR	D28, [SP, #448]

0x453d60 LDR	D27, [SP, #456]

0x453d64 LDR	W13, [X19, #48]

0x453d68 STR	D30, [SP, #352]

0x453d6c STR	D28, [SP, #360]

0x453d70 STR	D27, [SP, #368]

0x453d74 CMP	W13, #0

0x453d78 B.LE	4545c4

0x453d7c STP	D8, D9, [SP, #96]

0x453d80 ORR	X16, XZR, #3840

0x453d84 ORR	X17, XZR, #3840

0x453d88 STP	D10, D11, [SP, #112]

0x453d8c MOVK	X16, #16325

0x453d90 MOVK	X17, #16357

0x453d94 STP	D12, D13, [SP, #128]

0x453d98 MOVZ	X26, #24

0x453d9c STP	D14, D15, [SP, #144]

0x453da0 LDR	X18, [X19, #784]

0x453da4 FMOV	D1, X16

0x453da8 LDR	X4, [X19, #760]

0x453dac ADD	X27, X4, W13,UXTW #3

0x453db0 STP	X27, X23, [SP, #376]

0x453db4 STP	X18, X17, [SP, #192]

0x453db8 ORR	X18, XZR, X26

0x453dbc STP	X19, X22, [SP, #400]

0x453dc0 STP	X21, X20, [SP, #416]

0x453dc4 LDR	W20, [X19, #64]

0x453dc8 LDR	X23, [X19, #808]

0x453dcc LDR	X19, [X19, #832]

0x453dd0 SBFM	X21, X20, #0, #31

0x453dd4 STR	W20, [SP, #348]

0x453dd8 UBFM	X22, X21, #61, #60

0x453ddc ORR	X2, XZR, X22

0x453de0 STR	X23, [SP, #328]

0x453de4 STR	X21, [SP, #392]

0x453de8 STR	X19, [SP, #336]

    (1181) 0x453dec LDR	X11, [X4]

    (1181) 0x453df0 LDR	D11, [SP, #352]

    (1181) 0x453df4 LDR	D14, [SP, #360]

    (1181) 0x453df8 LDR	D9, [X11, #40]

    (1181) 0x453dfc LDP	D22, D8, [X11, #72]

    (1181) 0x453e00 LDR	D10, [X11, #120]

    (1181) 0x453e04 FSUB	D12, D11, S9

    (1181) 0x453e08 LDR	D0, [SP, #368]

    (1181) 0x453e0c LDR	X28, [SP, #192]

    (1181) 0x453e10 FSUB	D15, D14, S8

    (1181) 0x453e14 LDR	X30, [SP, #328]

    (1181) 0x453e18 FMUL	D13, D12, D22

    (1181) 0x453e1c LDR	X25, [SP, #336]

    (1181) 0x453e20 FSUB	D7, D0, S10

    (1181) 0x453e24 LDR	X28, [X28]

    (1181) 0x453e28 LDR	X20, [X30, X18]

    (1181) 0x453e2c FCMPE	D13, #0

    (1181) 0x453e30 LDR	X19, [X25, X18]

    (1181) 0x453e34 B.MI	45487c

    (1181) 0x453e38 LDR	W0, [X11, #56]

    (1181) 0x453e3c FCVTZS	W24, D13

    (1181) 0x453e40 SUB	W8, W0, #1

    (1181) 0x453e44 CMP	W8, W24

    (1181) 0x453e48 B.LT	454920

    (1181) 0x453e4c ORR	X1, XZR, #3840

    (1181) 0x453e50 FRINTZ	D3, D13

    (1181) 0x453e54 FSUB	D29, D13, S3

    (1181) 0x453e58 MOVK	X1, #49093

    (1181) 0x453e5c FMOV	D2, #0.5000000

    (1181) 0x453e60 FMOV	D16, #-1.0000000

    (1181) 0x453e64 FMOV	D25, #1.5000000

    (1181) 0x453e68 FMOV	D17, #-2.0000000

    (1181) 0x453e6c ORR	W8, WZR, W24

    (1181) 0x453e70 FMOV	D24, X1

    (1181) 0x453e74 FMOV	D26, #1.0000000

    (1181) 0x453e78 FMOV	D5, #-0.5000000

    (1181) 0x453e7c FSUB	D23, D3, S13

    (1181) 0x453e80 LDR	D13, [SP, #200]

    (1181) 0x453e84 FMOV	D18, #3.0000000

    (1181) 0x453e88 FMADD	D20, D29, D2, D16

    (1181) 0x453e8c FMSUB	D21, D29, D2, D2

    (1181) 0x453e90 FMADD	D19, D29, D25, D17

    (1181) 0x453e94 FMSUB	D28, D29, D25, D26

    (1181) 0x453e98 FMUL	D4, D29, D29

    (1181) 0x453e9c FMADD	D6, D29, D21, D2

    (1181) 0x453ea0 FADD	D27, D23, D26

    (1181) 0x453ea4 FMUL	D8, D29, D24

    (1181) 0x453ea8 FMADD	D30, D29, D18, D17

    (1181) 0x453eac FMADD	D9, D29, D28, D2

    (1181) 0x453eb0 FMSUB	D26, D29, D18, D26

    (1181) 0x453eb4 FMUL	D21, D4, D2

    (1181) 0x453eb8 FMUL	D31, D29, D20

    (1181) 0x453ebc FMADD	D6, D29, D6, D1

    (1181) 0x453ec0 STR	D27, [SP, #184]

    (1181) 0x453ec4 FADD	D10, D8, D2

    (1181) 0x453ec8 FMUL	D11, D29, D19

    (1181) 0x453ecc FNMUL	D3, D4, D8

    (1181) 0x453ed0 FMADD	D0, D29, D31, D13

    (1181) 0x453ed4 STR	D30, [SP, #208]

    (1181) 0x453ed8 FADD	D14, D31, D2

    (1181) 0x453edc STR	D9, [SP, #176]

    (1181) 0x453ee0 FMADD	D12, D29, D10, D5

    (1181) 0x453ee4 STR	D11, [SP, #168]

    (1181) 0x453ee8 FMADD	D5, D29, D12, D1

    (1181) 0x453eec FNEG	D27, D14

    (1181) 0x453ef0 LDR	D25, [X11, #112]

    (1181) 0x453ef4 FMUL	D24, D15, D25

    (1181) 0x453ef8 FCMPE	D24, #0

    (1181) 0x453efc B.MI	454844

    (1181) 0x453f00 LDR	W17, [X11, #96]

    (1181) 0x453f04 FCVTZS	W16, D24

    (1181) 0x453f08 SUB	W10, W17, #1

    (1181) 0x453f0c CMP	W10, W16

    (1181) 0x453f10 B.LT	4548b8

    (1181) 0x453f14 ORR	X26, XZR, #3840

    (1181) 0x453f18 FRINTZ	D23, D24

    (1181) 0x453f1c FSUB	D30, D24, S23

    (1181) 0x453f20 MOVK	X26, #49093

    (1181) 0x453f24 FMOV	D18, #0.5000000

    (1181) 0x453f28 FMOV	D20, #-1.0000000

    (1181) 0x453f2c FMOV	D28, #1.5000000

    (1181) 0x453f30 FMOV	D8, #-2.0000000

    (1181) 0x453f34 ORR	W10, WZR, W16

    (1181) 0x453f38 FMOV	D17, X26

    (1181) 0x453f3c FMOV	D11, #3.0000000

    (1181) 0x453f40 FSUB	D10, D23, S24

    (1181) 0x453f44 FMOV	D9, #1.0000000

    (1181) 0x453f48 FMOV	D15, #-0.5000000

    (1181) 0x453f4c FMADD	D31, D30, D18, D20

    (1181) 0x453f50 FMADD	D14, D30, D28, D8

    (1181) 0x453f54 FMADD	D13, D30, D11, D8

    (1181) 0x453f58 FMSUB	D12, D30, D18, D18

    (1181) 0x453f5c FMUL	D4, D30, D30

    (1181) 0x453f60 FMSUB	D19, D30, D28, D9

    (1181) 0x453f64 FADD	D23, D10, D9

    (1181) 0x453f68 LDR	D10, [SP, #200]

    (1181) 0x453f6c FMUL	D2, D30, D17

    (1181) 0x453f70 FMADD	D16, D30, D12, D18

    (1181) 0x453f74 FMSUB	D24, D30, D11, D9

    (1181) 0x453f78 FMUL	D28, D30, D31

    (1181) 0x453f7c FMADD	D17, D30, D19, D18

    (1181) 0x453f80 FMADD	D20, D30, D16, D1

    (1181) 0x453f84 STP	D23, D13, [SP, #240]

    (1181) 0x453f88 FADD	D8, D2, D18

    (1181) 0x453f8c FMUL	D23, D4, D18

    (1181) 0x453f90 FMUL	D9, D30, D14

    (1181) 0x453f94 FNMUL	D4, D4, D2

    (1181) 0x453f98 FMADD	D2, D30, D28, D10

    (1181) 0x453f9c FADD	D18, D28, D18

    (1181) 0x453fa0 FMADD	D15, D30, D8, D15

    (1181) 0x453fa4 STP	D20, D9, [SP, #216]

    (1181) 0x453fa8 FNEG	D28, D18

    (1181) 0x453fac STR	D17, [SP, #232]

    (1181) 0x453fb0 FMADD	D19, D30, D15, D1

    (1181) 0x453fb4 LDR	D31, [X11, #152]

    (1181) 0x453fb8 FMUL	D7, D7, D31

    (1181) 0x453fbc FCMPE	D7, #0

    (1181) 0x453fc0 B.MI	45480c

    (1181) 0x453fc4 LDR	W7, [X11, #136]

    (1181) 0x453fc8 FCVTZS	W9, D7

    (1181) 0x453fcc SUB	W6, W7, #1

    (1181) 0x453fd0 CMP	W6, W9

    (1181) 0x453fd4 B.LT	454988

    (1181) 0x453fd8 ORR	X5, XZR, #3840

    (1181) 0x453fdc FRINTZ	D20, D7

    (1181) 0x453fe0 FSUB	D15, D7, S20

    (1181) 0x453fe4 MOVK	X5, #49093

    (1181) 0x453fe8 FMOV	D11, #0.5000000

    (1181) 0x453fec FMOV	D14, #-1.0000000

    (1181) 0x453ff0 FSUB	D7, D20, S7

    (1181) 0x453ff4 FMOV	D13, #1.0000000

    (1181) 0x453ff8 SBFM	X7, X9, #0, #31

    (1181) 0x453ffc FMOV	D10, X5

    (1181) 0x454000 FMOV	D16, #1.5000000

    (1181) 0x454004 FMOV	D9, #-2.0000000

    (1181) 0x454008 FMOV	D12, #3.0000000

    (1181) 0x45400c FMADD	D20, D15, D11, D14

    (1181) 0x454010 FMUL	D17, D15, D15

    (1181) 0x454014 FMSUB	D18, D15, D16, D13

    (1181) 0x454018 FMSUB	D8, D15, D11, D11

    (1181) 0x45401c FMADD	D16, D15, D16, D9

    (1181) 0x454020 FMADD	D9, D15, D12, D9

    (1181) 0x454024 FMSUB	D12, D15, D12, D13

    (1181) 0x454028 FADD	D13, D7, D13

    (1181) 0x45402c FMUL	D7, D15, D10

    (1181) 0x454030 FMADD	D8, D15, D8, D11

    (1181) 0x454034 FMUL	D10, D17, D11

    (1181) 0x454038 FMADD	D18, D15, D18, D11

    (1181) 0x45403c FMUL	D14, D15, D20

    (1181) 0x454040 STR	D16, [SP, #256]

    (1181) 0x454044 FMADD	D8, D15, D8, D1

    (1181) 0x454048 FADD	D20, D7, D11

    (1181) 0x45404c LDR	D11, [SP, #200]

    (1181) 0x454050 FNMUL	D17, D17, D7

    (1181) 0x454054 LDR	D16, [SP, #256]

    (1181) 0x454058 FMADD	D7, D15, D14, D11

    (1181) 0x45405c FMOV	D11, #-0.5000000

    (1181) 0x454060 FMUL	D16, D15, D16

    (1181) 0x454064 FMADD	D20, D15, D20, D11

    (1181) 0x454068 FSUB	D14, D11, S14

    (1181) 0x45406c FMADD	D11, D15, D20, D1

    (1181) 0x454070 LDR	D20, [SP, #216]

    (1181) 0x454074 ADD	X30, SP, #520

    (1181) 0x454078 LDRSW	X22, [X11, #232]

    (1181) 0x45407c STP	D5, D0, [SP, #464]

    (1181) 0x454080 STP	D6, D3, [SP, #480]

    (1181) 0x454084 STP	D19, D2, [SP, #496]

    (1181) 0x454088 STR	D20, [SP, #512]

    (1181) 0x45408c STP	D4, D27, [X30]

    (1181) 0x454090 UBFM	X3, X22, #61, #60

    (1181) 0x454094 STP	D21, D28, [X30, #32]

    (1181) 0x454098 ADD	X22, X19, X3

    (1181) 0x45409c ADD	X23, X20, X3

    (1181) 0x4540a0 LDR	D27, [SP, #168]

    (1181) 0x4540a4 ADD	X25, X22, X3

    (1181) 0x4540a8 ADD	X26, X23, X3

    (1181) 0x4540ac STR	D26, [SP, #608]

    (1181) 0x4540b0 ADD	X21, X25, X3

    (1181) 0x4540b4 LDR	D21, [SP, #176]

    (1181) 0x4540b8 ADD	X24, X21, X3

    (1181) 0x4540bc STR	D29, [SP, #616]

    (1181) 0x4540c0 ADD	X27, X24, X3

    (1181) 0x4540c4 LDR	D0, [SP, #184]

    (1181) 0x4540c8 STR	D23, [SP, #584]

    (1181) 0x4540cc LDR	D6, [SP, #208]

    (1181) 0x4540d0 STR	D27, [SP, #536]

    (1181) 0x4540d4 LDR	D3, [SP, #224]

    (1181) 0x4540d8 STR	D21, [SP, #544]

    (1181) 0x4540dc LDR	D29, [SP, #248]

    (1181) 0x4540e0 STR	D0, [SP, #592]

    (1181) 0x4540e4 LDP	D26, D5, [SP, #232]

    (1181) 0x4540e8 STR	D6, [SP, #600]

    (1181) 0x4540ec STR	D3, [SP, #568]

    (1181) 0x4540f0 STR	D24, [SP, #640]

    (1181) 0x4540f4 STR	D29, [SP, #632]

    (1181) 0x4540f8 STR	D30, [SP, #648]

    (1181) 0x4540fc STR	D26, [SP, #576]

    (1181) 0x454100 STR	D5, [SP, #624]

    (1181) 0x454104 LDP	X0, X9, [X11, #16]

    (1181) 0x454108 LDR	X5, [X11, #32]

    (1181) 0x45410c STR	X0, [SP, #168]

    (1181) 0x454110 CBZ	X2, 454214

    (1181) 0x454114 MOVZ	W1, #0

    (1181) 0x454118 ORR	X0, XZR, X28

    (1181) 0x45411c STP	X2, X11, [SP, #176]

    (1181) 0x454120 STR	D22, [SP, #208]

    (1181) 0x454124 STR	W8, [SP, #216]

    (1181) 0x454128 STR	D25, [SP, #224]

    (1181) 0x45412c STR	W10, [SP, #232]

    (1181) 0x454130 STR	D31, [SP, #240]

    (1181) 0x454134 STP	X9, X5, [SP, #248]

    (1181) 0x454138 STP	X3, X7, [SP, #264]

    (1181) 0x45413c STP	D7, D17, [SP, #280]

    (1181) 0x454140 STP	D16, D18, [SP, #296]

    (1181) 0x454144 STP	X18, X4, [SP, #312]

    (1181) 0x454148 BL	403bd0

    (1181) 0x45414c LDR	X2, [SP, #176]

    (1181) 0x454150 MOVZ	W1, #0

    (1181) 0x454154 ORR	X0, XZR, X20

    (1181) 0x454158 BL	403bd0

    (1181) 0x45415c LDR	X2, [SP, #176]

    (1181) 0x454160 MOVZ	W1, #0

    (1181) 0x454164 ORR	X0, XZR, X23

    (1181) 0x454168 BL	403bd0

    (1181) 0x45416c LDR	X2, [SP, #176]

    (1181) 0x454170 MOVZ	W1, #0

    (1181) 0x454174 ORR	X0, XZR, X26

    (1181) 0x454178 BL	403bd0

    (1181) 0x45417c LDR	X2, [SP, #176]

    (1181) 0x454180 MOVZ	W1, #0

    (1181) 0x454184 ORR	X0, XZR, X19

    (1181) 0x454188 BL	403bd0

    (1181) 0x45418c LDR	X2, [SP, #176]

    (1181) 0x454190 MOVZ	W1, #0

    (1181) 0x454194 ORR	X0, XZR, X22

    (1181) 0x454198 BL	403bd0

    (1181) 0x45419c LDR	X2, [SP, #176]

    (1181) 0x4541a0 MOVZ	W1, #0

    (1181) 0x4541a4 ORR	X0, XZR, X25

    (1181) 0x4541a8 BL	403bd0

    (1181) 0x4541ac LDR	X2, [SP, #176]

    (1181) 0x4541b0 MOVZ	W1, #0

    (1181) 0x4541b4 ORR	X0, XZR, X21

    (1181) 0x4541b8 BL	403bd0

    (1181) 0x4541bc LDR	X2, [SP, #176]

    (1181) 0x4541c0 MOVZ	W1, #0

    (1181) 0x4541c4 ORR	X0, XZR, X24

    (1181) 0x4541c8 BL	403bd0

    (1181) 0x4541cc LDR	X2, [SP, #176]

    (1181) 0x4541d0 ORR	X0, XZR, X27

    (1181) 0x4541d4 MOVZ	W1, #0

    (1181) 0x4541d8 BL	403bd0

    (1181) 0x4541dc LDR	D22, [SP, #208]

    (1181) 0x4541e0 ADRP	X14,

    (1181) 0x4541e4 LDP	X2, X11, [SP, #176]

    (1181) 0x4541e8 LDP	X9, X5, [SP, #248]

    (1181) 0x4541ec LDP	X3, X7, [SP, #264]

    (1181) 0x4541f0 LDP	X18, X4, [SP, #312]

    (1181) 0x4541f4 LDR	D25, [SP, #224]

    (1181) 0x4541f8 LDR	D31, [SP, #240]

    (1181) 0x4541fc LDP	D7, D17, [SP, #280]

    (1181) 0x454200 LDP	D16, D18, [SP, #296]

    (1181) 0x454204 LDR	W8, [SP, #216]

    (1181) 0x454208 LDR	W10, [SP, #232]

    (1181) 0x45420c LDR	D1, [X14, #4056]

    (1181) 0x454210 ADD	X14, SP, #624

    (1181) 0x454214 LDR	W6, [SP, #348]

    (1181) 0x454218 LDR	X1, [X11, #8]

    (1181) 0x45421c MADD	X11, X5, X7, XZR

    (1181) 0x454220 CMP	W6, #0

    (1181) 0x454224 B.LE	4549f4

    (1181) 0x454228 SBFM	X13, X10, #0, #31

    (1181) 0x45422c UBFM	X6, X5, #63, #62

    (1181) 0x454230 SUB	X12, XZR, X5,LSL #3

    (1181) 0x454234 ADD	X30, X6, X5

    (1181) 0x454238 UBFM	X7, X9, #61, #60

    (1181) 0x45423c STP	D22, D25, [SP, #208]

    (1181) 0x454240 MADD	X0, X13, X9, XZR

    (1181) 0x454244 SBFM	X8, X8, #0, #31

    (1181) 0x454248 MOVZ	X13, #1

    (1181) 0x45424c ADD	X10, SP, #560

    (1181) 0x454250 ADD	X16, SP, #592

    (1181) 0x454254 STP	X3, X18, [SP, #224]

    (1181) 0x454258 ADD	X15, SP, #528

    (1181) 0x45425c ADD	X17, X5, X0

    (1181) 0x454260 ADD	X9, X6, X0

    (1181) 0x454264 ADD	X5, X30, X0

    (1181) 0x454268 LDR	X0, [SP, #168]

    (1181) 0x45426c ADD	X6, X1, X9,LSL #3

    (1181) 0x454270 ADD	X17, X1, X17,LSL #3

    (1181) 0x454274 ADD	X30, SP, #464

    (1181) 0x454278 STR	X4, [SP, #240]

    (1181) 0x45427c ADD	X1, X1, X5,LSL #3

    (1181) 0x454280 MADD	X8, X8, X0, X11

    (1181) 0x454284 ADD	X11, SP, #496

    (1181) 0x454288 STP	X1, X6, [SP, #176]

      (1185) 0x45428c UBFM	X18, X13, #61, #60

      (1185) 0x454290 UBFM	X9, X8, #61, #60

      (1185) 0x454294 ADD	X5, X15, X18

      (1185) 0x454298 ADD	X0, X30, X18

      (1185) 0x45429c LDR	X1, [SP, #184]

      (1185) 0x4542a0 ADD	X4, X16, X18

      (1185) 0x4542a4 ADD	X3, X9, X17

      (1185) 0x4542a8 MOVZ	X6, #1

      (1185) 0x4542ac LDR	X18, [SP, #176]

      (1185) 0x4542b0 LDUR	D4, [X5, #504]

      (1185) 0x4542b4 LDUR	D5, [X0, #504]

      (1185) 0x4542b8 LDUR	D3, [X4, #504]

      (1185) 0x4542bc ADD	X4, X1, X9

      (1185) 0x4542c0 ADD	X1, X18, X9

        (1184) 0x4542c4 UBFM	X5, X6, #61, #60

        (1184) 0x4542c8 MOVZ	X0, #0

        (1184) 0x4542cc ADD	X9, X10, X5

        (1184) 0x4542d0 ADD	X18, X11, X5

        (1184) 0x4542d4 ADD	X5, X14, X5

        (1184) 0x4542d8 LDUR	D25, [X9, #504]

        (1184) 0x4542dc ADD	X9, X3, X12

        (1184) 0x4542e0 LDUR	D28, [X18, #504]

        (1184) 0x4542e4 LDUR	D22, [X5, #504]

        (1184) 0x4542e8 FMUL	D19, D4, D25

        (1184) 0x4542ec FMUL	D6, D3, D28

        (1184) 0x4542f0 FMUL	D21, D28, D4

        (1184) 0x4542f4 FMUL	D23, D28, D5

        (1184) 0x4542f8 FMUL	D20, D5, D22

        (1184) 0x4542fc FMUL	D22, D5, D25

          (1183) 0x454300 LDR	D2, [X3, X0]

          (1183) 0x454304 LDR	D29, [X1, X0]

          (1183) 0x454308 LDR	D0, [X9, X0]

          (1183) 0x45430c LDR	D26, [X4, X0]

          (1183) 0x454310 FMUL	D30, D2, D7

          (1183) 0x454314 FMUL	D24, D2, D16

          (1183) 0x454318 FMUL	D27, D2, D9

          (1183) 0x45431c FMUL	D2, D29, D17

          (1183) 0x454320 LDR	D25, [X19, X0]

          (1183) 0x454324 FMUL	D28, D29, D10

          (1183) 0x454328 FMUL	D29, D29, D15

          (1183) 0x45432c FMADD	D30, D0, D11, D30

          (1183) 0x454330 FMADD	D24, D0, D14, D24

          (1183) 0x454334 FMADD	D27, D0, D13, D27

          (1183) 0x454338 LDR	D0, [X20, X0]

          (1183) 0x45433c FMADD	D2, D26, D8, D2

          (1183) 0x454340 FMADD	D28, D26, D18, D28

          (1183) 0x454344 FMADD	D29, D26, D12, D29

          (1183) 0x454348 LDR	D26, [X28, X0]

          (1183) 0x45434c FADD	D30, D30, D2

          (1183) 0x454350 FADD	D24, D28, D24

          (1183) 0x454354 FADD	D2, D27, D29

          (1183) 0x454358 FMADD	D25, D6, D30, D25

          (1183) 0x45435c FMADD	D27, D21, D30, D0

          (1183) 0x454360 FMADD	D28, D23, D30, D26

          (1183) 0x454364 STR	D25, [X19, X0]

          (1183) 0x454368 LDR	D29, [X22, X0]

          (1183) 0x45436c STR	D27, [X20, X0]

          (1183) 0x454370 LDR	D0, [X23, X0]

          (1183) 0x454374 STR	D28, [X28, X0]

          (1183) 0x454378 FMADD	D25, D19, D30, D29

          (1183) 0x45437c FMADD	D26, D22, D30, D0

          (1183) 0x454380 STR	D25, [X22, X0]

          (1183) 0x454384 LDR	D27, [X25, X0]

          (1183) 0x454388 STR	D26, [X23, X0]

          (1183) 0x45438c LDR	D28, [X26, X0]

          (1183) 0x454390 FMADD	D29, D21, D24, D27

          (1183) 0x454394 FMADD	D0, D23, D24, D28

          (1183) 0x454398 STR	D29, [X25, X0]

          (1183) 0x45439c LDR	D25, [X21, X0]

          (1183) 0x4543a0 STR	D0, [X26, X0]

          (1183) 0x4543a4 FMADD	D30, D20, D30, D25

          (1183) 0x4543a8 STR	D30, [X21, X0]

          (1183) 0x4543ac LDR	D26, [X24, X0]

          (1183) 0x4543b0 FMADD	D24, D22, D24, D26

          (1183) 0x4543b4 STR	D24, [X24, X0]

          (1183) 0x4543b8 LDR	D27, [X27, X0]

          (1183) 0x4543bc FMADD	D2, D23, D2, D27

          (1183) 0x4543c0 STR	D2, [X27, X0]

          (1183) 0x4543c4 ADD	X0, X0, #8

          (1183) 0x4543c8 CMP	X2, X0

          (1183) 0x4543cc B.NE	454300

        (1184) 0x4543d0 ADD	X6, X6, #1

        (1184) 0x4543d4 ADD	X3, X3, X7

        (1184) 0x4543d8 ADD	X4, X4, X7

        (1184) 0x4543dc ADD	X1, X1, X7

        (1184) 0x4543e0 CMP	X6, #5

        (1184) 0x4543e4 B.NE	4542c4

      (1185) 0x4543e8 LDR	X3, [SP, #168]

      (1185) 0x4543ec ADD	X13, X13, #1

      (1185) 0x4543f0 ADD	X8, X8, X3

      (1185) 0x4543f4 CMP	X13, #5

      (1185) 0x4543f8 B.NE	45428c

    (1181) 0x4543fc LDP	D22, D25, [SP, #208]

    (1181) 0x454400 LDP	X3, X18, [SP, #224]

    (1181) 0x454404 LDR	X4, [SP, #240]

    (1181) 0x454408 FMUL	D3, D22, D22

    (1181) 0x45440c FMUL	D4, D25, D25

    (1181) 0x454410 MOVZ	X6, #0

    (1181) 0x454414 FMUL	D5, D31, D31

    (1181) 0x454418 FMUL	D7, D22, D25

    (1181) 0x45441c FMUL	D8, D22, D31

    (1181) 0x454420 FMUL	D9, D25, D31

    (1181) 0x454424 TBZ	W2, #3, 4544a0

    (1181) 0x454428 LDR	D10, [X19]

    (1181) 0x45442c MOVZ	X6, #8

    (1181) 0x454430 LDR	D12, [X20]

    (1181) 0x454434 FMUL	D11, D10, D3

    (1181) 0x454438 FMUL	D13, D12, D22

    (1181) 0x45443c STR	D11, [X19]

    (1181) 0x454440 LDR	D14, [X25, X3]

    (1181) 0x454444 STR	D13, [X20]

    (1181) 0x454448 LDR	D28, [X20, X3]

    (1181) 0x45444c FMUL	D15, D14, D4

    (1181) 0x454450 FMUL	D29, D28, D25

    (1181) 0x454454 STR	D15, [X25, X3]

    (1181) 0x454458 LDR	D16, [X24, X3]

    (1181) 0x45445c STR	D29, [X20, X3]

    (1181) 0x454460 LDR	D0, [X23, X3]

    (1181) 0x454464 FMUL	D17, D16, D5

    (1181) 0x454468 FMUL	D30, D0, D31

    (1181) 0x45446c STR	D17, [X24, X3]

    (1181) 0x454470 LDR	D18, [X19, X3]

    (1181) 0x454474 STR	D30, [X23, X3]

    (1181) 0x454478 FMUL	D20, D18, D7

    (1181) 0x45447c STR	D20, [X19, X3]

    (1181) 0x454480 LDR	D19, [X22, X3]

    (1181) 0x454484 FMUL	D6, D19, D8

    (1181) 0x454488 STR	D6, [X22, X3]

    (1181) 0x45448c LDR	D21, [X21, X3]

    (1181) 0x454490 FMUL	D23, D21, D9

    (1181) 0x454494 STR	D23, [X21, X3]

    (1181) 0x454498 CMP	X6, X2

    (1181) 0x45449c B.EQ	454588

      (1179) 0x4544a0 LDR	D26, [X19, X6]

      (1179) 0x4544a4 ADD	X1, X6, #8

      (1179) 0x4544a8 LDR	D24, [X20, X6]

      (1179) 0x4544ac FMUL	D27, D26, D3

      (1179) 0x4544b0 FMUL	D2, D24, D22

      (1179) 0x4544b4 STR	D27, [X19, X6]

      (1179) 0x4544b8 LDR	D10, [X21, X6]

      (1179) 0x4544bc STR	D2, [X20, X6]

      (1179) 0x4544c0 LDR	D11, [X23, X6]

      (1179) 0x4544c4 FMUL	D12, D10, D4

      (1179) 0x4544c8 FMUL	D13, D11, D25

      (1179) 0x4544cc STR	D12, [X21, X6]

      (1179) 0x4544d0 LDR	D14, [X27, X6]

      (1179) 0x4544d4 STR	D13, [X23, X6]

      (1179) 0x4544d8 LDR	D15, [X26, X6]

      (1179) 0x4544dc FMUL	D16, D14, D5

      (1179) 0x4544e0 FMUL	D17, D15, D31

      (1179) 0x4544e4 STR	D16, [X27, X6]

      (1179) 0x4544e8 LDR	D18, [X22, X6]

      (1179) 0x4544ec STR	D17, [X26, X6]

      (1179) 0x4544f0 LDR	D20, [X20, X1]

      (1179) 0x4544f4 FMUL	D19, D18, D7

      (1179) 0x4544f8 FMUL	D6, D20, D22

      (1179) 0x4544fc STR	D19, [X22, X6]

      (1179) 0x454500 LDR	D21, [X25, X6]

      (1179) 0x454504 STR	D6, [X20, X1]

      (1179) 0x454508 LDR	D23, [X23, X1]

      (1179) 0x45450c FMUL	D28, D21, D8

      (1179) 0x454510 FMUL	D29, D23, D25

      (1179) 0x454514 STR	D28, [X25, X6]

      (1179) 0x454518 LDR	D0, [X24, X6]

      (1179) 0x45451c STR	D29, [X23, X1]

      (1179) 0x454520 LDR	D26, [X26, X1]

      (1179) 0x454524 FMUL	D30, D0, D9

      (1179) 0x454528 FMUL	D24, D26, D31

      (1179) 0x45452c STR	D30, [X24, X6]

      (1179) 0x454530 ADD	X6, X1, #8

      (1179) 0x454534 LDR	D27, [X19, X1]

      (1179) 0x454538 STR	D24, [X26, X1]

      (1179) 0x45453c FMUL	D2, D27, D3

      (1179) 0x454540 STR	D2, [X19, X1]

      (1179) 0x454544 LDR	D10, [X21, X1]

      (1179) 0x454548 FMUL	D11, D10, D4

      (1179) 0x45454c STR	D11, [X21, X1]

      (1179) 0x454550 LDR	D12, [X27, X1]

      (1179) 0x454554 FMUL	D13, D12, D5

      (1179) 0x454558 STR	D13, [X27, X1]

      (1179) 0x45455c LDR	D14, [X22, X1]

      (1179) 0x454560 FMUL	D15, D14, D7

      (1179) 0x454564 STR	D15, [X22, X1]

      (1179) 0x454568 LDR	D16, [X25, X1]

      (1179) 0x45456c FMUL	D17, D16, D8

      (1179) 0x454570 STR	D17, [X25, X1]

      (1179) 0x454574 LDR	D18, [X24, X1]

      (1179) 0x454578 FMUL	D20, D18, D9

      (1179) 0x45457c STR	D20, [X24, X1]

      (1179) 0x454580 CMP	X6, X2

      (1179) 0x454584 B.NE	4544a0

    (1181) 0x454588 LDR	X7, [SP, #192]

    (1181) 0x45458c ADD	X4, X4, #8

    (1181) 0x454590 ADD	X18, X18, #40

    (1181) 0x454594 LDR	X11, [SP, #376]

    (1181) 0x454598 ADD	X10, X7, #24

    (1181) 0x45459c STR	X10, [SP, #192]

    (1181) 0x4545a0 CMP	X11, X4

    (1181) 0x4545a4 B.NE	453dec

(1182) 0x4545a8 LDP	D8, D9, [SP, #96]

(1182) 0x4545ac LDP	X19, X22, [SP, #400]

(1182) 0x4545b0 LDP	X21, X20, [SP, #416]

(1182) 0x4545b4 LDP	D10, D11, [SP, #112]

(1182) 0x4545b8 LDP	D12, D13, [SP, #128]

(1182) 0x4545bc LDP	D14, D15, [SP, #144]

(1182) 0x4545c0 LDR	X23, [SP, #384]

(1182) 0x4545c4 ORR	X0, XZR, X23

(1182) 0x4545c8 BL	4c4660

(1182) 0x4545cc LDR	W25, [X19, #48]

(1182) 0x4545d0 CMP	W25, #0

(1182) 0x4545d4 B.LE	4547ec

(1182) 0x4545d8 LDR	W26, [X19, #64]

(1182) 0x4545dc MOVZ	W2, #24

(1182) 0x4545e0 UBFM	X12, X25, #61, #31

(1182) 0x4545e4 MOVZ	X18, #0

(1182) 0x4545e8 MOVZ	X17, #0

(1182) 0x4545ec LDR	W24, [X19, #8]

(1182) 0x4545f0 UMADDL	X23, W25, W2, XZR

(1182) 0x4545f4 MOVZ	X16, #0

(1182) 0x4545f8 MOVZ	X4, #0

(1182) 0x4545fc MOVZ	W15, #0

(1182) 0x454600 STR	X12, [SP, #168]

(1182) 0x454604 ORR	W14, WZR, W26

  (1186) 0x454608 CMP	W14, W24

  (1186) 0x45460c CSEL	W27, W14, W24, #13

  (1186) 0x454610 CMP	W15, W27

  (1186) 0x454614 B.GE	4547c8

  (1186) 0x454618 LDR	X5, [X19, #808]

  (1186) 0x45461c SUB	W13, W27, W15

  (1186) 0x454620 MOVZ	X0, #0

  (1186) 0x454624 ANDS	X30, X13, #4160

  (1186) 0x454628 LDR	X9, [X19, #832]

  (1186) 0x45462c LDR	X28, [X19, #784]

  (1186) 0x454630 ADD	X3, X5, X17

  (1186) 0x454634 LDRSW	X1, [X3, #8]

  (1186) 0x454638 ADD	X6, X9, X17

  (1186) 0x45463c LDR	X7, [X6, #24]

  (1186) 0x454640 LDR	X8, [X28, X16]

  (1186) 0x454644 UBFM	X27, X1, #61, #60

  (1186) 0x454648 UBFM	X2, X1, #60, #59

  (1186) 0x45464c LDR	X6, [X3, #24]

  (1186) 0x454650 LDR	X5, [X21, #24]

  (1186) 0x454654 LDR	X3, [X20, #24]

  (1186) 0x454658 ADD	X11, X6, X27

  (1186) 0x45465c ADD	X10, X6, X2

  (1186) 0x454660 LDR	X28, [X22, #24]

  (1186) 0x454664 ADD	X1, X5, X18

  (1186) 0x454668 ADD	X9, X3, X4

  (1186) 0x45466c ADD	X12, X28, X4

  (1186) 0x454670 B.EQ	454710

  (1186) 0x454674 CMP	X30, #1

  (1186) 0x454678 B.EQ	4546dc

  (1186) 0x45467c CMP	X30, #2

  (1186) 0x454680 B.EQ	4546b0

  (1186) 0x454684 LDR	D1, [X8]

  (1186) 0x454688 MOVZ	X0, #1

  (1186) 0x45468c ADD	X1, X1, #24

  (1186) 0x454690 STR	D1, [X28, X4]

  (1186) 0x454694 LDR	D25, [X6]

  (1186) 0x454698 LDR	D31, [X6, X27]

  (1186) 0x45469c LDR	D22, [X6, X2]

  (1186) 0x4546a0 STR	D25, [X5, X18]

  (1186) 0x4546a4 STP	D31, D22, [X1, #1008]

  (1186) 0x4546a8 LDR	D3, [X7]

  (1186) 0x4546ac STR	D3, [X3, X4]

  (1186) 0x4546b0 LDR	D4, [X8, X0,LSL #3]

  (1186) 0x4546b4 ADD	X1, X1, #24

  (1186) 0x4546b8 STR	D4, [X12, X0,LSL #3]

  (1186) 0x4546bc LDR	D5, [X6, X0,LSL #3]

  (1186) 0x4546c0 LDR	D7, [X11, X0,LSL #3]

  (1186) 0x4546c4 LDR	D19, [X10, X0,LSL #3]

  (1186) 0x4546c8 STP	D5, D7, [X1, #1000]

  (1186) 0x4546cc STUR	D19, [X1, #504]

  (1186) 0x4546d0 LDR	D6, [X7, X0,LSL #3]

  (1186) 0x4546d4 STR	D6, [X9, X0,LSL #3]

  (1186) 0x4546d8 ADD	X0, X0, #1

  (1186) 0x4546dc LDR	D21, [X8, X0,LSL #3]

  (1186) 0x4546e0 ADD	X1, X1, #24

  (1186) 0x4546e4 STR	D21, [X12, X0,LSL #3]

  (1186) 0x4546e8 LDR	D23, [X6, X0,LSL #3]

  (1186) 0x4546ec LDR	D28, [X11, X0,LSL #3]

  (1186) 0x4546f0 LDR	D29, [X10, X0,LSL #3]

  (1186) 0x4546f4 STP	D23, D28, [X1, #1000]

  (1186) 0x4546f8 STUR	D29, [X1, #504]

  (1186) 0x4546fc LDR	D0, [X7, X0,LSL #3]

  (1186) 0x454700 STR	D0, [X9, X0,LSL #3]

  (1186) 0x454704 ADD	X0, X0, #1

  (1186) 0x454708 CMP	X13, X0

  (1186) 0x45470c B.EQ	4547c8

    (1187) 0x454710 LDR	D26, [X8, X0,LSL #3]

    (1187) 0x454714 ADD	X2, X0, #1

    (1187) 0x454718 ADD	X30, X1, #24

    (1187) 0x45471c ADD	X5, X0, #2

    (1187) 0x454720 ADD	X28, X1, #48

    (1187) 0x454724 ADD	X3, X0, #3

    (1187) 0x454728 ADD	X27, X1, #72

    (1187) 0x45472c ADD	X1, X1, #96

    (1187) 0x454730 STR	D26, [X12, X0,LSL #3]

    (1187) 0x454734 LDR	D30, [X6, X0,LSL #3]

    (1187) 0x454738 LDR	D24, [X11, X0,LSL #3]

    (1187) 0x45473c LDR	D27, [X10, X0,LSL #3]

    (1187) 0x454740 STP	D30, D24, [X1, #928]

    (1187) 0x454744 STUR	D27, [X1, #432]

    (1187) 0x454748 LDR	D2, [X7, X0,LSL #3]

    (1187) 0x45474c STR	D2, [X9, X0,LSL #3]

    (1187) 0x454750 ADD	X0, X0, #4

    (1187) 0x454754 LDR	D16, [X8, X2,LSL #3]

    (1187) 0x454758 STR	D16, [X12, X2,LSL #3]

    (1187) 0x45475c LDR	D17, [X6, X2,LSL #3]

    (1187) 0x454760 LDR	D18, [X11, X2,LSL #3]

    (1187) 0x454764 LDR	D20, [X10, X2,LSL #3]

    (1187) 0x454768 STUR	D17, [X1, #440]

    (1187) 0x45476c STP	D18, D20, [X30, #8]

    (1187) 0x454770 LDR	D1, [X7, X2,LSL #3]

    (1187) 0x454774 STR	D1, [X9, X2,LSL #3]

    (1187) 0x454778 LDR	D31, [X8, X5,LSL #3]

    (1187) 0x45477c STR	D31, [X12, X5,LSL #3]

    (1187) 0x454780 LDR	D22, [X6, X5,LSL #3]

    (1187) 0x454784 LDR	D25, [X11, X5,LSL #3]

    (1187) 0x454788 LDR	D3, [X10, X5,LSL #3]

    (1187) 0x45478c STUR	D22, [X1, #464]

    (1187) 0x454790 STP	D25, D3, [X28, #8]

    (1187) 0x454794 LDR	D4, [X7, X5,LSL #3]

    (1187) 0x454798 STR	D4, [X9, X5,LSL #3]

    (1187) 0x45479c LDR	D5, [X8, X3,LSL #3]

    (1187) 0x4547a0 STR	D5, [X12, X3,LSL #3]

    (1187) 0x4547a4 LDR	D19, [X11, X3,LSL #3]

    (1187) 0x4547a8 LDR	D6, [X10, X3,LSL #3]

    (1187) 0x4547ac LDR	D7, [X6, X3,LSL #3]

    (1187) 0x4547b0 STUR	D7, [X1, #488]

    (1187) 0x4547b4 STP	D19, D6, [X27, #8]

    (1187) 0x4547b8 LDR	D21, [X7, X3,LSL #3]

    (1187) 0x4547bc STR	D21, [X9, X3,LSL #3]

    (1187) 0x4547c0 CMP	X13, X0

    (1187) 0x4547c4 B.NE	454710

  (1186) 0x4547c8 LDR	X13, [SP, #168]

  (1186) 0x4547cc ADD	X16, X16, #24

  (1186) 0x4547d0 ADD	W14, W14, W26

  (1186) 0x4547d4 ADD	W15, W15, W25

  (1186) 0x4547d8 ADD	X17, X17, #40

  (1186) 0x4547dc ADD	X18, X18, X23

  (1186) 0x4547e0 ADD	X4, X4, X13

  (1186) 0x4547e4 CMP	X23, X16

  (1186) 0x4547e8 B.NE	454608

(1182) 0x4547ec LDP	X29, X30, [SP]

(1182) 0x4547f0 LDP	X19, X20, [SP, #16]

(1182) 0x4547f4 LDP	X21, X22, [SP, #32]

(1182) 0x4547f8 LDP	X23, X24, [SP, #48]

(1182) 0x4547fc LDP	X25, X26, [SP, #64]

(1182) 0x454800 LDP	X27, X28, [SP, #80]

(1182) 0x454804 ADD	SP, SP, #656

(1182) 0x454808 RET

  (1180) 0x45480c MOVI	D10, #0

  (1180) 0x454810 FMOV	D12, #1.0000000

  (1180) 0x454814 LDR	D7, [SP, #200]

  (1180) 0x454818 FMOV	D8, D1

  (1180) 0x45481c FMOV	D9, #-2.0000000

  (1180) 0x454820 MOVZ	X7, #0

  (1180) 0x454824 FMOV	D11, D1

  (1180) 0x454828 FMOV	D18, #0.5000000

  (1180) 0x45482c FMOV	D14, #-0.5000000

  (1180) 0x454830 FMOV	D13, D12

  (1180) 0x454834 FMOV	D16, D10

  (1180) 0x454838 FMOV	D17, D10

  (1180) 0x45483c FMOV	D15, D10

  (1180) 0x454840 B	454070

    (1181) 0x454844 MOVI	D23, #0

    (1181) 0x454848 FMOV	D24, #1.0000000

    (1181) 0x45484c LDR	D2, [SP, #200]

    (1181) 0x454850 FMOV	D31, #-2.0000000

    (1181) 0x454854 FMOV	D12, #0.5000000

    (1181) 0x454858 MOVZ	W10, #0

    (1181) 0x45485c FMOV	D28, #-0.5000000

    (1181) 0x454860 FMOV	D19, D1

    (1181) 0x454864 FMOV	D4, D23

    (1181) 0x454868 FMOV	D30, D23

    (1181) 0x45486c STP	D1, D23, [SP, #216]

    (1181) 0x454870 STP	D12, D24, [SP, #232]

    (1181) 0x454874 STR	D31, [SP, #248]

    (1181) 0x454878 B	453fb4

    (1181) 0x45487c MOVI	D21, #0

    (1181) 0x454880 FMOV	D26, #1.0000000

    (1181) 0x454884 LDR	D0, [SP, #200]

    (1181) 0x454888 FMOV	D2, #-2.0000000

    (1181) 0x45488c FMOV	D16, #0.5000000

    (1181) 0x454890 MOVZ	W8, #0

    (1181) 0x454894 FMOV	D27, #-0.5000000

    (1181) 0x454898 FMOV	D6, D1

    (1181) 0x45489c FMOV	D5, D1

    (1181) 0x4548a0 FMOV	D3, D21

    (1181) 0x4548a4 FMOV	D29, D21

    (1181) 0x4548a8 STR	D26, [SP, #184]

    (1181) 0x4548ac STP	D21, D16, [SP, #168]

    (1181) 0x4548b0 STR	D2, [SP, #208]

    (1181) 0x4548b4 B	453ef0

    (1181) 0x4548b8 LDR	D11, [SP, #200]

    (1181) 0x4548bc MOVI	D28, #0

    (1181) 0x4548c0 MOVN	X27, #3

    (1181) 0x4548c4 MOVN	X21, #7

    (1181) 0x4548c8 MOVN	X23, #3

    (1181) 0x4548cc MOVZ	X24, #3

    (1181) 0x4548d0 MOVN	X0, #1

    (1181) 0x4548d4 MOVK	X27, #49151

    (1181) 0x4548d8 MOVK	X21, #16367

    (1181) 0x4548dc MOVZ	X22, #15536

    (1181) 0x4548e0 MOVK	X23, #16351

    (1181) 0x4548e4 FMOV	D19, D28

    (1181) 0x4548e8 ADRP	X30,

    (1181) 0x4548ec MOVZ	X25, #15556

    (1181) 0x4548f0 FMOV	D24, X27

    (1181) 0x4548f4 MOVK	X24, #49120

    (1181) 0x4548f8 MOVK	X0, #16367

    (1181) 0x4548fc FMOV	D23, X23

    (1181) 0x454900 ADRP	X1,

    (1181) 0x454904 LDR	D4, [X30, #4040]

    (1181) 0x454908 FMOV	D30, X0

    (1181) 0x45490c LDR	D2, [X1, #4048]

    (1181) 0x454910 STR	D11, [SP, #216]

    (1181) 0x454914 STP	X24, X25, [SP, #224]

    (1181) 0x454918 STP	X22, X21, [SP, #240]

    (1181) 0x45491c B	453fb4

    (1181) 0x454920 MOVI	D27, #0

    (1181) 0x454924 MOVN	X9, #3

    (1181) 0x454928 MOVN	X7, #7

    (1181) 0x45492c MOVN	X5, #3

    (1181) 0x454930 MOVZ	X12, #3

    (1181) 0x454934 LDR	D6, [SP, #200]

    (1181) 0x454938 MOVN	X13, #1

    (1181) 0x45493c MOVK	X9, #49151

    (1181) 0x454940 MOVK	X7, #16367

    (1181) 0x454944 MOVZ	X6, #15536

    (1181) 0x454948 MOVK	X5, #16351

    (1181) 0x45494c ADRP	X3,

    (1181) 0x454950 FMOV	D26, X9

    (1181) 0x454954 MOVZ	X10, #15556

    (1181) 0x454958 MOVK	X12, #49120

    (1181) 0x45495c FMOV	D5, D27

    (1181) 0x454960 MOVK	X13, #16367

    (1181) 0x454964 ADRP	X15,

    (1181) 0x454968 FMOV	D21, X5

    (1181) 0x45496c LDR	D3, [X3, #4040]

    (1181) 0x454970 FMOV	D29, X13

    (1181) 0x454974 LDR	D0, [X15, #4048]

    (1181) 0x454978 STP	X12, X10, [SP, #168]

    (1181) 0x45497c STR	X6, [SP, #184]

    (1181) 0x454980 STR	X7, [SP, #208]

    (1181) 0x454984 B	453ef0

    (1181) 0x454988 MOVI	D14, #0

    (1181) 0x45498c MOVN	X13, #7

    (1181) 0x454990 MOVN	X12, #3

    (1181) 0x454994 MOVK	X13, #16367

    (1181) 0x454998 MOVN	X16, #3

    (1181) 0x45499c LDR	D8, [SP, #200]

    (1181) 0x4549a0 MOVZ	X26, #3

    (1181) 0x4549a4 MOVK	X12, #49151

    (1181) 0x4549a8 MOVZ	X15, #15536

    (1181) 0x4549ac MOVK	X16, #16351

    (1181) 0x4549b0 FMOV	D9, X13

    (1181) 0x4549b4 ADRP	X3,

    (1181) 0x4549b8 MOVZ	X17, #15556

    (1181) 0x4549bc FMOV	D12, X12

    (1181) 0x4549c0 MOVK	X26, #49120

    (1181) 0x4549c4 ADD	X27, X13, #6

    (1181) 0x4549c8 FMOV	D13, X15

    (1181) 0x4549cc ADRP	X21,

    (1181) 0x4549d0 FMOV	D10, X16

    (1181) 0x4549d4 SBFM	X7, X6, #0, #31

    (1181) 0x4549d8 FMOV	D18, X17

    (1181) 0x4549dc FMOV	D16, X26

    (1181) 0x4549e0 FMOV	D15, X27

    (1181) 0x4549e4 LDR	D17, [X3, #4040]

    (1181) 0x4549e8 FMOV	D11, D14

    (1181) 0x4549ec LDR	D7, [X21, #4048]

    (1181) 0x4549f0 B	454070

    (1181) 0x4549f4 LDR	X28, [SP, #392]

    (1181) 0x4549f8 CBNZ	X28, 454408

    (1181) 0x4549fc LDR	X7, [SP, #192]

    (1181) 0x454a00 ADD	X4, X4, #8

    (1181) 0x454a04 ADD	X18, X18, #40

    (1181) 0x454a08 LDR	X11, [SP, #376]

    (1181) 0x454a0c ADD	X10, X7, #24

    (1181) 0x454a10 STR	X10, [SP, #192]

    (1181) 0x454a14 CMP	X11, X4

    (1181) 0x454a18 B.NE	453dec

(1182) 0x454a1c B	4545a8

Coverage (%)	Name	Source Location	Module

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	einspline_spo_ref.hpp:203-230
Module	exec

The function is defined in:

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:168-174
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:53-66
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:187-192,199-215,226-262,269-286
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp:203-211,219-230
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h:150-152
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp:68-79
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:143
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:231,265,271
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h:238,951-952
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:145
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h:1131,1263
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/Tensor.h:213

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 17.00 to 11.00 cycles (1.55x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 49% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 17.00 to 12.75 cycles (1.33x speedup).

Details

43% of VPU instructions are used in vector version (process two or more data elements in vector registers):

58% of VPU loads are used in vector version.
50% of VPU stores are used in vector version.
66% of VPU addition or subtraction instructions are used in vector version.
32% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 17.00 to 0.50 cycles (34.00x speedup).

FMA

Detected 6 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Matching between your function (in the source code) and the binary function

The binary function is composed of 23 FP arithmetical operations:

14: addition or subtraction (6 inside FMA instructions)
9: multiply (6 inside FMA instructions)

The binary function is loading 268 bytes. The binary function is storing 388 bytes.

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	115
loop length	460
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

14.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	2.00	2.00	9.75	9.75	9.75	9.75	11.00	11.00	6.00	6.00	17.00	17.00	17.00	8.00	8.00
cycles	2.00	2.00	9.75	9.75	9.75	9.75	11.00	11.00	6.00	6.00	17.00	17.00	17.00	8.00	8.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	14.38
Overall L1	17.00

Vectorization ratios

INT

all	34%
load	58%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	16%

all	100%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	43%
load	58%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	66%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	32%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 17.00 cycles. At this rate:

16% of peak load performance is reached (15.76 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
47% of peak store performance is reached (22.82 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 453c20

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #656	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X20, XZR, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X21, XZR, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X22, XZR, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR W24, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X25, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X23, [X0, #856]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4c43c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W0, [X25, #292]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X4, X25, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W24, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 453c80 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEERNS6_INS2_10TinyVectorIdLj3EEESaISB_EEES9_+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X2, [X25, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ W1, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SMADDL X4, W24, W1, X2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X5, X19, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP D28, D27, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MOVZ W6, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X14, SP, #624	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
WHILELO P4.D, WZR, W6	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
LDP D6, D4, [X5, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
MOVZ X3, #48304	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z30.D, X3	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
CNTD X7, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
WHILELO P5.D, W7, W6	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
LDP D2, D23, [X5, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D19, [X19, #216]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D3, D26, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D0, D27, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D1, D27, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D5, D27, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
LDR D24, [X4, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D25, D22, [X5, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D20, D28, D19, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D7, D28, D3, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D16, D28, D26, D5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D21, D24, D23, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D17, D24, D25, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D18, D24, D22, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D21, [SP, #624]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D17, [SP, #632]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D18, [SP, #640]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LD1D {Z29.D}, P4/Z, [X14, MUL VL]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
FCMLT P6.D, P7/Z, Z29.D, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
MOVPRFX Z31, Z29	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FRINTM Z31.D, P7/M, Z29.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	3	1
FCMGT P0.D, P6/Z, Z29.D, Z30.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
EOR P1.B, P7/Z, P0.B, P7.B	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	1	1
MOVPRFX Z31.D, P1/Z, Z31.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FSUBR Z31.D, P1/M, Z31.D, Z29.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ST1D {Z31.D}, P4, [X14, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
B.EQ 453d40 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEERNS6_INS2_10TinyVectorIdLj3EEESaISB_EEES9_+0x120>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LD1D {Z6.D}, P5/Z, [X14, #1, MUL VL]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADDVL X9, X14, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
FCMLT P6.D, P7/Z, Z6.D, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
MOVPRFX Z4, Z6	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FRINTM Z4.D, P7/M, Z6.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	3	1
FCMGT P15.D, P6/Z, Z6.D, Z30.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
EOR P2.B, P7/Z, P15.B, P7.B	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	1	1
MOVPRFX Z4.D, P2/Z, Z4.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FSUBR Z4.D, P2/M, Z4.D, Z6.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ST1D {Z4.D}, P5, [X9, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X10, SP, #512	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X15, [X14, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X11, SP, #512	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X12, X13, [X10, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
STR X15, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X12, X13, [X11, #952]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR D30, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D28, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D27, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR W13, [X19, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR D30, [SP, #352]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D28, [SP, #360]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D27, [SP, #368]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
CMP W13, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 4545c4 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEERNS6_INS2_10TinyVectorIdLj3EEESaISB_EEES9_+0x9a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ORR X16, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X17, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVK X16, #16325	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X17, #16357	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVZ X26, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X18, [X19, #784]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FMOV D1, X16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR X4, [X19, #760]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X27, X4, W13,UXTW #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
STP X27, X23, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X18, X17, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X18, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X22, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X20, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W20, [X19, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X19, #808]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X19, [X19, #832]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SBFM X21, X20, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W20, [SP, #348]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
UBFM X22, X21, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X2, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X23, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X21, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X19, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50

Source file and lines	einspline_spo_ref.hpp:203-230
Module	exec

The function is defined in:

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h:168-174
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:53-66
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:187-192,199-215,226-262,269-286
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp:203-211,219-230
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h:150-152
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp:68-79
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:143
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:231,265,271
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h:238,951-952
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:145
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h:1131,1263
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/Tensor.h:213

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

43% of VPU instructions are used in vector version (process two or more data elements in vector registers):

58% of VPU loads are used in vector version.
50% of VPU stores are used in vector version.
66% of VPU addition or subtraction instructions are used in vector version.
32% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 17.00 to 0.50 cycles (34.00x speedup).

FMA

Detected 6 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Matching between your function (in the source code) and the binary function

The binary function is composed of 23 FP arithmetical operations:

14: addition or subtraction (6 inside FMA instructions)
9: multiply (6 inside FMA instructions)

The binary function is loading 268 bytes. The binary function is storing 388 bytes.

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	115
loop length	460
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

14.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	2.00	2.00	9.75	9.75	9.75	9.75	11.00	11.00	6.00	6.00	17.00	17.00	17.00	8.00	8.00
cycles	2.00	2.00	9.75	9.75	9.75	9.75	11.00	11.00	6.00	6.00	17.00	17.00	17.00	8.00	8.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	14.38
Overall L1	17.00

Vectorization ratios

INT

all	34%
load	58%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	16%

all	100%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	43%
load	58%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	66%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	32%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 17.00 cycles. At this rate:

16% of peak load performance is reached (15.76 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
47% of peak store performance is reached (22.82 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 453c20

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #656	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X20, XZR, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X21, XZR, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X22, XZR, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR W24, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X25, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X23, [X0, #856]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 4c43c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W0, [X25, #292]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X4, X25, #296	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W24, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 453c80 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEERNS6_INS2_10TinyVectorIdLj3EEESaISB_EEES9_+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X2, [X25, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MOVZ W1, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SMADDL X4, W24, W1, X2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X5, X19, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP D28, D27, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MOVZ W6, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X14, SP, #624	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
WHILELO P4.D, WZR, W6	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
LDP D6, D4, [X5, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
MOVZ X3, #48304	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z30.D, X3	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
CNTD X7, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
WHILELO P5.D, W7, W6	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2
LDP D2, D23, [X5, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D19, [X19, #216]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D3, D26, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D0, D27, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D1, D27, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D5, D27, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
LDR D24, [X4, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D25, D22, [X5, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D20, D28, D19, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D7, D28, D3, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D16, D28, D26, D5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D21, D24, D23, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D17, D24, D25, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FMADD D18, D24, D22, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D21, [SP, #624]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D17, [SP, #632]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D18, [SP, #640]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LD1D {Z29.D}, P4/Z, [X14, MUL VL]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
FCMLT P6.D, P7/Z, Z29.D, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
MOVPRFX Z31, Z29	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FRINTM Z31.D, P7/M, Z29.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	3	1
FCMGT P0.D, P6/Z, Z29.D, Z30.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
EOR P1.B, P7/Z, P0.B, P7.B	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	1	1
MOVPRFX Z31.D, P1/Z, Z31.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FSUBR Z31.D, P1/M, Z31.D, Z29.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ST1D {Z31.D}, P4, [X14, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
B.EQ 453d40 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEERNS6_INS2_10TinyVectorIdLj3EEESaISB_EEES9_+0x120>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LD1D {Z6.D}, P5/Z, [X14, #1, MUL VL]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
ADDVL X9, X14, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
FCMLT P6.D, P7/Z, Z6.D, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
MOVPRFX Z4, Z6	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FRINTM Z4.D, P7/M, Z6.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	3	1
FCMGT P15.D, P6/Z, Z6.D, Z30.D	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
EOR P2.B, P7/Z, P15.B, P7.B	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	1	1
MOVPRFX Z4.D, P2/Z, Z4.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
FSUBR Z4.D, P2/M, Z4.D, Z6.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ST1D {Z4.D}, P5, [X9, MUL VL]	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	2	0.50
ADD X10, SP, #512	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X15, [X14, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X11, SP, #512	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X12, X13, [X10, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
STR X15, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X12, X13, [X11, #952]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR D30, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D28, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D27, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR W13, [X19, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR D30, [SP, #352]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D28, [SP, #360]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STR D27, [SP, #368]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
CMP W13, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 4545c4 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEERNS6_INS2_10TinyVectorIdLj3EEESaISB_EEES9_+0x9a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ORR X16, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X17, XZR, #3840	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVK X16, #16325	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVK X17, #16357	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
MOVZ X26, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X18, [X19, #784]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FMOV D1, X16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR X4, [X19, #760]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X27, X4, W13,UXTW #3	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50
STP X27, X23, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X18, X17, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X18, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X22, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X20, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W20, [X19, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X19, #808]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X19, [X19, #832]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SBFM X21, X20, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W20, [SP, #348]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
UBFM X22, X21, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X2, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X23, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X21, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X19, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50

Name	Coverage (%)	Time (s)
▼miniqmcreference::einspline_spo_ref::evaluate(qmcplusplus::ParticleSet const&, int, qmcplusplus::Vector >&, qmcplusplus::Vector, std::allocator >...–	12.55	20.74
▼Loop 1182 - einspline_spo_ref.hpp:206-230 - exec–	0	0.01
▼Loop 1186 - einspline_spo_ref.hpp:219-227 - exec–	0.01	0.01
○Loop 1187 - einspline_spo_ref.hpp:223-227 - exec	0.14	0.2
▼Loop 1180 - MultiBsplineData.hpp:68-79 - exec–	0	0
▼Loop 1181 - einspline_spo_ref.hpp:206-207 - exec–	0.01	0.01
○Loop 1179 - MultiBsplineRef.hpp:276-286 - exec	0.49	0.69
▼Loop 1185 - MultiBsplineRef.hpp:226-262 - exec–	0.01	0.01
▼Loop 1184 - MultiBsplineRef.hpp:227-262 - exec–	0.01	0.01
○Loop 1183 - MultiBsplineRef.hpp:242-262 - exec	11.87	16.61

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Cycles and memory resources usage

ASM code