OV - exec - Function miniqmcreference::OneBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateLog(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib<qmcplusplus::TinyVector<double, 3u>, std::allocator<qmcplusplus::TinyVector<double, 3u> > >&, qmcplusplus::ParticleAttrib<double, std::allocator<double> >&)

	Function: miniqmcreference::OneBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateLog(qmc ...	Module: exec	Source: OneBodyJastrowRef.h:106-237 [...]	Coverage: 0.01%

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h: 106 - 237

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106:   void recompute(ParticleSet& P)

107:   {

108:     const auto& d_ie = P.getDistTableAB(myTableID);

109:     for (int iat = 0; iat < Nelec; ++iat)

110:     {

111:       computeU3(P, iat, d_ie.getDistRow(iat).data());

112:       Vat[iat] = std::accumulate(U.begin(), U.begin() + Nions, valT());

113:       Lap[iat] = accumulateGL(dU.data(), d2U.data(), d_ie.getDisplRow(iat), Grad[iat]);

114:     }

115:   }

116:

117:   RealType evaluateLog(ParticleSet& P,

118:                        ParticleSet::ParticleGradient& G,

119:                        ParticleSet::ParticleLaplacian& L)

120:   {

121:     evaluateGL(P, G, L, true);

122:     return LogValue;

123:   }

[...]

169:     for (size_t iat = 0; iat < Nelec; ++iat)

170:       G[iat] += Grad[iat];

171:     for (size_t iat = 0; iat < Nelec; ++iat)

172:       L[iat] -= Lap[iat];

173:     LogValue = -std::accumulate(Vat.begin(), Vat.begin() + Nelec, valT());

174:   }

[...]

184:     valT lap(0);

185:     constexpr valT lapfac = OHMMS_DIM - RealType(1);

186:     for (int jat = 0; jat < Nions; ++jat)

187:       lap += d2u[jat] + lapfac * du[jat];

188:     for (int idim = 0; idim < OHMMS_DIM; ++idim)

189:     {

190:       const valT* restrict dX = displ.data(idim);

191:       valT s                  = valT();

192:       for (int jat = 0; jat < Nions; ++jat)

193:         s += du[jat] * dX[jat];

194:       grad[idim] = s;

[...]

207:     if (NumGroups > 0)

[...]

214:       for (int jg = 0; jg < NumGroups; ++jg)

215:       {

216:         if (F[jg] == nullptr)

[...]

231:       for (int c = 0; c < Nions; ++c)

232:       {

233:         int gid = Ions.GroupID[c];

234:         if (F[gid] != nullptr)

235:         {

236:           U[c] = F[gid]->evaluate(dist[c], dU[c], d2U[c]);

237:           dU[c] /= dist[c];

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 188 - 336

--------------------------------------------------------------------------------

188:     if (r >= cutoff_radius)

189:     {

190:       dudr = d2udr2 = 0.0;

191:       return 0.0;

[...]

276:   real_type dSquareDeltaRinv = DeltaRInv * DeltaRInv;

277:   constexpr real_type cOne(1);

278:

279:   //    START_MARK_FIRST();

280:

281:   ASSUME_ALIGNED(distIndices);

282:   ASSUME_ALIGNED(distArrayCompressed);

283:   int iCount                 = 0;

284:   int iLimit                 = iEnd - iStart;

[...]

291:   for (int jat = 0; jat < iLimit; jat++)

292:   {

293:     real_type r = distArray[jat];

294:     if (r < cutoff_radius && iStart + jat != iat)

295:     {

296:       distIndices[iCount]         = jat;

297:       distArrayCompressed[iCount] = r;

298:       iCount++;

[...]

305:     real_type r    = distArrayCompressed[j];

306:     int iScatter   = distIndices[j];

307:     real_type rinv = cOne / r;

308:     r *= DeltaRInv;

309:     int iGather   = (int)r;

310:     real_type t   = r - real_type(iGather);

311:     real_type tp0 = t * t * t;

312:     real_type tp1 = t * t;

313:     real_type tp2 = t;

314:

315:     real_type sCoef0 = SplineCoefs[iGather + 0];

316:     real_type sCoef1 = SplineCoefs[iGather + 1];

317:     real_type sCoef2 = SplineCoefs[iGather + 2];

318:     real_type sCoef3 = SplineCoefs[iGather + 3];

319:

320:     // clang-format off

321:     laplArray[iScatter] = dSquareDeltaRinv *

322:       (sCoef0*( d2A[ 2]*tp2 + d2A[ 3])+

323:        sCoef1*( d2A[ 6]*tp2 + d2A[ 7])+

324:        sCoef2*( d2A[10]*tp2 + d2A[11])+

325:        sCoef3*( d2A[14]*tp2 + d2A[15]));

326:

327:     gradArray[iScatter] = DeltaRInv * rinv *

328:       (sCoef0*( dA[ 1]*tp1 + dA[ 2]*tp2 + dA[ 3])+

329:        sCoef1*( dA[ 5]*tp1 + dA[ 6]*tp2 + dA[ 7])+

330:        sCoef2*( dA[ 9]*tp1 + dA[10]*tp2 + dA[11])+

331:        sCoef3*( dA[13]*tp1 + dA[14]*tp2 + dA[15]));

332:

333:     valArray[iScatter] = (sCoef0*(A[ 0]*tp0 + A[ 1]*tp1 + A[ 2]*tp2 + A[ 3])+

334:         sCoef1*(A[ 4]*tp0 + A[ 5]*tp1 + A[ 6]*tp2 + A[ 7])+

335:         sCoef2*(A[ 8]*tp0 + A[ 9]*tp1 + A[10]*tp2 + A[11])+

336:         sCoef3*(A[12]*tp0 + A[13]*tp1 + A[14]*tp2 + A[15]));

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_numeric.h: 140 - 141

--------------------------------------------------------------------------------

140:       for (; __first != __last; ++__first)

141: 	__init = _GLIBCXX_MOVE_IF_20(__init) + *__first;

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 313 - 316

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313:   inline int first(int igroup) const { return (*group_offsets_)[igroup]; }

314:

315:   ///return the last index of a group i

316:   inline int last(int igroup) const { return (*group_offsets_)[igroup + 1]; }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 221 - 249

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221:   inline Type_t& operator[](size_t i)

222:   {

223:     return X[i];

[...]

229:     return X[i];

[...]

242:   inline iterator begin() { return X; }

[...]

249:   inline const_pointer data() const { return X; }

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 94 - 94

--------------------------------------------------------------------------------

94:     (const_cast<T1&>(a) += b);

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h: 952 - 1151

--------------------------------------------------------------------------------

952: 	*__first = __tmp;

[...]

1146:       if (__n <= 0)

1147: 	return __first;

1148:

1149:       __glibcxx_requires_can_increment(__first, __n);

1150:

1151:       std::__fill_a(__first, __first + __n, __value);

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h: 1131 - 1263

--------------------------------------------------------------------------------

1131: 	return *(this->_M_impl._M_start + __n);

[...]

1147:       operator[](size_type __n) const _GLIBCXX_NOEXCEPT

1148:       {

1149: 	__glibcxx_requires_subscript(__n);

1150: 	return *(this->_M_impl._M_start + __n);

[...]

1263:       { return _M_data_ptr(this->_M_impl._M_start); }

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/shared_ptr_base.h: 1667 - 1667

--------------------------------------------------------------------------------

1667:       { return _M_ptr; }

/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_iterator.h: 1068 - 1139

--------------------------------------------------------------------------------

1068:       : _M_current(__i) { }

[...]

1139:       { return __normal_iterator(_M_current + __n); }

0x41e0a0 ADDVL	SP, SP, #38

0x41e0a4 ADRP	X4,

0x41e0a8 SUB	SP, SP, #256

0x41e0ac ADD	X5, X4, #2816

0x41e0b0 STP	X29, X30, [SP]

0x41e0b4 ADD	X29, SP, #0

0x41e0b8 STP	X19, X20, [SP, #16]

0x41e0bc ORR	X19, XZR, X0

0x41e0c0 LDR	X6, [X0]

0x41e0c4 LDR	X7, [X6, #56]

0x41e0c8 STP	X2, X3, [SP, #232]

0x41e0cc CMP	X7, X5

0x41e0d0 B.NE	41f628

0x41e0d4 ORR	X0, XZR, X1

0x41e0d8 STP	X27, X28, [SP, #80]

0x41e0dc LDR	W1, [X19, #168]

0x41e0e0 BL	484780

0x41e0e4 LDR	W13, [X19, #148]

0x41e0e8 CMP	W13, #0

0x41e0ec B.LE	41f9b4

0x41e0f0 STP	X21, X22, [SP, #32]

0x41e0f4 ADD	X22, X19, #376

0x41e0f8 ADD	X27, X0, #96

0x41e0fc ADD	X28, X19, #416

0x41e100 STP	X23, X24, [SP, #48]

0x41e104 MOVZ	X24, #0

0x41e108 STP	X25, X26, [SP, #64]

0x41e10c ADD	X26, X19, #216

0x41e110 STP	D8, D9, [SP, #96]

0x41e114 STP	D10, D11, [SP, #112]

0x41e118 STP	D12, D13, [SP, #128]

0x41e11c STP	D14, D15, [SP, #144]

0x41e120 LDR	X25, [X0, #72]

0x41e124 STR	X26, [SP, #248]

0x41e128 LDR	X20, [X19, #280]

0x41e12c LDR	X23, [X19, #304]

0x41e130 ADD	X2, X25, #24

0x41e134 ORR	X25, XZR, X22

0x41e138 LDR	W21, [X19, #144]

0x41e13c STR	X2, [SP, #168]

          (373) 0x41e140 LDR	X9, [SP, #168]

          (373) 0x41e144 MOVZ	W8, #40

          (373) 0x41e148 LDR	W11, [X19, #152]

          (373) 0x41e14c UMADDL	X3, W24, W8, XZR

          (373) 0x41e150 LDR	X22, [X9]

          (373) 0x41e154 CMP	W11, #0

          (373) 0x41e158 B.LE	41f23c

          (373) 0x41e15c LDR	X9, [X19, #256]

          (373) 0x41e160 CMP	W21, #0

          (373) 0x41e164 B.LE	41e1ac

          (373) 0x41e168 UBFM	X21, X21, #61, #31

          (373) 0x41e16c ORR	X0, XZR, X9

          (373) 0x41e170 STP	X9, X3, [SP, #176]

          (373) 0x41e174 MOVZ	W1, #0

          (373) 0x41e178 ORR	X2, XZR, X21

          (373) 0x41e17c STR	W11, [SP, #192]

          (373) 0x41e180 BL	403bd0

          (373) 0x41e184 ORR	X2, XZR, X21

          (373) 0x41e188 MOVZ	W1, #0

          (373) 0x41e18c ORR	X0, XZR, X20

          (373) 0x41e190 BL	403bd0

          (373) 0x41e194 ORR	X2, XZR, X21

          (373) 0x41e198 ORR	X0, XZR, X23

          (373) 0x41e19c MOVZ	W1, #0

          (373) 0x41e1a0 BL	403bd0

          (373) 0x41e1a4 LDR	W11, [SP, #192]

          (373) 0x41e1a8 LDP	X9, X3, [SP, #176]

          (373) 0x41e1ac MOVZ	X6, #0

          (373) 0x41e1b0 MOVZ	X5, #0

          (373) 0x41e1b4 CNTW	X14, ALL

          (373) 0x41e1b8 LDR	X13, [X19, #456]

          (373) 0x41e1bc HINT	#0

            (372) 0x41e1c0 LDR	X17, [X13, X5,LSL #3]

            (372) 0x41e1c4 CBZ	X17, 41eaf0

            (372) 0x41e1c8 LDR	X12, [X19, #160]

            (372) 0x41e1cc LDR	D27, [X17, #568]

            (372) 0x41e1d0 LDR	X18, [X19, #328]

            (372) 0x41e1d4 LDR	X15, [X12, #616]

            (372) 0x41e1d8 LDR	X30, [X19, #352]

            (372) 0x41e1dc FMUL	D28, D27, D27

            (372) 0x41e1e0 LDR	X16, [X15, #24]

            (372) 0x41e1e4 ADD	X0, X16, X6

            (372) 0x41e1e8 LDR	W10, [X16, X6]

            (372) 0x41e1ec LDR	W7, [X0, #4]

            (372) 0x41e1f0 SUB	W1, W7, W10

            (372) 0x41e1f4 CMP	W1, #0

            (372) 0x41e1f8 B.LE	41eaf0

            (372) 0x41e1fc SBFM	X11, X1, #0, #31

            (372) 0x41e200 SBFM	X4, X10, #61, #31

            (372) 0x41e204 LDR	D29, [X17, #8]

            (372) 0x41e208 ANDS	X2, X11, #4224

            (372) 0x41e20c ADD	X8, X22, X4

            (372) 0x41e210 MOVZ	X1, #0

            (372) 0x41e214 MOVZ	W12, #0

            (372) 0x41e218 B.EQ	41e384

            (372) 0x41e21c CMP	X2, #1

            (372) 0x41e220 B.EQ	41e350

            (372) 0x41e224 CMP	X2, #2

            (372) 0x41e228 B.EQ	41e324

            (372) 0x41e22c CMP	X2, #3

            (372) 0x41e230 B.EQ	41e2f8

            (372) 0x41e234 CMP	X2, #4

            (372) 0x41e238 B.EQ	41e2cc

            (372) 0x41e23c CMP	X2, #5

            (372) 0x41e240 B.EQ	41e2a0

            (372) 0x41e244 CMP	X2, #6

            (372) 0x41e248 B.EQ	41e274

            (372) 0x41e24c LDR	D31, [X22, X4]

            (372) 0x41e250 FCMPE	D29, D31

            (372) 0x41e254 B.LS	41e270

            (372) 0x41e258 CMN	W10, #1

            (372) 0x41e25c B.EQ	41e270

            (372) 0x41e260 MOVZ	X21, #0

            (372) 0x41e264 MOVZ	W12, #1

            (372) 0x41e268 STR	WZR, [X30, X21]

            (372) 0x41e26c STR	D31, [X18, X21]

            (372) 0x41e270 MOVZ	X1, #1

            (372) 0x41e274 LDR	D0, [X8, X1,LSL #3]

            (372) 0x41e278 FCMPE	D29, D0

            (372) 0x41e27c B.LS	41e29c

            (372) 0x41e280 ADD	W15, W10, W1

            (372) 0x41e284 CMN	W15, #1

            (372) 0x41e288 B.EQ	41e29c

            (372) 0x41e28c ORR	W16, WZR, W12

            (372) 0x41e290 ADD	W12, W12, #1

            (372) 0x41e294 STR	W1, [X30, X16,LSL #2]

            (372) 0x41e298 STR	D0, [X18, X16,LSL #3]

            (372) 0x41e29c ADD	X1, X1, #1

            (372) 0x41e2a0 LDR	D1, [X8, X1,LSL #3]

            (372) 0x41e2a4 FCMPE	D29, D1

            (372) 0x41e2a8 B.LS	41e2c8

            (372) 0x41e2ac ADD	W0, W10, W1

            (372) 0x41e2b0 CMN	W0, #1

            (372) 0x41e2b4 B.EQ	41e2c8

            (372) 0x41e2b8 ORR	W7, WZR, W12

            (372) 0x41e2bc ADD	W12, W12, #1

            (372) 0x41e2c0 STR	W1, [X30, X7,LSL #2]

            (372) 0x41e2c4 STR	D1, [X18, X7,LSL #3]

            (372) 0x41e2c8 ADD	X1, X1, #1

            (372) 0x41e2cc LDR	D30, [X8, X1,LSL #3]

            (372) 0x41e2d0 FCMPE	D29, D30

            (372) 0x41e2d4 B.LS	41e2f4

            (372) 0x41e2d8 ADD	W2, W10, W1

            (372) 0x41e2dc CMN	W2, #1

            (372) 0x41e2e0 B.EQ	41e2f4

            (372) 0x41e2e4 ORR	W21, WZR, W12

            (372) 0x41e2e8 ADD	W12, W12, #1

            (372) 0x41e2ec STR	W1, [X30, X21,LSL #2]

            (372) 0x41e2f0 STR	D30, [X18, X21,LSL #3]

            (372) 0x41e2f4 ADD	X1, X1, #1

            (372) 0x41e2f8 LDR	D2, [X8, X1,LSL #3]

            (372) 0x41e2fc FCMPE	D29, D2

            (372) 0x41e300 B.LS	41e320

            (372) 0x41e304 ADD	W15, W10, W1

            (372) 0x41e308 CMN	W15, #1

            (372) 0x41e30c B.EQ	41e320

            (372) 0x41e310 ORR	W16, WZR, W12

            (372) 0x41e314 ADD	W12, W12, #1

            (372) 0x41e318 STR	W1, [X30, X16,LSL #2]

            (372) 0x41e31c STR	D2, [X18, X16,LSL #3]

            (372) 0x41e320 ADD	X1, X1, #1

            (372) 0x41e324 LDR	D3, [X8, X1,LSL #3]

            (372) 0x41e328 FCMPE	D29, D3

            (372) 0x41e32c B.LS	41e34c

            (372) 0x41e330 ADD	W0, W10, W1

            (372) 0x41e334 CMN	W0, #1

            (372) 0x41e338 B.EQ	41e34c

            (372) 0x41e33c ORR	W7, WZR, W12

            (372) 0x41e340 ADD	W12, W12, #1

            (372) 0x41e344 STR	W1, [X30, X7,LSL #2]

            (372) 0x41e348 STR	D3, [X18, X7,LSL #3]

            (372) 0x41e34c ADD	X1, X1, #1

            (372) 0x41e350 LDR	D4, [X8, X1,LSL #3]

            (372) 0x41e354 FCMPE	D29, D4

            (372) 0x41e358 B.LS	41e378

            (372) 0x41e35c ADD	W2, W10, W1

            (372) 0x41e360 CMN	W2, #1

            (372) 0x41e364 B.EQ	41e378

            (372) 0x41e368 ORR	W21, WZR, W12

            (372) 0x41e36c ADD	W12, W12, #1

            (372) 0x41e370 STR	W1, [X30, X21,LSL #2]

            (372) 0x41e374 STR	D4, [X18, X21,LSL #3]

            (372) 0x41e378 ADD	X1, X1, #1

            (372) 0x41e37c CMP	X1, X11

            (372) 0x41e380 B.EQ	41e4ec

              (375) 0x41e384 LDR	D5, [X8, X1,LSL #3]

              (375) 0x41e388 FCMPE	D29, D5

              (375) 0x41e38c B.LS	41e3ac

              (375) 0x41e390 ADD	W15, W10, W1

              (375) 0x41e394 CMN	W15, #1

              (375) 0x41e398 B.EQ	41e3ac

              (375) 0x41e39c ORR	W16, WZR, W12

              (375) 0x41e3a0 ADD	W12, W12, #1

              (375) 0x41e3a4 STR	W1, [X30, X16,LSL #2]

              (375) 0x41e3a8 STR	D5, [X18, X16,LSL #3]

              (375) 0x41e3ac ADD	X0, X1, #1

              (375) 0x41e3b0 LDR	D6, [X8, X0,LSL #3]

              (375) 0x41e3b4 FCMPE	D29, D6

              (375) 0x41e3b8 B.LS	41e3d8

              (375) 0x41e3bc ADD	W1, W10, W0

              (375) 0x41e3c0 CMN	W1, #1

              (375) 0x41e3c4 B.EQ	41e3d8

              (375) 0x41e3c8 ORR	W7, WZR, W12

              (375) 0x41e3cc ADD	W12, W12, #1

              (375) 0x41e3d0 STR	W0, [X30, X7,LSL #2]

              (375) 0x41e3d4 STR	D6, [X18, X7,LSL #3]

              (375) 0x41e3d8 ADD	X2, X0, #1

              (375) 0x41e3dc LDR	D7, [X8, X2,LSL #3]

              (375) 0x41e3e0 FCMPE	D29, D7

              (375) 0x41e3e4 B.LS	41e404

              (375) 0x41e3e8 ADD	W21, W10, W2

              (375) 0x41e3ec CMN	W21, #1

              (375) 0x41e3f0 B.EQ	41e404

              (375) 0x41e3f4 ORR	W15, WZR, W12

              (375) 0x41e3f8 ADD	W12, W12, #1

              (375) 0x41e3fc STR	W2, [X30, X15,LSL #2]

              (375) 0x41e400 STR	D7, [X18, X15,LSL #3]

              (375) 0x41e404 ADD	X1, X0, #2

              (375) 0x41e408 LDR	D8, [X8, X1,LSL #3]

              (375) 0x41e40c FCMPE	D29, D8

              (375) 0x41e410 B.LS	41e430

              (375) 0x41e414 ADD	W16, W10, W1

              (375) 0x41e418 CMN	W16, #1

              (375) 0x41e41c B.EQ	41e430

              (375) 0x41e420 ORR	W7, WZR, W12

              (375) 0x41e424 ADD	W12, W12, #1

              (375) 0x41e428 STR	W1, [X30, X7,LSL #2]

              (375) 0x41e42c STR	D8, [X18, X7,LSL #3]

              (375) 0x41e430 ADD	X2, X0, #3

              (375) 0x41e434 LDR	D9, [X8, X2,LSL #3]

              (375) 0x41e438 FCMPE	D29, D9

              (375) 0x41e43c B.LS	41e45c

              (375) 0x41e440 ADD	W21, W10, W2

              (375) 0x41e444 CMN	W21, #1

              (375) 0x41e448 B.EQ	41e45c

              (375) 0x41e44c ORR	W15, WZR, W12

              (375) 0x41e450 ADD	W12, W12, #1

              (375) 0x41e454 STR	W2, [X30, X15,LSL #2]

              (375) 0x41e458 STR	D9, [X18, X15,LSL #3]

              (375) 0x41e45c ADD	X1, X0, #4

              (375) 0x41e460 LDR	D10, [X8, X1,LSL #3]

              (375) 0x41e464 FCMPE	D29, D10

              (375) 0x41e468 B.LS	41e488

              (375) 0x41e46c ADD	W16, W10, W1

              (375) 0x41e470 CMN	W16, #1

              (375) 0x41e474 B.EQ	41e488

              (375) 0x41e478 ORR	W7, WZR, W12

              (375) 0x41e47c ADD	W12, W12, #1

              (375) 0x41e480 STR	W1, [X30, X7,LSL #2]

              (375) 0x41e484 STR	D10, [X18, X7,LSL #3]

              (375) 0x41e488 ADD	X2, X0, #5

              (375) 0x41e48c LDR	D11, [X8, X2,LSL #3]

              (375) 0x41e490 FCMPE	D29, D11

              (375) 0x41e494 B.LS	41e4b4

              (375) 0x41e498 ADD	W21, W10, W2

              (375) 0x41e49c CMN	W21, #1

              (375) 0x41e4a0 B.EQ	41e4b4

              (375) 0x41e4a4 ORR	W15, WZR, W12

              (375) 0x41e4a8 ADD	W12, W12, #1

              (375) 0x41e4ac STR	W2, [X30, X15,LSL #2]

              (375) 0x41e4b0 STR	D11, [X18, X15,LSL #3]

              (375) 0x41e4b4 ADD	X1, X0, #6

              (375) 0x41e4b8 LDR	D12, [X8, X1,LSL #3]

              (375) 0x41e4bc FCMPE	D29, D12

              (375) 0x41e4c0 B.LS	41e4e0

              (375) 0x41e4c4 ADD	W16, W10, W1

              (375) 0x41e4c8 CMN	W16, #1

              (375) 0x41e4cc B.EQ	41e4e0

              (375) 0x41e4d0 ORR	W7, WZR, W12

              (375) 0x41e4d4 ADD	W12, W12, #1

              (375) 0x41e4d8 STR	W1, [X30, X7,LSL #2]

              (375) 0x41e4dc STR	D12, [X18, X7,LSL #3]

              (375) 0x41e4e0 ADD	X1, X0, #7

              (375) 0x41e4e4 CMP	X1, X11

              (375) 0x41e4e8 B.NE	41e384

            (372) 0x41e4ec ADDVL	X10, SP, #22

            (372) 0x41e4f0 FDUP	Z13.D, #112

            (372) 0x41e4f4 PTRUE	P0.B, ALL

            (372) 0x41e4f8 ADD	X10, X10, #256

            (372) 0x41e4fc STR	Z13, [X10, MUL VL]

            (372) 0x41e500 CBZ	W12, 41eaec

            (372) 0x41e504 ADD	X0, SP, #256

            (372) 0x41e508 LD1RD	{Z15.D}, P0/Z, [X17, #20]

            (372) 0x41e50c LD1RD	{Z16.D}, P0/Z, [X17, #21]

            (372) 0x41e510 LD1RD	{Z17.D}, P0/Z, [X17, #22]

            (372) 0x41e514 STR	Z16, [X0, #1, MUL VL]

            (372) 0x41e518 LD1RD	{Z18.D}, P0/Z, [X17, #24]

            (372) 0x41e51c LD1RD	{Z19.D}, P0/Z, [X17, #25]

            (372) 0x41e520 LD1RD	{Z20.D}, P0/Z, [X17, #26]

            (372) 0x41e524 LD1RD	{Z21.D}, P0/Z, [X17, #28]

            (372) 0x41e528 LD1RD	{Z22.D}, P0/Z, [X17, #29]

            (372) 0x41e52c STR	Z17, [X0, #2, MUL VL]

            (372) 0x41e530 STR	Z18, [X0, #3, MUL VL]

            (372) 0x41e534 STR	Z19, [X0, #4, MUL VL]

            (372) 0x41e538 STR	Z20, [X0, #5, MUL VL]

            (372) 0x41e53c STR	Z21, [X0, #6, MUL VL]

            (372) 0x41e540 STR	Z22, [X0, #7, MUL VL]

            (372) 0x41e544 ADDVL	X15, SP, #9

            (372) 0x41e548 ADDVL	X16, SP, #10

            (372) 0x41e54c ADDVL	X7, SP, #11

            (372) 0x41e550 STR	Z15, [X0, MUL VL]

            (372) 0x41e554 INCB	X0, ALL, MUL #8

            (372) 0x41e558 LD1RD	{Z23.D}, P0/Z, [X17, #30]

            (372) 0x41e55c LD1RD	{Z24.D}, P0/Z, [X17, #32]

            (372) 0x41e560 LD1RD	{Z25.D}, P0/Z, [X17, #33]

            (372) 0x41e564 ADD	X15, X15, #256

            (372) 0x41e568 ADD	X16, X16, #256

            (372) 0x41e56c STR	Z23, [X0, MUL VL]

            (372) 0x41e570 ADD	X7, X7, #256

            (372) 0x41e574 ADDVL	X10, SP, #12

            (372) 0x41e578 STR	Z24, [X15, MUL VL]

            (372) 0x41e57c ADDVL	X0, SP, #13

            (372) 0x41e580 STR	Z25, [X16, MUL VL]

            (372) 0x41e584 LDR	X1, [X17, #536]

            (372) 0x41e588 ADD	X10, X10, #256

            (372) 0x41e58c ADD	X0, X0, #256

            (372) 0x41e590 LD1RD	{Z2.D}, P0/Z, [X17, #37]

            (372) 0x41e594 LD1RD	{Z3.D}, P0/Z, [X17, #38]

            (372) 0x41e598 LD1RD	{Z4.D}, P0/Z, [X17, #41]

            (372) 0x41e59c LD1RD	{Z5.D}, P0/Z, [X17, #42]

            (372) 0x41e5a0 LD1RD	{Z6.D}, P0/Z, [X17, #45]

            (372) 0x41e5a4 LD1RD	{Z7.D}, P0/Z, [X17, #46]

            (372) 0x41e5a8 LD1RD	{Z8.D}, P0/Z, [X17, #49]

            (372) 0x41e5ac LD1RD	{Z9.D}, P0/Z, [X17, #50]

            (372) 0x41e5b0 ADDVL	X15, SP, #14

            (372) 0x41e5b4 ADDVL	X16, SP, #15

            (372) 0x41e5b8 DUP	Z26.D, Z27.D[0]

            (372) 0x41e5bc LD1RD	{Z27.D}, P0/Z, [X17, #34]

            (372) 0x41e5c0 STR	Z27, [X7, MUL VL]

            (372) 0x41e5c4 ADDVL	X7, SP, #16

            (372) 0x41e5c8 LD1RD	{Z29.D}, P0/Z, [X17, #4]

            (372) 0x41e5cc ADD	X15, X15, #256

            (372) 0x41e5d0 ADD	X16, X16, #256

            (372) 0x41e5d4 ADD	X7, X7, #256

            (372) 0x41e5d8 DUP	Z14.D, Z28.D[0]

            (372) 0x41e5dc LD1RD	{Z28.D}, P0/Z, [X17, #3]

            (372) 0x41e5e0 STR	Z29, [X0, MUL VL]

            (372) 0x41e5e4 ADDVL	X0, SP, #17

            (372) 0x41e5e8 STR	Z28, [X10, MUL VL]

            (372) 0x41e5ec ADDVL	X10, SP, #23

            (372) 0x41e5f0 LD1RD	{Z10.D}, P0/Z, [X17, #9]

            (372) 0x41e5f4 LD1RD	{Z11.D}, P0/Z, [X17, #10]

            (372) 0x41e5f8 LD1RD	{Z12.D}, P0/Z, [X17, #11]

            (372) 0x41e5fc LD1RD	{Z13.D}, P0/Z, [X17, #12]

            (372) 0x41e600 LD1RD	{Z31.D}, P0/Z, [X17, #5]

            (372) 0x41e604 LD1RD	{Z0.D}, P0/Z, [X17, #6]

            (372) 0x41e608 LD1RD	{Z1.D}, P0/Z, [X17, #7]

            (372) 0x41e60c ADD	X10, X10, #256

            (372) 0x41e610 ADD	X0, X0, #256

            (372) 0x41e614 STR	Z31, [X15, MUL VL]

            (372) 0x41e618 ADD	X11, X23, X4

            (372) 0x41e61c ADD	X8, X20, X4

            (372) 0x41e620 STR	Z0, [X16, MUL VL]

            (372) 0x41e624 ADDVL	X15, SP, #18

            (372) 0x41e628 ADDVL	X16, SP, #19

            (372) 0x41e62c STR	Z1, [X7, MUL VL]

            (372) 0x41e630 MOVZ	X2, #0

            (372) 0x41e634 ADDVL	X7, SP, #24

            (372) 0x41e638 LD1RD	{Z30.D}, P0/Z, [X17, #8]

            (372) 0x41e63c ADD	X4, X9, X4

            (372) 0x41e640 ADDVL	X21, X18, #1

            (372) 0x41e644 LD1RD	{Z15.D}, P0/Z, [X17, #13]

            (372) 0x41e648 LD1RD	{Z16.D}, P0/Z, [X17, #14]

            (372) 0x41e64c ADD	X15, X15, #256

            (372) 0x41e650 ADD	X16, X16, #256

            (372) 0x41e654 ADD	X7, X7, #256

            (372) 0x41e658 STR	Z10, [X0, MUL VL]

            (372) 0x41e65c LD1RD	{Z10.D}, P0/Z, [X17, #15]

            (372) 0x41e660 ADDVL	X0, SP, #21

            (372) 0x41e664 STR	Z30, [X10, MUL VL]

            (372) 0x41e668 ADDVL	X10, SP, #20

            (372) 0x41e66c STR	Z11, [X15, MUL VL]

            (372) 0x41e670 LD1RD	{Z11.D}, P0/Z, [X17, #16]

            (372) 0x41e674 STR	Z12, [X16, MUL VL]

            (372) 0x41e678 LD1RD	{Z12.D}, P0/Z, [X17, #17]

            (372) 0x41e67c STR	Z13, [X7, MUL VL]

            (372) 0x41e680 LD1RD	{Z13.D}, P0/Z, [X17, #18]

            (372) 0x41e684 ADDVL	X17, SP, #25

            (372) 0x41e688 ADD	X10, X10, #256

            (372) 0x41e68c WHILELO	P4.S, WZR, W12

            (372) 0x41e690 ADD	X0, X0, #256

            (372) 0x41e694 ADD	X17, X17, #256

            (372) 0x41e698 STR	Z15, [X10, MUL VL]

            (372) 0x41e69c STR	Z16, [X0, MUL VL]

            (372) 0x41e6a0 STR	Z14, [X17, MUL VL]

              (376) 0x41e6a4 PUNPKLO	P5.H, P4.B

              (376) 0x41e6a8 LD1D	{Z22.D}, P5/Z, [X18, X2,LSL #3]

              (376) 0x41e6ac FMUL	Z14.D, Z22.D, Z26.D

              (376) 0x41e6b0 MOVPRFX	Z19, Z14

              (376) 0x41e6b4 FRINTZ	Z19.D, P0/M, Z14.D

              (376) 0x41e6b8 PUNPKHI	P6.H, P4.B

              (376) 0x41e6bc FSUB	Z31.D, Z14.D, Z19.D

              (376) 0x41e6c0 LD1D	{Z27.D}, P6/Z, [X21, X2,LSL #3]

              (376) 0x41e6c4 MOVPRFX	Z17, Z14

              (376) 0x41e6c8 FCVTZS	Z17.S, P0/M, Z14.D

              (376) 0x41e6cc FMUL	Z0.D, Z27.D, Z26.D

              (376) 0x41e6d0 MOVPRFX	Z28, Z5

              (376) 0x41e6d4 FMLA	Z28.D, P0/M, Z31.D, Z4.D

              (376) 0x41e6d8 MOVPRFX	Z18, Z0

              (376) 0x41e6dc FCVTZS	Z18.S, P0/M, Z0.D

              (376) 0x41e6e0 UZP1	Z20.S, Z17.S, Z18.S

              (376) 0x41e6e4 MOVPRFX	Z21, Z20

              (376) 0x41e6e8 ADD	Z21.S, Z21.S, #1

              (376) 0x41e6ec MOVPRFX	Z24, Z20

              (376) 0x41e6f0 ADD	Z24.S, Z24.S, #3

              (376) 0x41e6f4 SUNPKHI	Z23.D, Z21

              (376) 0x41e6f8 SUNPKLO	Z25.D, Z21

              (376) 0x41e6fc SUNPKLO	Z30.D, Z20

              (376) 0x41e700 LD1D	{Z14.D}, P5/Z, [X1, Z25.D,LSL #3]

              (376) 0x41e704 SUNPKLO	Z19.D, Z24

              (376) 0x41e708 FMUL	Z1.D, Z14.D, Z28.D

              (376) 0x41e70c SUNPKHI	Z24.D, Z24

              (376) 0x41e710 LD1D	{Z15.D}, P5/Z, [X1, Z30.D,LSL #3]

              (376) 0x41e714 LD1D	{Z18.D}, P6/Z, [X1, Z23.D,LSL #3]

              (376) 0x41e718 LD1D	{Z16.D}, P5/Z, [X1, Z19.D,LSL #3]

              (376) 0x41e71c LD1D	{Z21.D}, P6/Z, [X1, Z24.D,LSL #3]

              (376) 0x41e720 MOVPRFX	Z28, Z20

              (376) 0x41e724 ADD	Z28.S, Z28.S, #2

              (376) 0x41e728 MOVPRFX	Z17, Z9

              (376) 0x41e72c FMLA	Z17.D, P0/M, Z31.D, Z8.D

              (376) 0x41e730 MOVPRFX	Z25, Z7

              (376) 0x41e734 FMLA	Z25.D, P0/M, Z31.D, Z6.D

              (376) 0x41e738 FMUL	Z23.D, Z16.D, Z17.D

              (376) 0x41e73c SUNPKHI	Z30.D, Z28

              (376) 0x41e740 MOVPRFX	Z29, Z3

              (376) 0x41e744 FMLA	Z29.D, P0/M, Z31.D, Z2.D

              (376) 0x41e748 SUNPKHI	Z20.D, Z20

              (376) 0x41e74c FMAD	Z29.D, P0/M, Z15.D, Z1.D

              (376) 0x41e750 ADDVL	X15, SP, #25

              (376) 0x41e754 SUNPKLO	Z1.D, Z28

              (376) 0x41e758 LD1D	{Z24.D}, P5/Z, [X1, Z1.D,LSL #3]

              (376) 0x41e75c FMLA	Z23.D, P0/M, Z24.D, Z25.D

              (376) 0x41e760 FADD	Z29.D, Z29.D, Z23.D

              (376) 0x41e764 LD1D	{Z19.D}, P6/Z, [X1, Z20.D,LSL #3]

              (376) 0x41e768 LD1D	{Z25.D}, P6/Z, [X1, Z30.D,LSL #3]

              (376) 0x41e76c MOVPRFX	Z1, Z0

              (376) 0x41e770 FRINTZ	Z1.D, P0/M, Z0.D

              (376) 0x41e774 ADD	X15, X15, #256

              (376) 0x41e778 LDR	Z20, [X15, MUL VL]

              (376) 0x41e77c FSUB	Z30.D, Z0.D, Z1.D

              (376) 0x41e780 FMUL	Z28.D, Z29.D, Z20.D

              (376) 0x41e784 MOVPRFX	Z0, Z9

              (376) 0x41e788 FMLA	Z0.D, P0/M, Z30.D, Z8.D

              (376) 0x41e78c FMUL	Z29.D, Z21.D, Z0.D

              (376) 0x41e790 LD1W	{Z23.S}, P4/Z, [X30, X2,LSL #2]

              (376) 0x41e794 MOVPRFX	Z1, Z5

              (376) 0x41e798 FMLA	Z1.D, P0/M, Z30.D, Z4.D

              (376) 0x41e79c SUNPKLO	Z17.D, Z23

              (376) 0x41e7a0 FMUL	Z0.D, Z18.D, Z1.D

              (376) 0x41e7a4 ST1D	{Z28.D}, P5, [X11, Z17.D,LSL #3]

              (376) 0x41e7a8 ADDVL	X16, SP, #22

              (376) 0x41e7ac MOVPRFX	Z28, Z7

              (376) 0x41e7b0 FMLA	Z28.D, P0/M, Z30.D, Z6.D

              (376) 0x41e7b4 FMAD	Z28.D, P0/M, Z25.D, Z29.D

              (376) 0x41e7b8 MOVPRFX	Z29, Z3

              (376) 0x41e7bc FMLA	Z29.D, P0/M, Z30.D, Z2.D

              (376) 0x41e7c0 FMAD	Z29.D, P0/M, Z19.D, Z0.D

              (376) 0x41e7c4 FADD	Z28.D, Z29.D, Z28.D

              (376) 0x41e7c8 FMUL	Z20.D, Z28.D, Z20.D

              (376) 0x41e7cc SUNPKHI	Z23.D, Z23

              (376) 0x41e7d0 ADD	X16, X16, #256

              (376) 0x41e7d4 ST1D	{Z20.D}, P6, [X11, Z23.D,LSL #3]

              (376) 0x41e7d8 LDR	Z1, [X16, MUL VL]

              (376) 0x41e7dc ADD	X17, SP, #256

              (376) 0x41e7e0 ADDVL	X10, SP, #10

              (376) 0x41e7e4 LDR	Z20, [X17, #7, MUL VL]

              (376) 0x41e7e8 ADDVL	X0, SP, #8

              (376) 0x41e7ec ADD	X15, SP, #256

              (376) 0x41e7f0 FDIVR	Z22.D, P0/M, Z22.D, Z1.D

              (376) 0x41e7f4 ADD	X10, X10, #256

              (376) 0x41e7f8 LDR	Z0, [X10, MUL VL]

              (376) 0x41e7fc ADD	X0, X0, #256

              (376) 0x41e800 LDR	Z1, [X0, MUL VL]

              (376) 0x41e804 ADDVL	X7, SP, #11

              (376) 0x41e808 FMLA	Z1.D, P0/M, Z31.D, Z20.D

              (376) 0x41e80c LDR	Z20, [X15, #6, MUL VL]

              (376) 0x41e810 FMUL	Z28.D, Z31.D, Z31.D

              (376) 0x41e814 ADD	X7, X7, #256

              (376) 0x41e818 LDR	Z29, [X7, MUL VL]

              (376) 0x41e81c FMLA	Z1.D, P0/M, Z28.D, Z20.D

              (376) 0x41e820 FMLA	Z29.D, P0/M, Z31.D, Z0.D

              (376) 0x41e824 LDR	Z20, [X15, #4, MUL VL]

              (376) 0x41e828 INCB	X17, ALL, MUL #9

              (376) 0x41e82c LDR	Z0, [X17, MUL VL]

              (376) 0x41e830 FMLA	Z29.D, P0/M, Z28.D, Z0.D

              (376) 0x41e834 FMUL	Z29.D, Z16.D, Z29.D

              (376) 0x41e838 LDR	Z0, [X15, #5, MUL VL]

              (376) 0x41e83c FMAD	Z1.D, P0/M, Z24.D, Z29.D

              (376) 0x41e840 FMLA	Z0.D, P0/M, Z31.D, Z20.D

              (376) 0x41e844 LDR	Z29, [X15, #3, MUL VL]

              (376) 0x41e848 LDR	Z20, [X15, #1, MUL VL]

              (376) 0x41e84c FMLA	Z0.D, P0/M, Z28.D, Z29.D

              (376) 0x41e850 LDR	Z29, [X15, #2, MUL VL]

              (376) 0x41e854 FMUL	Z0.D, Z14.D, Z0.D

              (376) 0x41e858 FMLA	Z29.D, P0/M, Z31.D, Z20.D

              (376) 0x41e85c LDR	Z20, [X15, MUL VL]

              (376) 0x41e860 FMLA	Z29.D, P0/M, Z28.D, Z20.D

              (376) 0x41e864 FMAD	Z29.D, P0/M, Z15.D, Z0.D

              (376) 0x41e868 ADDVL	X16, X15, #22

              (376) 0x41e86c FADD	Z1.D, Z29.D, Z1.D

              (376) 0x41e870 ADDVL	X10, SP, #10

              (376) 0x41e874 FMUL	Z22.D, Z22.D, Z26.D

              (376) 0x41e878 FMUL	Z22.D, Z1.D, Z22.D

              (376) 0x41e87c ST1D	{Z22.D}, P5, [X8, Z17.D,LSL #3]

              (376) 0x41e880 LDR	Z29, [X16, MUL VL]

              (376) 0x41e884 FDIVR	Z27.D, P0/M, Z27.D, Z29.D

              (376) 0x41e888 ADD	X10, X10, #256

              (376) 0x41e88c ADD	X17, SP, #256

              (376) 0x41e890 FMUL	Z22.D, Z27.D, Z26.D

              (376) 0x41e894 LDR	Z27, [X10, MUL VL]

              (376) 0x41e898 ADDVL	X7, SP, #11

              (376) 0x41e89c ADDVL	X0, SP, #8

              (376) 0x41e8a0 FMUL	Z29.D, Z30.D, Z30.D

              (376) 0x41e8a4 ADD	X7, X7, #256

              (376) 0x41e8a8 LDR	Z20, [X7, MUL VL]

              (376) 0x41e8ac ADD	X0, X0, #256

              (376) 0x41e8b0 FMLA	Z20.D, P0/M, Z30.D, Z27.D

              (376) 0x41e8b4 LDR	Z27, [X0, MUL VL]

              (376) 0x41e8b8 LDR	Z0, [X17, #7, MUL VL]

              (376) 0x41e8bc INCB	X17, ALL, MUL #9

              (376) 0x41e8c0 LDR	Z1, [X17, MUL VL]

              (376) 0x41e8c4 FMLA	Z20.D, P0/M, Z29.D, Z1.D

              (376) 0x41e8c8 ADD	X15, SP, #256

              (376) 0x41e8cc FMUL	Z1.D, Z21.D, Z20.D

              (376) 0x41e8d0 FMLA	Z27.D, P0/M, Z30.D, Z0.D

              (376) 0x41e8d4 LDR	Z20, [X15, #4, MUL VL]

              (376) 0x41e8d8 LDR	Z0, [X15, #6, MUL VL]

              (376) 0x41e8dc FMLA	Z27.D, P0/M, Z29.D, Z0.D

              (376) 0x41e8e0 FMAD	Z27.D, P0/M, Z25.D, Z1.D

              (376) 0x41e8e4 LDR	Z0, [X15, #5, MUL VL]

              (376) 0x41e8e8 LDR	Z1, [X15, #3, MUL VL]

              (376) 0x41e8ec FMLA	Z0.D, P0/M, Z30.D, Z20.D

              (376) 0x41e8f0 LDR	Z20, [X15, #1, MUL VL]

              (376) 0x41e8f4 FMLA	Z0.D, P0/M, Z29.D, Z1.D

              (376) 0x41e8f8 ADDVL	X7, SP, #18

              (376) 0x41e8fc LDR	Z1, [X15, #2, MUL VL]

              (376) 0x41e900 FMUL	Z0.D, Z18.D, Z0.D

              (376) 0x41e904 FMLA	Z1.D, P0/M, Z30.D, Z20.D

              (376) 0x41e908 LDR	Z20, [X15, MUL VL]

              (376) 0x41e90c ADDVL	X10, SP, #17

              (376) 0x41e910 FMLA	Z1.D, P0/M, Z29.D, Z20.D

              (376) 0x41e914 ADDVL	X0, SP, #16

              (376) 0x41e918 FMAD	Z1.D, P0/M, Z19.D, Z0.D

              (376) 0x41e91c ADDVL	X16, X15, #23

              (376) 0x41e920 FADD	Z27.D, Z27.D, Z1.D

              (376) 0x41e924 ADD	X7, X7, #256

              (376) 0x41e928 FMUL	Z22.D, Z27.D, Z22.D

              (376) 0x41e92c ADD	X10, X10, #256

              (376) 0x41e930 ST1D	{Z22.D}, P6, [X8, Z23.D,LSL #3]

              (376) 0x41e934 LDR	Z1, [X10, MUL VL]

              (376) 0x41e938 ADD	X0, X0, #256

              (376) 0x41e93c LDR	Z20, [X16, MUL VL]

              (376) 0x41e940 LDR	Z0, [X7, MUL VL]

              (376) 0x41e944 ADDVL	X17, SP, #13

              (376) 0x41e948 FMLA	Z0.D, P0/M, Z31.D, Z1.D

              (376) 0x41e94c LDR	Z1, [X0, MUL VL]

              (376) 0x41e950 ADDVL	X15, SP, #12

              (376) 0x41e954 ADDVL	X16, SP, #15

              (376) 0x41e958 FMUL	Z22.D, Z31.D, Z28.D

              (376) 0x41e95c ADDVL	X7, SP, #14

              (376) 0x41e960 ADDVL	X10, SP, #24

              (376) 0x41e964 FMUL	Z27.D, Z28.D, Z20.D

              (376) 0x41e968 ADDVL	X0, SP, #19

              (376) 0x41e96c FMLA	Z27.D, P0/M, Z22.D, Z1.D

              (376) 0x41e970 ADD	X17, X17, #256

              (376) 0x41e974 LDR	Z1, [X17, MUL VL]

              (376) 0x41e978 ADD	X15, X15, #256

              (376) 0x41e97c ADD	X16, X16, #256

              (376) 0x41e980 ADD	X7, X7, #256

              (376) 0x41e984 ADD	X10, X10, #256

              (376) 0x41e988 FMUL	Z1.D, Z28.D, Z1.D

              (376) 0x41e98c ADD	X0, X0, #256

              (376) 0x41e990 FADD	Z27.D, Z0.D, Z27.D

              (376) 0x41e994 LDR	Z0, [X15, MUL VL]

              (376) 0x41e998 FMLA	Z1.D, P0/M, Z22.D, Z0.D

              (376) 0x41e99c LDR	Z0, [X7, MUL VL]

              (376) 0x41e9a0 FMUL	Z27.D, Z27.D, Z14.D

              (376) 0x41e9a4 LDR	Z14, [X16, MUL VL]

              (376) 0x41e9a8 ADDVL	X17, SP, #20

              (376) 0x41e9ac FMLA	Z14.D, P0/M, Z31.D, Z0.D

              (376) 0x41e9b0 ADDVL	X15, SP, #21

              (376) 0x41e9b4 FADD	Z14.D, Z1.D, Z14.D

              (376) 0x41e9b8 LDR	Z1, [X0, MUL VL]

              (376) 0x41e9bc FMAD	Z14.D, P0/M, Z15.D, Z27.D

              (376) 0x41e9c0 LDR	Z15, [X10, MUL VL]

              (376) 0x41e9c4 ADDVL	X16, SP, #18

              (376) 0x41e9c8 ADDVL	X7, SP, #17

              (376) 0x41e9cc ADDVL	X10, SP, #16

              (376) 0x41e9d0 FMUL	Z0.D, Z28.D, Z11.D

              (376) 0x41e9d4 ADDVL	X0, SP, #13

              (376) 0x41e9d8 FMLA	Z0.D, P0/M, Z22.D, Z10.D

              (376) 0x41e9dc FMUL	Z28.D, Z28.D, Z15.D

              (376) 0x41e9e0 ADD	X17, X17, #256

              (376) 0x41e9e4 FMAD	Z22.D, P0/M, Z1.D, Z28.D

              (376) 0x41e9e8 ADD	X15, X15, #256

              (376) 0x41e9ec ADD	X16, X16, #256

              (376) 0x41e9f0 ADD	X7, X7, #256

              (376) 0x41e9f4 MOVPRFX	Z27, Z13

              (376) 0x41e9f8 FMLA	Z27.D, P0/M, Z31.D, Z12.D

              (376) 0x41e9fc ADD	X10, X10, #256

              (376) 0x41ea00 FADD	Z27.D, Z27.D, Z0.D

              (376) 0x41ea04 ADD	X0, X0, #256

              (376) 0x41ea08 LDR	Z28, [X17, MUL VL]

              (376) 0x41ea0c LDR	Z0, [X15, MUL VL]

              (376) 0x41ea10 FMUL	Z16.D, Z27.D, Z16.D

              (376) 0x41ea14 FMAD	Z31.D, P0/M, Z28.D, Z0.D

              (376) 0x41ea18 ADDVL	X17, SP, #12

              (376) 0x41ea1c FADD	Z31.D, Z31.D, Z22.D

              (376) 0x41ea20 ADDVL	X15, SP, #15

              (376) 0x41ea24 FMAD	Z24.D, P0/M, Z31.D, Z16.D

              (376) 0x41ea28 FMUL	Z22.D, Z29.D, Z20.D

              (376) 0x41ea2c FADD	Z24.D, Z24.D, Z14.D

              (376) 0x41ea30 ST1D	{Z24.D}, P5, [X4, Z17.D,LSL #3]

              (376) 0x41ea34 LDR	Z14, [X7, MUL VL]

              (376) 0x41ea38 LDR	Z1, [X10, MUL VL]

              (376) 0x41ea3c LDR	Z20, [X16, MUL VL]

              (376) 0x41ea40 LDR	Z27, [X0, MUL VL]

              (376) 0x41ea44 FMUL	Z17.D, Z30.D, Z29.D

              (376) 0x41ea48 FMLA	Z20.D, P0/M, Z30.D, Z14.D

              (376) 0x41ea4c FMLA	Z22.D, P0/M, Z17.D, Z1.D

              (376) 0x41ea50 ADDVL	X16, SP, #14

              (376) 0x41ea54 ADDVL	X7, SP, #19

              (376) 0x41ea58 FMUL	Z16.D, Z29.D, Z27.D

              (376) 0x41ea5c ADDVL	X10, SP, #20

              (376) 0x41ea60 ADDVL	X0, SP, #21

              (376) 0x41ea64 FADD	Z28.D, Z22.D, Z20.D

              (376) 0x41ea68 ADD	X17, X17, #256

              (376) 0x41ea6c LDR	Z0, [X17, MUL VL]

              (376) 0x41ea70 FMUL	Z22.D, Z29.D, Z11.D

              (376) 0x41ea74 FMLA	Z16.D, P0/M, Z17.D, Z0.D

              (376) 0x41ea78 FMLA	Z22.D, P0/M, Z17.D, Z10.D

              (376) 0x41ea7c ADD	X15, X15, #256

              (376) 0x41ea80 LDR	Z31, [X15, MUL VL]

              (376) 0x41ea84 ADD	X16, X16, #256

              (376) 0x41ea88 LDR	Z24, [X16, MUL VL]

              (376) 0x41ea8c ADD	X7, X7, #256

              (376) 0x41ea90 FMLA	Z31.D, P0/M, Z30.D, Z24.D

              (376) 0x41ea94 ADD	X10, X10, #256

              (376) 0x41ea98 LDR	Z1, [X10, MUL VL]

              (376) 0x41ea9c ADD	X0, X0, #256

              (376) 0x41eaa0 FMUL	Z18.D, Z18.D, Z28.D

              (376) 0x41eaa4 FADD	Z20.D, Z16.D, Z31.D

              (376) 0x41eaa8 FMAD	Z20.D, P0/M, Z19.D, Z18.D

              (376) 0x41eaac FMUL	Z19.D, Z29.D, Z15.D

              (376) 0x41eab0 LDR	Z15, [X7, MUL VL]

              (376) 0x41eab4 LDR	Z27, [X0, MUL VL]

              (376) 0x41eab8 MOVPRFX	Z29, Z13

              (376) 0x41eabc FMLA	Z29.D, P0/M, Z30.D, Z12.D

              (376) 0x41eac0 FMAD	Z17.D, P0/M, Z15.D, Z19.D

              (376) 0x41eac4 FADD	Z14.D, Z22.D, Z29.D

              (376) 0x41eac8 FMAD	Z30.D, P0/M, Z1.D, Z27.D

              (376) 0x41eacc FMUL	Z21.D, Z21.D, Z14.D

              (376) 0x41ead0 FADD	Z30.D, Z17.D, Z30.D

              (376) 0x41ead4 FMAD	Z25.D, P0/M, Z30.D, Z21.D

              (376) 0x41ead8 FADD	Z25.D, Z25.D, Z20.D

              (376) 0x41eadc ST1D	{Z25.D}, P6, [X4, Z23.D,LSL #3]

              (376) 0x41eae0 ADD	X2, X2, X14

              (376) 0x41eae4 WHILELO	P4.S, W2, W12

              (376) 0x41eae8 B.NE	41e6a4

            (372) 0x41eaec LDR	W11, [X19, #152]

            (372) 0x41eaf0 ADD	X5, X5, #1

            (372) 0x41eaf4 ADD	X6, X6, #4

            (372) 0x41eaf8 CMP	W11, W5

            (372) 0x41eafc B.GT	41e1c0

          (373) 0x41eb00 LDP	W21, W13, [X19, #144]

          (373) 0x41eb04 PTRUE	P7.B, ALL

          (373) 0x41eb08 LDR	X18, [X19, #256]

          (373) 0x41eb0c SBFM	X22, X21, #61, #31

          (373) 0x41eb10 CBZ	X22, 41f530

          (374) 0x41eb14 UBFM	X30, X22, #3, #63

          (374) 0x41eb18 CNTH	X12, ALL

          (374) 0x41eb1c SUB	X9, X30, #1

          (374) 0x41eb20 ADD	X14, X12, #7

          (374) 0x41eb24 CMP	X9, X14

          (374) 0x41eb28 B.CC	41f5c0

        (371) 0x41eb2c MOVZ	X8, #0

        (371) 0x41eb30 SUB	X4, X30, X12

        (371) 0x41eb34 DUP	Z10.D, #0

        (371) 0x41eb38 ORR	X17, XZR, X18

        (371) 0x41eb3c CNTB	X1, ALL, MUL #4

        (371) 0x41eb40 ORR	Z9.D, Z10.D, Z10.D

        (371) 0x41eb44 ORR	Z6.D, Z10.D, Z10.D

        (371) 0x41eb48 ORR	Z5.D, Z10.D, Z10.D

          (388) 0x41eb4c ADD	X8, X8, X12

          (388) 0x41eb50 LD1D	{Z3.D}, P7/Z, [X17, MUL VL]

          (388) 0x41eb54 LD1D	{Z4.D}, P7/Z, [X17, #1, MUL VL]

          (388) 0x41eb58 LD1D	{Z7.D}, P7/Z, [X17, #2, MUL VL]

          (388) 0x41eb5c LD1D	{Z8.D}, P7/Z, [X17, #3, MUL VL]

          (388) 0x41eb60 FADD	Z5.D, Z5.D, Z3.D

          (388) 0x41eb64 ADD	X17, X17, X1

          (388) 0x41eb68 FADD	Z6.D, Z6.D, Z4.D

          (388) 0x41eb6c FADD	Z9.D, Z9.D, Z7.D

          (388) 0x41eb70 FADD	Z10.D, Z10.D, Z8.D

          (388) 0x41eb74 CMP	X4, X8

          (388) 0x41eb78 B.CS	41eb4c

        (371) 0x41eb7c FADD	Z11.D, Z9.D, Z10.D

        (371) 0x41eb80 FADD	Z12.D, Z5.D, Z6.D

        (371) 0x41eb84 FADD	Z2.D, Z11.D, Z12.D

        (371) 0x41eb88 CMP	X8, X30

        (371) 0x41eb8c B.EQ	41ebb8

        (371) 0x41eb90 ADD	X15, X18, X8,LSL #3

        (371) 0x41eb94 MOVZ	X10, #0

        (371) 0x41eb98 CNTD	X16, ALL

        (371) 0x41eb9c SUB	X7, X30, X8

        (371) 0x41eba0 WHILELO	P1.D, XZR, X7

          (369) 0x41eba4 LD1D	{Z13.D}, P1/Z, [X15, X10,LSL #3]

          (369) 0x41eba8 ADD	X10, X10, X16

          (369) 0x41ebac FADD	Z2.D, P1/M, Z2.D, Z13.D

          (369) 0x41ebb0 WHILELO	P1.D, X10, X7

          (369) 0x41ebb4 B.NE	41eba4

        (371) 0x41ebb8 FADDV	D26, P7, Z2.D

          (373) 0x41ebbc LDR	X5, [X27]

          (373) 0x41ebc0 UBFM	X30, X24, #61, #31

          (373) 0x41ebc4 MOVZ	W0, #24

          (373) 0x41ebc8 LDR	X11, [X26, #24]

          (373) 0x41ebcc LDR	X2, [X25, #24]

          (373) 0x41ebd0 ADD	X3, X5, X3

          (373) 0x41ebd4 LDR	X9, [X3, #8]

          (373) 0x41ebd8 LDR	X7, [X3, #24]

          (373) 0x41ebdc STR	D26, [X11, X30]

          (373) 0x41ebe0 UMADDL	X6, W24, W0, X2

          (373) 0x41ebe4 CMP	W21, #0

          (373) 0x41ebe8 B.LE	41f578

          (373) 0x41ebec CNTW	X22, ALL

          (373) 0x41ebf0 SUB	W8, W21, #1

          (373) 0x41ebf4 ADD	W18, W22, #3

          (373) 0x41ebf8 CMP	W8, W18

          (373) 0x41ebfc B.CC	41f5b4

          (373) 0x41ec00 MOVZ	W12, #0

          (373) 0x41ec04 SUB	W14, W21, W22

          (373) 0x41ec08 DUP	Z28.D, #0

          (373) 0x41ec0c ORR	X17, XZR, X23

          (373) 0x41ec10 ORR	X1, XZR, X20

          (373) 0x41ec14 PTRUE	P2.B, ALL

          (373) 0x41ec18 CNTB	X4, ALL, MUL #2

          (373) 0x41ec1c FDUP	Z16.D, #0

          (373) 0x41ec20 ORR	Z31.D, Z28.D, Z28.D

            (387) 0x41ec24 ADD	W12, W12, W22

            (387) 0x41ec28 LD1D	{Z0.D}, P2/Z, [X17, #1, MUL VL]

            (387) 0x41ec2c LD1D	{Z18.D}, P2/Z, [X1, #1, MUL VL]

            (387) 0x41ec30 LD1D	{Z24.D}, P2/Z, [X1, MUL VL]

            (387) 0x41ec34 LD1D	{Z22.D}, P2/Z, [X17, MUL VL]

            (387) 0x41ec38 FMAD	Z18.D, P2/M, Z16.D, Z0.D

            (387) 0x41ec3c FMAD	Z24.D, P2/M, Z16.D, Z22.D

            (387) 0x41ec40 ADD	X1, X1, X4

            (387) 0x41ec44 ADD	X17, X17, X4

            (387) 0x41ec48 FADD	Z28.D, Z28.D, Z18.D

            (387) 0x41ec4c FADD	Z31.D, Z31.D, Z24.D

            (387) 0x41ec50 CMP	W14, W12

            (387) 0x41ec54 B.CS	41ec24

          (373) 0x41ec58 FADD	Z17.D, Z31.D, Z28.D

          (373) 0x41ec5c CMP	W21, W12

          (373) 0x41ec60 B.EQ	41eca0

          (373) 0x41ec64 UBFM	X15, X12, #61, #31

          (373) 0x41ec68 MOVZ	X0, #0

          (373) 0x41ec6c FDUP	Z20.D, #0

          (373) 0x41ec70 CNTD	X16, ALL

          (373) 0x41ec74 ADD	X10, X23, X15

          (373) 0x41ec78 ADD	X11, X20, X15

          (373) 0x41ec7c SUB	W5, W21, W12

          (373) 0x41ec80 WHILELO	P3.D, WZR, W5

            (386) 0x41ec84 LD1D	{Z19.D}, P3/Z, [X10, X0,LSL #3]

            (386) 0x41ec88 LD1D	{Z29.D}, P3/Z, [X11, X0,LSL #3]

            (386) 0x41ec8c FADD	Z17.D, P3/M, Z17.D, Z19.D

            (386) 0x41ec90 ADD	X0, X0, X16

            (386) 0x41ec94 FMLA	Z17.D, P3/M, Z29.D, Z20.D

            (386) 0x41ec98 WHILELO	P3.D, W0, W5

            (386) 0x41ec9c B.NE	41ec84

          (373) 0x41eca0 PTRUE	P7.B, ALL

          (373) 0x41eca4 FADDV	D23, P7, Z17.D

          (373) 0x41eca8 MOVZ	X11, #0

          (373) 0x41ecac MOVZ	X4, #0

          (373) 0x41ecb0 UBFM	X15, X9, #61, #60

          (373) 0x41ecb4 ORR	X10, XZR, X7

            (370) 0x41ecb8 CMP	W21, #0

            (370) 0x41ecbc B.LE	41f4c4

          (373) 0x41ecc0 CNTW	X14, ALL

          (373) 0x41ecc4 CNTD	X18, ALL

          (373) 0x41ecc8 PTRUE	P0.B, ALL

          (373) 0x41eccc ADD	W16, W14, #3

          (373) 0x41ecd0 SUB	W17, W21, W14

          (373) 0x41ecd4 CNTB	X12, ALL, MUL #2

            (384) 0x41ecd8 CMP	W8, W16

            (384) 0x41ecdc B.CC	41f538

            (384) 0x41ece0 MOVZ	W22, #0

            (384) 0x41ece4 ORR	X3, XZR, X20

            (384) 0x41ece8 DUP	Z14.D, #0

            (384) 0x41ecec ORR	X1, XZR, X10

            (384) 0x41ecf0 ORR	Z1.D, Z14.D, Z14.D

            (384) 0x41ecf4 HINT	#0

            (384) 0x41ecf8 HINT	#0

            (384) 0x41ecfc HINT	#0

              (385) 0x41ed00 ADD	W22, W22, W14

              (385) 0x41ed04 LD1D	{Z21.D}, P0/Z, [X3, #1, MUL VL]

              (385) 0x41ed08 LD1D	{Z27.D}, P0/Z, [X1, #1, MUL VL]

              (385) 0x41ed0c LD1D	{Z30.D}, P0/Z, [X3, MUL VL]

              (385) 0x41ed10 LD1D	{Z25.D}, P0/Z, [X1, MUL VL]

              (385) 0x41ed14 ADD	X3, X3, X12

              (385) 0x41ed18 ADD	X1, X1, X12

              (385) 0x41ed1c FMLA	Z14.D, P0/M, Z27.D, Z21.D

              (385) 0x41ed20 FMLA	Z1.D, P0/M, Z30.D, Z25.D

              (385) 0x41ed24 CMP	W17, W22

              (385) 0x41ed28 B.CS	41ed00

            (384) 0x41ed2c FADD	Z15.D, Z1.D, Z14.D

            (384) 0x41ed30 CMP	W21, W22

            (384) 0x41ed34 B.EQ	41ed78

            (384) 0x41ed38 ORR	W5, WZR, W22

            (384) 0x41ed3c SUB	W0, W21, W22

            (384) 0x41ed40 WHILELO	P5.D, WZR, W0

            (384) 0x41ed44 ADD	X22, X5, X11

            (384) 0x41ed48 ADD	X3, X20, X5,LSL #3

            (384) 0x41ed4c MOVZ	X1, #0

            (384) 0x41ed50 ADD	X5, X7, X22,LSL #3

            (384) 0x41ed54 HINT	#0

            (384) 0x41ed58 HINT	#0

            (384) 0x41ed5c HINT	#0

              (383) 0x41ed60 LD1D	{Z26.D}, P5/Z, [X3, X1,LSL #3]

              (383) 0x41ed64 LD1D	{Z2.D}, P5/Z, [X5, X1,LSL #3]

              (383) 0x41ed68 ADD	X1, X1, X18

              (383) 0x41ed6c FMLA	Z15.D, P5/M, Z26.D, Z2.D

              (383) 0x41ed70 WHILELO	P5.D, W1, W0

              (383) 0x41ed74 B.NE	41ed60

            (384) 0x41ed78 FADDV	D3, P0, Z15.D

            (384) 0x41ed7c STR	D3, [X6, X4,LSL #3]

            (384) 0x41ed80 ADD	X4, X4, #1

            (384) 0x41ed84 ADD	X10, X10, X15

            (384) 0x41ed88 ADD	X11, X11, X9

            (384) 0x41ed8c CMP	X4, #3

            (384) 0x41ed90 B.NE	41ecd8

          (373) 0x41ed94 LDR	X6, [X28, #24]

          (373) 0x41ed98 ADD	X24, X24, #1

          (373) 0x41ed9c STR	D23, [X6, X30]

          (373) 0x41eda0 LDR	X30, [SP, #168]

          (373) 0x41eda4 ADD	X9, X30, #40

          (373) 0x41eda8 STR	X9, [SP, #168]

          (373) 0x41edac CMP	W13, W24

          (373) 0x41edb0 B.GT	41e140

      (377) 0x41edb4 SBFM	X0, X13, #0, #31

      (377) 0x41edb8 CBZ	X0, 41f9d8

    (380) 0x41edbc LDR	X20, [SP, #232]

    (380) 0x41edc0 LDR	X27, [X20, #24]

    (380) 0x41edc4 CMP	W13, #1

    (380) 0x41edc8 B.EQ	41f680

    (380) 0x41edcc LDP	X21, X22, [SP, #32]

    (380) 0x41edd0 LDP	X23, X24, [SP, #48]

    (380) 0x41edd4 LDP	X25, X26, [SP, #64]

    (380) 0x41edd8 LDP	D8, D9, [SP, #96]

    (380) 0x41eddc LDP	D10, D11, [SP, #112]

    (380) 0x41ede0 LDP	D12, D13, [SP, #128]

    (380) 0x41ede4 LDP	D14, D15, [SP, #144]

    (380) 0x41ede8 SUB	X7, X27, X2

    (380) 0x41edec SUB	X8, X7, #8

    (380) 0x41edf0 CMP	X8, #32

    (380) 0x41edf4 B.LS	41f6a0

  (379) 0x41edf8 UBFM	X13, X0, #1, #63

  (379) 0x41edfc ORR	X15, XZR, #3841

  (379) 0x41ee00 ADD	X4, X13, X13,LSL #1

  (379) 0x41ee04 MOVK	X15, #43691

  (379) 0x41ee08 ORR	X1, XZR, X27

  (379) 0x41ee0c MOVK	X15, #2730

  (379) 0x41ee10 ORR	X3, XZR, X2

  (379) 0x41ee14 ADD	X14, X27, X4,LSL #4

  (379) 0x41ee18 SUB	X10, X14, X27

  (379) 0x41ee1c SUB	X11, X10, #48

  (379) 0x41ee20 UBFM	X18, X11, #4, #63

  (379) 0x41ee24 MADD	X16, X18, X15, XZR

  (379) 0x41ee28 ADD	X17, X16, #1

  (379) 0x41ee2c ANDS	X12, X17, #4160

  (379) 0x41ee30 B.EQ	41ee9c

  (379) 0x41ee34 CMP	X12, #1

  (379) 0x41ee38 B.EQ	41ee6c

  (379) 0x41ee3c CMP	X12, #2

  (379) 0x41ee40 B.NE	41f654

  (379) 0x41ee44 LDR	Q31, [X3, #32]

  (379) 0x41ee48 LDP	Q24, Q28, [X1]

  (379) 0x41ee4c ADD	X1, X1, #48

  (379) 0x41ee50 LDP	Q20, Q19, [X3], #48

  (379) 0x41ee54 LDUR	Q22, [X1, #496]

  (379) 0x41ee58 FADD	V1.2D, V22.2D, V31.2D

  (379) 0x41ee5c FADD	V29.2D, V28.2D, V19.2D

  (379) 0x41ee60 FADD	V21.2D, V24.2D, V20.2D

  (379) 0x41ee64 STUR	Q1, [X1, #496]

  (379) 0x41ee68 STP	Q21, Q29, [X1, #2000]

  (379) 0x41ee6c LDR	Q30, [X3, #32]

  (379) 0x41ee70 LDP	Q27, Q25, [X1]

  (379) 0x41ee74 ADD	X1, X1, #48

  (379) 0x41ee78 LDP	Q2, Q3, [X3], #48

  (379) 0x41ee7c LDUR	Q26, [X1, #496]

  (379) 0x41ee80 FADD	V5.2D, V26.2D, V30.2D

  (379) 0x41ee84 FADD	V4.2D, V25.2D, V3.2D

  (379) 0x41ee88 FADD	V6.2D, V27.2D, V2.2D

  (379) 0x41ee8c STUR	Q5, [X1, #496]

  (379) 0x41ee90 STP	Q6, Q4, [X1, #2000]

  (379) 0x41ee94 CMP	X14, X1

  (379) 0x41ee98 B.EQ	41ef50

    (381) 0x41ee9c LDP	Q16, Q17, [X3, #16]

    (381) 0x41eea0 ORR	X5, XZR, X3

    (381) 0x41eea4 ADD	X6, X1, #48

    (381) 0x41eea8 ADD	X30, X1, #96

    (381) 0x41eeac ADD	X9, X3, #96

    (381) 0x41eeb0 LDP	Q0, Q28, [X1, #32]

    (381) 0x41eeb4 ADD	X20, X1, #144

    (381) 0x41eeb8 ADD	X7, X3, #144

    (381) 0x41eebc ADD	X3, X3, #192

    (381) 0x41eec0 LDP	Q7, Q23, [X1]

    (381) 0x41eec4 ADD	X1, X1, #192

    (381) 0x41eec8 LDR	Q18, [X5], #48

    (381) 0x41eecc FADD	V22.2D, V0.2D, V17.2D

    (381) 0x41eed0 FADD	V24.2D, V23.2D, V16.2D

    (381) 0x41eed4 FADD	V31.2D, V7.2D, V18.2D

    (381) 0x41eed8 STUR	Q22, [X1, #352]

    (381) 0x41eedc STP	Q31, Q24, [X1, #1856]

    (381) 0x41eee0 LDP	Q20, Q29, [X6, #16]

    (381) 0x41eee4 LDP	Q1, Q19, [X5, #16]

    (381) 0x41eee8 LDUR	Q25, [X3, #368]

    (381) 0x41eeec FADD	V26.2D, V28.2D, V25.2D

    (381) 0x41eef0 FADD	V21.2D, V20.2D, V1.2D

    (381) 0x41eef4 FADD	V27.2D, V29.2D, V19.2D

    (381) 0x41eef8 STUR	Q26, [X1, #368]

    (381) 0x41eefc STP	Q21, Q27, [X6, #16]

    (381) 0x41ef00 LDP	Q30, Q2, [X30, #16]

    (381) 0x41ef04 LDP	Q3, Q4, [X9, #16]

    (381) 0x41ef08 LDUR	Q23, [X3, #416]

    (381) 0x41ef0c LDUR	Q7, [X1, #416]

    (381) 0x41ef10 FADD	V5.2D, V30.2D, V3.2D

    (381) 0x41ef14 FADD	V16.2D, V7.2D, V23.2D

    (381) 0x41ef18 FADD	V6.2D, V2.2D, V4.2D

    (381) 0x41ef1c STUR	Q16, [X1, #416]

    (381) 0x41ef20 STP	Q5, Q6, [X30, #16]

    (381) 0x41ef24 LDP	Q17, Q18, [X20, #16]

    (381) 0x41ef28 LDP	Q24, Q0, [X7, #16]

    (381) 0x41ef2c LDUR	Q31, [X1, #464]

    (381) 0x41ef30 LDUR	Q20, [X3, #464]

    (381) 0x41ef34 FADD	V28.2D, V17.2D, V24.2D

    (381) 0x41ef38 FADD	V29.2D, V31.2D, V20.2D

    (381) 0x41ef3c FADD	V22.2D, V18.2D, V0.2D

    (381) 0x41ef40 STUR	Q29, [X1, #464]

    (381) 0x41ef44 STP	Q28, Q22, [X20, #16]

    (381) 0x41ef48 CMP	X14, X1

    (381) 0x41ef4c B.NE	41ee9c

  (379) 0x41ef50 LDR	X18, [X28, #24]

  (379) 0x41ef54 TBZ	W0, #0, 41f648

  (379) 0x41ef58 AND	X8, X0, #8127

  (379) 0x41ef5c ADD	X13, X8, X8,LSL #1

  (379) 0x41ef60 UBFM	X4, X13, #61, #60

  (379) 0x41ef64 ADD	X14, X2, X4

  (379) 0x41ef68 ADD	X10, X27, X4

  (379) 0x41ef6c LDR	D19, [X2, X4]

  (379) 0x41ef70 LDR	D1, [X27, X4]

  (379) 0x41ef74 LDR	X2, [SP, #240]

  (379) 0x41ef78 FADD	D21, D1, D19

  (379) 0x41ef7c LDR	X15, [X2, #24]

  (379) 0x41ef80 STR	D21, [X27, X4]

  (379) 0x41ef84 LDR	D26, [X14, #8]

  (379) 0x41ef88 LDP	D27, D25, [X10, #8]

  (379) 0x41ef8c FADD	D30, D27, D26

  (379) 0x41ef90 STR	D30, [X10, #8]

  (379) 0x41ef94 LDR	D2, [X14, #16]

  (379) 0x41ef98 FADD	D3, D25, D2

  (379) 0x41ef9c STR	D3, [X10, #16]

  (379) 0x41efa0 ADD	X28, X18, #8

  (379) 0x41efa4 CMP	X15, X28

  (379) 0x41efa8 B.EQ	41fa04

  (379) 0x41efac UBFM	X8, X0, #1, #63

  (379) 0x41efb0 MOVZ	X16, #0

  (379) 0x41efb4 UBFM	X13, X8, #60, #59

  (379) 0x41efb8 SUB	X14, X13, #16

  (379) 0x41efbc UBFM	X10, X14, #4, #63

  (379) 0x41efc0 ADD	X27, X10, #1

  (379) 0x41efc4 ANDS	X4, X27, #4224

  (379) 0x41efc8 B.EQ	41f090

  (379) 0x41efcc CMP	X4, #1

  (379) 0x41efd0 B.EQ	41f074

  (379) 0x41efd4 CMP	X4, #2

  (379) 0x41efd8 B.EQ	41f060

  (379) 0x41efdc CMP	X4, #3

  (379) 0x41efe0 B.EQ	41f04c

  (379) 0x41efe4 CMP	X4, #4

  (379) 0x41efe8 B.EQ	41f038

  (379) 0x41efec CMP	X4, #5

  (379) 0x41eff0 B.EQ	41f024

  (379) 0x41eff4 CMP	X4, #6

  (379) 0x41eff8 B.EQ	41f010

  (379) 0x41effc LDR	Q1, [X15]

  (379) 0x41f000 MOVZ	X16, #16

  (379) 0x41f004 LDR	Q27, [X18]

  (379) 0x41f008 FSUB	V19.2D, V1.2D, V27.2D

  (379) 0x41f00c STR	Q19, [X15]

  (379) 0x41f010 LDR	Q21, [X15, X16]

  (379) 0x41f014 LDR	Q25, [X18, X16]

  (379) 0x41f018 FSUB	V26.2D, V21.2D, V25.2D

  (379) 0x41f01c STR	Q26, [X15, X16]

  (379) 0x41f020 ADD	X16, X16, #16

  (379) 0x41f024 LDR	Q30, [X15, X16]

  (379) 0x41f028 LDR	Q2, [X18, X16]

  (379) 0x41f02c FSUB	V3.2D, V30.2D, V2.2D

  (379) 0x41f030 STR	Q3, [X15, X16]

  (379) 0x41f034 ADD	X16, X16, #16

  (379) 0x41f038 LDR	Q4, [X15, X16]

  (379) 0x41f03c LDR	Q6, [X18, X16]

  (379) 0x41f040 FSUB	V7.2D, V4.2D, V6.2D

  (379) 0x41f044 STR	Q7, [X15, X16]

  (379) 0x41f048 ADD	X16, X16, #16

  (379) 0x41f04c LDR	Q5, [X15, X16]

  (379) 0x41f050 LDR	Q23, [X18, X16]

  (379) 0x41f054 FSUB	V18.2D, V5.2D, V23.2D

  (379) 0x41f058 STR	Q18, [X15, X16]

  (379) 0x41f05c ADD	X16, X16, #16

  (379) 0x41f060 LDR	Q16, [X15, X16]

  (379) 0x41f064 LDR	Q17, [X18, X16]

  (379) 0x41f068 FSUB	V24.2D, V16.2D, V17.2D

  (379) 0x41f06c STR	Q24, [X15, X16]

  (379) 0x41f070 ADD	X16, X16, #16

  (379) 0x41f074 LDR	Q0, [X15, X16]

  (379) 0x41f078 LDR	Q28, [X18, X16]

  (379) 0x41f07c FSUB	V22.2D, V0.2D, V28.2D

  (379) 0x41f080 STR	Q22, [X15, X16]

  (379) 0x41f084 ADD	X16, X16, #16

  (379) 0x41f088 CMP	X13, X16

  (379) 0x41f08c B.EQ	41f138

    (391) 0x41f090 LDR	Q31, [X15, X16]

    (391) 0x41f094 ADD	X17, X16, #16

    (391) 0x41f098 ADD	X11, X16, #32

    (391) 0x41f09c ADD	X12, X16, #48

    (391) 0x41f0a0 ADD	X3, X16, #64

    (391) 0x41f0a4 LDR	Q20, [X18, X16]

    (391) 0x41f0a8 ADD	X5, X16, #80

    (391) 0x41f0ac ADD	X2, X16, #96

    (391) 0x41f0b0 ADD	X1, X16, #112

    (391) 0x41f0b4 FSUB	V29.2D, V31.2D, V20.2D

    (391) 0x41f0b8 STR	Q29, [X15, X16]

    (391) 0x41f0bc ADD	X16, X16, #128

    (391) 0x41f0c0 LDR	Q1, [X15, X17]

    (391) 0x41f0c4 LDR	Q27, [X18, X17]

    (391) 0x41f0c8 FSUB	V19.2D, V1.2D, V27.2D

    (391) 0x41f0cc STR	Q19, [X15, X17]

    (391) 0x41f0d0 LDR	Q21, [X15, X11]

    (391) 0x41f0d4 LDR	Q25, [X18, X11]

    (391) 0x41f0d8 FSUB	V26.2D, V21.2D, V25.2D

    (391) 0x41f0dc STR	Q26, [X15, X11]

    (391) 0x41f0e0 LDR	Q30, [X15, X12]

    (391) 0x41f0e4 LDR	Q2, [X18, X12]

    (391) 0x41f0e8 FSUB	V3.2D, V30.2D, V2.2D

    (391) 0x41f0ec STR	Q3, [X15, X12]

    (391) 0x41f0f0 LDR	Q4, [X15, X3]

    (391) 0x41f0f4 LDR	Q6, [X18, X3]

    (391) 0x41f0f8 FSUB	V7.2D, V4.2D, V6.2D

    (391) 0x41f0fc STR	Q7, [X15, X3]

    (391) 0x41f100 LDR	Q5, [X15, X5]

    (391) 0x41f104 LDR	Q23, [X18, X5]

    (391) 0x41f108 FSUB	V18.2D, V5.2D, V23.2D

    (391) 0x41f10c STR	Q18, [X15, X5]

    (391) 0x41f110 LDR	Q16, [X15, X2]

    (391) 0x41f114 LDR	Q17, [X18, X2]

    (391) 0x41f118 FSUB	V24.2D, V16.2D, V17.2D

    (391) 0x41f11c STR	Q24, [X15, X2]

    (391) 0x41f120 LDR	Q0, [X15, X1]

    (391) 0x41f124 LDR	Q28, [X18, X1]

    (391) 0x41f128 FSUB	V22.2D, V0.2D, V28.2D

    (391) 0x41f12c STR	Q22, [X15, X1]

    (391) 0x41f130 CMP	X13, X16

    (391) 0x41f134 B.NE	41f090

  (379) 0x41f138 TBZ	W0, #0, 41f154

  (379) 0x41f13c AND	X30, X0, #8127

  (379) 0x41f140 UBFM	X6, X30, #61, #60

  (379) 0x41f144 LDR	D31, [X15, X6]

  (379) 0x41f148 LDR	D20, [X18, X6]

  (379) 0x41f14c FSUB	D29, D31, S20

  (379) 0x41f150 STR	D29, [X15, X6]

    (380) 0x41f154 LDR	X16, [SP, #248]

    (380) 0x41f158 AND	X15, X0, #7936

    (380) 0x41f15c CNTH	X18, ALL

    (380) 0x41f160 SUB	X4, X15, #1

    (380) 0x41f164 ADD	X12, X18, #7

    (380) 0x41f168 CMP	X4, X12

    (380) 0x41f16c MOVZ	X5, #0

    (380) 0x41f170 LDR	X17, [X16, #24]

    (380) 0x41f174 B.CC	41f9fc

    (380) 0x41f178 SUB	X11, X15, X18

    (380) 0x41f17c ORR	X2, XZR, X17

    (380) 0x41f180 DUP	Z26.D, #0

    (380) 0x41f184 CNTB	X3, ALL, MUL #4

    (380) 0x41f188 PTRUE	P6.B, ALL

    (380) 0x41f18c ORR	Z1.D, Z26.D, Z26.D

    (380) 0x41f190 ORR	Z29.D, Z26.D, Z26.D

    (380) 0x41f194 ORR	Z19.D, Z26.D, Z26.D

    (380) 0x41f198 HINT	#0

    (380) 0x41f19c HINT	#0

      (390) 0x41f1a0 ADD	X5, X5, X18

      (390) 0x41f1a4 LD1D	{Z20.D}, P6/Z, [X2, MUL VL]

      (390) 0x41f1a8 LD1D	{Z27.D}, P6/Z, [X2, #1, MUL VL]

      (390) 0x41f1ac LD1D	{Z21.D}, P6/Z, [X2, #2, MUL VL]

      (390) 0x41f1b0 LD1D	{Z25.D}, P6/Z, [X2, #3, MUL VL]

      (390) 0x41f1b4 FADD	Z19.D, Z19.D, Z20.D

      (390) 0x41f1b8 ADD	X2, X2, X3

      (390) 0x41f1bc FADD	Z29.D, Z29.D, Z27.D

      (390) 0x41f1c0 FADD	Z1.D, Z1.D, Z21.D

      (390) 0x41f1c4 FADD	Z26.D, Z26.D, Z25.D

      (390) 0x41f1c8 CMP	X5, X11

      (390) 0x41f1cc B.LS	41f1a0

    (380) 0x41f1d0 FADD	Z30.D, Z26.D, Z1.D

    (380) 0x41f1d4 FADD	Z2.D, Z29.D, Z19.D

    (380) 0x41f1d8 FADD	Z31.D, Z30.D, Z2.D

    (380) 0x41f1dc CMP	X5, X15

    (380) 0x41f1e0 B.EQ	41f214

    (380) 0x41f1e4 ADD	X30, X17, X5,LSL #3

    (380) 0x41f1e8 MOVZ	X20, #0

    (380) 0x41f1ec CNTD	X6, ALL

    (380) 0x41f1f0 SUB	X1, X15, X5

    (380) 0x41f1f4 WHILELO	P4.D, XZR, X1

    (380) 0x41f1f8 HINT	#0

    (380) 0x41f1fc HINT	#0

      (368) 0x41f200 LD1D	{Z3.D}, P4/Z, [X30, X20,LSL #3]

      (368) 0x41f204 ADD	X20, X20, X6

      (368) 0x41f208 FADD	Z31.D, P4/M, Z31.D, Z3.D

      (368) 0x41f20c WHILELO	P4.D, X20, X1

      (368) 0x41f210 B.NE	41f200

    (380) 0x41f214 PTRUE	P1.B, ALL

    (380) 0x41f218 FADDV	D4, P1, Z31.D

    (380) 0x41f21c FNEG	D0, D4

      (377) 0x41f220 STR	D0, [X19, #16]

      (377) 0x41f224 LDP	X27, X28, [SP, #80]

      (377) 0x41f228 LDP	X29, X30, [SP]

      (377) 0x41f22c LDP	X19, X20, [SP, #16]

      (377) 0x41f230 ADDVL	SP, SP, #26

      (377) 0x41f234 ADD	SP, SP, #256

      (377) 0x41f238 RET

        (371) 0x41f23c CMP	W21, #0

        (371) 0x41f240 B.LE	41f520

        (371) 0x41f244 LDR	X15, [X19, #160]

        (371) 0x41f248 UBFM	X7, X21, #61, #31

        (371) 0x41f24c MOVZ	X4, #0

        (371) 0x41f250 SUB	X10, X7, #8

        (371) 0x41f254 UBFM	X11, X10, #3, #63

        (371) 0x41f258 LDR	X6, [X19, #456]

        (371) 0x41f25c ADD	X12, X11, #1

        (371) 0x41f260 ANDS	X14, X12, #4160

        (371) 0x41f264 LDR	X5, [X15, #24]

        (371) 0x41f268 B.EQ	41f35c

        (371) 0x41f26c CMP	X14, #1

        (371) 0x41f270 B.EQ	41f30c

        (371) 0x41f274 CMP	X14, #2

        (371) 0x41f278 B.EQ	41f2c4

        (371) 0x41f27c LDRSW	X16, [X5]

        (371) 0x41f280 LDR	X0, [X6, X16,LSL #3]

        (371) 0x41f284 CBZ	X0, 41f2bc

        (371) 0x41f288 LDR	D0, [X22]

        (371) 0x41f28c LDR	D31, [X0, #8]

        (371) 0x41f290 FCMPE	D0, D31

        (371) 0x41f294 B.MI	41f600

        (371) 0x41f298 MOVI	D0, #0

        (371) 0x41f29c STR	XZR, [X23]

        (371) 0x41f2a0 STR	D0, [X20]

        (371) 0x41f2a4 LDR	X17, [X19, #256]

        (371) 0x41f2a8 STR	D0, [X17]

        (371) 0x41f2ac LDR	D1, [X20]

        (371) 0x41f2b0 LDR	D30, [X22]

        (371) 0x41f2b4 FDIV	D2, D1, D30

        (371) 0x41f2b8 STR	D2, [X20]

        (371) 0x41f2bc ADD	X5, X5, #4

        (371) 0x41f2c0 MOVZ	X4, #8

        (371) 0x41f2c4 LDRSW	X18, [X5]

        (371) 0x41f2c8 LDR	X0, [X6, X18,LSL #3]

        (371) 0x41f2cc CBZ	X0, 41f304

        (371) 0x41f2d0 LDR	D0, [X22, X4]

        (371) 0x41f2d4 LDR	D3, [X0, #8]

        (371) 0x41f2d8 FCMPE	D0, D3

        (371) 0x41f2dc B.MI	41f5d0

        (371) 0x41f2e0 MOVI	D0, #0

        (371) 0x41f2e4 STR	XZR, [X23, X4]

        (371) 0x41f2e8 STR	D0, [X20, X4]

        (371) 0x41f2ec LDR	X30, [X19, #256]

        (371) 0x41f2f0 STR	D0, [X30, X4]

        (371) 0x41f2f4 LDR	D4, [X22, X4]

        (371) 0x41f2f8 LDR	D5, [X20, X4]

        (371) 0x41f2fc FDIV	D6, D5, D4

        (371) 0x41f300 STR	D6, [X20, X4]

        (371) 0x41f304 ADD	X5, X5, #4

        (371) 0x41f308 ADD	X4, X4, #8

        (371) 0x41f30c LDRSW	X0, [X5]

        (371) 0x41f310 LDR	X0, [X6, X0,LSL #3]

        (371) 0x41f314 CBZ	X0, 41f34c

        (371) 0x41f318 LDR	D0, [X22, X4]

        (371) 0x41f31c LDR	D7, [X0, #8]

        (371) 0x41f320 FCMPE	D0, D7

        (371) 0x41f324 B.MI	41f584

        (371) 0x41f328 MOVI	D0, #0

        (371) 0x41f32c STR	XZR, [X23, X4]

        (371) 0x41f330 STR	D0, [X20, X4]

        (371) 0x41f334 LDR	X1, [X19, #256]

        (371) 0x41f338 STR	D0, [X1, X4]

        (371) 0x41f33c LDR	D8, [X22, X4]

        (371) 0x41f340 LDR	D9, [X20, X4]

        (371) 0x41f344 FDIV	D10, D9, D8

        (371) 0x41f348 STR	D10, [X20, X4]

        (371) 0x41f34c ADD	X4, X4, #8

        (371) 0x41f350 ADD	X5, X5, #4

        (371) 0x41f354 CMP	X7, X4

        (371) 0x41f358 B.EQ	41f520

        (371) 0x41f35c STR	X3, [SP, #176]

        (371) 0x41f360 STR	W21, [SP, #184]

        (371) 0x41f364 ORR	X21, XZR, X5

        (371) 0x41f368 STR	W13, [SP, #192]

        (371) 0x41f36c STP	X24, X25, [SP, #200]

        (371) 0x41f370 ORR	X24, XZR, X23

        (371) 0x41f374 ORR	X25, XZR, X6

        (371) 0x41f378 ORR	X23, XZR, X20

        (371) 0x41f37c ORR	X20, XZR, X22

        (371) 0x41f380 ORR	X22, XZR, X4

        (371) 0x41f384 STP	X26, X27, [SP, #216]

        (371) 0x41f388 ORR	X26, XZR, X19

        (371) 0x41f38c ORR	X19, XZR, X7

        (371) 0x41f390 B	41f498

          (389) 0x41f394 MOVI	D0, #0

          (389) 0x41f398 STR	XZR, [X24, X22]

          (389) 0x41f39c STR	D0, [X23, X22]

          (389) 0x41f3a0 LDR	X27, [X26, #256]

          (389) 0x41f3a4 STR	D0, [X27, X22]

          (389) 0x41f3a8 LDR	D12, [X20, X22]

          (389) 0x41f3ac LDR	D13, [X23, X22]

          (389) 0x41f3b0 FDIV	D14, D13, D12

          (389) 0x41f3b4 STR	D14, [X23, X22]

          (389) 0x41f3b8 LDRSW	X3, [X21, #4]

          (389) 0x41f3bc ADD	X22, X22, #8

          (389) 0x41f3c0 ADD	X21, X21, #4

          (389) 0x41f3c4 LDR	X0, [X25, X3,LSL #3]

          (389) 0x41f3c8 CBZ	X0, 41f400

          (389) 0x41f3cc LDR	D0, [X20, X22]

          (389) 0x41f3d0 LDR	D15, [X0, #8]

          (389) 0x41f3d4 FCMPE	D0, D15

          (389) 0x41f3d8 B.MI	41f558

          (389) 0x41f3dc MOVI	D0, #0

          (389) 0x41f3e0 STR	XZR, [X24, X22]

          (389) 0x41f3e4 STR	D0, [X23, X22]

          (389) 0x41f3e8 LDR	X2, [X26, #256]

          (389) 0x41f3ec STR	D0, [X2, X22]

          (389) 0x41f3f0 LDR	D16, [X20, X22]

          (389) 0x41f3f4 LDR	D17, [X23, X22]

          (389) 0x41f3f8 FDIV	D18, D17, D16

          (389) 0x41f3fc STR	D18, [X23, X22]

          (389) 0x41f400 LDRSW	X8, [X21, #4]

          (389) 0x41f404 ADD	X27, X22, #8

          (389) 0x41f408 LDR	X0, [X25, X8,LSL #3]

          (389) 0x41f40c CBZ	X0, 41f444

          (389) 0x41f410 LDR	D0, [X20, X27]

          (389) 0x41f414 LDR	D19, [X0, #8]

          (389) 0x41f418 FCMPE	D0, D19

          (389) 0x41f41c B.MI	41f568

          (389) 0x41f420 MOVI	D0, #0

          (389) 0x41f424 STR	XZR, [X24, X27]

          (389) 0x41f428 STR	D0, [X23, X27]

          (389) 0x41f42c LDR	X9, [X26, #256]

          (389) 0x41f430 STR	D0, [X9, X27]

          (389) 0x41f434 LDR	D20, [X20, X27]

          (389) 0x41f438 LDR	D21, [X23, X27]

          (389) 0x41f43c FDIV	D22, D21, D20

          (389) 0x41f440 STR	D22, [X23, X27]

          (389) 0x41f444 LDRSW	X10, [X21, #8]

          (389) 0x41f448 ADD	X27, X22, #16

          (389) 0x41f44c LDR	X0, [X25, X10,LSL #3]

          (389) 0x41f450 CBZ	X0, 41f488

          (389) 0x41f454 LDR	D0, [X20, X27]

          (389) 0x41f458 LDR	D23, [X0, #8]

          (389) 0x41f45c FCMPE	D0, D23

          (389) 0x41f460 B.MI	41f548

          (389) 0x41f464 MOVI	D0, #0

          (389) 0x41f468 STR	XZR, [X24, X27]

          (389) 0x41f46c STR	D0, [X23, X27]

          (389) 0x41f470 LDR	X11, [X26, #256]

          (389) 0x41f474 STR	D0, [X11, X27]

          (389) 0x41f478 LDR	D24, [X20, X27]

          (389) 0x41f47c LDR	D25, [X23, X27]

          (389) 0x41f480 FDIV	D26, D25, D24

          (389) 0x41f484 STR	D26, [X23, X27]

          (389) 0x41f488 ADD	X22, X22, #24

          (389) 0x41f48c ADD	X21, X21, #12

          (389) 0x41f490 CMP	X19, X22

          (389) 0x41f494 B.EQ	41f500

          (389) 0x41f498 LDRSW	X13, [X21]

          (389) 0x41f49c LDR	X0, [X25, X13,LSL #3]

          (389) 0x41f4a0 CBZ	X0, 41f3b8

          (389) 0x41f4a4 LDR	D0, [X20, X22]

          (389) 0x41f4a8 LDR	D11, [X0, #8]

          (389) 0x41f4ac FCMPE	D0, D11

          (389) 0x41f4b0 B.GE	41f394

          (389) 0x41f4b4 ADD	X2, X24, X22

          (389) 0x41f4b8 ADD	X1, X23, X22

          (389) 0x41f4bc BL	40d760

          (389) 0x41f4c0 B	41f3a0

            (370) 0x41f4c4 STR	XZR, [X6, X4,LSL #3]

            (370) 0x41f4c8 ADD	X4, X4, #1

            (370) 0x41f4cc ADD	X10, X10, X15

            (370) 0x41f4d0 ADD	X11, X11, X9

            (370) 0x41f4d4 CMP	X4, #3

            (370) 0x41f4d8 B.NE	41ecb8

          (373) 0x41f4dc LDR	X6, [X28, #24]

          (373) 0x41f4e0 ADD	X24, X24, #1

          (373) 0x41f4e4 STR	D23, [X6, X30]

          (373) 0x41f4e8 LDR	X30, [SP, #168]

          (373) 0x41f4ec ADD	X9, X30, #40

          (373) 0x41f4f0 STR	X9, [SP, #168]

          (373) 0x41f4f4 CMP	W13, W24

          (373) 0x41f4f8 B.GT	41e140

      (377) 0x41f4fc B	41edb4

        (371) 0x41f500 LDR	X3, [SP, #176]

        (371) 0x41f504 ORR	X20, XZR, X23

        (371) 0x41f508 ORR	X19, XZR, X26

        (371) 0x41f50c ORR	X23, XZR, X24

        (371) 0x41f510 LDP	X26, X27, [SP, #216]

        (371) 0x41f514 LDP	X24, X25, [SP, #200]

        (371) 0x41f518 LDR	W21, [SP, #184]

        (371) 0x41f51c LDR	W13, [SP, #192]

        (371) 0x41f520 SBFM	X22, X21, #61, #31

        (371) 0x41f524 PTRUE	P7.B, ALL

        (371) 0x41f528 LDR	X18, [X19, #256]

        (371) 0x41f52c CBNZ	X22, 41eb14

          (373) 0x41f530 MOVI	D26, #0

          (373) 0x41f534 B	41ebbc

            (384) 0x41f538 MOVZ	W22, #0

            (384) 0x41f53c PTRUE	P0.B, ALL

            (384) 0x41f540 DUP	Z15.D, #0

            (384) 0x41f544 B	41ed38

          (389) 0x41f548 ADD	X2, X24, X27

          (389) 0x41f54c ADD	X1, X23, X27

          (389) 0x41f550 BL	40d760

          (389) 0x41f554 B	41f470

          (389) 0x41f558 ADD	X2, X24, X22

          (389) 0x41f55c ADD	X1, X23, X22

          (389) 0x41f560 BL	40d760

          (389) 0x41f564 B	41f3e8

          (389) 0x41f568 ADD	X2, X24, X27

          (389) 0x41f56c ADD	X1, X23, X27

          (389) 0x41f570 BL	40d760

          (389) 0x41f574 B	41f42c

          (373) 0x41f578 MOVI	D23, #0

          (373) 0x41f57c SUB	W8, W21, #1

          (373) 0x41f580 B	41eca8

        (371) 0x41f584 ADD	X2, X23, X4

        (371) 0x41f588 ADD	X1, X20, X4

        (371) 0x41f58c STP	X4, X3, [SP, #176]

        (371) 0x41f590 STP	X5, X7, [SP, #192]

        (371) 0x41f594 STR	X6, [SP, #208]

        (371) 0x41f598 STR	W13, [SP, #216]

        (371) 0x41f59c BL	40d760

        (371) 0x41f5a0 LDR	X6, [SP, #208]

        (371) 0x41f5a4 LDP	X4, X3, [SP, #176]

        (371) 0x41f5a8 LDP	X5, X7, [SP, #192]

        (371) 0x41f5ac LDR	W13, [SP, #216]

        (371) 0x41f5b0 B	41f334

          (373) 0x41f5b4 MOVZ	W12, #0

          (373) 0x41f5b8 DUP	Z17.D, #0

          (373) 0x41f5bc B	41ec64

        (371) 0x41f5c0 MOVZ	X8, #0

        (371) 0x41f5c4 PTRUE	P7.B, ALL

        (371) 0x41f5c8 DUP	Z2.D, #0

        (371) 0x41f5cc B	41eb90

        (371) 0x41f5d0 ADD	X2, X23, X4

        (371) 0x41f5d4 ADD	X1, X20, X4

        (371) 0x41f5d8 STP	X4, X3, [SP, #176]

        (371) 0x41f5dc STP	X5, X7, [SP, #192]

        (371) 0x41f5e0 STR	X6, [SP, #208]

        (371) 0x41f5e4 STR	W13, [SP, #216]

        (371) 0x41f5e8 BL	40d760

        (371) 0x41f5ec LDR	X6, [SP, #208]

        (371) 0x41f5f0 LDP	X4, X3, [SP, #176]

        (371) 0x41f5f4 LDP	X5, X7, [SP, #192]

        (371) 0x41f5f8 LDR	W13, [SP, #216]

        (371) 0x41f5fc B	41f2ec

        (371) 0x41f600 ORR	X2, XZR, X23

        (371) 0x41f604 ORR	X1, XZR, X20

        (371) 0x41f608 STP	X3, X5, [SP, #176]

        (371) 0x41f60c STP	X7, X6, [SP, #192]

        (371) 0x41f610 STR	W13, [SP, #208]

        (371) 0x41f614 BL	40d760

        (371) 0x41f618 LDR	W13, [SP, #208]

        (371) 0x41f61c LDP	X3, X5, [SP, #176]

        (371) 0x41f620 LDP	X7, X6, [SP, #192]

        (371) 0x41f624 B	41f2a4

0x41f628 MOVZ	W4, #1

0x41f62c BLR	X7

0x41f630 LDR	D0, [X19, #16]

0x41f634 LDP	X29, X30, [SP]

0x41f638 LDP	X19, X20, [SP, #16]

0x41f63c ADDVL	SP, SP, #26

0x41f640 ADD	SP, SP, #256

0x41f644 RET

(382) 0x41f648 LDR	X28, [SP, #240]

(382) 0x41f64c LDR	X15, [X28, #24]

(382) 0x41f650 B	41efa0

  (379) 0x41f654 LDP	Q6, Q7, [X2, #16]

  (379) 0x41f658 ADD	X1, X27, #48

  (379) 0x41f65c LDP	Q4, Q5, [X27]

  (379) 0x41f660 LDR	Q0, [X27, #32]

  (379) 0x41f664 LDR	Q23, [X3], #48

  (379) 0x41f668 FADD	V18.2D, V0.2D, V7.2D

  (379) 0x41f66c FADD	V17.2D, V5.2D, V6.2D

  (379) 0x41f670 FADD	V16.2D, V4.2D, V23.2D

  (379) 0x41f674 STR	Q18, [X27, #32]

  (379) 0x41f678 STP	Q16, Q17, [X27]

  (379) 0x41f67c B	41ee44

    (380) 0x41f680 LDP	D8, D9, [SP, #96]

    (380) 0x41f684 MOVZ	X0, #1

    (380) 0x41f688 LDP	X21, X22, [SP, #32]

    (380) 0x41f68c LDP	X23, X24, [SP, #48]

    (380) 0x41f690 LDP	X25, X26, [SP, #64]

    (380) 0x41f694 LDP	D10, D11, [SP, #112]

    (380) 0x41f698 LDP	D12, D13, [SP, #128]

    (380) 0x41f69c LDP	D14, D15, [SP, #144]

    (380) 0x41f6a0 ADD	X4, X0, X0,LSL #1

    (380) 0x41f6a4 ORR	X1, XZR, X27

    (380) 0x41f6a8 ORR	X27, XZR, #3841

    (380) 0x41f6ac MOVK	X27, #43691

    (380) 0x41f6b0 ADD	X11, X1, X4,LSL #3

    (380) 0x41f6b4 MOVK	X27, #2730

    (380) 0x41f6b8 SUB	X18, X11, X1

    (380) 0x41f6bc SUB	X16, X18, #24

    (380) 0x41f6c0 UBFM	X17, X16, #3, #63

    (380) 0x41f6c4 MADD	X12, X17, X27, XZR

    (380) 0x41f6c8 ADD	X3, X12, #1

    (380) 0x41f6cc ANDS	X5, X3, #4160

    (380) 0x41f6d0 B.EQ	41f754

    (380) 0x41f6d4 CMP	X5, #1

    (380) 0x41f6d8 B.EQ	41f718

    (380) 0x41f6dc CMP	X5, #2

    (380) 0x41f6e0 B.NE	41fa0c

    (380) 0x41f6e4 LDR	D31, [X2]

    (380) 0x41f6e8 ADD	X2, X2, #24

    (380) 0x41f6ec LDP	D0, D28, [X1]

    (380) 0x41f6f0 ADD	X1, X1, #24

    (380) 0x41f6f4 LDUR	D22, [X1, #504]

    (380) 0x41f6f8 FADD	D20, D0, D31

    (380) 0x41f6fc STUR	D20, [X1, #488]

    (380) 0x41f700 LDUR	D29, [X2, #496]

    (380) 0x41f704 FADD	D1, D28, D29

    (380) 0x41f708 STUR	D1, [X1, #496]

    (380) 0x41f70c LDUR	D19, [X2, #504]

    (380) 0x41f710 FADD	D21, D22, D19

    (380) 0x41f714 STUR	D21, [X1, #504]

    (380) 0x41f718 LDR	D30, [X2]

    (380) 0x41f71c ADD	X2, X2, #24

    (380) 0x41f720 LDP	D27, D25, [X1]

    (380) 0x41f724 ADD	X1, X1, #24

    (380) 0x41f728 LDUR	D26, [X1, #504]

    (380) 0x41f72c FADD	D2, D27, D30

    (380) 0x41f730 STUR	D2, [X1, #488]

    (380) 0x41f734 LDUR	D3, [X2, #496]

    (380) 0x41f738 FADD	D4, D25, D3

    (380) 0x41f73c STUR	D4, [X1, #496]

    (380) 0x41f740 LDUR	D6, [X2, #504]

    (380) 0x41f744 FADD	D7, D26, D6

    (380) 0x41f748 STUR	D7, [X1, #504]

    (380) 0x41f74c CMP	X11, X1

    (380) 0x41f750 B.EQ	41f820

      (378) 0x41f754 LDR	D17, [X2]

      (378) 0x41f758 ADD	X30, X1, #24

      (378) 0x41f75c ADD	X6, X1, #48

      (378) 0x41f760 ADD	X9, X1, #72

      (378) 0x41f764 ORR	X20, XZR, X2

      (378) 0x41f768 LDP	D5, D23, [X1]

      (378) 0x41f76c ADD	X2, X2, #96

      (378) 0x41f770 LDP	D18, D16, [X1, #16]

      (378) 0x41f774 ADD	X1, X1, #96

      (378) 0x41f778 FADD	D24, D5, D17

      (378) 0x41f77c STUR	D24, [X1, #416]

      (378) 0x41f780 LDUR	D0, [X2, #424]

      (378) 0x41f784 FADD	D28, D23, D0

      (378) 0x41f788 STUR	D28, [X1, #424]

      (378) 0x41f78c LDUR	D22, [X2, #432]

      (378) 0x41f790 FADD	D31, D18, D22

      (378) 0x41f794 STUR	D31, [X1, #432]

      (378) 0x41f798 LDUR	D20, [X2, #440]

      (378) 0x41f79c FADD	D29, D16, D20

      (378) 0x41f7a0 STUR	D29, [X1, #440]

      (378) 0x41f7a4 LDUR	D19, [X2, #448]

      (378) 0x41f7a8 LDP	D1, D27, [X30, #8]

      (378) 0x41f7ac FADD	D21, D1, D19

      (378) 0x41f7b0 STR	D21, [X30, #8]

      (378) 0x41f7b4 LDUR	D25, [X2, #456]

      (378) 0x41f7b8 FADD	D26, D27, D25

      (378) 0x41f7bc STR	D26, [X30, #16]

      (378) 0x41f7c0 LDUR	D2, [X2, #464]

      (378) 0x41f7c4 LDUR	D30, [X1, #464]

      (378) 0x41f7c8 FADD	D3, D30, D2

      (378) 0x41f7cc STUR	D3, [X1, #464]

      (378) 0x41f7d0 LDUR	D7, [X2, #472]

      (378) 0x41f7d4 LDP	D4, D6, [X6, #8]

      (378) 0x41f7d8 FADD	D5, D4, D7

      (378) 0x41f7dc STR	D5, [X6, #8]

      (378) 0x41f7e0 LDUR	D23, [X2, #480]

      (378) 0x41f7e4 FADD	D18, D6, D23

      (378) 0x41f7e8 STR	D18, [X6, #16]

      (378) 0x41f7ec LDUR	D16, [X1, #488]

      (378) 0x41f7f0 LDUR	D17, [X2, #488]

      (378) 0x41f7f4 FADD	D24, D16, D17

      (378) 0x41f7f8 STUR	D24, [X1, #488]

      (378) 0x41f7fc LDUR	D0, [X2, #496]

      (378) 0x41f800 LDP	D28, D22, [X9, #8]

      (378) 0x41f804 FADD	D31, D28, D0

      (378) 0x41f808 STR	D31, [X9, #8]

      (378) 0x41f80c LDR	D20, [X20, #88]

      (378) 0x41f810 FADD	D29, D22, D20

      (378) 0x41f814 STR	D29, [X9, #16]

      (378) 0x41f818 CMP	X11, X1

      (378) 0x41f81c B.NE	41f754

    (380) 0x41f820 LDR	X7, [SP, #240]

    (380) 0x41f824 ORR	X20, XZR, X0

    (380) 0x41f828 LDR	X18, [X28, #24]

    (380) 0x41f82c LDR	X15, [X7, #24]

    (380) 0x41f830 CMP	W13, #1

    (380) 0x41f834 B.NE	41efa0

    (380) 0x41f838 ANDS	X9, X20, #4224

    (380) 0x41f83c MOVZ	X0, #0

    (380) 0x41f840 B.EQ	41f908

    (380) 0x41f844 CMP	X9, #1

    (380) 0x41f848 B.EQ	41f8ec

    (380) 0x41f84c CMP	X9, #2

    (380) 0x41f850 B.EQ	41f8d8

    (380) 0x41f854 CMP	X9, #3

    (380) 0x41f858 B.EQ	41f8c4

    (380) 0x41f85c CMP	X9, #4

    (380) 0x41f860 B.EQ	41f8b0

    (380) 0x41f864 CMP	X9, #5

    (380) 0x41f868 B.EQ	41f89c

    (380) 0x41f86c CMP	X9, #6

    (380) 0x41f870 B.EQ	41f888

    (380) 0x41f874 LDR	D1, [X15]

    (380) 0x41f878 MOVZ	X0, #1

    (380) 0x41f87c LDR	D27, [X18]

    (380) 0x41f880 FSUB	D19, D1, S27

    (380) 0x41f884 STR	D19, [X15]

    (380) 0x41f888 LDR	D21, [X15, X0,LSL #3]

    (380) 0x41f88c LDR	D25, [X18, X0,LSL #3]

    (380) 0x41f890 FSUB	D26, D21, S25

    (380) 0x41f894 STR	D26, [X15, X0,LSL #3]

    (380) 0x41f898 ADD	X0, X0, #1

    (380) 0x41f89c LDR	D30, [X15, X0,LSL #3]

    (380) 0x41f8a0 LDR	D2, [X18, X0,LSL #3]

    (380) 0x41f8a4 FSUB	D3, D30, S2

    (380) 0x41f8a8 STR	D3, [X15, X0,LSL #3]

    (380) 0x41f8ac ADD	X0, X0, #1

    (380) 0x41f8b0 LDR	D4, [X15, X0,LSL #3]

    (380) 0x41f8b4 LDR	D6, [X18, X0,LSL #3]

    (380) 0x41f8b8 FSUB	D7, D4, S6

    (380) 0x41f8bc STR	D7, [X15, X0,LSL #3]

    (380) 0x41f8c0 ADD	X0, X0, #1

    (380) 0x41f8c4 LDR	D5, [X15, X0,LSL #3]

    (380) 0x41f8c8 LDR	D23, [X18, X0,LSL #3]

    (380) 0x41f8cc FSUB	D18, D5, S23

    (380) 0x41f8d0 STR	D18, [X15, X0,LSL #3]

    (380) 0x41f8d4 ADD	X0, X0, #1

    (380) 0x41f8d8 LDR	D16, [X15, X0,LSL #3]

    (380) 0x41f8dc LDR	D17, [X18, X0,LSL #3]

    (380) 0x41f8e0 FSUB	D24, D16, S17

    (380) 0x41f8e4 STR	D24, [X15, X0,LSL #3]

    (380) 0x41f8e8 ADD	X0, X0, #1

    (380) 0x41f8ec LDR	D0, [X15, X0,LSL #3]

    (380) 0x41f8f0 LDR	D28, [X18, X0,LSL #3]

    (380) 0x41f8f4 FSUB	D22, D0, S28

    (380) 0x41f8f8 STR	D22, [X15, X0,LSL #3]

    (380) 0x41f8fc ADD	X0, X0, #1

    (380) 0x41f900 CMP	X20, X0

    (380) 0x41f904 B.EQ	41f154

      (367) 0x41f908 LDR	D31, [X15, X0,LSL #3]

      (367) 0x41f90c ADD	X28, X0, #1

      (367) 0x41f910 ADD	X14, X0, #2

      (367) 0x41f914 ADD	X13, X0, #3

      (367) 0x41f918 ADD	X8, X0, #4

      (367) 0x41f91c LDR	D20, [X18, X0,LSL #3]

      (367) 0x41f920 ADD	X7, X0, #5

      (367) 0x41f924 ADD	X10, X0, #6

      (367) 0x41f928 ADD	X27, X0, #7

      (367) 0x41f92c FSUB	D29, D31, S20

      (367) 0x41f930 STR	D29, [X15, X0,LSL #3]

      (367) 0x41f934 ADD	X0, X0, #8

      (367) 0x41f938 LDR	D1, [X15, X28,LSL #3]

      (367) 0x41f93c LDR	D27, [X18, X28,LSL #3]

      (367) 0x41f940 FSUB	D19, D1, S27

      (367) 0x41f944 STR	D19, [X15, X28,LSL #3]

      (367) 0x41f948 LDR	D21, [X15, X14,LSL #3]

      (367) 0x41f94c LDR	D25, [X18, X14,LSL #3]

      (367) 0x41f950 FSUB	D26, D21, S25

      (367) 0x41f954 STR	D26, [X15, X14,LSL #3]

      (367) 0x41f958 LDR	D30, [X15, X13,LSL #3]

      (367) 0x41f95c LDR	D2, [X18, X13,LSL #3]

      (367) 0x41f960 FSUB	D3, D30, S2

      (367) 0x41f964 STR	D3, [X15, X13,LSL #3]

      (367) 0x41f968 LDR	D4, [X15, X8,LSL #3]

      (367) 0x41f96c LDR	D6, [X18, X8,LSL #3]

      (367) 0x41f970 FSUB	D7, D4, S6

      (367) 0x41f974 STR	D7, [X15, X8,LSL #3]

      (367) 0x41f978 LDR	D5, [X15, X7,LSL #3]

      (367) 0x41f97c LDR	D23, [X18, X7,LSL #3]

      (367) 0x41f980 FSUB	D18, D5, S23

      (367) 0x41f984 STR	D18, [X15, X7,LSL #3]

      (367) 0x41f988 LDR	D16, [X15, X10,LSL #3]

      (367) 0x41f98c LDR	D17, [X18, X10,LSL #3]

      (367) 0x41f990 FSUB	D24, D16, S17

      (367) 0x41f994 STR	D24, [X15, X10,LSL #3]

      (367) 0x41f998 LDR	D28, [X15, X27,LSL #3]

      (367) 0x41f99c LDR	D0, [X18, X27,LSL #3]

      (367) 0x41f9a0 FSUB	D22, D28, S0

      (367) 0x41f9a4 STR	D22, [X15, X27,LSL #3]

      (367) 0x41f9a8 CMP	X20, X0

      (367) 0x41f9ac B.NE	41f908

    (380) 0x41f9b0 B	41f154

0x41f9b4 SBFM	X0, X13, #0, #31

0x41f9b8 CBZ	X0, 41f9f4

0x41f9bc LDR	X1, [SP, #232]

0x41f9c0 ADD	X3, X19, #216

0x41f9c4 ADD	X28, X19, #416

0x41f9c8 LDR	X2, [X19, #400]

0x41f9cc STR	X3, [SP, #248]

0x41f9d0 LDR	X27, [X1, #24]

0x41f9d4 B	41ede8

      (377) 0x41f9d8 LDP	D8, D9, [SP, #96]

      (377) 0x41f9dc LDP	X21, X22, [SP, #32]

      (377) 0x41f9e0 LDP	X23, X24, [SP, #48]

      (377) 0x41f9e4 LDP	X25, X26, [SP, #64]

      (377) 0x41f9e8 LDP	D10, D11, [SP, #112]

      (377) 0x41f9ec LDP	D12, D13, [SP, #128]

      (377) 0x41f9f0 LDP	D14, D15, [SP, #144]

      (377) 0x41f9f4 MOVI	D0, #0

      (377) 0x41f9f8 B	41f220

    (380) 0x41f9fc DUP	Z31.D, #0

    (380) 0x41fa00 B	41f1e4

  (379) 0x41fa04 ORR	X20, XZR, X0

  (379) 0x41fa08 B	41f838

    (380) 0x41fa0c LDR	D5, [X2]

    (380) 0x41fa10 ADD	X2, X2, #24

    (380) 0x41fa14 LDP	D4, D6, [X1]

    (380) 0x41fa18 ADD	X1, X1, #24

    (380) 0x41fa1c LDUR	D7, [X1, #504]

    (380) 0x41fa20 FADD	D23, D4, D5

    (380) 0x41fa24 STUR	D23, [X1, #488]

    (380) 0x41fa28 LDUR	D16, [X2, #496]

    (380) 0x41fa2c FADD	D17, D6, D16

    (380) 0x41fa30 STUR	D17, [X1, #496]

    (380) 0x41fa34 LDUR	D18, [X2, #504]

    (380) 0x41fa38 FADD	D24, D7, D18

    (380) 0x41fa3c STUR	D24, [X1, #504]

    (380) 0x41fa40 B	41f6e4

0x41fa44 HINT	#0

0x41fa48 HINT	#0

0x41fa4c HINT	#0

0x41fa50 HINT	#0

0x41fa54 HINT	#0

0x41fa58 HINT	#0

0x41fa5c HINT	#0

Coverage (%)	Name	Source Location	Module

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	OneBodyJastrowRef.h:106-237
Module	exec

The function is defined in:

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:106-123,169-174,184-194,207,214-216,231-237
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:188-191,276-284,291-298,305-336
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_numeric.h:140-141
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:221-223,229,242,249
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:94
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h:952,1146-1151
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h:1131,1147-1150,1263
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/shared_ptr_base.h:1667
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_iterator.h:1068,1139

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 9.33 to 2.00 cycles (4.67x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 29% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 9.33 to 1.71 cycles (5.46x speedup).

Details

22% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 9.33 to 1.00 cycles (9.33x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 116 bytes. The binary function is storing 200 bytes.

General properties

nb instructions	64
loop length	256
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

7.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	6.00	6.00	6.00	6.00	2.00	2.00	0.00	0.00	9.33	9.33	9.33	5.00	5.00
cycles	3.50	3.50	6.00	6.00	6.00	6.00	2.00	2.00	0.00	0.00	9.33	9.33	9.33	5.00	5.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	7.13
Overall L1	9.33

Vectorization ratios

all	22%
load	0%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 9.33 cycles. At this rate:

12% of peak load performance is reached (12.43 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
44% of peak store performance is reached (21.43 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 41e0a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
ADDVL SP, SP, #38	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADRP X4, <20041a0a4>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB SP, SP, #256	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, X4, #2816	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X6, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X7, [X6, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X2, X3, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP X7, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 41f628 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x1588>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W1, [X19, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 484780 <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W13, [X19, #148]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W13, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 41f9b4 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x1914>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X22, X19, #376	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X27, X0, #96	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X28, X19, #416	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X24, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X26, X19, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X25, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X26, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X20, [X19, #280]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X19, #304]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X2, X25, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X25, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W21, [X19, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X2, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BLR X7	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D0, [X19, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
ADDVL SP, SP, #26	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD SP, SP, #256	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SBFM X0, X13, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CBZ X0, 41f9f4 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x1954>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X1, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X3, X19, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X28, X19, #416	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [X19, #400]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X3, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X27, [X1, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B 41ede8 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0xd48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Source file and lines	OneBodyJastrowRef.h:106-237
Module	exec

The function is defined in:

/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:106-123,169-174,184-194,207,214-216,231-237
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:188-191,276-284,291-298,305-336
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_numeric.h:140-141
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:221-223,229,242,249
/home/hbollore/qaas-runs/171-275-7410/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:94
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_algobase.h:952,1146-1151
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_vector.h:1131,1147-1150,1263
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/shared_ptr_base.h:1667
/home/hbollore/gnu/unknow_version/include/c++/14.0.1/bits/stl_iterator.h:1068,1139

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 9.33 to 2.00 cycles (4.67x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

22% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 9.33 to 1.00 cycles (9.33x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 116 bytes. The binary function is storing 200 bytes.

General properties

nb instructions	64
loop length	256
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

7.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	6.00	6.00	6.00	6.00	2.00	2.00	0.00	0.00	9.33	9.33	9.33	5.00	5.00
cycles	3.50	3.50	6.00	6.00	6.00	6.00	2.00	2.00	0.00	0.00	9.33	9.33	9.33	5.00	5.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	7.13
Overall L1	9.33

Vectorization ratios

all	22%
load	0%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 9.33 cycles. At this rate:

12% of peak load performance is reached (12.43 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
44% of peak store performance is reached (21.43 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 41e0a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
ADDVL SP, SP, #38	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADRP X4, <20041a0a4>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB SP, SP, #256	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, X4, #2816	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X6, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X7, [X6, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X2, X3, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP X7, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 41f628 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x1588>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W1, [X19, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 484780 <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W13, [X19, #148]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W13, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 41f9b4 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x1914>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X22, X19, #376	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X27, X0, #96	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X28, X19, #416	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X24, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X26, X19, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR X25, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X26, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X20, [X19, #280]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X19, #304]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X2, X25, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X25, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W21, [X19, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X2, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BLR X7	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D0, [X19, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
ADDVL SP, SP, #26	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD SP, SP, #256	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SBFM X0, X13, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CBZ X0, 41f9f4 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x1954>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X1, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X3, X19, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X28, X19, #416	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [X19, #400]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X3, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X27, [X1, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B 41ede8 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0xd48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼miniqmcreference::OneBodyJastrowRef >::evaluateLog(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib, std::allocator > >&, qmcplusplus::Particl...–	0.01	0.01
▼Loop 382 - OneBodyJastrowRef.h:109-237 - exec–	0	0
▼Loop 379 - OhmmsVector.h:221-249 - exec–	0	0
○Loop 381 - OneBodyJastrowRef.h:169-169 - exec	0	0
▼Loop 380 - OneBodyJastrowRef.h:109-237 - exec–	0	0
○Loop 378 - OneBodyJastrowRef.h:169-169 - exec	0	0
○Loop 367 - OneBodyJastrowRef.h:171-172 - exec	0	0
○Loop 368 - stl_numeric.h:140-141 - exec	0	0
○Loop 390 - stl_numeric.h:140-141 - exec	0	0
▼Loop 377 - OneBodyJastrowRef.h:109-237 - exec–	0	0
▼Loop 371 - stl_numeric.h:140-141 - exec–	0	0
○Loop 374 - stl_numeric.h:140-140 - exec	0	0
○Loop 389 - BsplineFunctor.h:188-191 - exec	0	0
○Loop 369 - stl_numeric.h:140-141 - exec	0	0
○Loop 388 - stl_numeric.h:140-141 - exec	0	0
▼Loop 373 - OneBodyJastrowRef.h:109-216 - exec–	0	0
○Loop 386 - OneBodyJastrowRef.h:186-187 - exec	0	0
○Loop 370 - OneBodyJastrowRef.h:188-194 - exec	0	0
▼Loop 372 - OneBodyJastrowRef.h:214-216 - exec–	0	0
○Loop 375 - BsplineFunctor.h:291-297 - exec	0	0
○Loop 376 - BsplineFunctor.h:305-336 - exec	0	0
○Loop 387 - OneBodyJastrowRef.h:186-187 - exec	0	0
▼Loop 384 - OneBodyJastrowRef.h:184-194 - exec–	0	0
○Loop 385 - OneBodyJastrowRef.h:192-193 - exec	0.01	0.01
○Loop 383 - OneBodyJastrowRef.h:192-193 - exec	0	0
○Loop 391 - OneBodyJastrowRef.h:171-172 - exec	0	0

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code