OV - exec - Function qmcplusplus::WaveFunction::acceptMove(qmcplusplus::ParticleSet&, int)

	Function: qmcplusplus::WaveFunction::acceptMove(qmcplusplus::ParticleSet&, int)	Module: exec	Source: WaveFunction.cpp:225-236 [...]	Coverage: 0.02%

/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/bits/stl_vector.h: 919 - 1046

--------------------------------------------------------------------------------

919:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1046: 	return *(this->_M_impl._M_start + __n);

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/WaveFunction.cpp: 225 - 236

--------------------------------------------------------------------------------

225: {

226:   if (iat < nelup)

227:     Det_up->acceptMove(P, iat);

228:   else

229:     Det_dn->acceptMove(P, iat);

230:

231:   for (size_t i = 0; i < Jastrows.size(); i++)

232:   {

233:     ScopedTimer local_timer(jastrow_timers[i]);

234:     Jastrows[i]->acceptMove(P, iat);

235:   }

236: }

/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/bits/refwrap.h: 338 - 338

--------------------------------------------------------------------------------

338:       { return *_M_data; }

/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249

--------------------------------------------------------------------------------

242:   ScopeGuard(TIMER& t) : timer(t) { timer.start(); }

[...]

249:   ~ScopeGuard() { timer.stop(); }

0x40ceb0 STP	X29, X30, [SP, #960]!

0x40ceb4 STR	X23, [SP, #16]

0x40ceb8 STP	X22, X21, [SP, #32]

0x40cebc STP	X20, X19, [SP, #48]

0x40cec0 ADD	X29, SP, #0

0x40cec4 LDR	W8, [X0, #52]

0x40cec8 ADD	X9, X0, #8

0x40cecc ORR	X21, XZR, X0

0x40ced0 ORR	W19, WZR, W2

0x40ced4 ORR	X20, XZR, X1

0x40ced8 CMP	W8, W2

0x40cedc CSEL	X8, X0, X9, #12

0x40cee0 LDR	X0, [X8]

0x40cee4 LDR	X8, [X0]

0x40cee8 LDR	X8, [X8, #40]

0x40ceec BLR	X8

0x40cef0 LDP	X9, X8, [X21, #16]

0x40cef4 CMP	X8, X9

0x40cef8 B.EQ	40cf48

0x40cefc ORR	X23, XZR, XZR

(139) 0x40cf00 LDR	X8, [X21, #88]

(139) 0x40cf04 LDR	X22, [X8, X23,LSL #3]

(139) 0x40cf08 ORR	X0, XZR, X22

(139) 0x40cf0c BL	44ec60

(139) 0x40cf10 LDR	X8, [X21, #16]

(139) 0x40cf14 LDR	X0, [X8, X23,LSL #3]

(139) 0x40cf18 LDR	X8, [X0]

(139) 0x40cf1c LDR	X8, [X8, #40]

(139) 0x40cf20 ORR	X1, XZR, X20

(139) 0x40cf24 ORR	W2, WZR, W19

(139) 0x40cf28 BLR	X8

(139) 0x40cf2c ORR	X0, XZR, X22

(139) 0x40cf30 BL	44ed80

(139) 0x40cf34 LDP	X9, X8, [X21, #16]

(139) 0x40cf38 ADD	X23, X23, #1

(139) 0x40cf3c SUB	X8, X8, X9

(139) 0x40cf40 CMP	X23, X8,ASR #3

(139) 0x40cf44 B.CC	40cf00

0x40cf48 LDP	X20, X19, [SP, #48]

0x40cf4c LDP	X22, X21, [SP, #32]

0x40cf50 LDR	X23, [SP, #16]

0x40cf54 LDP	X29, X30, [SP], #64

0x40cf58 RET

0x40cf5c BL	409350

0x40cf60 ORR	X19, XZR, X0

0x40cf64 ORR	X0, XZR, X22

0x40cf68 BL	44ed80

0x40cf6c ORR	X0, XZR, X19

0x40cf70 BL	403d00

0x40cf74 BL	409350

0x40cf78 HINT	#0

0x40cf7c HINT	#0

Coverage (%)	Name	Source Location	Module
►100.00+	.omp_outlined..62	miniqmc.cpp:445	exec
○	__kmp_invoke_microtask		libomp.so

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	WaveFunction.cpp:225-236
Module	exec

The function is defined in:

/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/bits/stl_vector.h:919,1046
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/WaveFunction.cpp:225-236
/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/bits/refwrap.h:338
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 20% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 4.50 to 0.69 cycles (6.55x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 4.50 to 2.50 cycles (1.80x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 100 bytes. The binary function is storing 56 bytes.

General properties

nb instructions	34
loop length	136
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

4.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	4.50	4.50	4.50	4.50	0.00	0.00	0.00	0.00	4.33	4.33	4.33	2.00	2.00
cycles	3.50	3.50	4.50	4.50	4.50	4.50	0.00	0.00	0.00	0.00	4.33	4.33	4.33	2.00	2.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	4.00
Overall L1	4.50

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 4.50 cycles. At this rate:

23% of peak load performance is reached (22.22 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
25% of peak store performance is reached (12.44 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 40ceb0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #960]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X23, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X22, X21, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X20, X19, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W8, [X0, #52]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X0, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X21, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W19, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X20, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W8, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CSEL X8, X0, X9, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BLR X8	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X9, X8, [X21, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
CMP X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 40cf48 <_ZN11qmcplusplus12WaveFunction10acceptMoveERNS_11ParticleSetEi+0x98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X23, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X20, X19, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X22, X21, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X23, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X29, X30, [SP], #64	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 409350 <__clang_call_terminate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 44ed80 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403d00 <@plt_start@+0x3d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 409350 <__clang_call_terminate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0

Source file and lines	WaveFunction.cpp:225-236
Module	exec

The function is defined in:

/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/bits/stl_vector.h:919,1046
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/WaveFunction.cpp:225-236
/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/bits/refwrap.h:338
/home/hbollore/qaas/qaas-runs/169-816-8620/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 4.50 to 2.50 cycles (1.80x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 100 bytes. The binary function is storing 56 bytes.

General properties

nb instructions	34
loop length	136
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

4.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	4.50	4.50	4.50	4.50	0.00	0.00	0.00	0.00	4.33	4.33	4.33	2.00	2.00
cycles	3.50	3.50	4.50	4.50	4.50	4.50	0.00	0.00	0.00	0.00	4.33	4.33	4.33	2.00	2.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	4.00
Overall L1	4.50

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 4.50 cycles. At this rate:

23% of peak load performance is reached (22.22 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
25% of peak store performance is reached (12.44 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 40ceb0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #960]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X23, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X22, X21, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X20, X19, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W8, [X0, #52]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X0, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X21, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W19, WZR, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X20, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP W8, W2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CSEL X8, X0, X9, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BLR X8	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X9, X8, [X21, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
CMP X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 40cf48 <_ZN11qmcplusplus12WaveFunction10acceptMoveERNS_11ParticleSetEi+0x98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X23, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X20, X19, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X22, X21, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X23, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X29, X30, [SP], #64	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 409350 <__clang_call_terminate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 44ed80 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE4stopEv>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403d00 <@plt_start@+0x3d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 409350 <__clang_call_terminate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼qmcplusplus::WaveFunction::acceptMove(qmcplusplus::ParticleSet&, int)–	0.02	0.01
○Loop 139 - WaveFunction.cpp:231-234 - exec	0.01	0

Report Configuration

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code