OV - exec - Function qmcplusplus::TimerManager<qmcplusplus::TimerType<qmcplusplus::CPUClock> >::pop_timer(qmcplusplus::TimerType<qmcplusplus::CPUClock>*)

	Function: qmcplusplus::TimerManager<qmcplusplus::TimerType<qmcplusplus::CPUClock> >::pop_timer(qmcpl ...	Module: exec	Source: TimerManager.cpp:92-108 [...]	Coverage: 0.84%

/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/ext/new_allocator.h: 139 - 139

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139: 	::operator delete(__p

/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/bits/basic_string.h: 187 - 6522

--------------------------------------------------------------------------------

187:       { return _M_dataplus._M_p; }

[...]

203: 	return std::pointer_traits<const_pointer>::pointer_to(*_M_local_buf);

[...]

231: 	if (!_M_is_local())

[...]

6522:       return __ostream_insert(__os, __str.data(), __str.size());

/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/bits/stl_vector.h: 919 - 1228

--------------------------------------------------------------------------------

919:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1228: 	--this->_M_impl._M_finish;

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.cpp: 92 - 108

--------------------------------------------------------------------------------

92: {

93:   TIMER* stack_top = current_timer();

94:   if (stack_top == nullptr)

95:   {

96:     std::cerr << "Timer stack pop failed on an empty stack! Requested \"" << t->get_name() << "\"." << std::endl;

97:     throw std::runtime_error("TimerManager pop_timer error!");

98:   }

99:   else if (t != stack_top)

100:   {

101:     std::cerr << "Timer stack pop not matching push! "

102:               << "Expecting \"" << t->get_name() << "\" but \"" << stack_top->get_name() << "\" is on the top."

103:               << std::endl;

104:     throw std::runtime_error("TimerManager pop_timer error!");

105:   }

106:   else

107:     CurrentTimerStack.pop_back();

108: }

/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h: 92 - 93

--------------------------------------------------------------------------------

92:     if (CurrentTimerStack.size() > 0)

93:       current = CurrentTimerStack.back();

/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/ostream: 113 - 611

--------------------------------------------------------------------------------

113: 	return __pf(*this);

[...]

611: 	__ostream_insert(__out, __s,

0x4546c0 SUB	SP, SP, #112

0x4546c4 STP	X29, X30, [SP, #64]

0x4546c8 STR	X21, [SP, #80]

0x4546cc STP	X20, X19, [SP, #96]

0x4546d0 ADD	X29, SP, #64

0x4546d4 LDP	X9, X8, [X0, #72]

0x4546d8 CMP	X8, X9

0x4546dc B.EQ	454708

0x4546e0 LDR	X19, [X8, #504]!

0x4546e4 CBZ	X19, 454708

0x4546e8 CMP	X19, X1

0x4546ec B.NE	4547ac

0x4546f0 STR	X8, [X0, #80]

0x4546f4 LDP	X20, X19, [SP, #96]

0x4546f8 LDR	X21, [SP, #80]

0x4546fc LDP	X29, X30, [SP, #64]

0x454700 ADD	SP, SP, #112

0x454704 RET

0x454708 ADRP	X19,

0x45470c ADRP	X8,

0x454710 ADD	X8, X8, #25

0x454714 ORR	X20, XZR, X1

0x454718 LDR	X19, [X19, #4056]

0x45471c ORR	X1, XZR, X8

0x454720 MOVZ	W2, #53

0x454724 ORR	X0, XZR, X19

0x454728 BL	403c40

0x45472c ORR	X0, XZR, X20

0x454730 ADD	X8, SP, #32

0x454734 ADD	X21, SP, #32

0x454738 BL	44fb40

0x45473c LDP	X1, X2, [SP, #32]

0x454740 ORR	X0, XZR, X19

0x454744 BL	403c40

0x454748 ADRP	X1,

0x45474c ADD	X1, X1, #79

0x454750 MOVZ	W2, #2

0x454754 ORR	X19, XZR, X0

0x454758 BL	403c40

0x45475c ORR	X0, XZR, X19

0x454760 BL	403d10

0x454764 LDR	X0, [SP, #32]

0x454768 ADD	X8, SP, #32

0x45476c ADD	X8, X8, #16

0x454770 CMP	X0, X8

0x454774 B.EQ	45477c

0x454778 BL	403dd0

0x45477c MOVZ	W0, #16

0x454780 BL	403f90

0x454784 ORR	X20, XZR, X0

0x454788 ADRP	X1,

0x45478c ADD	X1, X1, #82

0x454790 BL	403b30

(1446) 0x454794 ADRP	X1,

(1446) 0x454798 ADRP	X2,

(1446) 0x45479c ORR	X0, XZR, X20

(1446) 0x4547a0 LDR	X1, [X1, #3960]

(1446) 0x4547a4 LDR	X2, [X2, #3880]

(1446) 0x4547a8 BL	404000

(1446) 0x4547ac ADRP	X20,

(1446) 0x4547b0 ADRP	X8,

(1446) 0x4547b4 ADD	X8, X8, #112

(1446) 0x4547b8 ORR	X21, XZR, X1

(1446) 0x4547bc LDR	X20, [X20, #4056]

(1446) 0x4547c0 ORR	X1, XZR, X8

(1446) 0x4547c4 MOVZ	W2, #35

(1446) 0x4547c8 ORR	X0, XZR, X20

(1446) 0x4547cc BL	403c40

(1446) 0x4547d0 ORR	X0, XZR, X20

(1446) 0x4547d4 ADRP	X1,

(1446) 0x4547d8 ADD	X1, X1, #148

(1446) 0x4547dc MOVZ	W2, #11

(1446) 0x4547e0 BL	403c40

(1446) 0x4547e4 ORR	X0, XZR, X21

(1446) 0x4547e8 ADD	X8, SP, #32

(1446) 0x4547ec BL	44fb40

(1446) 0x4547f0 LDP	X1, X2, [SP, #32]

(1446) 0x4547f4 ORR	X0, XZR, X20

(1446) 0x4547f8 BL	403c40

(1446) 0x4547fc ADRP	X1,

(1446) 0x454800 ADD	X1, X1, #160

(1446) 0x454804 MOVZ	W2, #7

(1446) 0x454808 ORR	X20, XZR, X0

(1446) 0x45480c BL	403c40

(1446) 0x454810 ORR	X0, XZR, X19

(1446) 0x454814 ADD	X8, SP, #0

(1446) 0x454818 BL	44fb40

(1446) 0x45481c LDP	X1, X2, [SP]

(1446) 0x454820 ORR	X0, XZR, X20

(1446) 0x454824 BL	403c40

(1446) 0x454828 ADRP	X1,

(1446) 0x45482c ADD	X1, X1, #168

(1446) 0x454830 MOVZ	W2, #16

(1446) 0x454834 ORR	X19, XZR, X0

(1446) 0x454838 BL	403c40

(1446) 0x45483c ORR	X0, XZR, X19

(1446) 0x454840 BL	403d10

(1446) 0x454844 LDR	X0, [SP]

(1446) 0x454848 ADD	X8, SP, #0

(1446) 0x45484c ADD	X8, X8, #16

(1446) 0x454850 CMP	X0, X8

(1446) 0x454854 B.EQ	45485c

(1446) 0x454858 BL	403dd0

(1446) 0x45485c LDR	X0, [SP, #32]

(1446) 0x454860 ADD	X8, SP, #32

(1446) 0x454864 ADD	X8, X8, #16

(1446) 0x454868 CMP	X0, X8

(1446) 0x45486c B.EQ	454874

(1446) 0x454870 BL	403dd0

(1446) 0x454874 MOVZ	W0, #16

(1446) 0x454878 BL	403f90

(1446) 0x45487c ORR	X20, XZR, X0

(1446) 0x454880 ADRP	X1,

(1446) 0x454884 ADD	X1, X1, #82

(1446) 0x454888 BL	403b30

(1446) 0x45488c B	454794

0x454890 B	4548b8

0x454894 ORR	X19, XZR, X0

0x454898 LDR	X0, [SP]

0x45489c ADD	X8, SP, #0

0x4548a0 ADD	X8, X8, #16

0x4548a4 CMP	X0, X8

0x4548a8 B.EQ	4548cc

0x4548ac BL	403dd0

0x4548b0 B	4548cc

0x4548b4 B	4548c8

0x4548b8 ORR	X19, XZR, X0

0x4548bc ORR	X0, XZR, X20

0x4548c0 BL	403f10

0x4548c4 B	454900

0x4548c8 ORR	X19, XZR, X0

0x4548cc LDR	X0, [SP, #32]

0x4548d0 ADD	X8, SP, #32

0x4548d4 ADD	X8, X8, #16

0x4548d8 CMP	X0, X8

0x4548dc B.EQ	454900

(1445) 0x4548e0 BL	403dd0

(1445) 0x4548e4 ORR	X0, XZR, X19

(1445) 0x4548e8 BL	403d00

(1445) 0x4548ec ORR	X19, XZR, X0

(1445) 0x4548f0 LDR	X0, [SP, #32]

(1445) 0x4548f4 ADD	X8, X21, #16

(1445) 0x4548f8 CMP	X0, X8

(1445) 0x4548fc B.NE	4548e0

0x454900 ORR	X0, XZR, X19

0x454904 BL	403d00

0x454908 HINT	#0

0x45490c HINT	#0

0x454910 HINT	#0

0x454914 HINT	#0

0x454918 HINT	#0

0x45491c HINT	#0

Coverage (%)	Name	Source Location	Module
►100.00+	qmcplusplus::TimerType<qmcplus[...]	NewTimer.cpp:120	exec
○	.omp_outlined..62	miniqmc.cpp:488	exec
○	__kmp_invoke_microtask		libomp.so

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	TimerManager.cpp:92-108
Module	exec

The function is defined in:

/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/ext/new_allocator.h:139
/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/bits/basic_string.h:187,203,231,6522
/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/bits/stl_vector.h:919,1228
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.cpp:92-108
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h:92-93
/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/ostream:113,611

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 23% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 12.75 to 2.00 cycles (6.38x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 12.75 to 5.50 cycles (2.32x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 112 bytes. The binary function is storing 48 bytes.

General properties

nb instructions	81
loop length	324
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

9.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	11.00	11.00	12.75	12.75	12.75	12.75	0.00	0.00	0.00	0.00	4.67	4.67	4.67	2.00	2.00
cycles	11.00	11.00	12.75	12.75	12.75	12.75	0.00	0.00	0.00	0.00	4.67	4.67	4.67	2.00	2.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	9.38
Overall L1	12.75

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 12.75 cycles. At this rate:

9% of peak load performance is reached (8.78 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
7% of peak store performance is reached (3.76 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4546c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #112	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X21, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X20, X19, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X9, X8, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
CMP X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 454708 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X19, [X8, #504]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X19, 454708 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X19, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 4547ac <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0xec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X8, [X0, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X20, X19, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X21, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X29, X30, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
ADD SP, SP, #112	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X19, <489708>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X8, <46770c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X8, X8, #25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X20, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X19, [X19, #4056]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X1, XZR, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #53	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403c40 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X8, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X21, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 44fb40 <_ZNK11qmcplusplus9TimerTypeINS_8CPUClockEE8get_nameB5cxx11Ev>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X1, X2, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403c40 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X1, <467748>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #79	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403c40 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403d10 <@plt_start@+0x3e0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X0, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X8, X8, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X0, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 45477c <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0xbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 403dd0 <@plt_start@+0x4a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W0, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403f90 <@plt_start@+0x660>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X20, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X1, <467788>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #82	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b30 <@plt_start@+0x200>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 4548b8 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x1f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X8, X8, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X0, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4548cc <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x20c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 403dd0 <@plt_start@+0x4a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 4548cc <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x20c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 4548c8 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x208>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403f10 <@plt_start@+0x5e0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 454900 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x240>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X8, X8, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X0, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 454900 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x240>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403d00 <@plt_start@+0x3d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Source file and lines	TimerManager.cpp:92-108
Module	exec

The function is defined in:

/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/ext/new_allocator.h:139
/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/bits/basic_string.h:187,203,231,6522
/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/bits/stl_vector.h:919,1228
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.cpp:92-108
/home/hbollore/qaas/qaas-runs/169-816-7419/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h:92-93
/usr/lib/gcc/aarch64-linux-gnu/11/../../../../include/c++/11/ostream:113,611

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 12.75 to 5.50 cycles (2.32x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 112 bytes. The binary function is storing 48 bytes.

General properties

nb instructions	81
loop length	324
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

9.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	11.00	11.00	12.75	12.75	12.75	12.75	0.00	0.00	0.00	0.00	4.67	4.67	4.67	2.00	2.00
cycles	11.00	11.00	12.75	12.75	12.75	12.75	0.00	0.00	0.00	0.00	4.67	4.67	4.67	2.00	2.00

Cycles executing div or sqrt instructions

Cycles summary

Front-end	9.38
Overall L1	12.75

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 12.75 cycles. At this rate:

9% of peak load performance is reached (8.78 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
7% of peak store performance is reached (3.76 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4546c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #112	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR X21, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X20, X19, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X9, X8, [X0, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
CMP X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 454708 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X19, [X8, #504]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X19, 454708 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X19, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 4547ac <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0xec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X8, [X0, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X20, X19, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X21, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X29, X30, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
ADD SP, SP, #112	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X19, <489708>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X8, <46770c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X8, X8, #25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X20, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X19, [X19, #4056]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X1, XZR, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #53	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403c40 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X8, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X21, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 44fb40 <_ZNK11qmcplusplus9TimerTypeINS_8CPUClockEE8get_nameB5cxx11Ev>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X1, X2, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403c40 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X1, <467748>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #79	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403c40 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403d10 <@plt_start@+0x3e0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X0, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X8, X8, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X0, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 45477c <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0xbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 403dd0 <@plt_start@+0x4a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W0, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403f90 <@plt_start@+0x660>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X20, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X1, <467788>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #82	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403b30 <@plt_start@+0x200>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 4548b8 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x1f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X8, X8, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X0, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4548cc <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x20c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 403dd0 <@plt_start@+0x4a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 4548cc <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x20c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 4548c8 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x208>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403f10 <@plt_start@+0x5e0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 454900 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x240>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X8, X8, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X0, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 454900 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINS_8CPUClockEEEE9pop_timerEPS3_+0x240>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 403d00 <@plt_start@+0x3d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼qmcplusplus::TimerManager >::pop_timer(qmcplusplus::TimerType*)–	0.84	0
○Loop 1446 - TimerManager.cpp:97-104 - exec	0	0
○Loop 1445 - basic_string.h:187-231 - exec	0	0

Report Configuration

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code